This commit is contained in:
seppl
2025-06-30 20:58:09 +02:00
parent 012355c2e8
commit a3ccaae6cc
33 changed files with 6652 additions and 4418 deletions

View File

@@ -2180,6 +2180,7 @@
(alternate "" input line)
(alternate "OSC_OUT" output line)
(alternate "" input line)
(alternate "" input line)
(alternate "[SPI_MOSI]" bidirectional line)
(alternate "[USART_RX]" input line)
)
@@ -2371,6 +2372,7 @@
)
(alternate "" input line)
(alternate "" input line)
(alternate "" input line)
)
(pin power_in line
(at 0 -21.59 90)
@@ -2391,6 +2393,7 @@
)
(alternate "" input line)
(alternate "" input line)
(alternate "" input line)
)
(pin bidirectional line
(at 17.78 11.43 180)
@@ -2412,7 +2415,6 @@
(alternate "" input line)
(alternate "I2C_SDA" bidirectional line)
(alternate "" input line)
(alternate "" input line)
)
(pin bidirectional line
(at 17.78 8.89 180)
@@ -2459,7 +2461,6 @@
(alternate "COMP2_INM" input line)
(alternate "I2C1_SMB" bidirectional line)
(alternate "" input line)
(alternate "" input line)
(alternate "USART_CK" output line)
)
(pin bidirectional line
@@ -6372,18 +6373,19 @@
)
(pin "5"
(uuid "16ef0a54-5f7f-4f3b-8a6d-fb491b1f9b50")
(alternate "[USART_TX]")
)
(pin "6"
(uuid "32098c74-ad21-42d2-a4ec-d9e1c4ace3e5")
(alternate "TIM3_CH2")
(alternate "[USART_RX]")
)
(pin "7"
(uuid "a31e34c8-353c-4e6e-9046-a78a4dfd9f3a")
(alternate "TIM2_CH1")
(alternate "V_{SS}/V_{SSA}/V_{REF-}")
)
(pin "8"
(uuid "12c981a3-ad26-4a29-8b26-73b74349229c")
(alternate "TIM3_CH1")
(alternate "V_{DD}/V_{DDA}/V_{REF-}")
)
(pin "9"
(uuid "126197c6-274e-46fa-9ca6-37ffdc40e4e4")

View File

@@ -5,6 +5,9 @@
"stm8l15x_conf.h": "c",
"stm8l15x_rtc.h": "c",
"stdio.h": "c",
"stm8l15x_usart.h": "c"
"stm8l15x_usart.h": "c",
"stm8l15x_pwr.h": "c",
"stm8l15x_syscfg.h": "c",
"stm8l15x_exti.h": "c"
}
}

View File

@@ -36,7 +36,7 @@ PRJ_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(PRJ_SOURCE:.c=.rel))
SPL_ROOT = $(PRJ_INC_DIR)/stm8l151x
SPL_SRC_DIR = $(SPL_ROOT)/src
SPL_INC_DIR = $(SPL_ROOT)/inc
SPL_SOURCE = stm8l15x_usart.c stm8l15x_clk.c stm8l15x_gpio.c stm8l15x_rtc.c #$(notdir $(wildcard $(SPL_SRC_DIR)/*.c))
SPL_SOURCE = stm8l15x_clk.c stm8l15x_gpio.c stm8l15x_rtc.c stm8l15x_it.c #$(notdir $(wildcard $(SPL_SRC_DIR)/*.c))
SPL_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(SPL_SOURCE:.c=.rel))
# collect all include folders

View File

@@ -1,155 +1,126 @@
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:00000001FF

View File

@@ -8,7 +8,6 @@
-l stm8
../STM8L15X_LD/main.rel
../STM8L15X_LD/stm8l15x_it.rel
../STM8L15X_LD/stm8l15x_usart.rel
../STM8L15X_LD/stm8l15x_clk.rel
../STM8L15X_LD/stm8l15x_gpio.rel
../STM8L15X_LD/stm8l15x_rtc.rel

View File

@@ -22,16 +22,16 @@ Area Addr Size Decimal Bytes (A
00000001 s_INITIALIZED
00000001 s_SSEG
00000003 l_GSFINAL
0000000B l_CONST
00000005 l_CONST
00000023 l_GSINIT
00000083 l_HOME
00001205 l_CODE
00000E7F l_CODE
00008000 s_HOME
00008083 s_GSINIT
000080A6 s_GSFINAL
000080A9 s_CONST
000080B4 s_CODE
000080B4 s_INITIALIZER
000080AE s_CODE
000080AE s_INITIALIZER
ASxxxx Linker V03.00/V05.40 + sdld, page 2.
Hexadecimal [32-Bits]
@@ -74,184 +74,159 @@ Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CONST 000080A9 0000000B = 11. bytes (REL,CON)
CONST 000080A9 00000005 = 5. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
000080AF _SYSDivFactor stm8l15x_clk
000080A9 _SYSDivFactor stm8l15x_clk
ASxxxx Linker V03.00/V05.40 + sdld, page 7.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CODE 000080B4 00001205 = 4613. bytes (REL,CON)
CODE 000080AE 00000E7F = 3711. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
000080B4 _main main
0000818F _TRAP_IRQHandler stm8l15x_it
00008190 _FLASH_IRQHandler stm8l15x_it
00008191 _DMA1_CHANNEL0_1_IRQHandler stm8l15x_it
00008192 _DMA1_CHANNEL2_3_IRQHandler stm8l15x_it
00008193 _RTC_CSSLSE_IRQHandler stm8l15x_it
00008194 _EXTIE_F_PVD_IRQHandler stm8l15x_it
00008195 _EXTIB_G_IRQHandler stm8l15x_it
00008196 _EXTID_H_IRQHandler stm8l15x_it
00008197 _EXTI0_IRQHandler stm8l15x_it
00008198 _EXTI1_IRQHandler stm8l15x_it
00008199 _EXTI2_IRQHandler stm8l15x_it
0000819A _EXTI3_IRQHandler stm8l15x_it
0000819B _EXTI4_IRQHandler stm8l15x_it
0000819C _EXTI5_IRQHandler stm8l15x_it
0000819D _EXTI6_IRQHandler stm8l15x_it
0000819E _EXTI7_IRQHandler stm8l15x_it
0000819F _LCD_AES_IRQHandler stm8l15x_it
000081A0 _SWITCH_CSS_BREAK_DAC_IRQHandler stm8l15x_it
000081A1 _ADC1_COMP_IRQHandler stm8l15x_it
000081A2 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_ stm8l15x_it
000081A3 _TIM2_CC_USART2_RX_IRQHandler stm8l15x_it
000081A4 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_ stm8l15x_it
000081A5 _TIM3_CC_USART3_RX_IRQHandler stm8l15x_it
000081A6 _TIM1_UPD_OVF_TRG_COM_IRQHandler stm8l15x_it
000081A7 _TIM1_CC_IRQHandler stm8l15x_it
000081A8 _TIM4_UPD_OVF_TRG_IRQHandler stm8l15x_it
000081A9 _SPI1_IRQHandler stm8l15x_it
000081AA _USART1_TX_TIM5_UPD_OVF_TRG_BRK_ stm8l15x_it
000081AB _USART1_RX_TIM5_CC_IRQHandler stm8l15x_it
000081AC _I2C1_SPI2_IRQHandler stm8l15x_it
000081AD _USART_DeInit stm8l15x_usart
000081C4 _USART_Init stm8l15x_usart
00008241 _USART_ClockInit stm8l15x_usart
0000827B _USART_Cmd stm8l15x_usart
00008290 _USART_SetPrescaler stm8l15x_usart
00008295 _USART_SendBreak stm8l15x_usart
0000829D _USART_ReceiveData8 stm8l15x_usart
000082A0 _USART_ReceiveData9 stm8l15x_usart
000082BB _USART_SendData8 stm8l15x_usart
000082BE _USART_SendData9 stm8l15x_usart
000082E3 _USART_ReceiverWakeUpCmd stm8l15x_usart
000082F8 _USART_SetAddress stm8l15x_usart
00008307 _USART_WakeUpConfig stm8l15x_usart
00008316 _USART_HalfDuplexCmd stm8l15x_usart
0000832B _USART_SmartCardCmd stm8l15x_usart
00008340 _USART_SmartCardNACKCmd stm8l15x_usart
00008355 _USART_SetGuardTime stm8l15x_usart
0000835A _USART_IrDAConfig stm8l15x_usart
0000836F _USART_IrDACmd stm8l15x_usart
000080AE _main main
00008151 _TRAP_IRQHandler stm8l15x_it
00008152 _FLASH_IRQHandler stm8l15x_it
00008153 _DMA1_CHANNEL0_1_IRQHandler stm8l15x_it
00008154 _DMA1_CHANNEL2_3_IRQHandler stm8l15x_it
00008155 _RTC_CSSLSE_IRQHandler stm8l15x_it
0000815D _EXTIE_F_PVD_IRQHandler stm8l15x_it
0000815E _EXTIB_G_IRQHandler stm8l15x_it
0000815F _EXTID_H_IRQHandler stm8l15x_it
00008160 _EXTI0_IRQHandler stm8l15x_it
00008161 _EXTI1_IRQHandler stm8l15x_it
00008162 _EXTI2_IRQHandler stm8l15x_it
00008163 _EXTI3_IRQHandler stm8l15x_it
00008164 _EXTI4_IRQHandler stm8l15x_it
00008165 _EXTI5_IRQHandler stm8l15x_it
00008166 _EXTI6_IRQHandler stm8l15x_it
00008167 _EXTI7_IRQHandler stm8l15x_it
00008168 _LCD_AES_IRQHandler stm8l15x_it
00008169 _SWITCH_CSS_BREAK_DAC_IRQHandler stm8l15x_it
0000816A _ADC1_COMP_IRQHandler stm8l15x_it
0000816B _TIM2_UPD_OVF_TRG_BRK_USART2_TX_ stm8l15x_it
0000816C _TIM2_CC_USART2_RX_IRQHandler stm8l15x_it
0000816D _TIM3_UPD_OVF_TRG_BRK_USART3_TX_ stm8l15x_it
0000816E _TIM3_CC_USART3_RX_IRQHandler stm8l15x_it
0000816F _TIM1_UPD_OVF_TRG_COM_IRQHandler stm8l15x_it
00008170 _TIM1_CC_IRQHandler stm8l15x_it
00008171 _TIM4_UPD_OVF_TRG_IRQHandler stm8l15x_it
00008172 _SPI1_IRQHandler stm8l15x_it
00008173 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_ stm8l15x_it
00008174 _USART1_RX_TIM5_CC_IRQHandler stm8l15x_it
00008175 _I2C1_SPI2_IRQHandler stm8l15x_it
00008176 _CLK_DeInit stm8l15x_clk
000081B7 _CLK_HSICmd stm8l15x_clk
000081CF _CLK_AdjustHSICalibrationValue stm8l15x_clk
000081DB _CLK_LSICmd stm8l15x_clk
000081F3 _CLK_HSEConfig stm8l15x_clk
00008208 _CLK_LSEConfig stm8l15x_clk
0000821D _CLK_ClockSecuritySystemEnable stm8l15x_clk
00008222 _CLK_ClockSecuritySytemDeglitchC stm8l15x_clk
0000823A _CLK_CCOConfig stm8l15x_clk
00008242 _CLK_SYSCLKSourceConfig stm8l15x_clk
00008246 _CLK_GetSYSCLKSource stm8l15x_clk
0000824A _CLK_GetClockFreq stm8l15x_clk
0000829D _CLK_SYSCLKDivConfig stm8l15x_clk
000082A1 _CLK_SYSCLKSourceSwitchCmd stm8l15x_clk
000082B9 _CLK_RTCClockConfig stm8l15x_clk
000082C1 _CLK_BEEPClockConfig stm8l15x_clk
000082C5 _CLK_PeripheralClockConfig stm8l15x_clk
0000832D _CLK_LSEClockSecuritySystemEnabl stm8l15x_clk
00008332 _CLK_RTCCLKSwitchOnLSEFailureEna stm8l15x_clk
ASxxxx Linker V03.00/V05.40 + sdld, page 8.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CODE 000080B4 00001205 = 4613. bytes (REL,CON)
CODE 000080AE 00000E7F = 3711. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
00008384 _USART_DMACmd stm8l15x_usart
0000839E _USART_ITConfig stm8l15x_usart
0000842D _USART_GetFlagStatus stm8l15x_usart
00008455 _USART_ClearFlag stm8l15x_usart
00008461 _USART_GetITStatus stm8l15x_usart
000084F9 _USART_ClearITPendingBit stm8l15x_usart
00008502 _CLK_DeInit stm8l15x_clk
00008543 _CLK_HSICmd stm8l15x_clk
0000855B _CLK_AdjustHSICalibrationValue stm8l15x_clk
00008567 _CLK_LSICmd stm8l15x_clk
0000857F _CLK_HSEConfig stm8l15x_clk
00008594 _CLK_LSEConfig stm8l15x_clk
000085A9 _CLK_ClockSecuritySystemEnable stm8l15x_clk
000085AE _CLK_ClockSecuritySytemDeglitchC stm8l15x_clk
000085C6 _CLK_CCOConfig stm8l15x_clk
000085CE _CLK_SYSCLKSourceConfig stm8l15x_clk
000085D2 _CLK_GetSYSCLKSource stm8l15x_clk
000085D6 _CLK_GetClockFreq stm8l15x_clk
00008629 _CLK_SYSCLKDivConfig stm8l15x_clk
0000862D _CLK_SYSCLKSourceSwitchCmd stm8l15x_clk
00008645 _CLK_RTCClockConfig stm8l15x_clk
0000864D _CLK_BEEPClockConfig stm8l15x_clk
00008651 _CLK_PeripheralClockConfig stm8l15x_clk
000086B9 _CLK_LSEClockSecuritySystemEnabl stm8l15x_clk
000086BE _CLK_RTCCLKSwitchOnLSEFailureEna stm8l15x_clk
000086C3 _CLK_HaltConfig stm8l15x_clk
000086E1 _CLK_MainRegulatorCmd stm8l15x_clk
000086F9 _CLK_ITConfig stm8l15x_clk
0000875E _CLK_GetFlagStatus stm8l15x_clk
000087CC _CLK_ClearFlag stm8l15x_clk
000087D1 _CLK_GetITStatus stm8l15x_clk
0000880B _CLK_ClearITPendingBit stm8l15x_clk
0000881B _GPIO_DeInit stm8l15x_gpio
00008828 _GPIO_Init stm8l15x_gpio
000088A3 _GPIO_ExternalPullUpConfig stm8l15x_gpio
000088BD _GPIO_Write stm8l15x_gpio
000088BF _GPIO_WriteBit stm8l15x_gpio
000088D6 _GPIO_SetBits stm8l15x_gpio
000088DF _GPIO_ResetBits stm8l15x_gpio
000088EB _GPIO_ToggleBits stm8l15x_gpio
000088F4 _GPIO_ReadInputData stm8l15x_gpio
000088F7 _GPIO_ReadOutputData stm8l15x_gpio
000088F9 _GPIO_ReadInputDataBit stm8l15x_gpio
00008906 _GPIO_ReadOutputDataBit stm8l15x_gpio
00008912 _RTC_DeInit stm8l15x_rtc
000089DD _RTC_Init stm8l15x_rtc
00008A26 _RTC_StructInit stm8l15x_rtc
00008A36 _RTC_WriteProtectionCmd stm8l15x_rtc
00008A47 _RTC_EnterInitMode stm8l15x_rtc
00008A68 _RTC_ExitInitMode stm8l15x_rtc
00008A6D _RTC_WaitForSynchro stm8l15x_rtc
00008337 _CLK_HaltConfig stm8l15x_clk
00008355 _CLK_MainRegulatorCmd stm8l15x_clk
0000836D _CLK_ITConfig stm8l15x_clk
000083D2 _CLK_GetFlagStatus stm8l15x_clk
00008440 _CLK_ClearFlag stm8l15x_clk
00008445 _CLK_GetITStatus stm8l15x_clk
0000847F _CLK_ClearITPendingBit stm8l15x_clk
0000848F _GPIO_DeInit stm8l15x_gpio
0000849C _GPIO_Init stm8l15x_gpio
00008517 _GPIO_ExternalPullUpConfig stm8l15x_gpio
00008531 _GPIO_Write stm8l15x_gpio
00008533 _GPIO_WriteBit stm8l15x_gpio
0000854A _GPIO_SetBits stm8l15x_gpio
00008553 _GPIO_ResetBits stm8l15x_gpio
0000855F _GPIO_ToggleBits stm8l15x_gpio
00008568 _GPIO_ReadInputData stm8l15x_gpio
0000856B _GPIO_ReadOutputData stm8l15x_gpio
0000856D _GPIO_ReadInputDataBit stm8l15x_gpio
0000857A _GPIO_ReadOutputDataBit stm8l15x_gpio
00008586 _RTC_DeInit stm8l15x_rtc
00008651 _RTC_Init stm8l15x_rtc
0000869A _RTC_StructInit stm8l15x_rtc
000086AA _RTC_WriteProtectionCmd stm8l15x_rtc
000086BB _RTC_EnterInitMode stm8l15x_rtc
000086DC _RTC_ExitInitMode stm8l15x_rtc
000086E1 _RTC_WaitForSynchro stm8l15x_rtc
0000870D _RTC_RatioCmd stm8l15x_rtc
00008731 _RTC_BypassShadowCmd stm8l15x_rtc
00008755 _RTC_SetTime stm8l15x_rtc
000087E1 _RTC_TimeStructInit stm8l15x_rtc
000087EE _RTC_GetTime stm8l15x_rtc
00008840 _RTC_GetSubSecond stm8l15x_rtc
00008851 _RTC_SetDate stm8l15x_rtc
000088F8 _RTC_DateStructInit stm8l15x_rtc
0000890C _RTC_GetDate stm8l15x_rtc
00008965 _RTC_SetAlarm stm8l15x_rtc
00008A5D _RTC_AlarmStructInit stm8l15x_rtc
00008A77 _RTC_GetAlarm stm8l15x_rtc
00008B29 _RTC_AlarmCmd stm8l15x_rtc
00008B71 _RTC_AlarmSubSecondConfig stm8l15x_rtc
00008BAC _RTC_WakeUpClockConfig stm8l15x_rtc
00008BD1 _RTC_SetWakeUpCounter stm8l15x_rtc
00008BE6 _RTC_GetWakeUpCounter stm8l15x_rtc
00008BF4 _RTC_WakeUpCmd stm8l15x_rtc
00008C32 _RTC_DayLightSavingConfig stm8l15x_rtc
00008C59 _RTC_GetStoreOperation stm8l15x_rtc
00008C5F _RTC_OutputConfig stm8l15x_rtc
00008C86 _RTC_SynchroShiftConfig stm8l15x_rtc
00008CC1 _RTC_SmoothCalibConfig stm8l15x_rtc
00008D03 _RTC_CalibOutputConfig stm8l15x_rtc
00008D27 _RTC_CalibOutputCmd stm8l15x_rtc
ASxxxx Linker V03.00/V05.40 + sdld, page 9.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CODE 000080B4 00001205 = 4613. bytes (REL,CON)
CODE 000080AE 00000E7F = 3711. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
00008A99 _RTC_RatioCmd stm8l15x_rtc
00008ABD _RTC_BypassShadowCmd stm8l15x_rtc
00008AE1 _RTC_SetTime stm8l15x_rtc
00008B6D _RTC_TimeStructInit stm8l15x_rtc
00008B7A _RTC_GetTime stm8l15x_rtc
00008BCC _RTC_GetSubSecond stm8l15x_rtc
00008BDD _RTC_SetDate stm8l15x_rtc
00008C84 _RTC_DateStructInit stm8l15x_rtc
00008C98 _RTC_GetDate stm8l15x_rtc
00008CF1 _RTC_SetAlarm stm8l15x_rtc
00008DE9 _RTC_AlarmStructInit stm8l15x_rtc
00008E03 _RTC_GetAlarm stm8l15x_rtc
00008EB5 _RTC_AlarmCmd stm8l15x_rtc
00008EFD _RTC_AlarmSubSecondConfig stm8l15x_rtc
00008F38 _RTC_WakeUpClockConfig stm8l15x_rtc
00008F5D _RTC_SetWakeUpCounter stm8l15x_rtc
00008F72 _RTC_GetWakeUpCounter stm8l15x_rtc
00008F80 _RTC_WakeUpCmd stm8l15x_rtc
00008FBE _RTC_DayLightSavingConfig stm8l15x_rtc
00008FE5 _RTC_GetStoreOperation stm8l15x_rtc
00008FEB _RTC_OutputConfig stm8l15x_rtc
00009012 _RTC_SynchroShiftConfig stm8l15x_rtc
0000904D _RTC_SmoothCalibConfig stm8l15x_rtc
0000908F _RTC_CalibOutputConfig stm8l15x_rtc
000090B3 _RTC_CalibOutputCmd stm8l15x_rtc
000090D7 _RTC_TamperLevelConfig stm8l15x_rtc
00009101 _RTC_TamperFilterConfig stm8l15x_rtc
00009122 _RTC_TamperSamplingFreqConfig stm8l15x_rtc
00009143 _RTC_TamperPinsPrechargeDuration stm8l15x_rtc
00009164 _RTC_TamperCmd stm8l15x_rtc
0000918E _RTC_ITConfig stm8l15x_rtc
000091D6 _RTC_GetFlagStatus stm8l15x_rtc
000091FB _RTC_ClearFlag stm8l15x_rtc
00009208 _RTC_GetITStatus stm8l15x_rtc
0000922C _RTC_ClearITPendingBit stm8l15x_rtc
0000925C __divulong _divulong
000092B7 ___sdcc_external_startup _startup
00008D4B _RTC_TamperLevelConfig stm8l15x_rtc
00008D75 _RTC_TamperFilterConfig stm8l15x_rtc
00008D96 _RTC_TamperSamplingFreqConfig stm8l15x_rtc
00008DB7 _RTC_TamperPinsPrechargeDuration stm8l15x_rtc
00008DD8 _RTC_TamperCmd stm8l15x_rtc
00008E02 _RTC_ITConfig stm8l15x_rtc
00008E4A _RTC_GetFlagStatus stm8l15x_rtc
00008E6F _RTC_ClearFlag stm8l15x_rtc
00008E7C _RTC_GetITStatus stm8l15x_rtc
00008EA0 _RTC_ClearITPendingBit stm8l15x_rtc
00008ED0 __divulong _divulong
00008F2B ___sdcc_external_startup _startup
ASxxxx Linker V03.00/V05.40 + sdld, page 10.
Files Linked [ module(s) ]
../STM8L15X_LD/main.rel [ main ]
../STM8L15X_LD/stm8l15x_it.rel [ stm8l15x_it ]
../STM8L15X_LD/stm8l15x_usart.rel [ stm8l15x_usart ]
../STM8L15X_LD/stm8l15x_clk.rel [ stm8l15x_clk ]
../STM8L15X_LD/stm8l15x_gpio.rel [ stm8l15x_gpio ]
../STM8L15X_LD/stm8l15x_rtc.rel [ stm8l15x_rtc ]

View File

@@ -8,12 +8,15 @@
; Public variables in this module
;--------------------------------------------------------
.globl _main
.globl _USART_Cmd
.globl _USART_Init
.globl _RTC_ITConfig
.globl _RTC_WakeUpCmd
.globl _RTC_SetWakeUpCounter
.globl _RTC_WakeUpClockConfig
.globl _GPIO_ResetBits
.globl _GPIO_SetBits
.globl _GPIO_Init
.globl _CLK_PeripheralClockConfig
.globl _CLK_RTCClockConfig
.globl _CLK_SYSCLKSourceSwitchCmd
.globl _CLK_SYSCLKDivConfig
.globl _CLK_GetSYSCLKSource
@@ -126,199 +129,128 @@ __sdcc_program_startup:
; code
;--------------------------------------------------------
.area CODE
; ../src/main.c: 24: void main(void)
; ../src/main.c: 28: void main(void)
; -----------------------------------------
; function main
; -----------------------------------------
_main:
; ../src/main.c: 27: Led_Init;
push #0xc0
ld a, #0x10
ldw x, #0x500a
; ../src/main.c: 30: GPIO_Init(GPIOB, GPIO_Pin_2, GPIO_Mode_Out_PP_Low_Fast);
push #0xe0
ld a, #0x04
ldw x, #0x5005
call _GPIO_Init
; ../src/main.c: 28: blink(1);
clrw x
incw x
call _blink
; ../src/main.c: 29: USART_Config();
call _USART_Config
; ../src/main.c: 30: println("Hello");
ldw x, #(___str_0+0)
call _println
; ../src/main.c: 31: while (1);
; ../src/main.c: 33: CLK_Config();
call _CLK_Config
; ../src/main.c: 34: PWR_Config();
call _PWR_Config
; ../src/main.c: 35: Led2_Init;
push #0xe0
ld a, #0x04
ldw x, #0x5005
call _GPIO_Init
; ../src/main.c: 36: Mono_Init;
push #0xd0
ld a, #0x01
ldw x, #0x5005
call _GPIO_Init
; ../src/main.c: 37: blink2();
call _blink2
; ../src/main.c: 41: CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
push #0x00
ld a, #0x10
call _CLK_RTCClockConfig
; ../src/main.c: 42: CLK_PeripheralClockConfig(CLK_Peripheral_RTC, ENABLE);
push #0x01
ld a, #0x12
call _CLK_PeripheralClockConfig
; ../src/main.c: 45: RTC_WakeUpCmd(DISABLE);
clr a
call _RTC_WakeUpCmd
; ../src/main.c: 46: RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
ld a, #0x03
call _RTC_WakeUpClockConfig
; ../src/main.c: 47: RTC_SetWakeUpCounter(250);
ldw x, #0x00fa
call _RTC_SetWakeUpCounter
; ../src/main.c: 48: RTC_WakeUpCmd(ENABLE);
ld a, #0x01
call _RTC_WakeUpCmd
; ../src/main.c: 50: RTC_ITConfig(RTC_IT_WUT, ENABLE);
ld a, #0x01
ldw x, #0x0040
call _RTC_ITConfig
; ../src/main.c: 52: enableInterrupts();
rim
; ../src/main.c: 53: while (1){
00102$:
; ../src/main.c: 54: blink2();
call _blink2
; ../src/main.c: 55: halt();
halt
jra 00102$
; ../src/main.c: 32: }
; ../src/main.c: 57: }
ret
; ../src/main.c: 34: static void CLK_Config(void)
; ../src/main.c: 59: static void PWR_Config(void){
; -----------------------------------------
; function PWR_Config
; -----------------------------------------
_PWR_Config:
; ../src/main.c: 60: PWR->CSR1 = PWR_CSR1_PVDIF;
mov 0x50b2+0, #0x20
; ../src/main.c: 61: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
mov 0x50b3+0, #0x00
; ../src/main.c: 62: PWR->CSR2 |= PWR_CSR2_ULP;
bset 0x50b3, #1
; ../src/main.c: 63: PWR->CSR2 |= PWR_CSR2_FWU;
bset 0x50b3, #2
; ../src/main.c: 64: }
ret
; ../src/main.c: 66: static void CLK_Config(void)
; -----------------------------------------
; function CLK_Config
; -----------------------------------------
_CLK_Config:
; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
; ../src/main.c: 68: CLK_SYSCLKSourceSwitchCmd(ENABLE);
ld a, #0x01
call _CLK_SYSCLKSourceSwitchCmd
; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
ld a, #0x08
; ../src/main.c: 69: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSI);
ld a, #0x02
call _CLK_SYSCLKSourceConfig
; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
; ../src/main.c: 70: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
clr a
call _CLK_SYSCLKDivConfig
; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
; ../src/main.c: 71: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSI);
00101$:
call _CLK_GetSYSCLKSource
cp a, #0x08
cp a, #0x02
jrne 00101$
ret
jra 00101$
; ../src/main.c: 42: }
; ../src/main.c: 72: }
ret
; ../src/main.c: 44: static void blink(uint16_t repeats) {
; ../src/main.c: 85: static void blink2() {
; -----------------------------------------
; function blink
; function blink2
; -----------------------------------------
_blink:
sub sp, #4
ldw (0x01, sp), x
; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
clrw x
ldw (0x03, sp), x
00111$:
ldw x, (0x03, sp)
cpw x, (0x01, sp)
jrugt 00113$
; ../src/main.c: 46: Led_ON;
ld a, #0x10
ldw x, #0x500a
call _GPIO_SetBits
; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
clrw x
00105$:
ldw y, x
cpw y, #0x0fa0
jrugt 00101$
nop
incw x
jra 00105$
00101$:
; ../src/main.c: 48: Led_OFF;
ld a, #0x10
ldw x, #0x500a
call _GPIO_ResetBits
; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
clrw x
00108$:
ldw y, x
cpw y, #0x0fa0
jrugt 00112$
nop
incw x
jra 00108$
00112$:
; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
ldw x, (0x03, sp)
incw x
ldw (0x03, sp), x
jra 00111$
00113$:
; ../src/main.c: 51: }
addw sp, #4
ret
; ../src/main.c: 53: static void putchar(uint8_t Data) {
; -----------------------------------------
; function putchar
; -----------------------------------------
_putchar:
; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
00101$:
ldw x, #0x5230
push a
ld a, (x)
ld xh, a
pop a
tnzw x
jrpl 00101$
; ../src/main.c: 55: USART1->DR = Data;
ld 0x5231, a
; ../src/main.c: 56: }
ret
; ../src/main.c: 58: static void print(const char* s){
; -----------------------------------------
; function print
; -----------------------------------------
_print:
; ../src/main.c: 59: while (*s) {
00101$:
ld a, (x)
jrne 00121$
ret
00121$:
; ../src/main.c: 60: putchar(*s++);
incw x
pushw x
call _putchar
popw x
jra 00101$
; ../src/main.c: 62: }
ret
; ../src/main.c: 64: static void println(const char* s){
; -----------------------------------------
; function println
; -----------------------------------------
_println:
; ../src/main.c: 65: print(s);
call _print
; ../src/main.c: 66: putchar('\n');
ld a, #0x0a
; ../src/main.c: 67: }
jp _putchar
; ../src/main.c: 69: static void USART_Config(void)
; -----------------------------------------
; function USART_Config
; -----------------------------------------
_USART_Config:
; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
ld a, 0x509e
and a, #0xcf
ld 0x509e, a
; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
bset 0x509e, #4
; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
push #0xf0
ld a, #0x04
ldw x, #0x5000
call _GPIO_Init
; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
push #0x00
ld a, #0x08
ldw x, #0x5000
call _GPIO_Init
; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
push #0x01
ld a, #0x05
call _CLK_PeripheralClockConfig
; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
push #0x08
push #0x00
push #0x00
push #0x00
push #0x80
push #0x25
clrw x
pushw x
ldw x, #0x5230
call _USART_Init
; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
_blink2:
; ../src/main.c: 86: Mono_ON;
ld a, #0x01
ldw x, #0x5230
; ../src/main.c: 84: }
jp _USART_Cmd
ldw x, #0x5005
call _GPIO_ResetBits
; ../src/main.c: 87: Led2_ON;
ld a, #0x04
ldw x, #0x5005
call _GPIO_SetBits
; ../src/main.c: 88: Led2_OFF;
ld a, #0x04
ldw x, #0x5005
call _GPIO_ResetBits
; ../src/main.c: 89: Mono_OFF;
ld a, #0x01
ldw x, #0x5005
; ../src/main.c: 90: }
jp _GPIO_SetBits
.area CODE
.area CONST
.area CONST
___str_0:
.ascii "Hello"
.db 0x00
.area CODE
.area INITIALIZER
.area CABS (ABS)

View File

@@ -8,317 +8,249 @@
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _main
11 .globl _USART_Cmd
12 .globl _USART_Init
13 .globl _GPIO_ResetBits
14 .globl _GPIO_SetBits
15 .globl _GPIO_Init
16 .globl _CLK_PeripheralClockConfig
17 .globl _CLK_SYSCLKSourceSwitchCmd
18 .globl _CLK_SYSCLKDivConfig
19 .globl _CLK_GetSYSCLKSource
20 .globl _CLK_SYSCLKSourceConfig
21 ;--------------------------------------------------------
22 ; ram data
23 ;--------------------------------------------------------
24 .area DATA
25 ;--------------------------------------------------------
26 ; ram data
27 ;--------------------------------------------------------
28 .area INITIALIZED
29 ;--------------------------------------------------------
30 ; Stack segment in internal ram
31 ;--------------------------------------------------------
32 .area SSEG
000000 33 __start__stack:
000000 34 .ds 1
35
36 ;--------------------------------------------------------
37 ; absolute external ram data
38 ;--------------------------------------------------------
39 .area DABS (ABS)
40
41 ; default segment ordering for linker
42 .area HOME
43 .area GSINIT
44 .area GSFINAL
45 .area CONST
46 .area INITIALIZER
47 .area CODE
48
49 ;--------------------------------------------------------
50 ; interrupt vector
51 ;--------------------------------------------------------
52 .area HOME
000000 53 __interrupt_vect:
000000 82v00u00u00 54 int s_GSINIT ; reset
000004 82v00u00u00 55 int _TRAP_IRQHandler ; trap
000008 82 00 00 00 56 int 0x000000 ; int0
00000C 82v00u00u00 57 int _FLASH_IRQHandler ; int1
000010 82v00u00u00 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
000014 82v00u00u00 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
000018 82v00u00u00 60 int _RTC_CSSLSE_IRQHandler ; int4
00001C 82v00u00u00 61 int _EXTIE_F_PVD_IRQHandler ; int5
000020 82v00u00u00 62 int _EXTIB_G_IRQHandler ; int6
000024 82v00u00u00 63 int _EXTID_H_IRQHandler ; int7
000028 82v00u00u00 64 int _EXTI0_IRQHandler ; int8
00002C 82v00u00u00 65 int _EXTI1_IRQHandler ; int9
000030 82v00u00u00 66 int _EXTI2_IRQHandler ; int10
000034 82v00u00u00 67 int _EXTI3_IRQHandler ; int11
000038 82v00u00u00 68 int _EXTI4_IRQHandler ; int12
00003C 82v00u00u00 69 int _EXTI5_IRQHandler ; int13
000040 82v00u00u00 70 int _EXTI6_IRQHandler ; int14
000044 82v00u00u00 71 int _EXTI7_IRQHandler ; int15
000048 82v00u00u00 72 int _LCD_AES_IRQHandler ; int16
00004C 82v00u00u00 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
000050 82v00u00u00 74 int _ADC1_COMP_IRQHandler ; int18
000054 82v00u00u00 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
000058 82v00u00u00 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00005C 82v00u00u00 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
000060 82v00u00u00 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
000064 82v00u00u00 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
000068 82v00u00u00 80 int _TIM1_CC_IRQHandler ; int24
00006C 82v00u00u00 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
000070 82v00u00u00 82 int _SPI1_IRQHandler ; int26
000074 82v00u00u00 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
000078 82v00u00u00 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00007C 82v00u00u00 85 int _I2C1_SPI2_IRQHandler ; int29
86 ;--------------------------------------------------------
87 ; global & static initialisations
88 ;--------------------------------------------------------
89 .area HOME
90 .area GSINIT
91 .area GSFINAL
92 .area GSINIT
000000 CDr00r00 [ 4] 93 call ___sdcc_external_startup
000003 4D [ 1] 94 tnz a
000004 27 03 [ 1] 95 jreq __sdcc_init_data
000006 CCr00r80 [ 2] 96 jp __sdcc_program_startup
000009 97 __sdcc_init_data:
98 ; stm8_genXINIT() start
000009 AEr00r00 [ 2] 99 ldw x, #l_DATA
00000C 27 07 [ 1] 100 jreq 00002$
00000E 101 00001$:
00000E 72 4FuFFuFF [ 1] 102 clr (s_DATA - 1, x)
000012 5A [ 2] 103 decw x
000013 26 F9 [ 1] 104 jrne 00001$
000015 105 00002$:
000015 AEr00r00 [ 2] 106 ldw x, #l_INITIALIZER
000018 27 09 [ 1] 107 jreq 00004$
00001A 108 00003$:
00001A D6uFFuFF [ 1] 109 ld a, (s_INITIALIZER - 1, x)
00001D D7uFFuFF [ 1] 110 ld (s_INITIALIZED - 1, x), a
000020 5A [ 2] 111 decw x
000021 26 F7 [ 1] 112 jrne 00003$
000023 113 00004$:
114 ; stm8_genXINIT() end
115 .area GSFINAL
000000 CCr00r80 [ 2] 116 jp __sdcc_program_startup
117 ;--------------------------------------------------------
118 ; Home
119 ;--------------------------------------------------------
120 .area HOME
121 .area HOME
000080 122 __sdcc_program_startup:
000080 CCr00r00 [ 2] 123 jp _main
124 ; return from main will return to caller
125 ;--------------------------------------------------------
126 ; code
127 ;--------------------------------------------------------
128 .area CODE
129 ; ../src/main.c: 24: void main(void)
130 ; -----------------------------------------
131 ; function main
132 ; -----------------------------------------
000000 133 _main:
134 ; ../src/main.c: 27: Led_Init;
000000 4B C0 [ 1] 135 push #0xc0
000002 A6 10 [ 1] 136 ld a, #0x10
000004 AE 50 0A [ 2] 137 ldw x, #0x500a
000007 CDr00r00 [ 4] 138 call _GPIO_Init
139 ; ../src/main.c: 28: blink(1);
00000A 5F [ 1] 140 clrw x
00000B 5C [ 1] 141 incw x
00000C CDr00r34 [ 4] 142 call _blink
143 ; ../src/main.c: 29: USART_Config();
00000F CDr00r98 [ 4] 144 call _USART_Config
145 ; ../src/main.c: 30: println("Hello");
000012 AEr00r00 [ 2] 146 ldw x, #(___str_0+0)
000015 CDr00r90 [ 4] 147 call _println
148 ; ../src/main.c: 31: while (1);
000018 149 00102$:
000018 20 FE [ 2] 150 jra 00102$
151 ; ../src/main.c: 32: }
00001A 81 [ 4] 152 ret
153 ; ../src/main.c: 34: static void CLK_Config(void)
154 ; -----------------------------------------
155 ; function CLK_Config
156 ; -----------------------------------------
00001B 157 _CLK_Config:
158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
00001B A6 01 [ 1] 159 ld a, #0x01
00001D CDr00r00 [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
000020 A6 08 [ 1] 162 ld a, #0x08
000022 CDr00r00 [ 4] 163 call _CLK_SYSCLKSourceConfig
164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
000025 4F [ 1] 165 clr a
000026 CDr00r00 [ 4] 166 call _CLK_SYSCLKDivConfig
167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
000029 168 00101$:
000029 CDr00r00 [ 4] 169 call _CLK_GetSYSCLKSource
00002C A1 08 [ 1] 170 cp a, #0x08
00002E 26 F9 [ 1] 171 jrne 00101$
000030 81 [ 4] 172 ret
000031 20 F6 [ 2] 173 jra 00101$
174 ; ../src/main.c: 42: }
000033 81 [ 4] 175 ret
176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
177 ; -----------------------------------------
178 ; function blink
179 ; -----------------------------------------
000034 180 _blink:
000034 52 04 [ 2] 181 sub sp, #4
000036 1F 01 [ 2] 182 ldw (0x01, sp), x
183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
000038 5F [ 1] 184 clrw x
000039 1F 03 [ 2] 185 ldw (0x03, sp), x
00003B 186 00111$:
00003B 1E 03 [ 2] 187 ldw x, (0x03, sp)
00003D 13 01 [ 2] 188 cpw x, (0x01, sp)
00003F 22 31 [ 1] 189 jrugt 00113$
190 ; ../src/main.c: 46: Led_ON;
000041 A6 10 [ 1] 191 ld a, #0x10
000043 AE 50 0A [ 2] 192 ldw x, #0x500a
000046 CDr00r00 [ 4] 193 call _GPIO_SetBits
194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
000049 5F [ 1] 195 clrw x
00004A 196 00105$:
00004A 90 93 [ 1] 197 ldw y, x
00004C 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
000050 22 04 [ 1] 199 jrugt 00101$
000052 9D [ 1] 200 nop
000053 5C [ 1] 201 incw x
000054 20 F4 [ 2] 202 jra 00105$
000056 203 00101$:
204 ; ../src/main.c: 48: Led_OFF;
000056 A6 10 [ 1] 205 ld a, #0x10
000058 AE 50 0A [ 2] 206 ldw x, #0x500a
00005B CDr00r00 [ 4] 207 call _GPIO_ResetBits
208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
00005E 5F [ 1] 209 clrw x
00005F 210 00108$:
00005F 90 93 [ 1] 211 ldw y, x
000061 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
000065 22 04 [ 1] 213 jrugt 00112$
000067 9D [ 1] 214 nop
000068 5C [ 1] 215 incw x
000069 20 F4 [ 2] 216 jra 00108$
00006B 217 00112$:
218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
00006B 1E 03 [ 2] 219 ldw x, (0x03, sp)
00006D 5C [ 1] 220 incw x
00006E 1F 03 [ 2] 221 ldw (0x03, sp), x
000070 20 C9 [ 2] 222 jra 00111$
000072 223 00113$:
224 ; ../src/main.c: 51: }
000072 5B 04 [ 2] 225 addw sp, #4
000074 81 [ 4] 226 ret
227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
228 ; -----------------------------------------
229 ; function putchar
230 ; -----------------------------------------
000075 231 _putchar:
232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
000075 233 00101$:
000075 AE 52 30 [ 2] 234 ldw x, #0x5230
000078 88 [ 1] 235 push a
000079 F6 [ 1] 236 ld a, (x)
00007A 95 [ 1] 237 ld xh, a
00007B 84 [ 1] 238 pop a
00007C 5D [ 2] 239 tnzw x
00007D 2A F6 [ 1] 240 jrpl 00101$
241 ; ../src/main.c: 55: USART1->DR = Data;
00007F C7 52 31 [ 1] 242 ld 0x5231, a
243 ; ../src/main.c: 56: }
000082 81 [ 4] 244 ret
245 ; ../src/main.c: 58: static void print(const char* s){
246 ; -----------------------------------------
247 ; function print
248 ; -----------------------------------------
000083 249 _print:
250 ; ../src/main.c: 59: while (*s) {
000083 251 00101$:
000083 F6 [ 1] 252 ld a, (x)
000084 26 01 [ 1] 253 jrne 00121$
000086 81 [ 4] 254 ret
000087 255 00121$:
256 ; ../src/main.c: 60: putchar(*s++);
000087 5C [ 1] 257 incw x
000088 89 [ 2] 258 pushw x
000089 CDr00r75 [ 4] 259 call _putchar
00008C 85 [ 2] 260 popw x
00008D 20 F4 [ 2] 261 jra 00101$
262 ; ../src/main.c: 62: }
00008F 81 [ 4] 263 ret
264 ; ../src/main.c: 64: static void println(const char* s){
265 ; -----------------------------------------
266 ; function println
267 ; -----------------------------------------
000090 268 _println:
269 ; ../src/main.c: 65: print(s);
000090 CDr00r83 [ 4] 270 call _print
271 ; ../src/main.c: 66: putchar('\n');
000093 A6 0A [ 1] 272 ld a, #0x0a
273 ; ../src/main.c: 67: }
000095 CCr00r75 [ 2] 274 jp _putchar
275 ; ../src/main.c: 69: static void USART_Config(void)
276 ; -----------------------------------------
277 ; function USART_Config
278 ; -----------------------------------------
000098 279 _USART_Config:
280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
000098 C6 50 9E [ 1] 281 ld a, 0x509e
00009B A4 CF [ 1] 282 and a, #0xcf
00009D C7 50 9E [ 1] 283 ld 0x509e, a
284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
0000A0 72 18 50 9E [ 1] 285 bset 0x509e, #4
286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
0000A4 4B F0 [ 1] 287 push #0xf0
0000A6 A6 04 [ 1] 288 ld a, #0x04
0000A8 AE 50 00 [ 2] 289 ldw x, #0x5000
0000AB CDr00r00 [ 4] 290 call _GPIO_Init
291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
0000AE 4B 00 [ 1] 292 push #0x00
0000B0 A6 08 [ 1] 293 ld a, #0x08
0000B2 AE 50 00 [ 2] 294 ldw x, #0x5000
0000B5 CDr00r00 [ 4] 295 call _GPIO_Init
296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
0000B8 4B 01 [ 1] 297 push #0x01
0000BA A6 05 [ 1] 298 ld a, #0x05
0000BC CDr00r00 [ 4] 299 call _CLK_PeripheralClockConfig
300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
0000BF 4B 08 [ 1] 301 push #0x08
0000C1 4B 00 [ 1] 302 push #0x00
0000C3 4B 00 [ 1] 303 push #0x00
0000C5 4B 00 [ 1] 304 push #0x00
0000C7 4B 80 [ 1] 305 push #0x80
0000C9 4B 25 [ 1] 306 push #0x25
0000CB 5F [ 1] 307 clrw x
0000CC 89 [ 2] 308 pushw x
0000CD AE 52 30 [ 2] 309 ldw x, #0x5230
0000D0 CDr00r00 [ 4] 310 call _USART_Init
311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
0000D3 A6 01 [ 1] 312 ld a, #0x01
0000D5 AE 52 30 [ 2] 313 ldw x, #0x5230
314 ; ../src/main.c: 84: }
0000D8 CCr00r00 [ 2] 315 jp _USART_Cmd
316 .area CODE
317 .area CONST
318 .area CONST
000000 319 ___str_0:
000000 48 65 6C 6C 6F 320 .ascii "Hello"
000005 00 321 .db 0x00
322 .area CODE
323 .area INITIALIZER
324 .area CABS (ABS)
11 .globl _RTC_ITConfig
12 .globl _RTC_WakeUpCmd
13 .globl _RTC_SetWakeUpCounter
14 .globl _RTC_WakeUpClockConfig
15 .globl _GPIO_ResetBits
16 .globl _GPIO_SetBits
17 .globl _GPIO_Init
18 .globl _CLK_PeripheralClockConfig
19 .globl _CLK_RTCClockConfig
20 .globl _CLK_SYSCLKSourceSwitchCmd
21 .globl _CLK_SYSCLKDivConfig
22 .globl _CLK_GetSYSCLKSource
23 .globl _CLK_SYSCLKSourceConfig
24 ;--------------------------------------------------------
25 ; ram data
26 ;--------------------------------------------------------
27 .area DATA
28 ;--------------------------------------------------------
29 ; ram data
30 ;--------------------------------------------------------
31 .area INITIALIZED
32 ;--------------------------------------------------------
33 ; Stack segment in internal ram
34 ;--------------------------------------------------------
35 .area SSEG
000000 36 __start__stack:
000000 37 .ds 1
38
39 ;--------------------------------------------------------
40 ; absolute external ram data
41 ;--------------------------------------------------------
42 .area DABS (ABS)
43
44 ; default segment ordering for linker
45 .area HOME
46 .area GSINIT
47 .area GSFINAL
48 .area CONST
49 .area INITIALIZER
50 .area CODE
51
52 ;--------------------------------------------------------
53 ; interrupt vector
54 ;--------------------------------------------------------
55 .area HOME
000000 56 __interrupt_vect:
000000 82v00u00u00 57 int s_GSINIT ; reset
000004 82v00u00u00 58 int _TRAP_IRQHandler ; trap
000008 82 00 00 00 59 int 0x000000 ; int0
00000C 82v00u00u00 60 int _FLASH_IRQHandler ; int1
000010 82v00u00u00 61 int _DMA1_CHANNEL0_1_IRQHandler ; int2
000014 82v00u00u00 62 int _DMA1_CHANNEL2_3_IRQHandler ; int3
000018 82v00u00u00 63 int _RTC_CSSLSE_IRQHandler ; int4
00001C 82v00u00u00 64 int _EXTIE_F_PVD_IRQHandler ; int5
000020 82v00u00u00 65 int _EXTIB_G_IRQHandler ; int6
000024 82v00u00u00 66 int _EXTID_H_IRQHandler ; int7
000028 82v00u00u00 67 int _EXTI0_IRQHandler ; int8
00002C 82v00u00u00 68 int _EXTI1_IRQHandler ; int9
000030 82v00u00u00 69 int _EXTI2_IRQHandler ; int10
000034 82v00u00u00 70 int _EXTI3_IRQHandler ; int11
000038 82v00u00u00 71 int _EXTI4_IRQHandler ; int12
00003C 82v00u00u00 72 int _EXTI5_IRQHandler ; int13
000040 82v00u00u00 73 int _EXTI6_IRQHandler ; int14
000044 82v00u00u00 74 int _EXTI7_IRQHandler ; int15
000048 82v00u00u00 75 int _LCD_AES_IRQHandler ; int16
00004C 82v00u00u00 76 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
000050 82v00u00u00 77 int _ADC1_COMP_IRQHandler ; int18
000054 82v00u00u00 78 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
000058 82v00u00u00 79 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00005C 82v00u00u00 80 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
000060 82v00u00u00 81 int _TIM3_CC_USART3_RX_IRQHandler ; int22
000064 82v00u00u00 82 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
000068 82v00u00u00 83 int _TIM1_CC_IRQHandler ; int24
00006C 82v00u00u00 84 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
000070 82v00u00u00 85 int _SPI1_IRQHandler ; int26
000074 82v00u00u00 86 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
000078 82v00u00u00 87 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00007C 82v00u00u00 88 int _I2C1_SPI2_IRQHandler ; int29
89 ;--------------------------------------------------------
90 ; global & static initialisations
91 ;--------------------------------------------------------
92 .area HOME
93 .area GSINIT
94 .area GSFINAL
95 .area GSINIT
000000 CDr00r00 [ 4] 96 call ___sdcc_external_startup
000003 4D [ 1] 97 tnz a
000004 27 03 [ 1] 98 jreq __sdcc_init_data
000006 CCr00r80 [ 2] 99 jp __sdcc_program_startup
000009 100 __sdcc_init_data:
101 ; stm8_genXINIT() start
000009 AEr00r00 [ 2] 102 ldw x, #l_DATA
00000C 27 07 [ 1] 103 jreq 00002$
00000E 104 00001$:
00000E 72 4FuFFuFF [ 1] 105 clr (s_DATA - 1, x)
000012 5A [ 2] 106 decw x
000013 26 F9 [ 1] 107 jrne 00001$
000015 108 00002$:
000015 AEr00r00 [ 2] 109 ldw x, #l_INITIALIZER
000018 27 09 [ 1] 110 jreq 00004$
00001A 111 00003$:
00001A D6uFFuFF [ 1] 112 ld a, (s_INITIALIZER - 1, x)
00001D D7uFFuFF [ 1] 113 ld (s_INITIALIZED - 1, x), a
000020 5A [ 2] 114 decw x
000021 26 F7 [ 1] 115 jrne 00003$
000023 116 00004$:
117 ; stm8_genXINIT() end
118 .area GSFINAL
000000 CCr00r80 [ 2] 119 jp __sdcc_program_startup
120 ;--------------------------------------------------------
121 ; Home
122 ;--------------------------------------------------------
123 .area HOME
124 .area HOME
000080 125 __sdcc_program_startup:
000080 CCr00r00 [ 2] 126 jp _main
127 ; return from main will return to caller
128 ;--------------------------------------------------------
129 ; code
130 ;--------------------------------------------------------
131 .area CODE
132 ; ../src/main.c: 28: void main(void)
133 ; -----------------------------------------
134 ; function main
135 ; -----------------------------------------
000000 136 _main:
137 ; ../src/main.c: 30: GPIO_Init(GPIOB, GPIO_Pin_2, GPIO_Mode_Out_PP_Low_Fast);
000000 4B E0 [ 1] 138 push #0xe0
000002 A6 04 [ 1] 139 ld a, #0x04
000004 AE 50 05 [ 2] 140 ldw x, #0x5005
000007 CDr00r00 [ 4] 141 call _GPIO_Init
142 ; ../src/main.c: 33: CLK_Config();
00000A CDr00r6A [ 4] 143 call _CLK_Config
144 ; ../src/main.c: 34: PWR_Config();
00000D CDr00r59 [ 4] 145 call _PWR_Config
146 ; ../src/main.c: 35: Led2_Init;
000010 4B E0 [ 1] 147 push #0xe0
000012 A6 04 [ 1] 148 ld a, #0x04
000014 AE 50 05 [ 2] 149 ldw x, #0x5005
000017 CDr00r00 [ 4] 150 call _GPIO_Init
151 ; ../src/main.c: 36: Mono_Init;
00001A 4B D0 [ 1] 152 push #0xd0
00001C A6 01 [ 1] 153 ld a, #0x01
00001E AE 50 05 [ 2] 154 ldw x, #0x5005
000021 CDr00r00 [ 4] 155 call _GPIO_Init
156 ; ../src/main.c: 37: blink2();
000024 CDr00r83 [ 4] 157 call _blink2
158 ; ../src/main.c: 41: CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
000027 4B 00 [ 1] 159 push #0x00
000029 A6 10 [ 1] 160 ld a, #0x10
00002B CDr00r00 [ 4] 161 call _CLK_RTCClockConfig
162 ; ../src/main.c: 42: CLK_PeripheralClockConfig(CLK_Peripheral_RTC, ENABLE);
00002E 4B 01 [ 1] 163 push #0x01
000030 A6 12 [ 1] 164 ld a, #0x12
000032 CDr00r00 [ 4] 165 call _CLK_PeripheralClockConfig
166 ; ../src/main.c: 45: RTC_WakeUpCmd(DISABLE);
000035 4F [ 1] 167 clr a
000036 CDr00r00 [ 4] 168 call _RTC_WakeUpCmd
169 ; ../src/main.c: 46: RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
000039 A6 03 [ 1] 170 ld a, #0x03
00003B CDr00r00 [ 4] 171 call _RTC_WakeUpClockConfig
172 ; ../src/main.c: 47: RTC_SetWakeUpCounter(250);
00003E AE 00 FA [ 2] 173 ldw x, #0x00fa
000041 CDr00r00 [ 4] 174 call _RTC_SetWakeUpCounter
175 ; ../src/main.c: 48: RTC_WakeUpCmd(ENABLE);
000044 A6 01 [ 1] 176 ld a, #0x01
000046 CDr00r00 [ 4] 177 call _RTC_WakeUpCmd
178 ; ../src/main.c: 50: RTC_ITConfig(RTC_IT_WUT, ENABLE);
000049 A6 01 [ 1] 179 ld a, #0x01
00004B AE 00 40 [ 2] 180 ldw x, #0x0040
00004E CDr00r00 [ 4] 181 call _RTC_ITConfig
182 ; ../src/main.c: 52: enableInterrupts();
000051 9A [ 1] 183 rim
184 ; ../src/main.c: 53: while (1){
000052 185 00102$:
186 ; ../src/main.c: 54: blink2();
000052 CDr00r83 [ 4] 187 call _blink2
188 ; ../src/main.c: 55: halt();
000055 8E [10] 189 halt
000056 20 FA [ 2] 190 jra 00102$
191 ; ../src/main.c: 57: }
000058 81 [ 4] 192 ret
193 ; ../src/main.c: 59: static void PWR_Config(void){
194 ; -----------------------------------------
195 ; function PWR_Config
196 ; -----------------------------------------
000059 197 _PWR_Config:
198 ; ../src/main.c: 60: PWR->CSR1 = PWR_CSR1_PVDIF;
000059 35 20 50 B2 [ 1] 199 mov 0x50b2+0, #0x20
200 ; ../src/main.c: 61: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
00005D 35 00 50 B3 [ 1] 201 mov 0x50b3+0, #0x00
202 ; ../src/main.c: 62: PWR->CSR2 |= PWR_CSR2_ULP;
000061 72 12 50 B3 [ 1] 203 bset 0x50b3, #1
204 ; ../src/main.c: 63: PWR->CSR2 |= PWR_CSR2_FWU;
000065 72 14 50 B3 [ 1] 205 bset 0x50b3, #2
206 ; ../src/main.c: 64: }
000069 81 [ 4] 207 ret
208 ; ../src/main.c: 66: static void CLK_Config(void)
209 ; -----------------------------------------
210 ; function CLK_Config
211 ; -----------------------------------------
00006A 212 _CLK_Config:
213 ; ../src/main.c: 68: CLK_SYSCLKSourceSwitchCmd(ENABLE);
00006A A6 01 [ 1] 214 ld a, #0x01
00006C CDr00r00 [ 4] 215 call _CLK_SYSCLKSourceSwitchCmd
216 ; ../src/main.c: 69: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSI);
00006F A6 02 [ 1] 217 ld a, #0x02
000071 CDr00r00 [ 4] 218 call _CLK_SYSCLKSourceConfig
219 ; ../src/main.c: 70: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
000074 4F [ 1] 220 clr a
000075 CDr00r00 [ 4] 221 call _CLK_SYSCLKDivConfig
222 ; ../src/main.c: 71: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSI);
000078 223 00101$:
000078 CDr00r00 [ 4] 224 call _CLK_GetSYSCLKSource
00007B A1 02 [ 1] 225 cp a, #0x02
00007D 26 F9 [ 1] 226 jrne 00101$
00007F 81 [ 4] 227 ret
000080 20 F6 [ 2] 228 jra 00101$
229 ; ../src/main.c: 72: }
000082 81 [ 4] 230 ret
231 ; ../src/main.c: 85: static void blink2() {
232 ; -----------------------------------------
233 ; function blink2
234 ; -----------------------------------------
000083 235 _blink2:
236 ; ../src/main.c: 86: Mono_ON;
000083 A6 01 [ 1] 237 ld a, #0x01
000085 AE 50 05 [ 2] 238 ldw x, #0x5005
000088 CDr00r00 [ 4] 239 call _GPIO_ResetBits
240 ; ../src/main.c: 87: Led2_ON;
00008B A6 04 [ 1] 241 ld a, #0x04
00008D AE 50 05 [ 2] 242 ldw x, #0x5005
000090 CDr00r00 [ 4] 243 call _GPIO_SetBits
244 ; ../src/main.c: 88: Led2_OFF;
000093 A6 04 [ 1] 245 ld a, #0x04
000095 AE 50 05 [ 2] 246 ldw x, #0x5005
000098 CDr00r00 [ 4] 247 call _GPIO_ResetBits
248 ; ../src/main.c: 89: Mono_OFF;
00009B A6 01 [ 1] 249 ld a, #0x01
00009D AE 50 05 [ 2] 250 ldw x, #0x5005
251 ; ../src/main.c: 90: }
0000A0 CCr00r00 [ 2] 252 jp _GPIO_SetBits
253 .area CODE
254 .area CONST
255 .area INITIALIZER
256 .area CABS (ABS)

View File

@@ -1,13 +1,16 @@
XH3
H C areas 31 global symbols
H C areas 34 global symbols
M main
S _RTC_SetWakeUpCounter Ref000000
S _GPIO_Init Ref000000
S _CLK_GetSYSCLKSource Ref000000
S _GPIO_ResetBits Ref000000
S _DMA1_CHANNEL0_1_IRQHandler Ref000000
S _CLK_RTCClockConfig Ref000000
S _SPI1_IRQHandler Ref000000
S _DMA1_CHANNEL2_3_IRQHandler Ref000000
S s_INITIALIZED Ref000000
S _RTC_WakeUpCmd Ref000000
S _EXTIB_G_IRQHandler Ref000000
S _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler Ref000000
S _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler Ref000000
@@ -29,12 +32,11 @@ S _FLASH_IRQHandler Ref000000
S _EXTI5_IRQHandler Ref000000
S _EXTI6_IRQHandler Ref000000
S _EXTI7_IRQHandler Ref000000
S _RTC_ITConfig Ref000000
S .__.ABS. Def000000
S _TIM1_UPD_OVF_TRG_COM_IRQHandler Ref000000
S _TRAP_IRQHandler Ref000000
S s_GSINIT Ref000000
S _USART_Init Ref000000
S _USART_Cmd Ref000000
S _TIM4_UPD_OVF_TRG_IRQHandler Ref000000
S l_DATA Ref000000
S _CLK_PeripheralClockConfig Ref000000
@@ -47,6 +49,7 @@ S _SWITCH_CSS_BREAK_DAC_IRQHandler Ref000000
S ___sdcc_external_startup Ref000000
S _ADC1_COMP_IRQHandler Ref000000
S _LCD_AES_IRQHandler Ref000000
S _RTC_WakeUpClockConfig Ref000000
S _CLK_SYSCLKSourceConfig Ref000000
S _RTC_CSSLSE_IRQHandler Ref000000
A _CODE size 0 flags 0 addr 0
@@ -57,9 +60,9 @@ A DABS size 0 flags 8 addr 0
A HOME size 83 flags 0 addr 0
A GSINIT size 23 flags 0 addr 0
A GSFINAL size 3 flags 0 addr 0
A CONST size 6 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size DB flags 0 addr 0
A CODE size A3 flags 0 addr 0
S _main Def000000
A CABS size 0 flags 8 addr 0
T 00 00 00
@@ -69,55 +72,55 @@ R 00 00 00 03
T 00 00 00
R 00 00 00 05
T 00 00 00 82 00 00 00 82 00 00 00 82 00 00 00 82
R 00 00 00 05 92 04 00 1F 92 08 00 1E
R 00 00 00 05 92 04 00 23 92 08 00 22
T 00 00 0D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 18 92 07 00 03
R 00 00 00 05 92 03 00 1B 92 07 00 04
T 00 00 15 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 05 92 07 00 2F
R 00 00 00 05 92 03 00 07 92 07 00 32
T 00 00 1D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 15 92 07 00 07
R 00 00 00 05 92 03 00 18 92 07 00 0A
T 00 00 25 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 0B 92 07 00 0E
R 00 00 00 05 92 03 00 0E 92 07 00 11
T 00 00 2D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 0F 92 07 00 13
R 00 00 00 05 92 03 00 12 92 07 00 16
T 00 00 35 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 14 92 07 00 17
R 00 00 00 05 92 03 00 17 92 07 00 1A
T 00 00 3D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 19 92 07 00 1A
R 00 00 00 05 92 03 00 1C 92 07 00 1D
T 00 00 45 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 1B 92 07 00 2D
R 00 00 00 05 92 03 00 1E 92 07 00 2F
T 00 00 4D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 2A 92 07 00 2C
R 00 00 00 05 92 03 00 2C 92 07 00 2E
T 00 00 55 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 08 92 07 00 0D
R 00 00 00 05 92 03 00 0B 92 07 00 10
T 00 00 5D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 0A 92 07 00 12
R 00 00 00 05 92 03 00 0D 92 07 00 15
T 00 00 65 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 1D 92 07 00 25
R 00 00 00 05 92 03 00 21 92 07 00 27
T 00 00 6D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 22 92 07 00 04
R 00 00 00 05 92 03 00 24 92 07 00 06
T 00 00 75 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 09 92 07 00 11
R 00 00 00 05 92 03 00 0C 92 07 00 14
T 00 00 7D 00 00 00
R 00 00 00 05 92 03 00 10
R 00 00 00 05 92 03 00 13
T 00 00 00 CD 00 00 4D 27 03 CC 00 80
R 00 00 00 06 02 04 00 2B 00 0A 00 05
R 00 00 00 06 02 04 00 2D 00 0A 00 05
T 00 00 09
R 00 00 00 06
T 00 00 09 AE 00 00 27 07
R 00 00 00 06 02 04 00 23
R 00 00 00 06 02 04 00 25
T 00 00 0E
R 00 00 00 06
T 00 00 0E 72 4F FF FF 5A 26 F9
R 00 00 00 06 12 05 00 29
R 00 00 00 06 12 05 00 2B
T 00 00 15
R 00 00 00 06
T 00 00 15 AE 00 00 27 09
R 00 00 00 06 02 04 00 0C
R 00 00 00 06 02 04 00 0F
T 00 00 1A
R 00 00 00 06
T 00 00 1A D6 FF FF D7 FF FF 5A 26 F7
R 00 00 00 06 12 04 00 16 12 07 00 06
R 00 00 00 06 12 04 00 19 12 07 00 08
T 00 00 23
R 00 00 00 06
T 00 00 00 CC 00 80
@@ -128,93 +131,45 @@ T 00 00 80 CC 00 00
R 00 00 00 05 00 04 00 0A
T 00 00 00
R 00 00 00 0A
T 00 00 00 4B C0 A6 10 AE 50 0A CD 00 00 5F 5C CD
R 00 00 00 0A 02 0B 00 00
T 00 00 0D 00 34 CD 00 98 AE
R 00 00 00 0A 00 03 00 0A 00 06 00 0A
T 00 00 13 00 00 CD 00 90
R 00 00 00 0A 00 03 00 08 00 06 00 0A
T 00 00 18
T 00 00 00 4B E0 A6 04 AE 50 05 CD 00 00 CD 00 6A
R 00 00 00 0A 02 0B 00 01 00 0E 00 0A
T 00 00 0D CD 00 59 4B E0 A6 04 AE 50 05 CD 00 00
R 00 00 00 0A 00 04 00 0A 02 0E 00 01
T 00 00 1A 4B D0 A6 01 AE 50 05 CD 00 00 CD 00 83
R 00 00 00 0A 02 0B 00 01 00 0E 00 0A
T 00 00 27 4B 00 A6 10 CD 00 00 4B 01 A6 12 CD
R 00 00 00 0A 02 08 00 05
T 00 00 33 00 00 4F CD 00 00 A6 03 CD
R 00 00 00 0A 02 03 00 26 02 07 00 09
T 00 00 3C 00 00 AE 00 FA CD 00 00 A6 01 CD
R 00 00 00 0A 02 03 00 30 02 09 00 00
T 00 00 47 00 00 A6 01 AE 00 40 CD 00 00 9A
R 00 00 00 0A 02 03 00 09 02 0B 00 1F
T 00 00 52
R 00 00 00 0A
T 00 00 18 20 FE 81
T 00 00 52 CD 00 83 8E 20 FA 81
R 00 00 00 0A 00 04 00 0A
T 00 00 59
R 00 00 00 0A
T 00 00 1B
T 00 00 59 35 20 50 B2 35 00 50 B3 72 12 50 B3 72
R 00 00 00 0A
T 00 00 1B A6 01 CD 00 00 A6 08 CD 00 00 4F CD
R 00 00 00 0A 02 06 00 26 02 0B 00 2E
T 00 00 27 00 00
R 00 00 00 0A 02 03 00 27
T 00 00 29
T 00 00 66 14 50 B3 81
R 00 00 00 0A
T 00 00 29 CD 00 00 A1 08 26 F9 81 20 F6 81
R 00 00 00 0A 02 04 00 01
T 00 00 34
T 00 00 6A
R 00 00 00 0A
T 00 00 34 52 04 1F 01 5F 1F 03
R 00 00 00 0A
T 00 00 3B
R 00 00 00 0A
T 00 00 3B 1E 03 13 01 22 31 A6 10 AE 50 0A CD
R 00 00 00 0A
T 00 00 47 00 00 5F
R 00 00 00 0A 02 03 00 28
T 00 00 4A
R 00 00 00 0A
T 00 00 4A 90 93 90 A3 0F A0 22 04 9D 5C 20 F4
R 00 00 00 0A
T 00 00 56
R 00 00 00 0A
T 00 00 56 A6 10 AE 50 0A CD 00 00 5F
R 00 00 00 0A 02 09 00 02
T 00 00 5F
R 00 00 00 0A
T 00 00 5F 90 93 90 A3 0F A0 22 04 9D 5C 20 F4
R 00 00 00 0A
T 00 00 6B
R 00 00 00 0A
T 00 00 6B 1E 03 5C 1F 03 20 C9
R 00 00 00 0A
T 00 00 72
R 00 00 00 0A
T 00 00 72 5B 04 81
R 00 00 00 0A
T 00 00 75
R 00 00 00 0A
T 00 00 75
R 00 00 00 0A
T 00 00 75 AE 52 30 88 F6 95 84 5D 2A F6 C7 52 31
R 00 00 00 0A
T 00 00 82 81
T 00 00 6A A6 01 CD 00 00 A6 02 CD 00 00 4F CD
R 00 00 00 0A 02 06 00 28 02 0B 00 31
T 00 00 76 00 00
R 00 00 00 0A 02 03 00 29
T 00 00 78
R 00 00 00 0A
T 00 00 78 CD 00 00 A1 02 26 F9 81 20 F6 81
R 00 00 00 0A 02 04 00 02
T 00 00 83
R 00 00 00 0A
T 00 00 83
R 00 00 00 0A
T 00 00 83 F6 26 01 81
R 00 00 00 0A
T 00 00 87
R 00 00 00 0A
T 00 00 87 5C 89 CD 00 75 85 20 F4 81
R 00 00 00 0A 00 06 00 0A
T 00 00 90
R 00 00 00 0A
T 00 00 90 CD 00 83 A6 0A CC 00 75
R 00 00 00 0A 00 04 00 0A 00 09 00 0A
T 00 00 98
R 00 00 00 0A
T 00 00 98 C6 50 9E A4 CF C7 50 9E 72 18 50 9E 4B
R 00 00 00 0A
T 00 00 A5 F0 A6 04 AE 50 00 CD 00 00 4B 00 A6 08
R 00 00 00 0A 02 0A 00 00
T 00 00 B2 AE 50 00 CD 00 00 4B 01 A6 05 CD 00 00
R 00 00 00 0A 02 07 00 00 02 0E 00 24
T 00 00 BF 4B 08 4B 00 4B 00 4B 00 4B 80 4B 25 5F
R 00 00 00 0A
T 00 00 CC 89 AE 52 30 CD 00 00 A6 01 AE 52 30 CC
R 00 00 00 0A 02 08 00 20
T 00 00 D9 00 00
R 00 00 00 0A 02 03 00 21
T 00 00 00
R 00 00 00 08
T 00 00 00 48 65 6C 6C 6F 00
R 00 00 00 08
T 00 00 83 A6 01 AE 50 05 CD 00 00 A6 04 AE 50 05
R 00 00 00 0A 02 09 00 03
T 00 00 90 CD 00 00 A6 04 AE 50 05 CD 00 00 A6 01
R 00 00 00 0A 02 04 00 2A 02 0C 00 03
T 00 00 9D AE 50 05 CC 00 00
R 00 00 00 0A 02 07 00 2A

View File

@@ -8,317 +8,249 @@
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _main
11 .globl _USART_Cmd
12 .globl _USART_Init
13 .globl _GPIO_ResetBits
14 .globl _GPIO_SetBits
15 .globl _GPIO_Init
16 .globl _CLK_PeripheralClockConfig
17 .globl _CLK_SYSCLKSourceSwitchCmd
18 .globl _CLK_SYSCLKDivConfig
19 .globl _CLK_GetSYSCLKSource
20 .globl _CLK_SYSCLKSourceConfig
21 ;--------------------------------------------------------
22 ; ram data
23 ;--------------------------------------------------------
24 .area DATA
25 ;--------------------------------------------------------
26 ; ram data
27 ;--------------------------------------------------------
28 .area INITIALIZED
29 ;--------------------------------------------------------
30 ; Stack segment in internal ram
31 ;--------------------------------------------------------
32 .area SSEG
000001 33 __start__stack:
000001 34 .ds 1
35
36 ;--------------------------------------------------------
37 ; absolute external ram data
38 ;--------------------------------------------------------
39 .area DABS (ABS)
40
41 ; default segment ordering for linker
42 .area HOME
43 .area GSINIT
44 .area GSFINAL
45 .area CONST
46 .area INITIALIZER
47 .area CODE
48
49 ;--------------------------------------------------------
50 ; interrupt vector
51 ;--------------------------------------------------------
52 .area HOME
008000 53 __interrupt_vect:
008000 82 00 80 83 54 int s_GSINIT ; reset
008004 82 00 81 8F 55 int _TRAP_IRQHandler ; trap
008008 82 00 00 00 56 int 0x000000 ; int0
00800C 82 00 81 90 57 int _FLASH_IRQHandler ; int1
008010 82 00 81 91 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
008014 82 00 81 92 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
008018 82 00 81 93 60 int _RTC_CSSLSE_IRQHandler ; int4
00801C 82 00 81 94 61 int _EXTIE_F_PVD_IRQHandler ; int5
008020 82 00 81 95 62 int _EXTIB_G_IRQHandler ; int6
008024 82 00 81 96 63 int _EXTID_H_IRQHandler ; int7
008028 82 00 81 97 64 int _EXTI0_IRQHandler ; int8
00802C 82 00 81 98 65 int _EXTI1_IRQHandler ; int9
008030 82 00 81 99 66 int _EXTI2_IRQHandler ; int10
008034 82 00 81 9A 67 int _EXTI3_IRQHandler ; int11
008038 82 00 81 9B 68 int _EXTI4_IRQHandler ; int12
00803C 82 00 81 9C 69 int _EXTI5_IRQHandler ; int13
008040 82 00 81 9D 70 int _EXTI6_IRQHandler ; int14
008044 82 00 81 9E 71 int _EXTI7_IRQHandler ; int15
008048 82 00 81 9F 72 int _LCD_AES_IRQHandler ; int16
00804C 82 00 81 A0 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
008050 82 00 81 A1 74 int _ADC1_COMP_IRQHandler ; int18
008054 82 00 81 A2 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
008058 82 00 81 A3 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00805C 82 00 81 A4 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
008060 82 00 81 A5 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
008064 82 00 81 A6 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
008068 82 00 81 A7 80 int _TIM1_CC_IRQHandler ; int24
00806C 82 00 81 A8 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
008070 82 00 81 A9 82 int _SPI1_IRQHandler ; int26
008074 82 00 81 AA 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
008078 82 00 81 AB 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00807C 82 00 81 AC 85 int _I2C1_SPI2_IRQHandler ; int29
86 ;--------------------------------------------------------
87 ; global & static initialisations
88 ;--------------------------------------------------------
89 .area HOME
90 .area GSINIT
91 .area GSFINAL
92 .area GSINIT
008083 CD 92 B7 [ 4] 93 call ___sdcc_external_startup
008086 4D [ 1] 94 tnz a
008087 27 03 [ 1] 95 jreq __sdcc_init_data
008089 CC 80 80 [ 2] 96 jp __sdcc_program_startup
00808C 97 __sdcc_init_data:
98 ; stm8_genXINIT() start
00808C AE 00 00 [ 2] 99 ldw x, #l_DATA
00808F 27 07 [ 1] 100 jreq 00002$
008091 101 00001$:
008091 72 4F 00 00 [ 1] 102 clr (s_DATA - 1, x)
008095 5A [ 2] 103 decw x
008096 26 F9 [ 1] 104 jrne 00001$
008098 105 00002$:
008098 AE 00 00 [ 2] 106 ldw x, #l_INITIALIZER
00809B 27 09 [ 1] 107 jreq 00004$
00809D 108 00003$:
00809D D6 80 B3 [ 1] 109 ld a, (s_INITIALIZER - 1, x)
0080A0 D7 00 00 [ 1] 110 ld (s_INITIALIZED - 1, x), a
0080A3 5A [ 2] 111 decw x
0080A4 26 F7 [ 1] 112 jrne 00003$
0080A6 113 00004$:
114 ; stm8_genXINIT() end
115 .area GSFINAL
0080A6 CC 80 80 [ 2] 116 jp __sdcc_program_startup
117 ;--------------------------------------------------------
118 ; Home
119 ;--------------------------------------------------------
120 .area HOME
121 .area HOME
008080 122 __sdcc_program_startup:
008080 CC 80 B4 [ 2] 123 jp _main
124 ; return from main will return to caller
125 ;--------------------------------------------------------
126 ; code
127 ;--------------------------------------------------------
128 .area CODE
129 ; ../src/main.c: 24: void main(void)
130 ; -----------------------------------------
131 ; function main
132 ; -----------------------------------------
0080B4 133 _main:
134 ; ../src/main.c: 27: Led_Init;
0080B4 4B C0 [ 1] 135 push #0xc0
0080B6 A6 10 [ 1] 136 ld a, #0x10
0080B8 AE 50 0A [ 2] 137 ldw x, #0x500a
0080BB CD 88 28 [ 4] 138 call _GPIO_Init
139 ; ../src/main.c: 28: blink(1);
0080BE 5F [ 1] 140 clrw x
0080BF 5C [ 1] 141 incw x
0080C0 CD 80 E8 [ 4] 142 call _blink
143 ; ../src/main.c: 29: USART_Config();
0080C3 CD 81 4C [ 4] 144 call _USART_Config
145 ; ../src/main.c: 30: println("Hello");
0080C6 AE 80 A9 [ 2] 146 ldw x, #(___str_0+0)
0080C9 CD 81 44 [ 4] 147 call _println
148 ; ../src/main.c: 31: while (1);
0080CC 149 00102$:
0080CC 20 FE [ 2] 150 jra 00102$
151 ; ../src/main.c: 32: }
0080CE 81 [ 4] 152 ret
153 ; ../src/main.c: 34: static void CLK_Config(void)
154 ; -----------------------------------------
155 ; function CLK_Config
156 ; -----------------------------------------
0080CF 157 _CLK_Config:
158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
0080CF A6 01 [ 1] 159 ld a, #0x01
0080D1 CD 86 2D [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
0080D4 A6 08 [ 1] 162 ld a, #0x08
0080D6 CD 85 CE [ 4] 163 call _CLK_SYSCLKSourceConfig
164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
0080D9 4F [ 1] 165 clr a
0080DA CD 86 29 [ 4] 166 call _CLK_SYSCLKDivConfig
167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
0080DD 168 00101$:
0080DD CD 85 D2 [ 4] 169 call _CLK_GetSYSCLKSource
0080E0 A1 08 [ 1] 170 cp a, #0x08
0080E2 26 F9 [ 1] 171 jrne 00101$
0080E4 81 [ 4] 172 ret
0080E5 20 F6 [ 2] 173 jra 00101$
174 ; ../src/main.c: 42: }
0080E7 81 [ 4] 175 ret
176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
177 ; -----------------------------------------
178 ; function blink
179 ; -----------------------------------------
0080E8 180 _blink:
0080E8 52 04 [ 2] 181 sub sp, #4
0080EA 1F 01 [ 2] 182 ldw (0x01, sp), x
183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
0080EC 5F [ 1] 184 clrw x
0080ED 1F 03 [ 2] 185 ldw (0x03, sp), x
0080EF 186 00111$:
0080EF 1E 03 [ 2] 187 ldw x, (0x03, sp)
0080F1 13 01 [ 2] 188 cpw x, (0x01, sp)
0080F3 22 31 [ 1] 189 jrugt 00113$
190 ; ../src/main.c: 46: Led_ON;
0080F5 A6 10 [ 1] 191 ld a, #0x10
0080F7 AE 50 0A [ 2] 192 ldw x, #0x500a
0080FA CD 88 D6 [ 4] 193 call _GPIO_SetBits
194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
0080FD 5F [ 1] 195 clrw x
0080FE 196 00105$:
0080FE 90 93 [ 1] 197 ldw y, x
008100 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
008104 22 04 [ 1] 199 jrugt 00101$
008106 9D [ 1] 200 nop
008107 5C [ 1] 201 incw x
008108 20 F4 [ 2] 202 jra 00105$
00810A 203 00101$:
204 ; ../src/main.c: 48: Led_OFF;
00810A A6 10 [ 1] 205 ld a, #0x10
00810C AE 50 0A [ 2] 206 ldw x, #0x500a
00810F CD 88 DF [ 4] 207 call _GPIO_ResetBits
208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
008112 5F [ 1] 209 clrw x
008113 210 00108$:
008113 90 93 [ 1] 211 ldw y, x
008115 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
008119 22 04 [ 1] 213 jrugt 00112$
00811B 9D [ 1] 214 nop
00811C 5C [ 1] 215 incw x
00811D 20 F4 [ 2] 216 jra 00108$
00811F 217 00112$:
218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
00811F 1E 03 [ 2] 219 ldw x, (0x03, sp)
008121 5C [ 1] 220 incw x
008122 1F 03 [ 2] 221 ldw (0x03, sp), x
008124 20 C9 [ 2] 222 jra 00111$
008126 223 00113$:
224 ; ../src/main.c: 51: }
008126 5B 04 [ 2] 225 addw sp, #4
008128 81 [ 4] 226 ret
227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
228 ; -----------------------------------------
229 ; function putchar
230 ; -----------------------------------------
008129 231 _putchar:
232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
008129 233 00101$:
008129 AE 52 30 [ 2] 234 ldw x, #0x5230
00812C 88 [ 1] 235 push a
00812D F6 [ 1] 236 ld a, (x)
00812E 95 [ 1] 237 ld xh, a
00812F 84 [ 1] 238 pop a
008130 5D [ 2] 239 tnzw x
008131 2A F6 [ 1] 240 jrpl 00101$
241 ; ../src/main.c: 55: USART1->DR = Data;
008133 C7 52 31 [ 1] 242 ld 0x5231, a
243 ; ../src/main.c: 56: }
008136 81 [ 4] 244 ret
245 ; ../src/main.c: 58: static void print(const char* s){
246 ; -----------------------------------------
247 ; function print
248 ; -----------------------------------------
008137 249 _print:
250 ; ../src/main.c: 59: while (*s) {
008137 251 00101$:
008137 F6 [ 1] 252 ld a, (x)
008138 26 01 [ 1] 253 jrne 00121$
00813A 81 [ 4] 254 ret
00813B 255 00121$:
256 ; ../src/main.c: 60: putchar(*s++);
00813B 5C [ 1] 257 incw x
00813C 89 [ 2] 258 pushw x
00813D CD 81 29 [ 4] 259 call _putchar
008140 85 [ 2] 260 popw x
008141 20 F4 [ 2] 261 jra 00101$
262 ; ../src/main.c: 62: }
008143 81 [ 4] 263 ret
264 ; ../src/main.c: 64: static void println(const char* s){
265 ; -----------------------------------------
266 ; function println
267 ; -----------------------------------------
008144 268 _println:
269 ; ../src/main.c: 65: print(s);
008144 CD 81 37 [ 4] 270 call _print
271 ; ../src/main.c: 66: putchar('\n');
008147 A6 0A [ 1] 272 ld a, #0x0a
273 ; ../src/main.c: 67: }
008149 CC 81 29 [ 2] 274 jp _putchar
275 ; ../src/main.c: 69: static void USART_Config(void)
276 ; -----------------------------------------
277 ; function USART_Config
278 ; -----------------------------------------
00814C 279 _USART_Config:
280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
00814C C6 50 9E [ 1] 281 ld a, 0x509e
00814F A4 CF [ 1] 282 and a, #0xcf
008151 C7 50 9E [ 1] 283 ld 0x509e, a
284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
008154 72 18 50 9E [ 1] 285 bset 0x509e, #4
286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
008158 4B F0 [ 1] 287 push #0xf0
00815A A6 04 [ 1] 288 ld a, #0x04
00815C AE 50 00 [ 2] 289 ldw x, #0x5000
00815F CD 88 28 [ 4] 290 call _GPIO_Init
291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
008162 4B 00 [ 1] 292 push #0x00
008164 A6 08 [ 1] 293 ld a, #0x08
008166 AE 50 00 [ 2] 294 ldw x, #0x5000
008169 CD 88 28 [ 4] 295 call _GPIO_Init
296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
00816C 4B 01 [ 1] 297 push #0x01
00816E A6 05 [ 1] 298 ld a, #0x05
008170 CD 86 51 [ 4] 299 call _CLK_PeripheralClockConfig
300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
008173 4B 08 [ 1] 301 push #0x08
008175 4B 00 [ 1] 302 push #0x00
008177 4B 00 [ 1] 303 push #0x00
008179 4B 00 [ 1] 304 push #0x00
00817B 4B 80 [ 1] 305 push #0x80
00817D 4B 25 [ 1] 306 push #0x25
00817F 5F [ 1] 307 clrw x
008180 89 [ 2] 308 pushw x
008181 AE 52 30 [ 2] 309 ldw x, #0x5230
008184 CD 81 C4 [ 4] 310 call _USART_Init
311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
008187 A6 01 [ 1] 312 ld a, #0x01
008189 AE 52 30 [ 2] 313 ldw x, #0x5230
314 ; ../src/main.c: 84: }
00818C CC 82 7B [ 2] 315 jp _USART_Cmd
316 .area CODE
317 .area CONST
318 .area CONST
0080A9 319 ___str_0:
0080A9 48 65 6C 6C 6F 320 .ascii "Hello"
0080AE 00 321 .db 0x00
322 .area CODE
323 .area INITIALIZER
324 .area CABS (ABS)
11 .globl _RTC_ITConfig
12 .globl _RTC_WakeUpCmd
13 .globl _RTC_SetWakeUpCounter
14 .globl _RTC_WakeUpClockConfig
15 .globl _GPIO_ResetBits
16 .globl _GPIO_SetBits
17 .globl _GPIO_Init
18 .globl _CLK_PeripheralClockConfig
19 .globl _CLK_RTCClockConfig
20 .globl _CLK_SYSCLKSourceSwitchCmd
21 .globl _CLK_SYSCLKDivConfig
22 .globl _CLK_GetSYSCLKSource
23 .globl _CLK_SYSCLKSourceConfig
24 ;--------------------------------------------------------
25 ; ram data
26 ;--------------------------------------------------------
27 .area DATA
28 ;--------------------------------------------------------
29 ; ram data
30 ;--------------------------------------------------------
31 .area INITIALIZED
32 ;--------------------------------------------------------
33 ; Stack segment in internal ram
34 ;--------------------------------------------------------
35 .area SSEG
000001 36 __start__stack:
000001 37 .ds 1
38
39 ;--------------------------------------------------------
40 ; absolute external ram data
41 ;--------------------------------------------------------
42 .area DABS (ABS)
43
44 ; default segment ordering for linker
45 .area HOME
46 .area GSINIT
47 .area GSFINAL
48 .area CONST
49 .area INITIALIZER
50 .area CODE
51
52 ;--------------------------------------------------------
53 ; interrupt vector
54 ;--------------------------------------------------------
55 .area HOME
008000 56 __interrupt_vect:
008000 82 00 80 83 57 int s_GSINIT ; reset
008004 82 00 81 51 58 int _TRAP_IRQHandler ; trap
008008 82 00 00 00 59 int 0x000000 ; int0
00800C 82 00 81 52 60 int _FLASH_IRQHandler ; int1
008010 82 00 81 53 61 int _DMA1_CHANNEL0_1_IRQHandler ; int2
008014 82 00 81 54 62 int _DMA1_CHANNEL2_3_IRQHandler ; int3
008018 82 00 81 55 63 int _RTC_CSSLSE_IRQHandler ; int4
00801C 82 00 81 5D 64 int _EXTIE_F_PVD_IRQHandler ; int5
008020 82 00 81 5E 65 int _EXTIB_G_IRQHandler ; int6
008024 82 00 81 5F 66 int _EXTID_H_IRQHandler ; int7
008028 82 00 81 60 67 int _EXTI0_IRQHandler ; int8
00802C 82 00 81 61 68 int _EXTI1_IRQHandler ; int9
008030 82 00 81 62 69 int _EXTI2_IRQHandler ; int10
008034 82 00 81 63 70 int _EXTI3_IRQHandler ; int11
008038 82 00 81 64 71 int _EXTI4_IRQHandler ; int12
00803C 82 00 81 65 72 int _EXTI5_IRQHandler ; int13
008040 82 00 81 66 73 int _EXTI6_IRQHandler ; int14
008044 82 00 81 67 74 int _EXTI7_IRQHandler ; int15
008048 82 00 81 68 75 int _LCD_AES_IRQHandler ; int16
00804C 82 00 81 69 76 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
008050 82 00 81 6A 77 int _ADC1_COMP_IRQHandler ; int18
008054 82 00 81 6B 78 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
008058 82 00 81 6C 79 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00805C 82 00 81 6D 80 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
008060 82 00 81 6E 81 int _TIM3_CC_USART3_RX_IRQHandler ; int22
008064 82 00 81 6F 82 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
008068 82 00 81 70 83 int _TIM1_CC_IRQHandler ; int24
00806C 82 00 81 71 84 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
008070 82 00 81 72 85 int _SPI1_IRQHandler ; int26
008074 82 00 81 73 86 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
008078 82 00 81 74 87 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00807C 82 00 81 75 88 int _I2C1_SPI2_IRQHandler ; int29
89 ;--------------------------------------------------------
90 ; global & static initialisations
91 ;--------------------------------------------------------
92 .area HOME
93 .area GSINIT
94 .area GSFINAL
95 .area GSINIT
008083 CD 8F 2B [ 4] 96 call ___sdcc_external_startup
008086 4D [ 1] 97 tnz a
008087 27 03 [ 1] 98 jreq __sdcc_init_data
008089 CC 80 80 [ 2] 99 jp __sdcc_program_startup
00808C 100 __sdcc_init_data:
101 ; stm8_genXINIT() start
00808C AE 00 00 [ 2] 102 ldw x, #l_DATA
00808F 27 07 [ 1] 103 jreq 00002$
008091 104 00001$:
008091 72 4F 00 00 [ 1] 105 clr (s_DATA - 1, x)
008095 5A [ 2] 106 decw x
008096 26 F9 [ 1] 107 jrne 00001$
008098 108 00002$:
008098 AE 00 00 [ 2] 109 ldw x, #l_INITIALIZER
00809B 27 09 [ 1] 110 jreq 00004$
00809D 111 00003$:
00809D D6 80 AD [ 1] 112 ld a, (s_INITIALIZER - 1, x)
0080A0 D7 00 00 [ 1] 113 ld (s_INITIALIZED - 1, x), a
0080A3 5A [ 2] 114 decw x
0080A4 26 F7 [ 1] 115 jrne 00003$
0080A6 116 00004$:
117 ; stm8_genXINIT() end
118 .area GSFINAL
0080A6 CC 80 80 [ 2] 119 jp __sdcc_program_startup
120 ;--------------------------------------------------------
121 ; Home
122 ;--------------------------------------------------------
123 .area HOME
124 .area HOME
008080 125 __sdcc_program_startup:
008080 CC 80 AE [ 2] 126 jp _main
127 ; return from main will return to caller
128 ;--------------------------------------------------------
129 ; code
130 ;--------------------------------------------------------
131 .area CODE
132 ; ../src/main.c: 28: void main(void)
133 ; -----------------------------------------
134 ; function main
135 ; -----------------------------------------
0080AE 136 _main:
137 ; ../src/main.c: 30: GPIO_Init(GPIOB, GPIO_Pin_2, GPIO_Mode_Out_PP_Low_Fast);
0080AE 4B E0 [ 1] 138 push #0xe0
0080B0 A6 04 [ 1] 139 ld a, #0x04
0080B2 AE 50 05 [ 2] 140 ldw x, #0x5005
0080B5 CD 84 9C [ 4] 141 call _GPIO_Init
142 ; ../src/main.c: 33: CLK_Config();
0080B8 CD 81 18 [ 4] 143 call _CLK_Config
144 ; ../src/main.c: 34: PWR_Config();
0080BB CD 81 07 [ 4] 145 call _PWR_Config
146 ; ../src/main.c: 35: Led2_Init;
0080BE 4B E0 [ 1] 147 push #0xe0
0080C0 A6 04 [ 1] 148 ld a, #0x04
0080C2 AE 50 05 [ 2] 149 ldw x, #0x5005
0080C5 CD 84 9C [ 4] 150 call _GPIO_Init
151 ; ../src/main.c: 36: Mono_Init;
0080C8 4B D0 [ 1] 152 push #0xd0
0080CA A6 01 [ 1] 153 ld a, #0x01
0080CC AE 50 05 [ 2] 154 ldw x, #0x5005
0080CF CD 84 9C [ 4] 155 call _GPIO_Init
156 ; ../src/main.c: 37: blink2();
0080D2 CD 81 31 [ 4] 157 call _blink2
158 ; ../src/main.c: 41: CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
0080D5 4B 00 [ 1] 159 push #0x00
0080D7 A6 10 [ 1] 160 ld a, #0x10
0080D9 CD 82 B9 [ 4] 161 call _CLK_RTCClockConfig
162 ; ../src/main.c: 42: CLK_PeripheralClockConfig(CLK_Peripheral_RTC, ENABLE);
0080DC 4B 01 [ 1] 163 push #0x01
0080DE A6 12 [ 1] 164 ld a, #0x12
0080E0 CD 82 C5 [ 4] 165 call _CLK_PeripheralClockConfig
166 ; ../src/main.c: 45: RTC_WakeUpCmd(DISABLE);
0080E3 4F [ 1] 167 clr a
0080E4 CD 8B F4 [ 4] 168 call _RTC_WakeUpCmd
169 ; ../src/main.c: 46: RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
0080E7 A6 03 [ 1] 170 ld a, #0x03
0080E9 CD 8B AC [ 4] 171 call _RTC_WakeUpClockConfig
172 ; ../src/main.c: 47: RTC_SetWakeUpCounter(250);
0080EC AE 00 FA [ 2] 173 ldw x, #0x00fa
0080EF CD 8B D1 [ 4] 174 call _RTC_SetWakeUpCounter
175 ; ../src/main.c: 48: RTC_WakeUpCmd(ENABLE);
0080F2 A6 01 [ 1] 176 ld a, #0x01
0080F4 CD 8B F4 [ 4] 177 call _RTC_WakeUpCmd
178 ; ../src/main.c: 50: RTC_ITConfig(RTC_IT_WUT, ENABLE);
0080F7 A6 01 [ 1] 179 ld a, #0x01
0080F9 AE 00 40 [ 2] 180 ldw x, #0x0040
0080FC CD 8E 02 [ 4] 181 call _RTC_ITConfig
182 ; ../src/main.c: 52: enableInterrupts();
0080FF 9A [ 1] 183 rim
184 ; ../src/main.c: 53: while (1){
008100 185 00102$:
186 ; ../src/main.c: 54: blink2();
008100 CD 81 31 [ 4] 187 call _blink2
188 ; ../src/main.c: 55: halt();
008103 8E [10] 189 halt
008104 20 FA [ 2] 190 jra 00102$
191 ; ../src/main.c: 57: }
008106 81 [ 4] 192 ret
193 ; ../src/main.c: 59: static void PWR_Config(void){
194 ; -----------------------------------------
195 ; function PWR_Config
196 ; -----------------------------------------
008107 197 _PWR_Config:
198 ; ../src/main.c: 60: PWR->CSR1 = PWR_CSR1_PVDIF;
008107 35 20 50 B2 [ 1] 199 mov 0x50b2+0, #0x20
200 ; ../src/main.c: 61: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
00810B 35 00 50 B3 [ 1] 201 mov 0x50b3+0, #0x00
202 ; ../src/main.c: 62: PWR->CSR2 |= PWR_CSR2_ULP;
00810F 72 12 50 B3 [ 1] 203 bset 0x50b3, #1
204 ; ../src/main.c: 63: PWR->CSR2 |= PWR_CSR2_FWU;
008113 72 14 50 B3 [ 1] 205 bset 0x50b3, #2
206 ; ../src/main.c: 64: }
008117 81 [ 4] 207 ret
208 ; ../src/main.c: 66: static void CLK_Config(void)
209 ; -----------------------------------------
210 ; function CLK_Config
211 ; -----------------------------------------
008118 212 _CLK_Config:
213 ; ../src/main.c: 68: CLK_SYSCLKSourceSwitchCmd(ENABLE);
008118 A6 01 [ 1] 214 ld a, #0x01
00811A CD 82 A1 [ 4] 215 call _CLK_SYSCLKSourceSwitchCmd
216 ; ../src/main.c: 69: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSI);
00811D A6 02 [ 1] 217 ld a, #0x02
00811F CD 82 42 [ 4] 218 call _CLK_SYSCLKSourceConfig
219 ; ../src/main.c: 70: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
008122 4F [ 1] 220 clr a
008123 CD 82 9D [ 4] 221 call _CLK_SYSCLKDivConfig
222 ; ../src/main.c: 71: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSI);
008126 223 00101$:
008126 CD 82 46 [ 4] 224 call _CLK_GetSYSCLKSource
008129 A1 02 [ 1] 225 cp a, #0x02
00812B 26 F9 [ 1] 226 jrne 00101$
00812D 81 [ 4] 227 ret
00812E 20 F6 [ 2] 228 jra 00101$
229 ; ../src/main.c: 72: }
008130 81 [ 4] 230 ret
231 ; ../src/main.c: 85: static void blink2() {
232 ; -----------------------------------------
233 ; function blink2
234 ; -----------------------------------------
008131 235 _blink2:
236 ; ../src/main.c: 86: Mono_ON;
008131 A6 01 [ 1] 237 ld a, #0x01
008133 AE 50 05 [ 2] 238 ldw x, #0x5005
008136 CD 85 53 [ 4] 239 call _GPIO_ResetBits
240 ; ../src/main.c: 87: Led2_ON;
008139 A6 04 [ 1] 241 ld a, #0x04
00813B AE 50 05 [ 2] 242 ldw x, #0x5005
00813E CD 85 4A [ 4] 243 call _GPIO_SetBits
244 ; ../src/main.c: 88: Led2_OFF;
008141 A6 04 [ 1] 245 ld a, #0x04
008143 AE 50 05 [ 2] 246 ldw x, #0x5005
008146 CD 85 53 [ 4] 247 call _GPIO_ResetBits
248 ; ../src/main.c: 89: Mono_OFF;
008149 A6 01 [ 1] 249 ld a, #0x01
00814B AE 50 05 [ 2] 250 ldw x, #0x5005
251 ; ../src/main.c: 90: }
00814E CC 85 4A [ 2] 252 jp _GPIO_SetBits
253 .area CODE
254 .area CONST
255 .area INITIALIZER
256 .area CABS (ABS)

View File

@@ -8,9 +8,10 @@ Symbol Table
.__.CPU. = 000000 L
.__.H$L. = 000001 L
_ADC1_COMP_IRQHandler ****** GX
A _CLK_Config 00001B R
A _CLK_Config 00006A R
_CLK_GetSYSCLKSource ****** GX
_CLK_PeripheralClockConfig ****** GX
_CLK_RTCClockConfig ****** GX
_CLK_SYSCLKDivConfig ****** GX
_CLK_SYSCLKSourceConfig ****** GX
_CLK_SYSCLKSourceSwitchCmd ****** GX
@@ -33,7 +34,12 @@ Symbol Table
_GPIO_SetBits ****** GX
_I2C1_SPI2_IRQHandler ****** GX
_LCD_AES_IRQHandler ****** GX
A _PWR_Config 000059 R
_RTC_CSSLSE_IRQHandler ****** GX
_RTC_ITConfig ****** GX
_RTC_SetWakeUpCounter ****** GX
_RTC_WakeUpClockConfig ****** GX
_RTC_WakeUpCmd ****** GX
_SPI1_IRQHandler ****** GX
_SWITCH_CSS_BREAK_DAC_IRQHandler ****** GX
_TIM1_CC_IRQHandler ****** GX
@@ -46,25 +52,18 @@ Symbol Table
_TRAP_IRQHandler ****** GX
_USART1_RX_TIM5_CC_IRQHandler ****** GX
_USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ****** GX
_USART_Cmd ****** GX
A _USART_Config 000098 R
_USART_Init ****** GX
___sdcc_external_startup ****** GX
8 ___str_0 000000 R
5 __interrupt_vect 000000 R
6 __sdcc_init_data 000009 R
5 __sdcc_program_startup 000080 R
3 __start__stack 000000 R
A _blink 000034 R
A _main 000000 GR
A _print 000083 R
A _blink2 000083 R
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Symbol Table
A _println 000090 R
A _putchar 000075 R
A _main 000000 GR
l_DATA ****** GX
l_INITIALIZER ****** GX
s_DATA ****** GX
@@ -72,6 +71,7 @@ Symbol Table
s_INITIALIZED ****** GX
s_INITIALIZER ****** GX
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 3
Hexadecimal [24-Bits]
@@ -85,8 +85,8 @@ Area Table
5 HOME size 83 flags 0
6 GSINIT size 23 flags 0
7 GSFINAL size 3 flags 0
8 CONST size 6 flags 0
8 CONST size 0 flags 0
9 INITIALIZER size 0 flags 0
A CODE size DB flags 0
A CODE size A3 flags 0
B CABS size 0 flags 8

File diff suppressed because it is too large Load Diff

View File

@@ -60,289 +60,289 @@
60 ; -----------------------------------------
61 ; function GPIO_DeInit
62 ; -----------------------------------------
00881B 63 _GPIO_DeInit:
00848F 63 _GPIO_DeInit:
64 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 98: GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
00881B 90 93 [ 1] 65 ldw y, x
00881D 6F 04 [ 1] 66 clr (0x0004, x)
00848F 90 93 [ 1] 65 ldw y, x
008491 6F 04 [ 1] 66 clr (0x0004, x)
67 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 99: GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
00881F 90 7F [ 1] 68 clr (y)
008493 90 7F [ 1] 68 clr (y)
69 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 100: GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
008821 93 [ 1] 70 ldw x, y
008822 6F 02 [ 1] 71 clr (0x02, x)
008495 93 [ 1] 70 ldw x, y
008496 6F 02 [ 1] 71 clr (0x02, x)
72 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 101: GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
008824 93 [ 1] 73 ldw x, y
008825 6F 03 [ 1] 74 clr (0x0003, x)
008498 93 [ 1] 73 ldw x, y
008499 6F 03 [ 1] 74 clr (0x0003, x)
75 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 102: }
008827 81 [ 4] 76 ret
00849B 81 [ 4] 76 ret
77 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 133: void GPIO_Init(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
78 ; -----------------------------------------
79 ; function GPIO_Init
80 ; -----------------------------------------
008828 81 _GPIO_Init:
008828 52 08 [ 2] 82 sub sp, #8
00882A 1F 07 [ 2] 83 ldw (0x07, sp), x
00882C 6B 06 [ 1] 84 ld (0x06, sp), a
00849C 81 _GPIO_Init:
00849C 52 08 [ 2] 82 sub sp, #8
00849E 1F 07 [ 2] 83 ldw (0x07, sp), x
0084A0 6B 06 [ 1] 84 ld (0x06, sp), a
85 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
00882E 1E 07 [ 2] 86 ldw x, (0x07, sp)
008830 1C 00 04 [ 2] 87 addw x, #0x0004
008833 1F 01 [ 2] 88 ldw (0x01, sp), x
008835 F6 [ 1] 89 ld a, (x)
008836 88 [ 1] 90 push a
008837 7B 07 [ 1] 91 ld a, (0x07, sp)
008839 43 [ 1] 92 cpl a
00883A 6B 04 [ 1] 93 ld (0x04, sp), a
00883C 84 [ 1] 94 pop a
00883D 14 03 [ 1] 95 and a, (0x03, sp)
00883F 1E 01 [ 2] 96 ldw x, (0x01, sp)
008841 F7 [ 1] 97 ld (x), a
0084A2 1E 07 [ 2] 86 ldw x, (0x07, sp)
0084A4 1C 00 04 [ 2] 87 addw x, #0x0004
0084A7 1F 01 [ 2] 88 ldw (0x01, sp), x
0084A9 F6 [ 1] 89 ld a, (x)
0084AA 88 [ 1] 90 push a
0084AB 7B 07 [ 1] 91 ld a, (0x07, sp)
0084AD 43 [ 1] 92 cpl a
0084AE 6B 04 [ 1] 93 ld (0x04, sp), a
0084B0 84 [ 1] 94 pop a
0084B1 14 03 [ 1] 95 and a, (0x03, sp)
0084B3 1E 01 [ 2] 96 ldw x, (0x01, sp)
0084B5 F7 [ 1] 97 ld (x), a
98 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
008842 1E 07 [ 2] 99 ldw x, (0x07, sp)
008844 5C [ 1] 100 incw x
008845 5C [ 1] 101 incw x
008846 1F 04 [ 2] 102 ldw (0x04, sp), x
0084B6 1E 07 [ 2] 99 ldw x, (0x07, sp)
0084B8 5C [ 1] 100 incw x
0084B9 5C [ 1] 101 incw x
0084BA 1F 04 [ 2] 102 ldw (0x04, sp), x
103 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 149: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x80) != (uint8_t)0x00) /* Output mode */
008848 0D 0B [ 1] 104 tnz (0x0b, sp)
00884A 2A 1D [ 1] 105 jrpl 00105$
0084BC 0D 0B [ 1] 104 tnz (0x0b, sp)
0084BE 2A 1D [ 1] 105 jrpl 00105$
106 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
00884C 1E 07 [ 2] 107 ldw x, (0x07, sp)
00884E F6 [ 1] 108 ld a, (x)
0084C0 1E 07 [ 2] 107 ldw x, (0x07, sp)
0084C2 F6 [ 1] 108 ld a, (x)
109 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 151: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x10) != (uint8_t)0x00) /* High level */
00884F 88 [ 1] 110 push a
008850 7B 0C [ 1] 111 ld a, (0x0c, sp)
008852 A5 10 [ 1] 112 bcp a, #0x10
008854 84 [ 1] 113 pop a
008855 27 05 [ 1] 114 jreq 00102$
0084C3 88 [ 1] 110 push a
0084C4 7B 0C [ 1] 111 ld a, (0x0c, sp)
0084C6 A5 10 [ 1] 112 bcp a, #0x10
0084C8 84 [ 1] 113 pop a
0084C9 27 05 [ 1] 114 jreq 00102$
115 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
008857 1A 06 [ 1] 116 or a, (0x06, sp)
008859 F7 [ 1] 117 ld (x), a
00885A 20 03 [ 2] 118 jra 00103$
00885C 119 00102$:
0084CB 1A 06 [ 1] 116 or a, (0x06, sp)
0084CD F7 [ 1] 117 ld (x), a
0084CE 20 03 [ 2] 118 jra 00103$
0084D0 119 00102$:
120 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 156: GPIOx->ODR &= (uint8_t)(~(GPIO_Pin));
00885C 14 03 [ 1] 121 and a, (0x03, sp)
00885E F7 [ 1] 122 ld (x), a
00885F 123 00103$:
0084D0 14 03 [ 1] 121 and a, (0x03, sp)
0084D2 F7 [ 1] 122 ld (x), a
0084D3 123 00103$:
124 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
00885F 1E 04 [ 2] 125 ldw x, (0x04, sp)
008861 F6 [ 1] 126 ld a, (x)
008862 1A 06 [ 1] 127 or a, (0x06, sp)
008864 1E 04 [ 2] 128 ldw x, (0x04, sp)
008866 F7 [ 1] 129 ld (x), a
008867 20 08 [ 2] 130 jra 00106$
008869 131 00105$:
0084D3 1E 04 [ 2] 125 ldw x, (0x04, sp)
0084D5 F6 [ 1] 126 ld a, (x)
0084D6 1A 06 [ 1] 127 or a, (0x06, sp)
0084D8 1E 04 [ 2] 128 ldw x, (0x04, sp)
0084DA F7 [ 1] 129 ld (x), a
0084DB 20 08 [ 2] 130 jra 00106$
0084DD 131 00105$:
132 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 163: GPIOx->DDR &= (uint8_t)(~(GPIO_Pin));
008869 1E 04 [ 2] 133 ldw x, (0x04, sp)
00886B F6 [ 1] 134 ld a, (x)
00886C 14 03 [ 1] 135 and a, (0x03, sp)
00886E 1E 04 [ 2] 136 ldw x, (0x04, sp)
008870 F7 [ 1] 137 ld (x), a
008871 138 00106$:
0084DD 1E 04 [ 2] 133 ldw x, (0x04, sp)
0084DF F6 [ 1] 134 ld a, (x)
0084E0 14 03 [ 1] 135 and a, (0x03, sp)
0084E2 1E 04 [ 2] 136 ldw x, (0x04, sp)
0084E4 F7 [ 1] 137 ld (x), a
0084E5 138 00106$:
139 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
008871 1E 07 [ 2] 140 ldw x, (0x07, sp)
008873 1C 00 03 [ 2] 141 addw x, #0x0003
008876 F6 [ 1] 142 ld a, (x)
0084E5 1E 07 [ 2] 140 ldw x, (0x07, sp)
0084E7 1C 00 03 [ 2] 141 addw x, #0x0003
0084EA F6 [ 1] 142 ld a, (x)
143 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 170: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x40) != (uint8_t)0x00) /* Pull-Up or Push-Pull */
008877 88 [ 1] 144 push a
008878 7B 0C [ 1] 145 ld a, (0x0c, sp)
00887A A5 40 [ 1] 146 bcp a, #0x40
00887C 84 [ 1] 147 pop a
00887D 27 05 [ 1] 148 jreq 00108$
0084EB 88 [ 1] 144 push a
0084EC 7B 0C [ 1] 145 ld a, (0x0c, sp)
0084EE A5 40 [ 1] 146 bcp a, #0x40
0084F0 84 [ 1] 147 pop a
0084F1 27 05 [ 1] 148 jreq 00108$
149 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
00887F 1A 06 [ 1] 150 or a, (0x06, sp)
008881 F7 [ 1] 151 ld (x), a
008882 20 03 [ 2] 152 jra 00109$
008884 153 00108$:
0084F3 1A 06 [ 1] 150 or a, (0x06, sp)
0084F5 F7 [ 1] 151 ld (x), a
0084F6 20 03 [ 2] 152 jra 00109$
0084F8 153 00108$:
154 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 175: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
008884 14 03 [ 1] 155 and a, (0x03, sp)
008886 F7 [ 1] 156 ld (x), a
008887 157 00109$:
0084F8 14 03 [ 1] 155 and a, (0x03, sp)
0084FA F7 [ 1] 156 ld (x), a
0084FB 157 00109$:
158 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
008887 1E 01 [ 2] 159 ldw x, (0x01, sp)
008889 F6 [ 1] 160 ld a, (x)
0084FB 1E 01 [ 2] 159 ldw x, (0x01, sp)
0084FD F6 [ 1] 160 ld a, (x)
161 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 182: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x20) != (uint8_t)0x00) /* Interrupt or Slow slope */
00888A 88 [ 1] 162 push a
00888B 7B 0C [ 1] 163 ld a, (0x0c, sp)
00888D A5 20 [ 1] 164 bcp a, #0x20
00888F 84 [ 1] 165 pop a
008890 27 07 [ 1] 166 jreq 00111$
0084FE 88 [ 1] 162 push a
0084FF 7B 0C [ 1] 163 ld a, (0x0c, sp)
008501 A5 20 [ 1] 164 bcp a, #0x20
008503 84 [ 1] 165 pop a
008504 27 07 [ 1] 166 jreq 00111$
167 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 184: GPIOx->CR2 |= GPIO_Pin;
008892 1A 06 [ 1] 168 or a, (0x06, sp)
008894 1E 01 [ 2] 169 ldw x, (0x01, sp)
008896 F7 [ 1] 170 ld (x), a
008897 20 05 [ 2] 171 jra 00113$
008899 172 00111$:
008506 1A 06 [ 1] 168 or a, (0x06, sp)
008508 1E 01 [ 2] 169 ldw x, (0x01, sp)
00850A F7 [ 1] 170 ld (x), a
00850B 20 05 [ 2] 171 jra 00113$
00850D 172 00111$:
173 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 187: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
008899 14 03 [ 1] 174 and a, (0x03, sp)
00889B 1E 01 [ 2] 175 ldw x, (0x01, sp)
00889D F7 [ 1] 176 ld (x), a
00889E 177 00113$:
00850D 14 03 [ 1] 174 and a, (0x03, sp)
00850F 1E 01 [ 2] 175 ldw x, (0x01, sp)
008511 F7 [ 1] 176 ld (x), a
008512 177 00113$:
178 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 190: }
00889E 5B 08 [ 2] 179 addw sp, #8
0088A0 85 [ 2] 180 popw x
0088A1 84 [ 1] 181 pop a
0088A2 FC [ 2] 182 jp (x)
008512 5B 08 [ 2] 179 addw sp, #8
008514 85 [ 2] 180 popw x
008515 84 [ 1] 181 pop a
008516 FC [ 2] 182 jp (x)
183 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 209: void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, FunctionalState NewState)
184 ; -----------------------------------------
185 ; function GPIO_ExternalPullUpConfig
186 ; -----------------------------------------
0088A3 187 _GPIO_ExternalPullUpConfig:
0088A3 88 [ 1] 188 push a
008517 187 _GPIO_ExternalPullUpConfig:
008517 88 [ 1] 188 push a
189 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
0088A4 1C 00 03 [ 2] 190 addw x, #0x0003
0088A7 88 [ 1] 191 push a
0088A8 F6 [ 1] 192 ld a, (x)
0088A9 6B 02 [ 1] 193 ld (0x02, sp), a
0088AB 84 [ 1] 194 pop a
008518 1C 00 03 [ 2] 190 addw x, #0x0003
00851B 88 [ 1] 191 push a
00851C F6 [ 1] 192 ld a, (x)
00851D 6B 02 [ 1] 193 ld (0x02, sp), a
00851F 84 [ 1] 194 pop a
195 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 215: if (NewState != DISABLE) /* External Pull-Up Set*/
0088AC 0D 04 [ 1] 196 tnz (0x04, sp)
0088AE 27 05 [ 1] 197 jreq 00102$
008520 0D 04 [ 1] 196 tnz (0x04, sp)
008522 27 05 [ 1] 197 jreq 00102$
198 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
0088B0 1A 01 [ 1] 199 or a, (0x01, sp)
0088B2 F7 [ 1] 200 ld (x), a
0088B3 20 04 [ 2] 201 jra 00104$
0088B5 202 00102$:
008524 1A 01 [ 1] 199 or a, (0x01, sp)
008526 F7 [ 1] 200 ld (x), a
008527 20 04 [ 2] 201 jra 00104$
008529 202 00102$:
203 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 220: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
0088B5 43 [ 1] 204 cpl a
0088B6 14 01 [ 1] 205 and a, (0x01, sp)
0088B8 F7 [ 1] 206 ld (x), a
0088B9 207 00104$:
008529 43 [ 1] 204 cpl a
00852A 14 01 [ 1] 205 and a, (0x01, sp)
00852C F7 [ 1] 206 ld (x), a
00852D 207 00104$:
208 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 222: }
0088B9 84 [ 1] 209 pop a
0088BA 85 [ 2] 210 popw x
0088BB 84 [ 1] 211 pop a
0088BC FC [ 2] 212 jp (x)
00852D 84 [ 1] 209 pop a
00852E 85 [ 2] 210 popw x
00852F 84 [ 1] 211 pop a
008530 FC [ 2] 212 jp (x)
213 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 248: void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t GPIO_PortVal)
214 ; -----------------------------------------
215 ; function GPIO_Write
216 ; -----------------------------------------
0088BD 217 _GPIO_Write:
008531 217 _GPIO_Write:
218 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 250: GPIOx->ODR = GPIO_PortVal;
0088BD F7 [ 1] 219 ld (x), a
008531 F7 [ 1] 219 ld (x), a
220 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 251: }
0088BE 81 [ 4] 221 ret
008532 81 [ 4] 221 ret
222 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 270: void GPIO_WriteBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction GPIO_BitVal)
223 ; -----------------------------------------
224 ; function GPIO_WriteBit
225 ; -----------------------------------------
0088BF 226 _GPIO_WriteBit:
0088BF 88 [ 1] 227 push a
008533 226 _GPIO_WriteBit:
008533 88 [ 1] 227 push a
228 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
0088C0 88 [ 1] 229 push a
0088C1 F6 [ 1] 230 ld a, (x)
0088C2 6B 02 [ 1] 231 ld (0x02, sp), a
0088C4 84 [ 1] 232 pop a
008534 88 [ 1] 229 push a
008535 F6 [ 1] 230 ld a, (x)
008536 6B 02 [ 1] 231 ld (0x02, sp), a
008538 84 [ 1] 232 pop a
233 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 276: if (GPIO_BitVal != RESET)
0088C5 0D 04 [ 1] 234 tnz (0x04, sp)
0088C7 27 05 [ 1] 235 jreq 00102$
008539 0D 04 [ 1] 234 tnz (0x04, sp)
00853B 27 05 [ 1] 235 jreq 00102$
236 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
0088C9 1A 01 [ 1] 237 or a, (0x01, sp)
0088CB F7 [ 1] 238 ld (x), a
0088CC 20 04 [ 2] 239 jra 00104$
0088CE 240 00102$:
00853D 1A 01 [ 1] 237 or a, (0x01, sp)
00853F F7 [ 1] 238 ld (x), a
008540 20 04 [ 2] 239 jra 00104$
008542 240 00102$:
241 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 283: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
0088CE 43 [ 1] 242 cpl a
0088CF 14 01 [ 1] 243 and a, (0x01, sp)
0088D1 F7 [ 1] 244 ld (x), a
0088D2 245 00104$:
008542 43 [ 1] 242 cpl a
008543 14 01 [ 1] 243 and a, (0x01, sp)
008545 F7 [ 1] 244 ld (x), a
008546 245 00104$:
246 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 285: }
0088D2 84 [ 1] 247 pop a
0088D3 85 [ 2] 248 popw x
0088D4 84 [ 1] 249 pop a
0088D5 FC [ 2] 250 jp (x)
008546 84 [ 1] 247 pop a
008547 85 [ 2] 248 popw x
008548 84 [ 1] 249 pop a
008549 FC [ 2] 250 jp (x)
251 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 303: void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
252 ; -----------------------------------------
253 ; function GPIO_SetBits
254 ; -----------------------------------------
0088D6 255 _GPIO_SetBits:
0088D6 88 [ 1] 256 push a
0088D7 6B 01 [ 1] 257 ld (0x01, sp), a
00854A 255 _GPIO_SetBits:
00854A 88 [ 1] 256 push a
00854B 6B 01 [ 1] 257 ld (0x01, sp), a
258 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 305: GPIOx->ODR |= GPIO_Pin;
0088D9 F6 [ 1] 259 ld a, (x)
0088DA 1A 01 [ 1] 260 or a, (0x01, sp)
0088DC F7 [ 1] 261 ld (x), a
00854D F6 [ 1] 259 ld a, (x)
00854E 1A 01 [ 1] 260 or a, (0x01, sp)
008550 F7 [ 1] 261 ld (x), a
262 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 306: }
0088DD 84 [ 1] 263 pop a
0088DE 81 [ 4] 264 ret
008551 84 [ 1] 263 pop a
008552 81 [ 4] 264 ret
265 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 324: void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
266 ; -----------------------------------------
267 ; function GPIO_ResetBits
268 ; -----------------------------------------
0088DF 269 _GPIO_ResetBits:
0088DF 88 [ 1] 270 push a
008553 269 _GPIO_ResetBits:
008553 88 [ 1] 270 push a
271 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 326: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
0088E0 88 [ 1] 272 push a
0088E1 F6 [ 1] 273 ld a, (x)
0088E2 6B 02 [ 1] 274 ld (0x02, sp), a
0088E4 84 [ 1] 275 pop a
0088E5 43 [ 1] 276 cpl a
0088E6 14 01 [ 1] 277 and a, (0x01, sp)
0088E8 F7 [ 1] 278 ld (x), a
008554 88 [ 1] 272 push a
008555 F6 [ 1] 273 ld a, (x)
008556 6B 02 [ 1] 274 ld (0x02, sp), a
008558 84 [ 1] 275 pop a
008559 43 [ 1] 276 cpl a
00855A 14 01 [ 1] 277 and a, (0x01, sp)
00855C F7 [ 1] 278 ld (x), a
279 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 327: }
0088E9 84 [ 1] 280 pop a
0088EA 81 [ 4] 281 ret
00855D 84 [ 1] 280 pop a
00855E 81 [ 4] 281 ret
282 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 336: void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
283 ; -----------------------------------------
284 ; function GPIO_ToggleBits
285 ; -----------------------------------------
0088EB 286 _GPIO_ToggleBits:
0088EB 88 [ 1] 287 push a
0088EC 6B 01 [ 1] 288 ld (0x01, sp), a
00855F 286 _GPIO_ToggleBits:
00855F 88 [ 1] 287 push a
008560 6B 01 [ 1] 288 ld (0x01, sp), a
289 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 338: GPIOx->ODR ^= GPIO_Pin;
0088EE F6 [ 1] 290 ld a, (x)
0088EF 18 01 [ 1] 291 xor a, (0x01, sp)
0088F1 F7 [ 1] 292 ld (x), a
008562 F6 [ 1] 290 ld a, (x)
008563 18 01 [ 1] 291 xor a, (0x01, sp)
008565 F7 [ 1] 292 ld (x), a
293 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 339: }
0088F2 84 [ 1] 294 pop a
0088F3 81 [ 4] 295 ret
008566 84 [ 1] 294 pop a
008567 81 [ 4] 295 ret
296 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 347: uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
297 ; -----------------------------------------
298 ; function GPIO_ReadInputData
299 ; -----------------------------------------
0088F4 300 _GPIO_ReadInputData:
008568 300 _GPIO_ReadInputData:
301 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 349: return ((uint8_t)GPIOx->IDR);
0088F4 E6 01 [ 1] 302 ld a, (0x1, x)
008568 E6 01 [ 1] 302 ld a, (0x1, x)
303 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 350: }
0088F6 81 [ 4] 304 ret
00856A 81 [ 4] 304 ret
305 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 358: uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
306 ; -----------------------------------------
307 ; function GPIO_ReadOutputData
308 ; -----------------------------------------
0088F7 309 _GPIO_ReadOutputData:
00856B 309 _GPIO_ReadOutputData:
310 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 360: return ((uint8_t)GPIOx->ODR);
0088F7 F6 [ 1] 311 ld a, (x)
00856B F6 [ 1] 311 ld a, (x)
312 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 361: }
0088F8 81 [ 4] 313 ret
00856C 81 [ 4] 313 ret
314 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 378: BitStatus GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
315 ; -----------------------------------------
316 ; function GPIO_ReadInputDataBit
317 ; -----------------------------------------
0088F9 318 _GPIO_ReadInputDataBit:
0088F9 88 [ 1] 319 push a
0088FA 6B 01 [ 1] 320 ld (0x01, sp), a
00856D 318 _GPIO_ReadInputDataBit:
00856D 88 [ 1] 319 push a
00856E 6B 01 [ 1] 320 ld (0x01, sp), a
321 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 380: return ((BitStatus)(GPIOx->IDR & (uint8_t)GPIO_Pin));
0088FC E6 01 [ 1] 322 ld a, (0x1, x)
0088FE 14 01 [ 1] 323 and a, (0x01, sp)
008900 40 [ 1] 324 neg a
008901 4F [ 1] 325 clr a
008902 49 [ 1] 326 rlc a
008570 E6 01 [ 1] 322 ld a, (0x1, x)
008572 14 01 [ 1] 323 and a, (0x01, sp)
008574 40 [ 1] 324 neg a
008575 4F [ 1] 325 clr a
008576 49 [ 1] 326 rlc a
327 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 381: }
008903 5B 01 [ 2] 328 addw sp, #1
008905 81 [ 4] 329 ret
008577 5B 01 [ 2] 328 addw sp, #1
008579 81 [ 4] 329 ret
330 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 389: BitStatus GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
331 ; -----------------------------------------
332 ; function GPIO_ReadOutputDataBit
333 ; -----------------------------------------
008906 334 _GPIO_ReadOutputDataBit:
008906 88 [ 1] 335 push a
008907 6B 01 [ 1] 336 ld (0x01, sp), a
00857A 334 _GPIO_ReadOutputDataBit:
00857A 88 [ 1] 335 push a
00857B 6B 01 [ 1] 336 ld (0x01, sp), a
337 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 391: return ((BitStatus)(GPIOx->ODR & (uint8_t)GPIO_Pin));
008909 F6 [ 1] 338 ld a, (x)
00890A 14 01 [ 1] 339 and a, (0x01, sp)
00890C 40 [ 1] 340 neg a
00890D 4F [ 1] 341 clr a
00890E 49 [ 1] 342 rlc a
00857D F6 [ 1] 338 ld a, (x)
00857E 14 01 [ 1] 339 and a, (0x01, sp)
008580 40 [ 1] 340 neg a
008581 4F [ 1] 341 clr a
008582 49 [ 1] 342 rlc a
343 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 392: }
00890F 5B 01 [ 2] 344 addw sp, #1
008911 81 [ 4] 345 ret
008583 5B 01 [ 2] 344 addw sp, #1
008585 81 [ 4] 345 ret
346 .area CODE
347 .area CONST
348 .area INITIALIZER

View File

@@ -7,6 +7,7 @@
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _RTC_ClearITPendingBit
.globl _TRAP_IRQHandler
.globl _FLASH_IRQHandler
.globl _DMA1_CHANNEL0_1_IRQHandler
@@ -107,182 +108,186 @@ _DMA1_CHANNEL2_3_IRQHandler:
; function RTC_CSSLSE_IRQHandler
; -----------------------------------------
_RTC_CSSLSE_IRQHandler:
; ../src/stm8l15x_it.c: 116: }
div x, a
; ../src/stm8l15x_it.c: 113: RTC_ClearITPendingBit(RTC_IT_WUT);
ldw x, #0x0040
call _RTC_ClearITPendingBit
; ../src/stm8l15x_it.c: 118: }
iret
; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
; ../src/stm8l15x_it.c: 124: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
; -----------------------------------------
; function EXTIE_F_PVD_IRQHandler
; -----------------------------------------
_EXTIE_F_PVD_IRQHandler:
; ../src/stm8l15x_it.c: 127: }
; ../src/stm8l15x_it.c: 129: }
iret
; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
; ../src/stm8l15x_it.c: 136: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
; -----------------------------------------
; function EXTIB_G_IRQHandler
; -----------------------------------------
_EXTIB_G_IRQHandler:
; ../src/stm8l15x_it.c: 139: }
; ../src/stm8l15x_it.c: 141: }
iret
; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
; ../src/stm8l15x_it.c: 148: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
; -----------------------------------------
; function EXTID_H_IRQHandler
; -----------------------------------------
_EXTID_H_IRQHandler:
; ../src/stm8l15x_it.c: 151: }
; ../src/stm8l15x_it.c: 153: }
iret
; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
; ../src/stm8l15x_it.c: 160: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
; -----------------------------------------
; function EXTI0_IRQHandler
; -----------------------------------------
_EXTI0_IRQHandler:
; ../src/stm8l15x_it.c: 163: }
; ../src/stm8l15x_it.c: 165: }
iret
; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
; ../src/stm8l15x_it.c: 172: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
; -----------------------------------------
; function EXTI1_IRQHandler
; -----------------------------------------
_EXTI1_IRQHandler:
; ../src/stm8l15x_it.c: 175: }
; ../src/stm8l15x_it.c: 177: }
iret
; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
; ../src/stm8l15x_it.c: 184: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
; -----------------------------------------
; function EXTI2_IRQHandler
; -----------------------------------------
_EXTI2_IRQHandler:
; ../src/stm8l15x_it.c: 187: }
; ../src/stm8l15x_it.c: 189: }
iret
; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
; ../src/stm8l15x_it.c: 196: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
; -----------------------------------------
; function EXTI3_IRQHandler
; -----------------------------------------
_EXTI3_IRQHandler:
; ../src/stm8l15x_it.c: 199: }
; ../src/stm8l15x_it.c: 201: }
iret
; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
; ../src/stm8l15x_it.c: 208: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
; -----------------------------------------
; function EXTI4_IRQHandler
; -----------------------------------------
_EXTI4_IRQHandler:
; ../src/stm8l15x_it.c: 211: }
; ../src/stm8l15x_it.c: 213: }
iret
; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
; ../src/stm8l15x_it.c: 220: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
; -----------------------------------------
; function EXTI5_IRQHandler
; -----------------------------------------
_EXTI5_IRQHandler:
; ../src/stm8l15x_it.c: 223: }
; ../src/stm8l15x_it.c: 225: }
iret
; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
; ../src/stm8l15x_it.c: 232: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
; -----------------------------------------
; function EXTI6_IRQHandler
; -----------------------------------------
_EXTI6_IRQHandler:
; ../src/stm8l15x_it.c: 235: }
; ../src/stm8l15x_it.c: 237: }
iret
; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
; ../src/stm8l15x_it.c: 244: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
; -----------------------------------------
; function EXTI7_IRQHandler
; -----------------------------------------
_EXTI7_IRQHandler:
; ../src/stm8l15x_it.c: 247: }
; ../src/stm8l15x_it.c: 249: }
iret
; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
; ../src/stm8l15x_it.c: 255: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
; -----------------------------------------
; function LCD_AES_IRQHandler
; -----------------------------------------
_LCD_AES_IRQHandler:
; ../src/stm8l15x_it.c: 258: }
; ../src/stm8l15x_it.c: 260: }
iret
; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
; ../src/stm8l15x_it.c: 266: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
; -----------------------------------------
; function SWITCH_CSS_BREAK_DAC_IRQHandler
; -----------------------------------------
_SWITCH_CSS_BREAK_DAC_IRQHandler:
; ../src/stm8l15x_it.c: 269: }
; ../src/stm8l15x_it.c: 271: }
iret
; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
; ../src/stm8l15x_it.c: 278: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
; -----------------------------------------
; function ADC1_COMP_IRQHandler
; -----------------------------------------
_ADC1_COMP_IRQHandler:
; ../src/stm8l15x_it.c: 281: }
; ../src/stm8l15x_it.c: 283: }
iret
; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
; ../src/stm8l15x_it.c: 290: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
; -----------------------------------------
; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
; -----------------------------------------
_TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
; ../src/stm8l15x_it.c: 293: }
; ../src/stm8l15x_it.c: 295: }
iret
; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
; ../src/stm8l15x_it.c: 302: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
; -----------------------------------------
; function TIM2_CC_USART2_RX_IRQHandler
; -----------------------------------------
_TIM2_CC_USART2_RX_IRQHandler:
; ../src/stm8l15x_it.c: 305: }
; ../src/stm8l15x_it.c: 307: }
iret
; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
; ../src/stm8l15x_it.c: 315: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
; -----------------------------------------
; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
; -----------------------------------------
_TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
; ../src/stm8l15x_it.c: 318: }
; ../src/stm8l15x_it.c: 320: }
iret
; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
; ../src/stm8l15x_it.c: 326: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
; -----------------------------------------
; function TIM3_CC_USART3_RX_IRQHandler
; -----------------------------------------
_TIM3_CC_USART3_RX_IRQHandler:
; ../src/stm8l15x_it.c: 329: }
; ../src/stm8l15x_it.c: 331: }
iret
; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
; ../src/stm8l15x_it.c: 337: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
; -----------------------------------------
; function TIM1_UPD_OVF_TRG_COM_IRQHandler
; -----------------------------------------
_TIM1_UPD_OVF_TRG_COM_IRQHandler:
; ../src/stm8l15x_it.c: 340: }
; ../src/stm8l15x_it.c: 342: }
iret
; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
; ../src/stm8l15x_it.c: 348: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
; -----------------------------------------
; function TIM1_CC_IRQHandler
; -----------------------------------------
_TIM1_CC_IRQHandler:
; ../src/stm8l15x_it.c: 351: }
; ../src/stm8l15x_it.c: 353: }
iret
; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
; ../src/stm8l15x_it.c: 360: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
; -----------------------------------------
; function TIM4_UPD_OVF_TRG_IRQHandler
; -----------------------------------------
_TIM4_UPD_OVF_TRG_IRQHandler:
; ../src/stm8l15x_it.c: 363: }
; ../src/stm8l15x_it.c: 365: }
iret
; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
; ../src/stm8l15x_it.c: 371: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
; -----------------------------------------
; function SPI1_IRQHandler
; -----------------------------------------
_SPI1_IRQHandler:
; ../src/stm8l15x_it.c: 374: }
; ../src/stm8l15x_it.c: 376: }
iret
; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
; ../src/stm8l15x_it.c: 383: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
; -----------------------------------------
; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
; -----------------------------------------
_USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
; ../src/stm8l15x_it.c: 386: }
; ../src/stm8l15x_it.c: 388: }
iret
; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
; ../src/stm8l15x_it.c: 395: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
; -----------------------------------------
; function USART1_RX_TIM5_CC_IRQHandler
; -----------------------------------------
_USART1_RX_TIM5_CC_IRQHandler:
; ../src/stm8l15x_it.c: 398: }
; ../src/stm8l15x_it.c: 400: }
iret
; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
; ../src/stm8l15x_it.c: 407: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
; -----------------------------------------
; function I2C1_SPI2_IRQHandler
; -----------------------------------------
_I2C1_SPI2_IRQHandler:
; ../src/stm8l15x_it.c: 410: }
; ../src/stm8l15x_it.c: 412: }
iret
.area CODE
.area CONST

View File

@@ -7,284 +7,289 @@
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _TRAP_IRQHandler
11 .globl _FLASH_IRQHandler
12 .globl _DMA1_CHANNEL0_1_IRQHandler
13 .globl _DMA1_CHANNEL2_3_IRQHandler
14 .globl _RTC_CSSLSE_IRQHandler
15 .globl _EXTIE_F_PVD_IRQHandler
16 .globl _EXTIB_G_IRQHandler
17 .globl _EXTID_H_IRQHandler
18 .globl _EXTI0_IRQHandler
19 .globl _EXTI1_IRQHandler
20 .globl _EXTI2_IRQHandler
21 .globl _EXTI3_IRQHandler
22 .globl _EXTI4_IRQHandler
23 .globl _EXTI5_IRQHandler
24 .globl _EXTI6_IRQHandler
25 .globl _EXTI7_IRQHandler
26 .globl _LCD_AES_IRQHandler
27 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
28 .globl _ADC1_COMP_IRQHandler
29 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
30 .globl _TIM2_CC_USART2_RX_IRQHandler
31 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
32 .globl _TIM3_CC_USART3_RX_IRQHandler
33 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
34 .globl _TIM1_CC_IRQHandler
35 .globl _TIM4_UPD_OVF_TRG_IRQHandler
36 .globl _SPI1_IRQHandler
37 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
38 .globl _USART1_RX_TIM5_CC_IRQHandler
39 .globl _I2C1_SPI2_IRQHandler
40 ;--------------------------------------------------------
41 ; ram data
42 ;--------------------------------------------------------
43 .area DATA
44 ;--------------------------------------------------------
45 ; ram data
46 ;--------------------------------------------------------
47 .area INITIALIZED
48 ;--------------------------------------------------------
49 ; absolute external ram data
50 ;--------------------------------------------------------
51 .area DABS (ABS)
52
53 ; default segment ordering for linker
54 .area HOME
55 .area GSINIT
56 .area GSFINAL
57 .area CONST
58 .area INITIALIZER
59 .area CODE
60
61 ;--------------------------------------------------------
62 ; global & static initialisations
63 ;--------------------------------------------------------
64 .area HOME
65 .area GSINIT
66 .area GSFINAL
67 .area GSINIT
68 ;--------------------------------------------------------
69 ; Home
70 ;--------------------------------------------------------
71 .area HOME
10 .globl _RTC_ClearITPendingBit
11 .globl _TRAP_IRQHandler
12 .globl _FLASH_IRQHandler
13 .globl _DMA1_CHANNEL0_1_IRQHandler
14 .globl _DMA1_CHANNEL2_3_IRQHandler
15 .globl _RTC_CSSLSE_IRQHandler
16 .globl _EXTIE_F_PVD_IRQHandler
17 .globl _EXTIB_G_IRQHandler
18 .globl _EXTID_H_IRQHandler
19 .globl _EXTI0_IRQHandler
20 .globl _EXTI1_IRQHandler
21 .globl _EXTI2_IRQHandler
22 .globl _EXTI3_IRQHandler
23 .globl _EXTI4_IRQHandler
24 .globl _EXTI5_IRQHandler
25 .globl _EXTI6_IRQHandler
26 .globl _EXTI7_IRQHandler
27 .globl _LCD_AES_IRQHandler
28 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
29 .globl _ADC1_COMP_IRQHandler
30 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
31 .globl _TIM2_CC_USART2_RX_IRQHandler
32 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
33 .globl _TIM3_CC_USART3_RX_IRQHandler
34 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
35 .globl _TIM1_CC_IRQHandler
36 .globl _TIM4_UPD_OVF_TRG_IRQHandler
37 .globl _SPI1_IRQHandler
38 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
39 .globl _USART1_RX_TIM5_CC_IRQHandler
40 .globl _I2C1_SPI2_IRQHandler
41 ;--------------------------------------------------------
42 ; ram data
43 ;--------------------------------------------------------
44 .area DATA
45 ;--------------------------------------------------------
46 ; ram data
47 ;--------------------------------------------------------
48 .area INITIALIZED
49 ;--------------------------------------------------------
50 ; absolute external ram data
51 ;--------------------------------------------------------
52 .area DABS (ABS)
53
54 ; default segment ordering for linker
55 .area HOME
56 .area GSINIT
57 .area GSFINAL
58 .area CONST
59 .area INITIALIZER
60 .area CODE
61
62 ;--------------------------------------------------------
63 ; global & static initialisations
64 ;--------------------------------------------------------
65 .area HOME
66 .area GSINIT
67 .area GSFINAL
68 .area GSINIT
69 ;--------------------------------------------------------
70 ; Home
71 ;--------------------------------------------------------
72 .area HOME
73 ;--------------------------------------------------------
74 ; code
75 ;--------------------------------------------------------
76 .area CODE
77 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
78 ; -----------------------------------------
79 ; function TRAP_IRQHandler
80 ; -----------------------------------------
000000 81 _TRAP_IRQHandler:
82 ; ../src/stm8l15x_it.c: 72: }
000000 80 [11] 83 iret
84 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
85 ; -----------------------------------------
86 ; function FLASH_IRQHandler
87 ; -----------------------------------------
000001 88 _FLASH_IRQHandler:
89 ; ../src/stm8l15x_it.c: 83: }
000001 80 [11] 90 iret
91 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
92 ; -----------------------------------------
93 ; function DMA1_CHANNEL0_1_IRQHandler
94 ; -----------------------------------------
000002 95 _DMA1_CHANNEL0_1_IRQHandler:
96 ; ../src/stm8l15x_it.c: 94: }
000002 80 [11] 97 iret
98 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
99 ; -----------------------------------------
100 ; function DMA1_CHANNEL2_3_IRQHandler
101 ; -----------------------------------------
000003 102 _DMA1_CHANNEL2_3_IRQHandler:
103 ; ../src/stm8l15x_it.c: 105: }
000003 80 [11] 104 iret
105 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
106 ; -----------------------------------------
107 ; function RTC_CSSLSE_IRQHandler
108 ; -----------------------------------------
000004 109 _RTC_CSSLSE_IRQHandler:
110 ; ../src/stm8l15x_it.c: 116: }
000004 80 [11] 111 iret
112 ; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
113 ; -----------------------------------------
114 ; function EXTIE_F_PVD_IRQHandler
115 ; -----------------------------------------
000005 116 _EXTIE_F_PVD_IRQHandler:
117 ; ../src/stm8l15x_it.c: 127: }
000005 80 [11] 118 iret
119 ; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
73 .area HOME
74 ;--------------------------------------------------------
75 ; code
76 ;--------------------------------------------------------
77 .area CODE
78 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
79 ; -----------------------------------------
80 ; function TRAP_IRQHandler
81 ; -----------------------------------------
000000 82 _TRAP_IRQHandler:
83 ; ../src/stm8l15x_it.c: 72: }
000000 80 [11] 84 iret
85 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
86 ; -----------------------------------------
87 ; function FLASH_IRQHandler
88 ; -----------------------------------------
000001 89 _FLASH_IRQHandler:
90 ; ../src/stm8l15x_it.c: 83: }
000001 80 [11] 91 iret
92 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
93 ; -----------------------------------------
94 ; function DMA1_CHANNEL0_1_IRQHandler
95 ; -----------------------------------------
000002 96 _DMA1_CHANNEL0_1_IRQHandler:
97 ; ../src/stm8l15x_it.c: 94: }
000002 80 [11] 98 iret
99 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
100 ; -----------------------------------------
101 ; function DMA1_CHANNEL2_3_IRQHandler
102 ; -----------------------------------------
000003 103 _DMA1_CHANNEL2_3_IRQHandler:
104 ; ../src/stm8l15x_it.c: 105: }
000003 80 [11] 105 iret
106 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
107 ; -----------------------------------------
108 ; function RTC_CSSLSE_IRQHandler
109 ; -----------------------------------------
000004 110 _RTC_CSSLSE_IRQHandler:
000004 62 [ 2] 111 div x, a
112 ; ../src/stm8l15x_it.c: 113: RTC_ClearITPendingBit(RTC_IT_WUT);
000005 AE 00 40 [ 2] 113 ldw x, #0x0040
000008 CDr00r00 [ 4] 114 call _RTC_ClearITPendingBit
115 ; ../src/stm8l15x_it.c: 118: }
00000B 80 [11] 116 iret
117 ; ../src/stm8l15x_it.c: 124: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
118 ; -----------------------------------------
119 ; function EXTIE_F_PVD_IRQHandler
120 ; -----------------------------------------
121 ; function EXTIB_G_IRQHandler
122 ; -----------------------------------------
000006 123 _EXTIB_G_IRQHandler:
124 ; ../src/stm8l15x_it.c: 139: }
000006 80 [11] 125 iret
126 ; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
00000C 121 _EXTIE_F_PVD_IRQHandler:
122 ; ../src/stm8l15x_it.c: 129: }
00000C 80 [11] 123 iret
124 ; ../src/stm8l15x_it.c: 136: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
125 ; -----------------------------------------
126 ; function EXTIB_G_IRQHandler
127 ; -----------------------------------------
128 ; function EXTID_H_IRQHandler
129 ; -----------------------------------------
000007 130 _EXTID_H_IRQHandler:
131 ; ../src/stm8l15x_it.c: 151: }
000007 80 [11] 132 iret
133 ; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
00000D 128 _EXTIB_G_IRQHandler:
129 ; ../src/stm8l15x_it.c: 141: }
00000D 80 [11] 130 iret
131 ; ../src/stm8l15x_it.c: 148: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
132 ; -----------------------------------------
133 ; function EXTID_H_IRQHandler
134 ; -----------------------------------------
135 ; function EXTI0_IRQHandler
136 ; -----------------------------------------
000008 137 _EXTI0_IRQHandler:
138 ; ../src/stm8l15x_it.c: 163: }
000008 80 [11] 139 iret
140 ; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
00000E 135 _EXTID_H_IRQHandler:
136 ; ../src/stm8l15x_it.c: 153: }
00000E 80 [11] 137 iret
138 ; ../src/stm8l15x_it.c: 160: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
139 ; -----------------------------------------
140 ; function EXTI0_IRQHandler
141 ; -----------------------------------------
142 ; function EXTI1_IRQHandler
143 ; -----------------------------------------
000009 144 _EXTI1_IRQHandler:
145 ; ../src/stm8l15x_it.c: 175: }
000009 80 [11] 146 iret
147 ; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
00000F 142 _EXTI0_IRQHandler:
143 ; ../src/stm8l15x_it.c: 165: }
00000F 80 [11] 144 iret
145 ; ../src/stm8l15x_it.c: 172: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
146 ; -----------------------------------------
147 ; function EXTI1_IRQHandler
148 ; -----------------------------------------
149 ; function EXTI2_IRQHandler
150 ; -----------------------------------------
00000A 151 _EXTI2_IRQHandler:
152 ; ../src/stm8l15x_it.c: 187: }
00000A 80 [11] 153 iret
154 ; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
000010 149 _EXTI1_IRQHandler:
150 ; ../src/stm8l15x_it.c: 177: }
000010 80 [11] 151 iret
152 ; ../src/stm8l15x_it.c: 184: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
153 ; -----------------------------------------
154 ; function EXTI2_IRQHandler
155 ; -----------------------------------------
156 ; function EXTI3_IRQHandler
157 ; -----------------------------------------
00000B 158 _EXTI3_IRQHandler:
159 ; ../src/stm8l15x_it.c: 199: }
00000B 80 [11] 160 iret
161 ; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
000011 156 _EXTI2_IRQHandler:
157 ; ../src/stm8l15x_it.c: 189: }
000011 80 [11] 158 iret
159 ; ../src/stm8l15x_it.c: 196: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
160 ; -----------------------------------------
161 ; function EXTI3_IRQHandler
162 ; -----------------------------------------
163 ; function EXTI4_IRQHandler
164 ; -----------------------------------------
00000C 165 _EXTI4_IRQHandler:
166 ; ../src/stm8l15x_it.c: 211: }
00000C 80 [11] 167 iret
168 ; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
000012 163 _EXTI3_IRQHandler:
164 ; ../src/stm8l15x_it.c: 201: }
000012 80 [11] 165 iret
166 ; ../src/stm8l15x_it.c: 208: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
167 ; -----------------------------------------
168 ; function EXTI4_IRQHandler
169 ; -----------------------------------------
170 ; function EXTI5_IRQHandler
171 ; -----------------------------------------
00000D 172 _EXTI5_IRQHandler:
173 ; ../src/stm8l15x_it.c: 223: }
00000D 80 [11] 174 iret
175 ; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
000013 170 _EXTI4_IRQHandler:
171 ; ../src/stm8l15x_it.c: 213: }
000013 80 [11] 172 iret
173 ; ../src/stm8l15x_it.c: 220: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
174 ; -----------------------------------------
175 ; function EXTI5_IRQHandler
176 ; -----------------------------------------
177 ; function EXTI6_IRQHandler
178 ; -----------------------------------------
00000E 179 _EXTI6_IRQHandler:
180 ; ../src/stm8l15x_it.c: 235: }
00000E 80 [11] 181 iret
182 ; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
000014 177 _EXTI5_IRQHandler:
178 ; ../src/stm8l15x_it.c: 225: }
000014 80 [11] 179 iret
180 ; ../src/stm8l15x_it.c: 232: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
181 ; -----------------------------------------
182 ; function EXTI6_IRQHandler
183 ; -----------------------------------------
184 ; function EXTI7_IRQHandler
185 ; -----------------------------------------
00000F 186 _EXTI7_IRQHandler:
187 ; ../src/stm8l15x_it.c: 247: }
00000F 80 [11] 188 iret
189 ; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
000015 184 _EXTI6_IRQHandler:
185 ; ../src/stm8l15x_it.c: 237: }
000015 80 [11] 186 iret
187 ; ../src/stm8l15x_it.c: 244: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
188 ; -----------------------------------------
189 ; function EXTI7_IRQHandler
190 ; -----------------------------------------
191 ; function LCD_AES_IRQHandler
192 ; -----------------------------------------
000010 193 _LCD_AES_IRQHandler:
194 ; ../src/stm8l15x_it.c: 258: }
000010 80 [11] 195 iret
196 ; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
000016 191 _EXTI7_IRQHandler:
192 ; ../src/stm8l15x_it.c: 249: }
000016 80 [11] 193 iret
194 ; ../src/stm8l15x_it.c: 255: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
195 ; -----------------------------------------
196 ; function LCD_AES_IRQHandler
197 ; -----------------------------------------
198 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
199 ; -----------------------------------------
000011 200 _SWITCH_CSS_BREAK_DAC_IRQHandler:
201 ; ../src/stm8l15x_it.c: 269: }
000011 80 [11] 202 iret
203 ; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
000017 198 _LCD_AES_IRQHandler:
199 ; ../src/stm8l15x_it.c: 260: }
000017 80 [11] 200 iret
201 ; ../src/stm8l15x_it.c: 266: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
202 ; -----------------------------------------
203 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
204 ; -----------------------------------------
205 ; function ADC1_COMP_IRQHandler
206 ; -----------------------------------------
000012 207 _ADC1_COMP_IRQHandler:
208 ; ../src/stm8l15x_it.c: 281: }
000012 80 [11] 209 iret
210 ; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
000018 205 _SWITCH_CSS_BREAK_DAC_IRQHandler:
206 ; ../src/stm8l15x_it.c: 271: }
000018 80 [11] 207 iret
208 ; ../src/stm8l15x_it.c: 278: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
209 ; -----------------------------------------
210 ; function ADC1_COMP_IRQHandler
211 ; -----------------------------------------
212 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
213 ; -----------------------------------------
000013 214 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
215 ; ../src/stm8l15x_it.c: 293: }
000013 80 [11] 216 iret
217 ; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
000019 212 _ADC1_COMP_IRQHandler:
213 ; ../src/stm8l15x_it.c: 283: }
000019 80 [11] 214 iret
215 ; ../src/stm8l15x_it.c: 290: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
216 ; -----------------------------------------
217 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
218 ; -----------------------------------------
219 ; function TIM2_CC_USART2_RX_IRQHandler
220 ; -----------------------------------------
000014 221 _TIM2_CC_USART2_RX_IRQHandler:
222 ; ../src/stm8l15x_it.c: 305: }
000014 80 [11] 223 iret
224 ; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
00001A 219 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
220 ; ../src/stm8l15x_it.c: 295: }
00001A 80 [11] 221 iret
222 ; ../src/stm8l15x_it.c: 302: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
223 ; -----------------------------------------
224 ; function TIM2_CC_USART2_RX_IRQHandler
225 ; -----------------------------------------
226 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
227 ; -----------------------------------------
000015 228 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
229 ; ../src/stm8l15x_it.c: 318: }
000015 80 [11] 230 iret
231 ; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
00001B 226 _TIM2_CC_USART2_RX_IRQHandler:
227 ; ../src/stm8l15x_it.c: 307: }
00001B 80 [11] 228 iret
229 ; ../src/stm8l15x_it.c: 315: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
230 ; -----------------------------------------
231 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
232 ; -----------------------------------------
233 ; function TIM3_CC_USART3_RX_IRQHandler
234 ; -----------------------------------------
000016 235 _TIM3_CC_USART3_RX_IRQHandler:
236 ; ../src/stm8l15x_it.c: 329: }
000016 80 [11] 237 iret
238 ; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
00001C 233 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
234 ; ../src/stm8l15x_it.c: 320: }
00001C 80 [11] 235 iret
236 ; ../src/stm8l15x_it.c: 326: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
237 ; -----------------------------------------
238 ; function TIM3_CC_USART3_RX_IRQHandler
239 ; -----------------------------------------
240 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
241 ; -----------------------------------------
000017 242 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
243 ; ../src/stm8l15x_it.c: 340: }
000017 80 [11] 244 iret
245 ; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
00001D 240 _TIM3_CC_USART3_RX_IRQHandler:
241 ; ../src/stm8l15x_it.c: 331: }
00001D 80 [11] 242 iret
243 ; ../src/stm8l15x_it.c: 337: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
244 ; -----------------------------------------
245 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
246 ; -----------------------------------------
247 ; function TIM1_CC_IRQHandler
248 ; -----------------------------------------
000018 249 _TIM1_CC_IRQHandler:
250 ; ../src/stm8l15x_it.c: 351: }
000018 80 [11] 251 iret
252 ; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
00001E 247 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
248 ; ../src/stm8l15x_it.c: 342: }
00001E 80 [11] 249 iret
250 ; ../src/stm8l15x_it.c: 348: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
251 ; -----------------------------------------
252 ; function TIM1_CC_IRQHandler
253 ; -----------------------------------------
254 ; function TIM4_UPD_OVF_TRG_IRQHandler
255 ; -----------------------------------------
000019 256 _TIM4_UPD_OVF_TRG_IRQHandler:
257 ; ../src/stm8l15x_it.c: 363: }
000019 80 [11] 258 iret
259 ; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
00001F 254 _TIM1_CC_IRQHandler:
255 ; ../src/stm8l15x_it.c: 353: }
00001F 80 [11] 256 iret
257 ; ../src/stm8l15x_it.c: 360: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
258 ; -----------------------------------------
259 ; function TIM4_UPD_OVF_TRG_IRQHandler
260 ; -----------------------------------------
261 ; function SPI1_IRQHandler
262 ; -----------------------------------------
00001A 263 _SPI1_IRQHandler:
264 ; ../src/stm8l15x_it.c: 374: }
00001A 80 [11] 265 iret
266 ; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
000020 261 _TIM4_UPD_OVF_TRG_IRQHandler:
262 ; ../src/stm8l15x_it.c: 365: }
000020 80 [11] 263 iret
264 ; ../src/stm8l15x_it.c: 371: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
265 ; -----------------------------------------
266 ; function SPI1_IRQHandler
267 ; -----------------------------------------
268 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
269 ; -----------------------------------------
00001B 270 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
271 ; ../src/stm8l15x_it.c: 386: }
00001B 80 [11] 272 iret
273 ; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
000021 268 _SPI1_IRQHandler:
269 ; ../src/stm8l15x_it.c: 376: }
000021 80 [11] 270 iret
271 ; ../src/stm8l15x_it.c: 383: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
272 ; -----------------------------------------
273 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
274 ; -----------------------------------------
275 ; function USART1_RX_TIM5_CC_IRQHandler
276 ; -----------------------------------------
00001C 277 _USART1_RX_TIM5_CC_IRQHandler:
278 ; ../src/stm8l15x_it.c: 398: }
00001C 80 [11] 279 iret
280 ; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
000022 275 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
276 ; ../src/stm8l15x_it.c: 388: }
000022 80 [11] 277 iret
278 ; ../src/stm8l15x_it.c: 395: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
279 ; -----------------------------------------
280 ; function USART1_RX_TIM5_CC_IRQHandler
281 ; -----------------------------------------
282 ; function I2C1_SPI2_IRQHandler
283 ; -----------------------------------------
00001D 284 _I2C1_SPI2_IRQHandler:
285 ; ../src/stm8l15x_it.c: 410: }
00001D 80 [11] 286 iret
287 .area CODE
288 .area CONST
289 .area INITIALIZER
290 .area CABS (ABS)
000023 282 _USART1_RX_TIM5_CC_IRQHandler:
283 ; ../src/stm8l15x_it.c: 400: }
000023 80 [11] 284 iret
285 ; ../src/stm8l15x_it.c: 407: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
286 ; -----------------------------------------
287 ; function I2C1_SPI2_IRQHandler
288 ; -----------------------------------------
000024 289 _I2C1_SPI2_IRQHandler:
290 ; ../src/stm8l15x_it.c: 412: }
000024 80 [11] 291 iret
292 .area CODE
293 .area CONST
294 .area INITIALIZER
295 .area CABS (ABS)

View File

@@ -1,6 +1,7 @@
XH3
H B areas 1F global symbols
H B areas 20 global symbols
M stm8l15x_it
S _RTC_ClearITPendingBit Ref000000
S .__.ABS. Def000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
@@ -11,36 +12,36 @@ A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size 1E flags 0 addr 0
A CODE size 25 flags 0 addr 0
S _DMA1_CHANNEL0_1_IRQHandler Def000002
S _SPI1_IRQHandler Def00001A
S _SPI1_IRQHandler Def000021
S _DMA1_CHANNEL2_3_IRQHandler Def000003
S _EXTIB_G_IRQHandler Def000006
S _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler Def000013
S _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler Def00001B
S _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler Def000015
S _EXTID_H_IRQHandler Def000007
S _TIM2_CC_USART2_RX_IRQHandler Def000014
S _EXTI0_IRQHandler Def000008
S _EXTI1_IRQHandler Def000009
S _I2C1_SPI2_IRQHandler Def00001D
S _USART1_RX_TIM5_CC_IRQHandler Def00001C
S _TIM3_CC_USART3_RX_IRQHandler Def000016
S _EXTI2_IRQHandler Def00000A
S _EXTI3_IRQHandler Def00000B
S _EXTIE_F_PVD_IRQHandler Def000005
S _EXTI4_IRQHandler Def00000C
S _EXTIB_G_IRQHandler Def00000D
S _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler Def00001A
S _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler Def000022
S _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler Def00001C
S _EXTID_H_IRQHandler Def00000E
S _TIM2_CC_USART2_RX_IRQHandler Def00001B
S _EXTI0_IRQHandler Def00000F
S _EXTI1_IRQHandler Def000010
S _I2C1_SPI2_IRQHandler Def000024
S _USART1_RX_TIM5_CC_IRQHandler Def000023
S _TIM3_CC_USART3_RX_IRQHandler Def00001D
S _EXTI2_IRQHandler Def000011
S _EXTI3_IRQHandler Def000012
S _EXTIE_F_PVD_IRQHandler Def00000C
S _EXTI4_IRQHandler Def000013
S _FLASH_IRQHandler Def000001
S _EXTI5_IRQHandler Def00000D
S _EXTI6_IRQHandler Def00000E
S _EXTI7_IRQHandler Def00000F
S _TIM1_UPD_OVF_TRG_COM_IRQHandler Def000017
S _EXTI5_IRQHandler Def000014
S _EXTI6_IRQHandler Def000015
S _EXTI7_IRQHandler Def000016
S _TIM1_UPD_OVF_TRG_COM_IRQHandler Def00001E
S _TRAP_IRQHandler Def000000
S _TIM4_UPD_OVF_TRG_IRQHandler Def000019
S _TIM1_CC_IRQHandler Def000018
S _SWITCH_CSS_BREAK_DAC_IRQHandler Def000011
S _ADC1_COMP_IRQHandler Def000012
S _LCD_AES_IRQHandler Def000010
S _TIM4_UPD_OVF_TRG_IRQHandler Def000020
S _TIM1_CC_IRQHandler Def00001F
S _SWITCH_CSS_BREAK_DAC_IRQHandler Def000018
S _ADC1_COMP_IRQHandler Def000019
S _LCD_AES_IRQHandler Def000017
S _RTC_CSSLSE_IRQHandler Def000004
A CABS size 0 flags 8 addr 0
T 00 00 00
@@ -61,36 +62,8 @@ T 00 00 03 80
R 00 00 00 09
T 00 00 04
R 00 00 00 09
T 00 00 04 80
R 00 00 00 09
T 00 00 05
R 00 00 00 09
T 00 00 05 80
R 00 00 00 09
T 00 00 06
R 00 00 00 09
T 00 00 06 80
R 00 00 00 09
T 00 00 07
R 00 00 00 09
T 00 00 07 80
R 00 00 00 09
T 00 00 08
R 00 00 00 09
T 00 00 08 80
R 00 00 00 09
T 00 00 09
R 00 00 00 09
T 00 00 09 80
R 00 00 00 09
T 00 00 0A
R 00 00 00 09
T 00 00 0A 80
R 00 00 00 09
T 00 00 0B
R 00 00 00 09
T 00 00 0B 80
R 00 00 00 09
T 00 00 04 62 AE 00 40 CD 00 00 80
R 00 00 00 09 02 08 00 00
T 00 00 0C
R 00 00 00 09
T 00 00 0C 80
@@ -163,3 +136,31 @@ T 00 00 1D
R 00 00 00 09
T 00 00 1D 80
R 00 00 00 09
T 00 00 1E
R 00 00 00 09
T 00 00 1E 80
R 00 00 00 09
T 00 00 1F
R 00 00 00 09
T 00 00 1F 80
R 00 00 00 09
T 00 00 20
R 00 00 00 09
T 00 00 20 80
R 00 00 00 09
T 00 00 21
R 00 00 00 09
T 00 00 21 80
R 00 00 00 09
T 00 00 22
R 00 00 00 09
T 00 00 22 80
R 00 00 00 09
T 00 00 23
R 00 00 00 09
T 00 00 23 80
R 00 00 00 09
T 00 00 24
R 00 00 00 09
T 00 00 24 80
R 00 00 00 09

View File

@@ -7,284 +7,289 @@
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _TRAP_IRQHandler
11 .globl _FLASH_IRQHandler
12 .globl _DMA1_CHANNEL0_1_IRQHandler
13 .globl _DMA1_CHANNEL2_3_IRQHandler
14 .globl _RTC_CSSLSE_IRQHandler
15 .globl _EXTIE_F_PVD_IRQHandler
16 .globl _EXTIB_G_IRQHandler
17 .globl _EXTID_H_IRQHandler
18 .globl _EXTI0_IRQHandler
19 .globl _EXTI1_IRQHandler
20 .globl _EXTI2_IRQHandler
21 .globl _EXTI3_IRQHandler
22 .globl _EXTI4_IRQHandler
23 .globl _EXTI5_IRQHandler
24 .globl _EXTI6_IRQHandler
25 .globl _EXTI7_IRQHandler
26 .globl _LCD_AES_IRQHandler
27 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
28 .globl _ADC1_COMP_IRQHandler
29 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
30 .globl _TIM2_CC_USART2_RX_IRQHandler
31 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
32 .globl _TIM3_CC_USART3_RX_IRQHandler
33 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
34 .globl _TIM1_CC_IRQHandler
35 .globl _TIM4_UPD_OVF_TRG_IRQHandler
36 .globl _SPI1_IRQHandler
37 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
38 .globl _USART1_RX_TIM5_CC_IRQHandler
39 .globl _I2C1_SPI2_IRQHandler
40 ;--------------------------------------------------------
41 ; ram data
42 ;--------------------------------------------------------
43 .area DATA
44 ;--------------------------------------------------------
45 ; ram data
46 ;--------------------------------------------------------
47 .area INITIALIZED
48 ;--------------------------------------------------------
49 ; absolute external ram data
50 ;--------------------------------------------------------
51 .area DABS (ABS)
52
53 ; default segment ordering for linker
54 .area HOME
55 .area GSINIT
56 .area GSFINAL
57 .area CONST
58 .area INITIALIZER
59 .area CODE
60
61 ;--------------------------------------------------------
62 ; global & static initialisations
63 ;--------------------------------------------------------
64 .area HOME
65 .area GSINIT
66 .area GSFINAL
67 .area GSINIT
68 ;--------------------------------------------------------
69 ; Home
70 ;--------------------------------------------------------
71 .area HOME
10 .globl _RTC_ClearITPendingBit
11 .globl _TRAP_IRQHandler
12 .globl _FLASH_IRQHandler
13 .globl _DMA1_CHANNEL0_1_IRQHandler
14 .globl _DMA1_CHANNEL2_3_IRQHandler
15 .globl _RTC_CSSLSE_IRQHandler
16 .globl _EXTIE_F_PVD_IRQHandler
17 .globl _EXTIB_G_IRQHandler
18 .globl _EXTID_H_IRQHandler
19 .globl _EXTI0_IRQHandler
20 .globl _EXTI1_IRQHandler
21 .globl _EXTI2_IRQHandler
22 .globl _EXTI3_IRQHandler
23 .globl _EXTI4_IRQHandler
24 .globl _EXTI5_IRQHandler
25 .globl _EXTI6_IRQHandler
26 .globl _EXTI7_IRQHandler
27 .globl _LCD_AES_IRQHandler
28 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
29 .globl _ADC1_COMP_IRQHandler
30 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
31 .globl _TIM2_CC_USART2_RX_IRQHandler
32 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
33 .globl _TIM3_CC_USART3_RX_IRQHandler
34 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
35 .globl _TIM1_CC_IRQHandler
36 .globl _TIM4_UPD_OVF_TRG_IRQHandler
37 .globl _SPI1_IRQHandler
38 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
39 .globl _USART1_RX_TIM5_CC_IRQHandler
40 .globl _I2C1_SPI2_IRQHandler
41 ;--------------------------------------------------------
42 ; ram data
43 ;--------------------------------------------------------
44 .area DATA
45 ;--------------------------------------------------------
46 ; ram data
47 ;--------------------------------------------------------
48 .area INITIALIZED
49 ;--------------------------------------------------------
50 ; absolute external ram data
51 ;--------------------------------------------------------
52 .area DABS (ABS)
53
54 ; default segment ordering for linker
55 .area HOME
56 .area GSINIT
57 .area GSFINAL
58 .area CONST
59 .area INITIALIZER
60 .area CODE
61
62 ;--------------------------------------------------------
63 ; global & static initialisations
64 ;--------------------------------------------------------
65 .area HOME
66 .area GSINIT
67 .area GSFINAL
68 .area GSINIT
69 ;--------------------------------------------------------
70 ; Home
71 ;--------------------------------------------------------
72 .area HOME
73 ;--------------------------------------------------------
74 ; code
75 ;--------------------------------------------------------
76 .area CODE
77 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
78 ; -----------------------------------------
79 ; function TRAP_IRQHandler
80 ; -----------------------------------------
00818F 81 _TRAP_IRQHandler:
82 ; ../src/stm8l15x_it.c: 72: }
00818F 80 [11] 83 iret
84 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
85 ; -----------------------------------------
86 ; function FLASH_IRQHandler
87 ; -----------------------------------------
008190 88 _FLASH_IRQHandler:
89 ; ../src/stm8l15x_it.c: 83: }
008190 80 [11] 90 iret
91 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
92 ; -----------------------------------------
93 ; function DMA1_CHANNEL0_1_IRQHandler
94 ; -----------------------------------------
008191 95 _DMA1_CHANNEL0_1_IRQHandler:
96 ; ../src/stm8l15x_it.c: 94: }
008191 80 [11] 97 iret
98 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
99 ; -----------------------------------------
100 ; function DMA1_CHANNEL2_3_IRQHandler
101 ; -----------------------------------------
008192 102 _DMA1_CHANNEL2_3_IRQHandler:
103 ; ../src/stm8l15x_it.c: 105: }
008192 80 [11] 104 iret
105 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
106 ; -----------------------------------------
107 ; function RTC_CSSLSE_IRQHandler
108 ; -----------------------------------------
008193 109 _RTC_CSSLSE_IRQHandler:
110 ; ../src/stm8l15x_it.c: 116: }
008193 80 [11] 111 iret
112 ; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
113 ; -----------------------------------------
114 ; function EXTIE_F_PVD_IRQHandler
115 ; -----------------------------------------
008194 116 _EXTIE_F_PVD_IRQHandler:
117 ; ../src/stm8l15x_it.c: 127: }
008194 80 [11] 118 iret
119 ; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
73 .area HOME
74 ;--------------------------------------------------------
75 ; code
76 ;--------------------------------------------------------
77 .area CODE
78 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
79 ; -----------------------------------------
80 ; function TRAP_IRQHandler
81 ; -----------------------------------------
008151 82 _TRAP_IRQHandler:
83 ; ../src/stm8l15x_it.c: 72: }
008151 80 [11] 84 iret
85 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
86 ; -----------------------------------------
87 ; function FLASH_IRQHandler
88 ; -----------------------------------------
008152 89 _FLASH_IRQHandler:
90 ; ../src/stm8l15x_it.c: 83: }
008152 80 [11] 91 iret
92 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
93 ; -----------------------------------------
94 ; function DMA1_CHANNEL0_1_IRQHandler
95 ; -----------------------------------------
008153 96 _DMA1_CHANNEL0_1_IRQHandler:
97 ; ../src/stm8l15x_it.c: 94: }
008153 80 [11] 98 iret
99 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
100 ; -----------------------------------------
101 ; function DMA1_CHANNEL2_3_IRQHandler
102 ; -----------------------------------------
008154 103 _DMA1_CHANNEL2_3_IRQHandler:
104 ; ../src/stm8l15x_it.c: 105: }
008154 80 [11] 105 iret
106 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
107 ; -----------------------------------------
108 ; function RTC_CSSLSE_IRQHandler
109 ; -----------------------------------------
008155 110 _RTC_CSSLSE_IRQHandler:
008155 62 [ 2] 111 div x, a
112 ; ../src/stm8l15x_it.c: 113: RTC_ClearITPendingBit(RTC_IT_WUT);
008156 AE 00 40 [ 2] 113 ldw x, #0x0040
008159 CD 8E A0 [ 4] 114 call _RTC_ClearITPendingBit
115 ; ../src/stm8l15x_it.c: 118: }
00815C 80 [11] 116 iret
117 ; ../src/stm8l15x_it.c: 124: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
118 ; -----------------------------------------
119 ; function EXTIE_F_PVD_IRQHandler
120 ; -----------------------------------------
121 ; function EXTIB_G_IRQHandler
122 ; -----------------------------------------
008195 123 _EXTIB_G_IRQHandler:
124 ; ../src/stm8l15x_it.c: 139: }
008195 80 [11] 125 iret
126 ; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
00815D 121 _EXTIE_F_PVD_IRQHandler:
122 ; ../src/stm8l15x_it.c: 129: }
00815D 80 [11] 123 iret
124 ; ../src/stm8l15x_it.c: 136: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
125 ; -----------------------------------------
126 ; function EXTIB_G_IRQHandler
127 ; -----------------------------------------
128 ; function EXTID_H_IRQHandler
129 ; -----------------------------------------
008196 130 _EXTID_H_IRQHandler:
131 ; ../src/stm8l15x_it.c: 151: }
008196 80 [11] 132 iret
133 ; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
00815E 128 _EXTIB_G_IRQHandler:
129 ; ../src/stm8l15x_it.c: 141: }
00815E 80 [11] 130 iret
131 ; ../src/stm8l15x_it.c: 148: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
132 ; -----------------------------------------
133 ; function EXTID_H_IRQHandler
134 ; -----------------------------------------
135 ; function EXTI0_IRQHandler
136 ; -----------------------------------------
008197 137 _EXTI0_IRQHandler:
138 ; ../src/stm8l15x_it.c: 163: }
008197 80 [11] 139 iret
140 ; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
00815F 135 _EXTID_H_IRQHandler:
136 ; ../src/stm8l15x_it.c: 153: }
00815F 80 [11] 137 iret
138 ; ../src/stm8l15x_it.c: 160: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
139 ; -----------------------------------------
140 ; function EXTI0_IRQHandler
141 ; -----------------------------------------
142 ; function EXTI1_IRQHandler
143 ; -----------------------------------------
008198 144 _EXTI1_IRQHandler:
145 ; ../src/stm8l15x_it.c: 175: }
008198 80 [11] 146 iret
147 ; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
008160 142 _EXTI0_IRQHandler:
143 ; ../src/stm8l15x_it.c: 165: }
008160 80 [11] 144 iret
145 ; ../src/stm8l15x_it.c: 172: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
146 ; -----------------------------------------
147 ; function EXTI1_IRQHandler
148 ; -----------------------------------------
149 ; function EXTI2_IRQHandler
150 ; -----------------------------------------
008199 151 _EXTI2_IRQHandler:
152 ; ../src/stm8l15x_it.c: 187: }
008199 80 [11] 153 iret
154 ; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
008161 149 _EXTI1_IRQHandler:
150 ; ../src/stm8l15x_it.c: 177: }
008161 80 [11] 151 iret
152 ; ../src/stm8l15x_it.c: 184: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
153 ; -----------------------------------------
154 ; function EXTI2_IRQHandler
155 ; -----------------------------------------
156 ; function EXTI3_IRQHandler
157 ; -----------------------------------------
00819A 158 _EXTI3_IRQHandler:
159 ; ../src/stm8l15x_it.c: 199: }
00819A 80 [11] 160 iret
161 ; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
008162 156 _EXTI2_IRQHandler:
157 ; ../src/stm8l15x_it.c: 189: }
008162 80 [11] 158 iret
159 ; ../src/stm8l15x_it.c: 196: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
160 ; -----------------------------------------
161 ; function EXTI3_IRQHandler
162 ; -----------------------------------------
163 ; function EXTI4_IRQHandler
164 ; -----------------------------------------
00819B 165 _EXTI4_IRQHandler:
166 ; ../src/stm8l15x_it.c: 211: }
00819B 80 [11] 167 iret
168 ; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
008163 163 _EXTI3_IRQHandler:
164 ; ../src/stm8l15x_it.c: 201: }
008163 80 [11] 165 iret
166 ; ../src/stm8l15x_it.c: 208: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
167 ; -----------------------------------------
168 ; function EXTI4_IRQHandler
169 ; -----------------------------------------
170 ; function EXTI5_IRQHandler
171 ; -----------------------------------------
00819C 172 _EXTI5_IRQHandler:
173 ; ../src/stm8l15x_it.c: 223: }
00819C 80 [11] 174 iret
175 ; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
008164 170 _EXTI4_IRQHandler:
171 ; ../src/stm8l15x_it.c: 213: }
008164 80 [11] 172 iret
173 ; ../src/stm8l15x_it.c: 220: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
174 ; -----------------------------------------
175 ; function EXTI5_IRQHandler
176 ; -----------------------------------------
177 ; function EXTI6_IRQHandler
178 ; -----------------------------------------
00819D 179 _EXTI6_IRQHandler:
180 ; ../src/stm8l15x_it.c: 235: }
00819D 80 [11] 181 iret
182 ; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
008165 177 _EXTI5_IRQHandler:
178 ; ../src/stm8l15x_it.c: 225: }
008165 80 [11] 179 iret
180 ; ../src/stm8l15x_it.c: 232: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
181 ; -----------------------------------------
182 ; function EXTI6_IRQHandler
183 ; -----------------------------------------
184 ; function EXTI7_IRQHandler
185 ; -----------------------------------------
00819E 186 _EXTI7_IRQHandler:
187 ; ../src/stm8l15x_it.c: 247: }
00819E 80 [11] 188 iret
189 ; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
008166 184 _EXTI6_IRQHandler:
185 ; ../src/stm8l15x_it.c: 237: }
008166 80 [11] 186 iret
187 ; ../src/stm8l15x_it.c: 244: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
188 ; -----------------------------------------
189 ; function EXTI7_IRQHandler
190 ; -----------------------------------------
191 ; function LCD_AES_IRQHandler
192 ; -----------------------------------------
00819F 193 _LCD_AES_IRQHandler:
194 ; ../src/stm8l15x_it.c: 258: }
00819F 80 [11] 195 iret
196 ; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
008167 191 _EXTI7_IRQHandler:
192 ; ../src/stm8l15x_it.c: 249: }
008167 80 [11] 193 iret
194 ; ../src/stm8l15x_it.c: 255: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
195 ; -----------------------------------------
196 ; function LCD_AES_IRQHandler
197 ; -----------------------------------------
198 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
199 ; -----------------------------------------
0081A0 200 _SWITCH_CSS_BREAK_DAC_IRQHandler:
201 ; ../src/stm8l15x_it.c: 269: }
0081A0 80 [11] 202 iret
203 ; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
008168 198 _LCD_AES_IRQHandler:
199 ; ../src/stm8l15x_it.c: 260: }
008168 80 [11] 200 iret
201 ; ../src/stm8l15x_it.c: 266: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
202 ; -----------------------------------------
203 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
204 ; -----------------------------------------
205 ; function ADC1_COMP_IRQHandler
206 ; -----------------------------------------
0081A1 207 _ADC1_COMP_IRQHandler:
208 ; ../src/stm8l15x_it.c: 281: }
0081A1 80 [11] 209 iret
210 ; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
008169 205 _SWITCH_CSS_BREAK_DAC_IRQHandler:
206 ; ../src/stm8l15x_it.c: 271: }
008169 80 [11] 207 iret
208 ; ../src/stm8l15x_it.c: 278: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
209 ; -----------------------------------------
210 ; function ADC1_COMP_IRQHandler
211 ; -----------------------------------------
212 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
213 ; -----------------------------------------
0081A2 214 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
215 ; ../src/stm8l15x_it.c: 293: }
0081A2 80 [11] 216 iret
217 ; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
00816A 212 _ADC1_COMP_IRQHandler:
213 ; ../src/stm8l15x_it.c: 283: }
00816A 80 [11] 214 iret
215 ; ../src/stm8l15x_it.c: 290: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
216 ; -----------------------------------------
217 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
218 ; -----------------------------------------
219 ; function TIM2_CC_USART2_RX_IRQHandler
220 ; -----------------------------------------
0081A3 221 _TIM2_CC_USART2_RX_IRQHandler:
222 ; ../src/stm8l15x_it.c: 305: }
0081A3 80 [11] 223 iret
224 ; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
00816B 219 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
220 ; ../src/stm8l15x_it.c: 295: }
00816B 80 [11] 221 iret
222 ; ../src/stm8l15x_it.c: 302: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
223 ; -----------------------------------------
224 ; function TIM2_CC_USART2_RX_IRQHandler
225 ; -----------------------------------------
226 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
227 ; -----------------------------------------
0081A4 228 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
229 ; ../src/stm8l15x_it.c: 318: }
0081A4 80 [11] 230 iret
231 ; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
00816C 226 _TIM2_CC_USART2_RX_IRQHandler:
227 ; ../src/stm8l15x_it.c: 307: }
00816C 80 [11] 228 iret
229 ; ../src/stm8l15x_it.c: 315: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
230 ; -----------------------------------------
231 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
232 ; -----------------------------------------
233 ; function TIM3_CC_USART3_RX_IRQHandler
234 ; -----------------------------------------
0081A5 235 _TIM3_CC_USART3_RX_IRQHandler:
236 ; ../src/stm8l15x_it.c: 329: }
0081A5 80 [11] 237 iret
238 ; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
00816D 233 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
234 ; ../src/stm8l15x_it.c: 320: }
00816D 80 [11] 235 iret
236 ; ../src/stm8l15x_it.c: 326: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
237 ; -----------------------------------------
238 ; function TIM3_CC_USART3_RX_IRQHandler
239 ; -----------------------------------------
240 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
241 ; -----------------------------------------
0081A6 242 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
243 ; ../src/stm8l15x_it.c: 340: }
0081A6 80 [11] 244 iret
245 ; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
00816E 240 _TIM3_CC_USART3_RX_IRQHandler:
241 ; ../src/stm8l15x_it.c: 331: }
00816E 80 [11] 242 iret
243 ; ../src/stm8l15x_it.c: 337: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
244 ; -----------------------------------------
245 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
246 ; -----------------------------------------
247 ; function TIM1_CC_IRQHandler
248 ; -----------------------------------------
0081A7 249 _TIM1_CC_IRQHandler:
250 ; ../src/stm8l15x_it.c: 351: }
0081A7 80 [11] 251 iret
252 ; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
00816F 247 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
248 ; ../src/stm8l15x_it.c: 342: }
00816F 80 [11] 249 iret
250 ; ../src/stm8l15x_it.c: 348: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
251 ; -----------------------------------------
252 ; function TIM1_CC_IRQHandler
253 ; -----------------------------------------
254 ; function TIM4_UPD_OVF_TRG_IRQHandler
255 ; -----------------------------------------
0081A8 256 _TIM4_UPD_OVF_TRG_IRQHandler:
257 ; ../src/stm8l15x_it.c: 363: }
0081A8 80 [11] 258 iret
259 ; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
008170 254 _TIM1_CC_IRQHandler:
255 ; ../src/stm8l15x_it.c: 353: }
008170 80 [11] 256 iret
257 ; ../src/stm8l15x_it.c: 360: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
258 ; -----------------------------------------
259 ; function TIM4_UPD_OVF_TRG_IRQHandler
260 ; -----------------------------------------
261 ; function SPI1_IRQHandler
262 ; -----------------------------------------
0081A9 263 _SPI1_IRQHandler:
264 ; ../src/stm8l15x_it.c: 374: }
0081A9 80 [11] 265 iret
266 ; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
008171 261 _TIM4_UPD_OVF_TRG_IRQHandler:
262 ; ../src/stm8l15x_it.c: 365: }
008171 80 [11] 263 iret
264 ; ../src/stm8l15x_it.c: 371: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
265 ; -----------------------------------------
266 ; function SPI1_IRQHandler
267 ; -----------------------------------------
268 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
269 ; -----------------------------------------
0081AA 270 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
271 ; ../src/stm8l15x_it.c: 386: }
0081AA 80 [11] 272 iret
273 ; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
008172 268 _SPI1_IRQHandler:
269 ; ../src/stm8l15x_it.c: 376: }
008172 80 [11] 270 iret
271 ; ../src/stm8l15x_it.c: 383: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
272 ; -----------------------------------------
273 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
274 ; -----------------------------------------
275 ; function USART1_RX_TIM5_CC_IRQHandler
276 ; -----------------------------------------
0081AB 277 _USART1_RX_TIM5_CC_IRQHandler:
278 ; ../src/stm8l15x_it.c: 398: }
0081AB 80 [11] 279 iret
280 ; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
008173 275 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
276 ; ../src/stm8l15x_it.c: 388: }
008173 80 [11] 277 iret
278 ; ../src/stm8l15x_it.c: 395: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
279 ; -----------------------------------------
280 ; function USART1_RX_TIM5_CC_IRQHandler
281 ; -----------------------------------------
282 ; function I2C1_SPI2_IRQHandler
283 ; -----------------------------------------
0081AC 284 _I2C1_SPI2_IRQHandler:
285 ; ../src/stm8l15x_it.c: 410: }
0081AC 80 [11] 286 iret
287 .area CODE
288 .area CONST
289 .area INITIALIZER
290 .area CABS (ABS)
008174 282 _USART1_RX_TIM5_CC_IRQHandler:
283 ; ../src/stm8l15x_it.c: 400: }
008174 80 [11] 284 iret
285 ; ../src/stm8l15x_it.c: 407: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
286 ; -----------------------------------------
287 ; function I2C1_SPI2_IRQHandler
288 ; -----------------------------------------
008175 289 _I2C1_SPI2_IRQHandler:
290 ; ../src/stm8l15x_it.c: 412: }
008175 80 [11] 291 iret
292 .area CODE
293 .area CONST
294 .area INITIALIZER
295 .area CABS (ABS)

View File

@@ -7,36 +7,37 @@ Symbol Table
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
9 _ADC1_COMP_IRQHandler 000012 GR
9 _ADC1_COMP_IRQHandler 000019 GR
9 _DMA1_CHANNEL0_1_IRQHandler 000002 GR
9 _DMA1_CHANNEL2_3_IRQHandler 000003 GR
9 _EXTI0_IRQHandler 000008 GR
9 _EXTI1_IRQHandler 000009 GR
9 _EXTI2_IRQHandler 00000A GR
9 _EXTI3_IRQHandler 00000B GR
9 _EXTI4_IRQHandler 00000C GR
9 _EXTI5_IRQHandler 00000D GR
9 _EXTI6_IRQHandler 00000E GR
9 _EXTI7_IRQHandler 00000F GR
9 _EXTIB_G_IRQHandler 000006 GR
9 _EXTID_H_IRQHandler 000007 GR
9 _EXTIE_F_PVD_IRQHandler 000005 GR
9 _EXTI0_IRQHandler 00000F GR
9 _EXTI1_IRQHandler 000010 GR
9 _EXTI2_IRQHandler 000011 GR
9 _EXTI3_IRQHandler 000012 GR
9 _EXTI4_IRQHandler 000013 GR
9 _EXTI5_IRQHandler 000014 GR
9 _EXTI6_IRQHandler 000015 GR
9 _EXTI7_IRQHandler 000016 GR
9 _EXTIB_G_IRQHandler 00000D GR
9 _EXTID_H_IRQHandler 00000E GR
9 _EXTIE_F_PVD_IRQHandler 00000C GR
9 _FLASH_IRQHandler 000001 GR
9 _I2C1_SPI2_IRQHandler 00001D GR
9 _LCD_AES_IRQHandler 000010 GR
9 _I2C1_SPI2_IRQHandler 000024 GR
9 _LCD_AES_IRQHandler 000017 GR
9 _RTC_CSSLSE_IRQHandler 000004 GR
9 _SPI1_IRQHandler 00001A GR
9 _SWITCH_CSS_BREAK_DAC_IRQHandler 000011 GR
9 _TIM1_CC_IRQHandler 000018 GR
9 _TIM1_UPD_OVF_TRG_COM_IRQHandler 000017 GR
9 _TIM2_CC_USART2_RX_IRQHandler 000014 GR
9 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler 000013 GR
9 _TIM3_CC_USART3_RX_IRQHandler 000016 GR
9 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler 000015 GR
9 _TIM4_UPD_OVF_TRG_IRQHandler 000019 GR
_RTC_ClearITPendingBit ****** GX
9 _SPI1_IRQHandler 000021 GR
9 _SWITCH_CSS_BREAK_DAC_IRQHandler 000018 GR
9 _TIM1_CC_IRQHandler 00001F GR
9 _TIM1_UPD_OVF_TRG_COM_IRQHandler 00001E GR
9 _TIM2_CC_USART2_RX_IRQHandler 00001B GR
9 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler 00001A GR
9 _TIM3_CC_USART3_RX_IRQHandler 00001D GR
9 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler 00001C GR
9 _TIM4_UPD_OVF_TRG_IRQHandler 000020 GR
9 _TRAP_IRQHandler 000000 GR
9 _USART1_RX_TIM5_CC_IRQHandler 00001C GR
9 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler 00001B GR
9 _USART1_RX_TIM5_CC_IRQHandler 000023 GR
9 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler 000022 GR
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
@@ -53,6 +54,6 @@ Area Table
6 GSFINAL size 0 flags 0
7 CONST size 0 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size 1E flags 0
9 CODE size 25 flags 0
A CABS size 0 flags 8

View File

@@ -0,0 +1,421 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ISO C Compiler
; Version 4.5.0 #15242 (Linux)
;--------------------------------------------------------
.module stm8l15x_itc
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _ITC_GetCPUCC
.globl _ITC_DeInit
.globl _ITC_GetSoftIntStatus
.globl _ITC_GetSoftwarePriority
.globl _ITC_SetSoftwarePriority
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area INITIALIZED
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area DABS (ABS)
; default segment ordering for linker
.area HOME
.area GSINIT
.area GSFINAL
.area CONST
.area INITIALIZER
.area CODE
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME
.area GSINIT
.area GSFINAL
.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME
.area HOME
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CODE
; ../inc/stm8l151x/src/stm8l15x_itc.c: 56: uint8_t ITC_GetCPUCC(void)
; -----------------------------------------
; function ITC_GetCPUCC
; -----------------------------------------
_ITC_GetCPUCC:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 65: __asm__("push cc");
push cc
; ../inc/stm8l151x/src/stm8l15x_itc.c: 66: __asm__("pop a");
pop a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 71: }
ret
; ../inc/stm8l151x/src/stm8l15x_itc.c: 90: void ITC_DeInit(void)
; -----------------------------------------
; function ITC_DeInit
; -----------------------------------------
_ITC_DeInit:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 92: ITC->ISPR1 = ITC_SPRX_RESET_VALUE;
mov 0x7f70+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 93: ITC->ISPR2 = ITC_SPRX_RESET_VALUE;
mov 0x7f71+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 94: ITC->ISPR3 = ITC_SPRX_RESET_VALUE;
mov 0x7f72+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 95: ITC->ISPR4 = ITC_SPRX_RESET_VALUE;
mov 0x7f73+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 96: ITC->ISPR5 = ITC_SPRX_RESET_VALUE;
mov 0x7f74+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 97: ITC->ISPR6 = ITC_SPRX_RESET_VALUE;
mov 0x7f75+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 98: ITC->ISPR7 = ITC_SPRX_RESET_VALUE;
mov 0x7f76+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 99: ITC->ISPR8 = ITC_SPRX_RESET_VALUE;
mov 0x7f77+0, #0xff
; ../inc/stm8l151x/src/stm8l15x_itc.c: 100: }
ret
; ../inc/stm8l151x/src/stm8l15x_itc.c: 107: uint8_t ITC_GetSoftIntStatus(void)
; -----------------------------------------
; function ITC_GetSoftIntStatus
; -----------------------------------------
_ITC_GetSoftIntStatus:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 109: return ((uint8_t)(ITC_GetCPUCC() & CPU_SOFT_INT_DISABLED));
call _ITC_GetCPUCC
and a, #0x28
; ../inc/stm8l151x/src/stm8l15x_itc.c: 110: }
ret
; ../inc/stm8l151x/src/stm8l15x_itc.c: 117: ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(IRQn_TypeDef IRQn)
; -----------------------------------------
; function ITC_GetSoftwarePriority
; -----------------------------------------
_ITC_GetSoftwarePriority:
pushw x
ld xl, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 119: uint8_t Value = 0;
clr a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 126: Mask = (uint8_t)(0x03U << ((IRQn % 4U) * 2U));
ldw y, x
push a
ld a, yl
and a, #0x03
ld xh, a
pop a
rlwa x
ld (0x01, sp), a
rrwa x
sll (0x01, sp)
push a
ld a, #0x03
ld (0x03, sp), a
ld a, (0x02, sp)
jreq 00139$
00138$:
sll (0x03, sp)
dec a
jrne 00138$
00139$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 128: switch (IRQn)
ld a, xl
cp a, #0x1d
pop a
jrugt 00128$
rlwa x
clr a
rrwa x
sllw x
ldw x, (#00141$, x)
jp (x)
00141$:
.dw #00128$
.dw #00103$
.dw #00103$
.dw #00103$
.dw #00107$
.dw #00107$
.dw #00107$
.dw #00107$
.dw #00111$
.dw #00111$
.dw #00111$
.dw #00111$
.dw #00115$
.dw #00115$
.dw #00115$
.dw #00115$
.dw #00128$
.dw #00118$
.dw #00118$
.dw #00118$
.dw #00121$
.dw #00121$
.dw #00121$
.dw #00128$
.dw #00128$
.dw #00124$
.dw #00124$
.dw #00124$
.dw #00126$
.dw #00126$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 132: case DMA1_CHANNEL2_3_IRQn:
00103$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 133: Value = (uint8_t)(ITC->ISPR1 & Mask); /* Read software priority */
ld a, 0x7f70
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 134: break;
jra 00128$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 144: case EXTID_IRQn:
00107$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 150: Value = (uint8_t)(ITC->ISPR2 & Mask); /* Read software priority */
ld a, 0x7f71
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 151: break;
jra 00128$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 156: case EXTI3_IRQn:
00111$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 157: Value = (uint8_t)(ITC->ISPR3 & Mask); /* Read software priority */
ld a, 0x7f72
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 158: break;
jra 00128$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 163: case EXTI7_IRQn:
00115$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 164: Value = (uint8_t)(ITC->ISPR4 & Mask); /* Read software priority */
ld a, 0x7f73
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 165: break;
jra 00128$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 177: case TIM2_UPD_OVF_TRG_BRK_IRQn:
00118$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 182: Value = (uint8_t)(ITC->ISPR5 & Mask); /* Read software priority */
ld a, 0x7f74
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 183: break;
jra 00128$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 192: case TIM3_CC_IRQn:
00121$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 198: Value = (uint8_t)(ITC->ISPR6 & Mask); /* Read software priority */
ld a, 0x7f75
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 199: break;
jra 00128$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 208: case USART1_TX_IRQn:
00124$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 212: Value = (uint8_t)(ITC->ISPR7 & Mask); /* Read software priority */
ld a, 0x7f76
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 213: break;
jra 00128$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 218: case I2C1_IRQn:
00126$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 223: Value = (uint8_t)(ITC->ISPR8 & Mask); /* Read software priority */
ld a, 0x7f77
and a, (0x02, sp)
; ../inc/stm8l151x/src/stm8l15x_itc.c: 228: }
00128$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 230: Value >>= (uint8_t)((IRQn % 4u) * 2u);
push a
ld a, (0x02, sp)
jreq 00143$
00142$:
srl (1, sp)
dec a
jrne 00142$
00143$:
pop a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 232: return((ITC_PriorityLevel_TypeDef)Value);
; ../inc/stm8l151x/src/stm8l15x_itc.c: 234: }
popw x
ret
; ../inc/stm8l151x/src/stm8l15x_itc.c: 253: void ITC_SetSoftwarePriority(IRQn_TypeDef IRQn, ITC_PriorityLevel_TypeDef ITC_PriorityLevel)
; -----------------------------------------
; function ITC_SetSoftwarePriority
; -----------------------------------------
_ITC_SetSoftwarePriority:
pushw x
; ../inc/stm8l151x/src/stm8l15x_itc.c: 267: Mask = (uint8_t)(~(uint8_t)(0x03U << ((IRQn % 4U) * 2U)));
ld xl, a
and a, #0x03
sll a
ld xh, a
ld a, #0x03
push a
ld a, xh
tnz a
jreq 00139$
00138$:
sll (1, sp)
dec a
jrne 00138$
00139$:
pop a
cpl a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 269: NewPriority = (uint8_t)((uint8_t)(ITC_PriorityLevel) << ((IRQn % 4U) * 2U));
ld a, (0x05, sp)
push a
ld a, xh
tnz a
jreq 00141$
00140$:
sll (1, sp)
dec a
jrne 00140$
00141$:
pop a
ld (0x02, sp), a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 271: switch (IRQn)
ld a, xl
cp a, #0x1d
jrule 00142$
jp 00129$
00142$:
clr a
ld xh, a
sllw x
ldw x, (#00143$, x)
jp (x)
00143$:
.dw #00129$
.dw #00103$
.dw #00103$
.dw #00103$
.dw #00107$
.dw #00107$
.dw #00107$
.dw #00107$
.dw #00111$
.dw #00111$
.dw #00111$
.dw #00111$
.dw #00115$
.dw #00115$
.dw #00115$
.dw #00115$
.dw #00129$
.dw #00118$
.dw #00118$
.dw #00118$
.dw #00121$
.dw #00121$
.dw #00121$
.dw #00129$
.dw #00129$
.dw #00124$
.dw #00124$
.dw #00124$
.dw #00126$
.dw #00126$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 275: case DMA1_CHANNEL2_3_IRQn:
00103$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 276: ITC->ISPR1 &= Mask;
ld a, 0x7f70
and a, (0x01, sp)
ld 0x7f70, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 277: ITC->ISPR1 |= NewPriority;
ld a, 0x7f70
or a, (0x02, sp)
ld 0x7f70, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 278: break;
jra 00129$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 288: case EXTID_IRQn:
00107$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 294: ITC->ISPR2 &= Mask;
ld a, 0x7f71
and a, (0x01, sp)
ld 0x7f71, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 295: ITC->ISPR2 |= NewPriority;
ld a, 0x7f71
or a, (0x02, sp)
ld 0x7f71, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 296: break;
jra 00129$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 301: case EXTI3_IRQn:
00111$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 302: ITC->ISPR3 &= Mask;
ld a, 0x7f72
and a, (0x01, sp)
ld 0x7f72, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 303: ITC->ISPR3 |= NewPriority;
ld a, 0x7f72
or a, (0x02, sp)
ld 0x7f72, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 304: break;
jra 00129$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 309: case EXTI7_IRQn:
00115$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 310: ITC->ISPR4 &= Mask;
ld a, 0x7f73
and a, (0x01, sp)
ld 0x7f73, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 311: ITC->ISPR4 |= NewPriority;
ld a, 0x7f73
or a, (0x02, sp)
ld 0x7f73, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 312: break;
jra 00129$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 323: case TIM2_UPD_OVF_TRG_BRK_IRQn:
00118$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 328: ITC->ISPR5 &= Mask;
ld a, 0x7f74
and a, (0x01, sp)
ld 0x7f74, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 329: ITC->ISPR5 |= NewPriority;
ld a, 0x7f74
or a, (0x02, sp)
ld 0x7f74, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 330: break;
jra 00129$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 338: case TIM3_CC_IRQn:
00121$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 344: ITC->ISPR6 &= Mask;
ld a, 0x7f75
and a, (0x01, sp)
ld 0x7f75, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 345: ITC->ISPR6 |= NewPriority;
ld a, 0x7f75
or a, (0x02, sp)
ld 0x7f75, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 346: break;
jra 00129$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 355: case USART1_TX_IRQn:
00124$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 359: ITC->ISPR7 &= Mask;
ld a, 0x7f76
and a, (0x01, sp)
ld 0x7f76, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 360: ITC->ISPR7 |= NewPriority;
ld a, 0x7f76
or a, (0x02, sp)
ld 0x7f76, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 361: break;
jra 00129$
; ../inc/stm8l151x/src/stm8l15x_itc.c: 366: case I2C1_IRQn:
00126$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 371: ITC->ISPR8 &= Mask;
ld a, 0x7f77
and a, (0x01, sp)
ld 0x7f77, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 372: ITC->ISPR8 |= NewPriority;
ld a, 0x7f77
or a, (0x02, sp)
ld 0x7f77, a
; ../inc/stm8l151x/src/stm8l15x_itc.c: 377: }
00129$:
; ../inc/stm8l151x/src/stm8l15x_itc.c: 378: }
popw x
popw x
pop a
jp (x)
.area CODE
.area CONST
.area INITIALIZER
.area CABS (ABS)

View File

@@ -0,0 +1,421 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_itc
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _ITC_GetCPUCC
11 .globl _ITC_DeInit
12 .globl _ITC_GetSoftIntStatus
13 .globl _ITC_GetSoftwarePriority
14 .globl _ITC_SetSoftwarePriority
15 ;--------------------------------------------------------
16 ; ram data
17 ;--------------------------------------------------------
18 .area DATA
19 ;--------------------------------------------------------
20 ; ram data
21 ;--------------------------------------------------------
22 .area INITIALIZED
23 ;--------------------------------------------------------
24 ; absolute external ram data
25 ;--------------------------------------------------------
26 .area DABS (ABS)
27
28 ; default segment ordering for linker
29 .area HOME
30 .area GSINIT
31 .area GSFINAL
32 .area CONST
33 .area INITIALIZER
34 .area CODE
35
36 ;--------------------------------------------------------
37 ; global & static initialisations
38 ;--------------------------------------------------------
39 .area HOME
40 .area GSINIT
41 .area GSFINAL
42 .area GSINIT
43 ;--------------------------------------------------------
44 ; Home
45 ;--------------------------------------------------------
46 .area HOME
47 .area HOME
48 ;--------------------------------------------------------
49 ; code
50 ;--------------------------------------------------------
51 .area CODE
52 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 56: uint8_t ITC_GetCPUCC(void)
53 ; -----------------------------------------
54 ; function ITC_GetCPUCC
55 ; -----------------------------------------
000000 56 _ITC_GetCPUCC:
57 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 65: __asm__("push cc");
000000 8A [ 1] 58 push cc
59 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 66: __asm__("pop a");
000001 84 [ 1] 60 pop a
61 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 71: }
000002 81 [ 4] 62 ret
63 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 90: void ITC_DeInit(void)
64 ; -----------------------------------------
65 ; function ITC_DeInit
66 ; -----------------------------------------
000003 67 _ITC_DeInit:
68 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 92: ITC->ISPR1 = ITC_SPRX_RESET_VALUE;
000003 35 FF 7F 70 [ 1] 69 mov 0x7f70+0, #0xff
70 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 93: ITC->ISPR2 = ITC_SPRX_RESET_VALUE;
000007 35 FF 7F 71 [ 1] 71 mov 0x7f71+0, #0xff
72 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 94: ITC->ISPR3 = ITC_SPRX_RESET_VALUE;
00000B 35 FF 7F 72 [ 1] 73 mov 0x7f72+0, #0xff
74 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 95: ITC->ISPR4 = ITC_SPRX_RESET_VALUE;
00000F 35 FF 7F 73 [ 1] 75 mov 0x7f73+0, #0xff
76 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 96: ITC->ISPR5 = ITC_SPRX_RESET_VALUE;
000013 35 FF 7F 74 [ 1] 77 mov 0x7f74+0, #0xff
78 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 97: ITC->ISPR6 = ITC_SPRX_RESET_VALUE;
000017 35 FF 7F 75 [ 1] 79 mov 0x7f75+0, #0xff
80 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 98: ITC->ISPR7 = ITC_SPRX_RESET_VALUE;
00001B 35 FF 7F 76 [ 1] 81 mov 0x7f76+0, #0xff
82 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 99: ITC->ISPR8 = ITC_SPRX_RESET_VALUE;
00001F 35 FF 7F 77 [ 1] 83 mov 0x7f77+0, #0xff
84 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 100: }
000023 81 [ 4] 85 ret
86 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 107: uint8_t ITC_GetSoftIntStatus(void)
87 ; -----------------------------------------
88 ; function ITC_GetSoftIntStatus
89 ; -----------------------------------------
000024 90 _ITC_GetSoftIntStatus:
91 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 109: return ((uint8_t)(ITC_GetCPUCC() & CPU_SOFT_INT_DISABLED));
000024 CDr00r00 [ 4] 92 call _ITC_GetCPUCC
000027 A4 28 [ 1] 93 and a, #0x28
94 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 110: }
000029 81 [ 4] 95 ret
96 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 117: ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(IRQn_TypeDef IRQn)
97 ; -----------------------------------------
98 ; function ITC_GetSoftwarePriority
99 ; -----------------------------------------
00002A 100 _ITC_GetSoftwarePriority:
00002A 89 [ 2] 101 pushw x
00002B 97 [ 1] 102 ld xl, a
103 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 119: uint8_t Value = 0;
00002C 4F [ 1] 104 clr a
105 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 126: Mask = (uint8_t)(0x03U << ((IRQn % 4U) * 2U));
00002D 90 93 [ 1] 106 ldw y, x
00002F 88 [ 1] 107 push a
000030 90 9F [ 1] 108 ld a, yl
000032 A4 03 [ 1] 109 and a, #0x03
000034 95 [ 1] 110 ld xh, a
000035 84 [ 1] 111 pop a
000036 02 [ 1] 112 rlwa x
000037 6B 01 [ 1] 113 ld (0x01, sp), a
000039 01 [ 1] 114 rrwa x
00003A 08 01 [ 1] 115 sll (0x01, sp)
00003C 88 [ 1] 116 push a
00003D A6 03 [ 1] 117 ld a, #0x03
00003F 6B 03 [ 1] 118 ld (0x03, sp), a
000041 7B 02 [ 1] 119 ld a, (0x02, sp)
000043 27 05 [ 1] 120 jreq 00139$
000045 121 00138$:
000045 08 03 [ 1] 122 sll (0x03, sp)
000047 4A [ 1] 123 dec a
000048 26 FB [ 1] 124 jrne 00138$
00004A 125 00139$:
126 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 128: switch (IRQn)
00004A 9F [ 1] 127 ld a, xl
00004B A1 1D [ 1] 128 cp a, #0x1d
00004D 84 [ 1] 129 pop a
00004E 22 7A [ 1] 130 jrugt 00128$
000050 02 [ 1] 131 rlwa x
000051 4F [ 1] 132 clr a
000052 01 [ 1] 133 rrwa x
000053 58 [ 2] 134 sllw x
000054 DEu00u58 [ 2] 135 ldw x, (#00141$, x)
000057 FC [ 2] 136 jp (x)
000058 137 00141$:
000058r00rCA 138 .dw #00128$
00005Ar00r94 139 .dw #00103$
00005Cr00r94 140 .dw #00103$
00005Er00r94 141 .dw #00103$
000060r00r9B 142 .dw #00107$
000062r00r9B 143 .dw #00107$
000064r00r9B 144 .dw #00107$
000066r00r9B 145 .dw #00107$
000068r00rA2 146 .dw #00111$
00006Ar00rA2 147 .dw #00111$
00006Cr00rA2 148 .dw #00111$
00006Er00rA2 149 .dw #00111$
000070r00rA9 150 .dw #00115$
000072r00rA9 151 .dw #00115$
000074r00rA9 152 .dw #00115$
000076r00rA9 153 .dw #00115$
000078r00rCA 154 .dw #00128$
00007Ar00rB0 155 .dw #00118$
00007Cr00rB0 156 .dw #00118$
00007Er00rB0 157 .dw #00118$
000080r00rB7 158 .dw #00121$
000082r00rB7 159 .dw #00121$
000084r00rB7 160 .dw #00121$
000086r00rCA 161 .dw #00128$
000088r00rCA 162 .dw #00128$
00008Ar00rBE 163 .dw #00124$
00008Cr00rBE 164 .dw #00124$
00008Er00rBE 165 .dw #00124$
000090r00rC5 166 .dw #00126$
000092r00rC5 167 .dw #00126$
168 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 132: case DMA1_CHANNEL2_3_IRQn:
000094 169 00103$:
170 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 133: Value = (uint8_t)(ITC->ISPR1 & Mask); /* Read software priority */
000094 C6 7F 70 [ 1] 171 ld a, 0x7f70
000097 14 02 [ 1] 172 and a, (0x02, sp)
173 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 134: break;
000099 20 2F [ 2] 174 jra 00128$
175 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 144: case EXTID_IRQn:
00009B 176 00107$:
177 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 150: Value = (uint8_t)(ITC->ISPR2 & Mask); /* Read software priority */
00009B C6 7F 71 [ 1] 178 ld a, 0x7f71
00009E 14 02 [ 1] 179 and a, (0x02, sp)
180 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 151: break;
0000A0 20 28 [ 2] 181 jra 00128$
182 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 156: case EXTI3_IRQn:
0000A2 183 00111$:
184 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 157: Value = (uint8_t)(ITC->ISPR3 & Mask); /* Read software priority */
0000A2 C6 7F 72 [ 1] 185 ld a, 0x7f72
0000A5 14 02 [ 1] 186 and a, (0x02, sp)
187 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 158: break;
0000A7 20 21 [ 2] 188 jra 00128$
189 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 163: case EXTI7_IRQn:
0000A9 190 00115$:
191 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 164: Value = (uint8_t)(ITC->ISPR4 & Mask); /* Read software priority */
0000A9 C6 7F 73 [ 1] 192 ld a, 0x7f73
0000AC 14 02 [ 1] 193 and a, (0x02, sp)
194 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 165: break;
0000AE 20 1A [ 2] 195 jra 00128$
196 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 177: case TIM2_UPD_OVF_TRG_BRK_IRQn:
0000B0 197 00118$:
198 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 182: Value = (uint8_t)(ITC->ISPR5 & Mask); /* Read software priority */
0000B0 C6 7F 74 [ 1] 199 ld a, 0x7f74
0000B3 14 02 [ 1] 200 and a, (0x02, sp)
201 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 183: break;
0000B5 20 13 [ 2] 202 jra 00128$
203 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 192: case TIM3_CC_IRQn:
0000B7 204 00121$:
205 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 198: Value = (uint8_t)(ITC->ISPR6 & Mask); /* Read software priority */
0000B7 C6 7F 75 [ 1] 206 ld a, 0x7f75
0000BA 14 02 [ 1] 207 and a, (0x02, sp)
208 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 199: break;
0000BC 20 0C [ 2] 209 jra 00128$
210 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 208: case USART1_TX_IRQn:
0000BE 211 00124$:
212 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 212: Value = (uint8_t)(ITC->ISPR7 & Mask); /* Read software priority */
0000BE C6 7F 76 [ 1] 213 ld a, 0x7f76
0000C1 14 02 [ 1] 214 and a, (0x02, sp)
215 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 213: break;
0000C3 20 05 [ 2] 216 jra 00128$
217 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 218: case I2C1_IRQn:
0000C5 218 00126$:
219 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 223: Value = (uint8_t)(ITC->ISPR8 & Mask); /* Read software priority */
0000C5 C6 7F 77 [ 1] 220 ld a, 0x7f77
0000C8 14 02 [ 1] 221 and a, (0x02, sp)
222 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 228: }
0000CA 223 00128$:
224 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 230: Value >>= (uint8_t)((IRQn % 4u) * 2u);
0000CA 88 [ 1] 225 push a
0000CB 7B 02 [ 1] 226 ld a, (0x02, sp)
0000CD 27 05 [ 1] 227 jreq 00143$
0000CF 228 00142$:
0000CF 04 01 [ 1] 229 srl (1, sp)
0000D1 4A [ 1] 230 dec a
0000D2 26 FB [ 1] 231 jrne 00142$
0000D4 232 00143$:
0000D4 84 [ 1] 233 pop a
234 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 232: return((ITC_PriorityLevel_TypeDef)Value);
235 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 234: }
0000D5 85 [ 2] 236 popw x
0000D6 81 [ 4] 237 ret
238 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 253: void ITC_SetSoftwarePriority(IRQn_TypeDef IRQn, ITC_PriorityLevel_TypeDef ITC_PriorityLevel)
239 ; -----------------------------------------
240 ; function ITC_SetSoftwarePriority
241 ; -----------------------------------------
0000D7 242 _ITC_SetSoftwarePriority:
0000D7 89 [ 2] 243 pushw x
244 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 267: Mask = (uint8_t)(~(uint8_t)(0x03U << ((IRQn % 4U) * 2U)));
0000D8 97 [ 1] 245 ld xl, a
0000D9 A4 03 [ 1] 246 and a, #0x03
0000DB 48 [ 1] 247 sll a
0000DC 95 [ 1] 248 ld xh, a
0000DD A6 03 [ 1] 249 ld a, #0x03
0000DF 88 [ 1] 250 push a
0000E0 9E [ 1] 251 ld a, xh
0000E1 4D [ 1] 252 tnz a
0000E2 27 05 [ 1] 253 jreq 00139$
0000E4 254 00138$:
0000E4 08 01 [ 1] 255 sll (1, sp)
0000E6 4A [ 1] 256 dec a
0000E7 26 FB [ 1] 257 jrne 00138$
0000E9 258 00139$:
0000E9 84 [ 1] 259 pop a
0000EA 43 [ 1] 260 cpl a
0000EB 6B 01 [ 1] 261 ld (0x01, sp), a
262 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 269: NewPriority = (uint8_t)((uint8_t)(ITC_PriorityLevel) << ((IRQn % 4U) * 2U));
0000ED 7B 05 [ 1] 263 ld a, (0x05, sp)
0000EF 88 [ 1] 264 push a
0000F0 9E [ 1] 265 ld a, xh
0000F1 4D [ 1] 266 tnz a
0000F2 27 05 [ 1] 267 jreq 00141$
0000F4 268 00140$:
0000F4 08 01 [ 1] 269 sll (1, sp)
0000F6 4A [ 1] 270 dec a
0000F7 26 FB [ 1] 271 jrne 00140$
0000F9 272 00141$:
0000F9 84 [ 1] 273 pop a
0000FA 6B 02 [ 1] 274 ld (0x02, sp), a
275 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 271: switch (IRQn)
0000FC 9F [ 1] 276 ld a, xl
0000FD A1 1D [ 1] 277 cp a, #0x1d
0000FF 23 03 [ 2] 278 jrule 00142$
000101 CCr01rD5 [ 2] 279 jp 00129$
000104 280 00142$:
000104 4F [ 1] 281 clr a
000105 95 [ 1] 282 ld xh, a
000106 58 [ 2] 283 sllw x
000107 DEu01u0B [ 2] 284 ldw x, (#00143$, x)
00010A FC [ 2] 285 jp (x)
00010B 286 00143$:
00010Br01rD5 287 .dw #00129$
00010Dr01r47 288 .dw #00103$
00010Fr01r47 289 .dw #00103$
000111r01r47 290 .dw #00103$
000113r01r59 291 .dw #00107$
000115r01r59 292 .dw #00107$
000117r01r59 293 .dw #00107$
000119r01r59 294 .dw #00107$
00011Br01r6B 295 .dw #00111$
00011Dr01r6B 296 .dw #00111$
00011Fr01r6B 297 .dw #00111$
000121r01r6B 298 .dw #00111$
000123r01r7D 299 .dw #00115$
000125r01r7D 300 .dw #00115$
000127r01r7D 301 .dw #00115$
000129r01r7D 302 .dw #00115$
00012Br01rD5 303 .dw #00129$
00012Dr01r8F 304 .dw #00118$
00012Fr01r8F 305 .dw #00118$
000131r01r8F 306 .dw #00118$
000133r01rA1 307 .dw #00121$
000135r01rA1 308 .dw #00121$
000137r01rA1 309 .dw #00121$
000139r01rD5 310 .dw #00129$
00013Br01rD5 311 .dw #00129$
00013Dr01rB3 312 .dw #00124$
00013Fr01rB3 313 .dw #00124$
000141r01rB3 314 .dw #00124$
000143r01rC5 315 .dw #00126$
000145r01rC5 316 .dw #00126$
317 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 275: case DMA1_CHANNEL2_3_IRQn:
000147 318 00103$:
319 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 276: ITC->ISPR1 &= Mask;
000147 C6 7F 70 [ 1] 320 ld a, 0x7f70
00014A 14 01 [ 1] 321 and a, (0x01, sp)
00014C C7 7F 70 [ 1] 322 ld 0x7f70, a
323 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 277: ITC->ISPR1 |= NewPriority;
00014F C6 7F 70 [ 1] 324 ld a, 0x7f70
000152 1A 02 [ 1] 325 or a, (0x02, sp)
000154 C7 7F 70 [ 1] 326 ld 0x7f70, a
327 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 278: break;
000157 20 7C [ 2] 328 jra 00129$
329 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 288: case EXTID_IRQn:
000159 330 00107$:
331 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 294: ITC->ISPR2 &= Mask;
000159 C6 7F 71 [ 1] 332 ld a, 0x7f71
00015C 14 01 [ 1] 333 and a, (0x01, sp)
00015E C7 7F 71 [ 1] 334 ld 0x7f71, a
335 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 295: ITC->ISPR2 |= NewPriority;
000161 C6 7F 71 [ 1] 336 ld a, 0x7f71
000164 1A 02 [ 1] 337 or a, (0x02, sp)
000166 C7 7F 71 [ 1] 338 ld 0x7f71, a
339 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 296: break;
000169 20 6A [ 2] 340 jra 00129$
341 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 301: case EXTI3_IRQn:
00016B 342 00111$:
343 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 302: ITC->ISPR3 &= Mask;
00016B C6 7F 72 [ 1] 344 ld a, 0x7f72
00016E 14 01 [ 1] 345 and a, (0x01, sp)
000170 C7 7F 72 [ 1] 346 ld 0x7f72, a
347 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 303: ITC->ISPR3 |= NewPriority;
000173 C6 7F 72 [ 1] 348 ld a, 0x7f72
000176 1A 02 [ 1] 349 or a, (0x02, sp)
000178 C7 7F 72 [ 1] 350 ld 0x7f72, a
351 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 304: break;
00017B 20 58 [ 2] 352 jra 00129$
353 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 309: case EXTI7_IRQn:
00017D 354 00115$:
355 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 310: ITC->ISPR4 &= Mask;
00017D C6 7F 73 [ 1] 356 ld a, 0x7f73
000180 14 01 [ 1] 357 and a, (0x01, sp)
000182 C7 7F 73 [ 1] 358 ld 0x7f73, a
359 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 311: ITC->ISPR4 |= NewPriority;
000185 C6 7F 73 [ 1] 360 ld a, 0x7f73
000188 1A 02 [ 1] 361 or a, (0x02, sp)
00018A C7 7F 73 [ 1] 362 ld 0x7f73, a
363 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 312: break;
00018D 20 46 [ 2] 364 jra 00129$
365 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 323: case TIM2_UPD_OVF_TRG_BRK_IRQn:
00018F 366 00118$:
367 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 328: ITC->ISPR5 &= Mask;
00018F C6 7F 74 [ 1] 368 ld a, 0x7f74
000192 14 01 [ 1] 369 and a, (0x01, sp)
000194 C7 7F 74 [ 1] 370 ld 0x7f74, a
371 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 329: ITC->ISPR5 |= NewPriority;
000197 C6 7F 74 [ 1] 372 ld a, 0x7f74
00019A 1A 02 [ 1] 373 or a, (0x02, sp)
00019C C7 7F 74 [ 1] 374 ld 0x7f74, a
375 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 330: break;
00019F 20 34 [ 2] 376 jra 00129$
377 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 338: case TIM3_CC_IRQn:
0001A1 378 00121$:
379 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 344: ITC->ISPR6 &= Mask;
0001A1 C6 7F 75 [ 1] 380 ld a, 0x7f75
0001A4 14 01 [ 1] 381 and a, (0x01, sp)
0001A6 C7 7F 75 [ 1] 382 ld 0x7f75, a
383 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 345: ITC->ISPR6 |= NewPriority;
0001A9 C6 7F 75 [ 1] 384 ld a, 0x7f75
0001AC 1A 02 [ 1] 385 or a, (0x02, sp)
0001AE C7 7F 75 [ 1] 386 ld 0x7f75, a
387 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 346: break;
0001B1 20 22 [ 2] 388 jra 00129$
389 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 355: case USART1_TX_IRQn:
0001B3 390 00124$:
391 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 359: ITC->ISPR7 &= Mask;
0001B3 C6 7F 76 [ 1] 392 ld a, 0x7f76
0001B6 14 01 [ 1] 393 and a, (0x01, sp)
0001B8 C7 7F 76 [ 1] 394 ld 0x7f76, a
395 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 360: ITC->ISPR7 |= NewPriority;
0001BB C6 7F 76 [ 1] 396 ld a, 0x7f76
0001BE 1A 02 [ 1] 397 or a, (0x02, sp)
0001C0 C7 7F 76 [ 1] 398 ld 0x7f76, a
399 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 361: break;
0001C3 20 10 [ 2] 400 jra 00129$
401 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 366: case I2C1_IRQn:
0001C5 402 00126$:
403 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 371: ITC->ISPR8 &= Mask;
0001C5 C6 7F 77 [ 1] 404 ld a, 0x7f77
0001C8 14 01 [ 1] 405 and a, (0x01, sp)
0001CA C7 7F 77 [ 1] 406 ld 0x7f77, a
407 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 372: ITC->ISPR8 |= NewPriority;
0001CD C6 7F 77 [ 1] 408 ld a, 0x7f77
0001D0 1A 02 [ 1] 409 or a, (0x02, sp)
0001D2 C7 7F 77 [ 1] 410 ld 0x7f77, a
411 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 377: }
0001D5 412 00129$:
413 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 378: }
0001D5 85 [ 2] 414 popw x
0001D6 85 [ 2] 415 popw x
0001D7 84 [ 1] 416 pop a
0001D8 FC [ 2] 417 jp (x)
418 .area CODE
419 .area CONST
420 .area INITIALIZER
421 .area CABS (ABS)

View File

@@ -0,0 +1,238 @@
XH3
H B areas 6 global symbols
M stm8l15x_itc
S .__.ABS. Def000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size 1D9 flags 0 addr 0
S _ITC_GetSoftIntStatus Def000024
S _ITC_DeInit Def000003
S _ITC_GetSoftwarePriority Def00002A
S _ITC_GetCPUCC Def000000
S _ITC_SetSoftwarePriority Def0000D7
A CABS size 0 flags 8 addr 0
T 00 00 00
R 00 00 00 09
T 00 00 00 8A 84 81
R 00 00 00 09
T 00 00 03
R 00 00 00 09
T 00 00 03 35 FF 7F 70 35 FF 7F 71 35 FF 7F 72 35
R 00 00 00 09
T 00 00 10 FF 7F 73 35 FF 7F 74 35 FF 7F 75 35 FF
R 00 00 00 09
T 00 00 1D 7F 76 35 FF 7F 77 81
R 00 00 00 09
T 00 00 24
R 00 00 00 09
T 00 00 24 CD 00 00 A4 28 81
R 00 00 00 09 00 04 00 09
T 00 00 2A
R 00 00 00 09
T 00 00 2A 89 97 4F 90 93 88 90 9F A4 03 95 84 02
R 00 00 00 09
T 00 00 37 6B 01 01 08 01 88 A6 03 6B 03 7B 02 27
R 00 00 00 09
T 00 00 44 05
R 00 00 00 09
T 00 00 45
R 00 00 00 09
T 00 00 45 08 03 4A 26 FB
R 00 00 00 09
T 00 00 4A
R 00 00 00 09
T 00 00 4A 9F A1 1D 84 22 7A 02 4F 01 58 DE 00 58
R 00 00 00 09 10 0E 00 09
T 00 00 57 FC
R 00 00 00 09
T 00 00 58
R 00 00 00 09
T 00 00 58 00 CA 00 94
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 5C 00 94 00 94
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 60 00 9B 00 9B
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 64 00 9B 00 9B
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 68 00 A2 00 A2
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 6C 00 A2 00 A2
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 70 00 A9 00 A9
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 74 00 A9 00 A9
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 78 00 CA 00 B0
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 7C 00 B0 00 B0
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 80 00 B7 00 B7
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 84 00 B7 00 CA
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 88 00 CA 00 BE
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 8C 00 BE 00 BE
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 90 00 C5 00 C5
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 00 94
R 00 00 00 09
T 00 00 94 C6 7F 70 14 02 20 2F
R 00 00 00 09
T 00 00 9B
R 00 00 00 09
T 00 00 9B C6 7F 71 14 02 20 28
R 00 00 00 09
T 00 00 A2
R 00 00 00 09
T 00 00 A2 C6 7F 72 14 02 20 21
R 00 00 00 09
T 00 00 A9
R 00 00 00 09
T 00 00 A9 C6 7F 73 14 02 20 1A
R 00 00 00 09
T 00 00 B0
R 00 00 00 09
T 00 00 B0 C6 7F 74 14 02 20 13
R 00 00 00 09
T 00 00 B7
R 00 00 00 09
T 00 00 B7 C6 7F 75 14 02 20 0C
R 00 00 00 09
T 00 00 BE
R 00 00 00 09
T 00 00 BE C6 7F 76 14 02 20 05
R 00 00 00 09
T 00 00 C5
R 00 00 00 09
T 00 00 C5 C6 7F 77 14 02
R 00 00 00 09
T 00 00 CA
R 00 00 00 09
T 00 00 CA 88 7B 02 27 05
R 00 00 00 09
T 00 00 CF
R 00 00 00 09
T 00 00 CF 04 01 4A 26 FB
R 00 00 00 09
T 00 00 D4
R 00 00 00 09
T 00 00 D4 84 85 81
R 00 00 00 09
T 00 00 D7
R 00 00 00 09
T 00 00 D7 89 97 A4 03 48 95 A6 03 88 9E 4D 27 05
R 00 00 00 09
T 00 00 E4
R 00 00 00 09
T 00 00 E4 08 01 4A 26 FB
R 00 00 00 09
T 00 00 E9
R 00 00 00 09
T 00 00 E9 84 43 6B 01 7B 05 88 9E 4D 27 05
R 00 00 00 09
T 00 00 F4
R 00 00 00 09
T 00 00 F4 08 01 4A 26 FB
R 00 00 00 09
T 00 00 F9
R 00 00 00 09
T 00 00 F9 84 6B 02 9F A1 1D 23 03 CC 01 D5
R 00 00 00 09 00 0C 00 09
T 00 01 04
R 00 00 00 09
T 00 01 04 4F 95 58 DE 01 0B FC
R 00 00 00 09 10 07 00 09
T 00 01 0B
R 00 00 00 09
T 00 01 0B 01 D5 01 47
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 0F 01 47 01 47
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 13 01 59 01 59
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 17 01 59 01 59
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 1B 01 6B 01 6B
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 1F 01 6B 01 6B
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 23 01 7D 01 7D
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 27 01 7D 01 7D
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 2B 01 D5 01 8F
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 2F 01 8F 01 8F
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 33 01 A1 01 A1
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 37 01 A1 01 D5
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 3B 01 D5 01 B3
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 3F 01 B3 01 B3
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 43 01 C5 01 C5
R 00 00 00 09 00 03 00 09 00 05 00 09
T 00 01 47
R 00 00 00 09
T 00 01 47 C6 7F 70 14 01 C7 7F 70 C6 7F 70 1A 02
R 00 00 00 09
T 00 01 54 C7 7F 70 20 7C
R 00 00 00 09
T 00 01 59
R 00 00 00 09
T 00 01 59 C6 7F 71 14 01 C7 7F 71 C6 7F 71 1A 02
R 00 00 00 09
T 00 01 66 C7 7F 71 20 6A
R 00 00 00 09
T 00 01 6B
R 00 00 00 09
T 00 01 6B C6 7F 72 14 01 C7 7F 72 C6 7F 72 1A 02
R 00 00 00 09
T 00 01 78 C7 7F 72 20 58
R 00 00 00 09
T 00 01 7D
R 00 00 00 09
T 00 01 7D C6 7F 73 14 01 C7 7F 73 C6 7F 73 1A 02
R 00 00 00 09
T 00 01 8A C7 7F 73 20 46
R 00 00 00 09
T 00 01 8F
R 00 00 00 09
T 00 01 8F C6 7F 74 14 01 C7 7F 74 C6 7F 74 1A 02
R 00 00 00 09
T 00 01 9C C7 7F 74 20 34
R 00 00 00 09
T 00 01 A1
R 00 00 00 09
T 00 01 A1 C6 7F 75 14 01 C7 7F 75 C6 7F 75 1A 02
R 00 00 00 09
T 00 01 AE C7 7F 75 20 22
R 00 00 00 09
T 00 01 B3
R 00 00 00 09
T 00 01 B3 C6 7F 76 14 01 C7 7F 76 C6 7F 76 1A 02
R 00 00 00 09
T 00 01 C0 C7 7F 76 20 10
R 00 00 00 09
T 00 01 C5
R 00 00 00 09
T 00 01 C5 C6 7F 77 14 01 C7 7F 77 C6 7F 77 1A 02
R 00 00 00 09
T 00 01 D2 C7 7F 77
R 00 00 00 09
T 00 01 D5
R 00 00 00 09
T 00 01 D5 85 85 84 FC
R 00 00 00 09

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@@ -0,0 +1,421 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_itc
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _ITC_GetCPUCC
11 .globl _ITC_DeInit
12 .globl _ITC_GetSoftIntStatus
13 .globl _ITC_GetSoftwarePriority
14 .globl _ITC_SetSoftwarePriority
15 ;--------------------------------------------------------
16 ; ram data
17 ;--------------------------------------------------------
18 .area DATA
19 ;--------------------------------------------------------
20 ; ram data
21 ;--------------------------------------------------------
22 .area INITIALIZED
23 ;--------------------------------------------------------
24 ; absolute external ram data
25 ;--------------------------------------------------------
26 .area DABS (ABS)
27
28 ; default segment ordering for linker
29 .area HOME
30 .area GSINIT
31 .area GSFINAL
32 .area CONST
33 .area INITIALIZER
34 .area CODE
35
36 ;--------------------------------------------------------
37 ; global & static initialisations
38 ;--------------------------------------------------------
39 .area HOME
40 .area GSINIT
41 .area GSFINAL
42 .area GSINIT
43 ;--------------------------------------------------------
44 ; Home
45 ;--------------------------------------------------------
46 .area HOME
47 .area HOME
48 ;--------------------------------------------------------
49 ; code
50 ;--------------------------------------------------------
51 .area CODE
52 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 56: uint8_t ITC_GetCPUCC(void)
53 ; -----------------------------------------
54 ; function ITC_GetCPUCC
55 ; -----------------------------------------
008EBF 56 _ITC_GetCPUCC:
57 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 65: __asm__("push cc");
008EBF 8A [ 1] 58 push cc
59 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 66: __asm__("pop a");
008EC0 84 [ 1] 60 pop a
61 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 71: }
008EC1 81 [ 4] 62 ret
63 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 90: void ITC_DeInit(void)
64 ; -----------------------------------------
65 ; function ITC_DeInit
66 ; -----------------------------------------
008EC2 67 _ITC_DeInit:
68 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 92: ITC->ISPR1 = ITC_SPRX_RESET_VALUE;
008EC2 35 FF 7F 70 [ 1] 69 mov 0x7f70+0, #0xff
70 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 93: ITC->ISPR2 = ITC_SPRX_RESET_VALUE;
008EC6 35 FF 7F 71 [ 1] 71 mov 0x7f71+0, #0xff
72 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 94: ITC->ISPR3 = ITC_SPRX_RESET_VALUE;
008ECA 35 FF 7F 72 [ 1] 73 mov 0x7f72+0, #0xff
74 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 95: ITC->ISPR4 = ITC_SPRX_RESET_VALUE;
008ECE 35 FF 7F 73 [ 1] 75 mov 0x7f73+0, #0xff
76 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 96: ITC->ISPR5 = ITC_SPRX_RESET_VALUE;
008ED2 35 FF 7F 74 [ 1] 77 mov 0x7f74+0, #0xff
78 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 97: ITC->ISPR6 = ITC_SPRX_RESET_VALUE;
008ED6 35 FF 7F 75 [ 1] 79 mov 0x7f75+0, #0xff
80 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 98: ITC->ISPR7 = ITC_SPRX_RESET_VALUE;
008EDA 35 FF 7F 76 [ 1] 81 mov 0x7f76+0, #0xff
82 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 99: ITC->ISPR8 = ITC_SPRX_RESET_VALUE;
008EDE 35 FF 7F 77 [ 1] 83 mov 0x7f77+0, #0xff
84 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 100: }
008EE2 81 [ 4] 85 ret
86 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 107: uint8_t ITC_GetSoftIntStatus(void)
87 ; -----------------------------------------
88 ; function ITC_GetSoftIntStatus
89 ; -----------------------------------------
008EE3 90 _ITC_GetSoftIntStatus:
91 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 109: return ((uint8_t)(ITC_GetCPUCC() & CPU_SOFT_INT_DISABLED));
008EE3 CD 8E BF [ 4] 92 call _ITC_GetCPUCC
008EE6 A4 28 [ 1] 93 and a, #0x28
94 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 110: }
008EE8 81 [ 4] 95 ret
96 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 117: ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(IRQn_TypeDef IRQn)
97 ; -----------------------------------------
98 ; function ITC_GetSoftwarePriority
99 ; -----------------------------------------
008EE9 100 _ITC_GetSoftwarePriority:
008EE9 89 [ 2] 101 pushw x
008EEA 97 [ 1] 102 ld xl, a
103 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 119: uint8_t Value = 0;
008EEB 4F [ 1] 104 clr a
105 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 126: Mask = (uint8_t)(0x03U << ((IRQn % 4U) * 2U));
008EEC 90 93 [ 1] 106 ldw y, x
008EEE 88 [ 1] 107 push a
008EEF 90 9F [ 1] 108 ld a, yl
008EF1 A4 03 [ 1] 109 and a, #0x03
008EF3 95 [ 1] 110 ld xh, a
008EF4 84 [ 1] 111 pop a
008EF5 02 [ 1] 112 rlwa x
008EF6 6B 01 [ 1] 113 ld (0x01, sp), a
008EF8 01 [ 1] 114 rrwa x
008EF9 08 01 [ 1] 115 sll (0x01, sp)
008EFB 88 [ 1] 116 push a
008EFC A6 03 [ 1] 117 ld a, #0x03
008EFE 6B 03 [ 1] 118 ld (0x03, sp), a
008F00 7B 02 [ 1] 119 ld a, (0x02, sp)
008F02 27 05 [ 1] 120 jreq 00139$
008F04 121 00138$:
008F04 08 03 [ 1] 122 sll (0x03, sp)
008F06 4A [ 1] 123 dec a
008F07 26 FB [ 1] 124 jrne 00138$
008F09 125 00139$:
126 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 128: switch (IRQn)
008F09 9F [ 1] 127 ld a, xl
008F0A A1 1D [ 1] 128 cp a, #0x1d
008F0C 84 [ 1] 129 pop a
008F0D 22 7A [ 1] 130 jrugt 00128$
008F0F 02 [ 1] 131 rlwa x
008F10 4F [ 1] 132 clr a
008F11 01 [ 1] 133 rrwa x
008F12 58 [ 2] 134 sllw x
008F13 DE 8F 17 [ 2] 135 ldw x, (#00141$, x)
008F16 FC [ 2] 136 jp (x)
008F17 137 00141$:
008F17 8F 89 138 .dw #00128$
008F19 8F 53 139 .dw #00103$
008F1B 8F 53 140 .dw #00103$
008F1D 8F 53 141 .dw #00103$
008F1F 8F 5A 142 .dw #00107$
008F21 8F 5A 143 .dw #00107$
008F23 8F 5A 144 .dw #00107$
008F25 8F 5A 145 .dw #00107$
008F27 8F 61 146 .dw #00111$
008F29 8F 61 147 .dw #00111$
008F2B 8F 61 148 .dw #00111$
008F2D 8F 61 149 .dw #00111$
008F2F 8F 68 150 .dw #00115$
008F31 8F 68 151 .dw #00115$
008F33 8F 68 152 .dw #00115$
008F35 8F 68 153 .dw #00115$
008F37 8F 89 154 .dw #00128$
008F39 8F 6F 155 .dw #00118$
008F3B 8F 6F 156 .dw #00118$
008F3D 8F 6F 157 .dw #00118$
008F3F 8F 76 158 .dw #00121$
008F41 8F 76 159 .dw #00121$
008F43 8F 76 160 .dw #00121$
008F45 8F 89 161 .dw #00128$
008F47 8F 89 162 .dw #00128$
008F49 8F 7D 163 .dw #00124$
008F4B 8F 7D 164 .dw #00124$
008F4D 8F 7D 165 .dw #00124$
008F4F 8F 84 166 .dw #00126$
008F51 8F 84 167 .dw #00126$
168 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 132: case DMA1_CHANNEL2_3_IRQn:
008F53 169 00103$:
170 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 133: Value = (uint8_t)(ITC->ISPR1 & Mask); /* Read software priority */
008F53 C6 7F 70 [ 1] 171 ld a, 0x7f70
008F56 14 02 [ 1] 172 and a, (0x02, sp)
173 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 134: break;
008F58 20 2F [ 2] 174 jra 00128$
175 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 144: case EXTID_IRQn:
008F5A 176 00107$:
177 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 150: Value = (uint8_t)(ITC->ISPR2 & Mask); /* Read software priority */
008F5A C6 7F 71 [ 1] 178 ld a, 0x7f71
008F5D 14 02 [ 1] 179 and a, (0x02, sp)
180 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 151: break;
008F5F 20 28 [ 2] 181 jra 00128$
182 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 156: case EXTI3_IRQn:
008F61 183 00111$:
184 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 157: Value = (uint8_t)(ITC->ISPR3 & Mask); /* Read software priority */
008F61 C6 7F 72 [ 1] 185 ld a, 0x7f72
008F64 14 02 [ 1] 186 and a, (0x02, sp)
187 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 158: break;
008F66 20 21 [ 2] 188 jra 00128$
189 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 163: case EXTI7_IRQn:
008F68 190 00115$:
191 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 164: Value = (uint8_t)(ITC->ISPR4 & Mask); /* Read software priority */
008F68 C6 7F 73 [ 1] 192 ld a, 0x7f73
008F6B 14 02 [ 1] 193 and a, (0x02, sp)
194 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 165: break;
008F6D 20 1A [ 2] 195 jra 00128$
196 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 177: case TIM2_UPD_OVF_TRG_BRK_IRQn:
008F6F 197 00118$:
198 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 182: Value = (uint8_t)(ITC->ISPR5 & Mask); /* Read software priority */
008F6F C6 7F 74 [ 1] 199 ld a, 0x7f74
008F72 14 02 [ 1] 200 and a, (0x02, sp)
201 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 183: break;
008F74 20 13 [ 2] 202 jra 00128$
203 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 192: case TIM3_CC_IRQn:
008F76 204 00121$:
205 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 198: Value = (uint8_t)(ITC->ISPR6 & Mask); /* Read software priority */
008F76 C6 7F 75 [ 1] 206 ld a, 0x7f75
008F79 14 02 [ 1] 207 and a, (0x02, sp)
208 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 199: break;
008F7B 20 0C [ 2] 209 jra 00128$
210 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 208: case USART1_TX_IRQn:
008F7D 211 00124$:
212 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 212: Value = (uint8_t)(ITC->ISPR7 & Mask); /* Read software priority */
008F7D C6 7F 76 [ 1] 213 ld a, 0x7f76
008F80 14 02 [ 1] 214 and a, (0x02, sp)
215 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 213: break;
008F82 20 05 [ 2] 216 jra 00128$
217 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 218: case I2C1_IRQn:
008F84 218 00126$:
219 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 223: Value = (uint8_t)(ITC->ISPR8 & Mask); /* Read software priority */
008F84 C6 7F 77 [ 1] 220 ld a, 0x7f77
008F87 14 02 [ 1] 221 and a, (0x02, sp)
222 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 228: }
008F89 223 00128$:
224 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 230: Value >>= (uint8_t)((IRQn % 4u) * 2u);
008F89 88 [ 1] 225 push a
008F8A 7B 02 [ 1] 226 ld a, (0x02, sp)
008F8C 27 05 [ 1] 227 jreq 00143$
008F8E 228 00142$:
008F8E 04 01 [ 1] 229 srl (1, sp)
008F90 4A [ 1] 230 dec a
008F91 26 FB [ 1] 231 jrne 00142$
008F93 232 00143$:
008F93 84 [ 1] 233 pop a
234 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 232: return((ITC_PriorityLevel_TypeDef)Value);
235 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 234: }
008F94 85 [ 2] 236 popw x
008F95 81 [ 4] 237 ret
238 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 253: void ITC_SetSoftwarePriority(IRQn_TypeDef IRQn, ITC_PriorityLevel_TypeDef ITC_PriorityLevel)
239 ; -----------------------------------------
240 ; function ITC_SetSoftwarePriority
241 ; -----------------------------------------
008F96 242 _ITC_SetSoftwarePriority:
008F96 89 [ 2] 243 pushw x
244 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 267: Mask = (uint8_t)(~(uint8_t)(0x03U << ((IRQn % 4U) * 2U)));
008F97 97 [ 1] 245 ld xl, a
008F98 A4 03 [ 1] 246 and a, #0x03
008F9A 48 [ 1] 247 sll a
008F9B 95 [ 1] 248 ld xh, a
008F9C A6 03 [ 1] 249 ld a, #0x03
008F9E 88 [ 1] 250 push a
008F9F 9E [ 1] 251 ld a, xh
008FA0 4D [ 1] 252 tnz a
008FA1 27 05 [ 1] 253 jreq 00139$
008FA3 254 00138$:
008FA3 08 01 [ 1] 255 sll (1, sp)
008FA5 4A [ 1] 256 dec a
008FA6 26 FB [ 1] 257 jrne 00138$
008FA8 258 00139$:
008FA8 84 [ 1] 259 pop a
008FA9 43 [ 1] 260 cpl a
008FAA 6B 01 [ 1] 261 ld (0x01, sp), a
262 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 269: NewPriority = (uint8_t)((uint8_t)(ITC_PriorityLevel) << ((IRQn % 4U) * 2U));
008FAC 7B 05 [ 1] 263 ld a, (0x05, sp)
008FAE 88 [ 1] 264 push a
008FAF 9E [ 1] 265 ld a, xh
008FB0 4D [ 1] 266 tnz a
008FB1 27 05 [ 1] 267 jreq 00141$
008FB3 268 00140$:
008FB3 08 01 [ 1] 269 sll (1, sp)
008FB5 4A [ 1] 270 dec a
008FB6 26 FB [ 1] 271 jrne 00140$
008FB8 272 00141$:
008FB8 84 [ 1] 273 pop a
008FB9 6B 02 [ 1] 274 ld (0x02, sp), a
275 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 271: switch (IRQn)
008FBB 9F [ 1] 276 ld a, xl
008FBC A1 1D [ 1] 277 cp a, #0x1d
008FBE 23 03 [ 2] 278 jrule 00142$
008FC0 CC 90 94 [ 2] 279 jp 00129$
008FC3 280 00142$:
008FC3 4F [ 1] 281 clr a
008FC4 95 [ 1] 282 ld xh, a
008FC5 58 [ 2] 283 sllw x
008FC6 DE 8F CA [ 2] 284 ldw x, (#00143$, x)
008FC9 FC [ 2] 285 jp (x)
008FCA 286 00143$:
008FCA 90 94 287 .dw #00129$
008FCC 90 06 288 .dw #00103$
008FCE 90 06 289 .dw #00103$
008FD0 90 06 290 .dw #00103$
008FD2 90 18 291 .dw #00107$
008FD4 90 18 292 .dw #00107$
008FD6 90 18 293 .dw #00107$
008FD8 90 18 294 .dw #00107$
008FDA 90 2A 295 .dw #00111$
008FDC 90 2A 296 .dw #00111$
008FDE 90 2A 297 .dw #00111$
008FE0 90 2A 298 .dw #00111$
008FE2 90 3C 299 .dw #00115$
008FE4 90 3C 300 .dw #00115$
008FE6 90 3C 301 .dw #00115$
008FE8 90 3C 302 .dw #00115$
008FEA 90 94 303 .dw #00129$
008FEC 90 4E 304 .dw #00118$
008FEE 90 4E 305 .dw #00118$
008FF0 90 4E 306 .dw #00118$
008FF2 90 60 307 .dw #00121$
008FF4 90 60 308 .dw #00121$
008FF6 90 60 309 .dw #00121$
008FF8 90 94 310 .dw #00129$
008FFA 90 94 311 .dw #00129$
008FFC 90 72 312 .dw #00124$
008FFE 90 72 313 .dw #00124$
009000 90 72 314 .dw #00124$
009002 90 84 315 .dw #00126$
009004 90 84 316 .dw #00126$
317 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 275: case DMA1_CHANNEL2_3_IRQn:
009006 318 00103$:
319 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 276: ITC->ISPR1 &= Mask;
009006 C6 7F 70 [ 1] 320 ld a, 0x7f70
009009 14 01 [ 1] 321 and a, (0x01, sp)
00900B C7 7F 70 [ 1] 322 ld 0x7f70, a
323 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 277: ITC->ISPR1 |= NewPriority;
00900E C6 7F 70 [ 1] 324 ld a, 0x7f70
009011 1A 02 [ 1] 325 or a, (0x02, sp)
009013 C7 7F 70 [ 1] 326 ld 0x7f70, a
327 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 278: break;
009016 20 7C [ 2] 328 jra 00129$
329 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 288: case EXTID_IRQn:
009018 330 00107$:
331 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 294: ITC->ISPR2 &= Mask;
009018 C6 7F 71 [ 1] 332 ld a, 0x7f71
00901B 14 01 [ 1] 333 and a, (0x01, sp)
00901D C7 7F 71 [ 1] 334 ld 0x7f71, a
335 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 295: ITC->ISPR2 |= NewPriority;
009020 C6 7F 71 [ 1] 336 ld a, 0x7f71
009023 1A 02 [ 1] 337 or a, (0x02, sp)
009025 C7 7F 71 [ 1] 338 ld 0x7f71, a
339 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 296: break;
009028 20 6A [ 2] 340 jra 00129$
341 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 301: case EXTI3_IRQn:
00902A 342 00111$:
343 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 302: ITC->ISPR3 &= Mask;
00902A C6 7F 72 [ 1] 344 ld a, 0x7f72
00902D 14 01 [ 1] 345 and a, (0x01, sp)
00902F C7 7F 72 [ 1] 346 ld 0x7f72, a
347 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 303: ITC->ISPR3 |= NewPriority;
009032 C6 7F 72 [ 1] 348 ld a, 0x7f72
009035 1A 02 [ 1] 349 or a, (0x02, sp)
009037 C7 7F 72 [ 1] 350 ld 0x7f72, a
351 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 304: break;
00903A 20 58 [ 2] 352 jra 00129$
353 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 309: case EXTI7_IRQn:
00903C 354 00115$:
355 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 310: ITC->ISPR4 &= Mask;
00903C C6 7F 73 [ 1] 356 ld a, 0x7f73
00903F 14 01 [ 1] 357 and a, (0x01, sp)
009041 C7 7F 73 [ 1] 358 ld 0x7f73, a
359 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 311: ITC->ISPR4 |= NewPriority;
009044 C6 7F 73 [ 1] 360 ld a, 0x7f73
009047 1A 02 [ 1] 361 or a, (0x02, sp)
009049 C7 7F 73 [ 1] 362 ld 0x7f73, a
363 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 312: break;
00904C 20 46 [ 2] 364 jra 00129$
365 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 323: case TIM2_UPD_OVF_TRG_BRK_IRQn:
00904E 366 00118$:
367 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 328: ITC->ISPR5 &= Mask;
00904E C6 7F 74 [ 1] 368 ld a, 0x7f74
009051 14 01 [ 1] 369 and a, (0x01, sp)
009053 C7 7F 74 [ 1] 370 ld 0x7f74, a
371 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 329: ITC->ISPR5 |= NewPriority;
009056 C6 7F 74 [ 1] 372 ld a, 0x7f74
009059 1A 02 [ 1] 373 or a, (0x02, sp)
00905B C7 7F 74 [ 1] 374 ld 0x7f74, a
375 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 330: break;
00905E 20 34 [ 2] 376 jra 00129$
377 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 338: case TIM3_CC_IRQn:
009060 378 00121$:
379 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 344: ITC->ISPR6 &= Mask;
009060 C6 7F 75 [ 1] 380 ld a, 0x7f75
009063 14 01 [ 1] 381 and a, (0x01, sp)
009065 C7 7F 75 [ 1] 382 ld 0x7f75, a
383 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 345: ITC->ISPR6 |= NewPriority;
009068 C6 7F 75 [ 1] 384 ld a, 0x7f75
00906B 1A 02 [ 1] 385 or a, (0x02, sp)
00906D C7 7F 75 [ 1] 386 ld 0x7f75, a
387 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 346: break;
009070 20 22 [ 2] 388 jra 00129$
389 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 355: case USART1_TX_IRQn:
009072 390 00124$:
391 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 359: ITC->ISPR7 &= Mask;
009072 C6 7F 76 [ 1] 392 ld a, 0x7f76
009075 14 01 [ 1] 393 and a, (0x01, sp)
009077 C7 7F 76 [ 1] 394 ld 0x7f76, a
395 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 360: ITC->ISPR7 |= NewPriority;
00907A C6 7F 76 [ 1] 396 ld a, 0x7f76
00907D 1A 02 [ 1] 397 or a, (0x02, sp)
00907F C7 7F 76 [ 1] 398 ld 0x7f76, a
399 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 361: break;
009082 20 10 [ 2] 400 jra 00129$
401 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 366: case I2C1_IRQn:
009084 402 00126$:
403 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 371: ITC->ISPR8 &= Mask;
009084 C6 7F 77 [ 1] 404 ld a, 0x7f77
009087 14 01 [ 1] 405 and a, (0x01, sp)
009089 C7 7F 77 [ 1] 406 ld 0x7f77, a
407 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 372: ITC->ISPR8 |= NewPriority;
00908C C6 7F 77 [ 1] 408 ld a, 0x7f77
00908F 1A 02 [ 1] 409 or a, (0x02, sp)
009091 C7 7F 77 [ 1] 410 ld 0x7f77, a
411 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 377: }
009094 412 00129$:
413 ; ../inc/stm8l151x/src/stm8l15x_itc.c: 378: }
009094 85 [ 2] 414 popw x
009095 85 [ 2] 415 popw x
009096 84 [ 1] 416 pop a
009097 FC [ 2] 417 jp (x)
418 .area CODE
419 .area CONST
420 .area INITIALIZER
421 .area CABS (ABS)

View File

@@ -0,0 +1,32 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
9 _ITC_DeInit 000003 GR
9 _ITC_GetCPUCC 000000 GR
9 _ITC_GetSoftIntStatus 000024 GR
9 _ITC_GetSoftwarePriority 00002A GR
9 _ITC_SetSoftwarePriority 0000D7 GR
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 DABS size 0 flags 8
4 HOME size 0 flags 0
5 GSINIT size 0 flags 0
6 GSFINAL size 0 flags 0
7 CONST size 0 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size 1D9 flags 0
A CABS size 0 flags 8

View File

@@ -0,0 +1,267 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ISO C Compiler
; Version 4.5.0 #15242 (Linux)
;--------------------------------------------------------
.module stm8l15x_pwr
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _PWR_DeInit
.globl _PWR_PVDLevelConfig
.globl _PWR_PVDCmd
.globl _PWR_FastWakeUpCmd
.globl _PWR_UltraLowPowerCmd
.globl _PWR_PVDITConfig
.globl _PWR_GetFlagStatus
.globl _PWR_PVDClearFlag
.globl _PWR_PVDGetITStatus
.globl _PWR_PVDClearITPendingBit
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area INITIALIZED
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area DABS (ABS)
; default segment ordering for linker
.area HOME
.area GSINIT
.area GSFINAL
.area CONST
.area INITIALIZER
.area CODE
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME
.area GSINIT
.area GSFINAL
.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME
.area HOME
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CODE
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 82: void PWR_DeInit(void)
; -----------------------------------------
; function PWR_DeInit
; -----------------------------------------
_PWR_DeInit:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 84: PWR->CSR1 = PWR_CSR1_PVDIF;
mov 0x50b2+0, #0x20
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 85: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
mov 0x50b3+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 86: }
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 102: void PWR_PVDLevelConfig(PWR_PVDLevel_TypeDef PWR_PVDLevel)
; -----------------------------------------
; function PWR_PVDLevelConfig
; -----------------------------------------
_PWR_PVDLevelConfig:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 108: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PLS);
ld a, 0x50b2
and a, #0xf1
ld 0x50b2, a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 111: PWR->CSR1 |= PWR_PVDLevel;
ld a, 0x50b2
or a, (0x01, sp)
ld 0x50b2, a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 113: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 121: void PWR_PVDCmd(FunctionalState NewState)
; -----------------------------------------
; function PWR_PVDCmd
; -----------------------------------------
_PWR_PVDCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 129: PWR->CSR1 |= PWR_CSR1_PVDE;
ld a, 0x50b2
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 126: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 129: PWR->CSR1 |= PWR_CSR1_PVDE;
or a, #0x01
ld 0x50b2, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 134: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDE);
and a, #0xfe
ld 0x50b2, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 136: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 171: void PWR_FastWakeUpCmd(FunctionalState NewState)
; -----------------------------------------
; function PWR_FastWakeUpCmd
; -----------------------------------------
_PWR_FastWakeUpCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 179: PWR->CSR2 |= PWR_CSR2_FWU;
ld a, 0x50b3
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 176: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 179: PWR->CSR2 |= PWR_CSR2_FWU;
or a, #0x04
ld 0x50b3, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 184: PWR->CSR2 &= (uint8_t)(~PWR_CSR2_FWU);
and a, #0xfb
ld 0x50b3, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 186: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 194: void PWR_UltraLowPowerCmd(FunctionalState NewState)
; -----------------------------------------
; function PWR_UltraLowPowerCmd
; -----------------------------------------
_PWR_UltraLowPowerCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 202: PWR->CSR2 |= PWR_CSR2_ULP;
ld a, 0x50b3
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 199: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 202: PWR->CSR2 |= PWR_CSR2_ULP;
or a, #0x02
ld 0x50b3, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 207: PWR->CSR2 &= (uint8_t)(~PWR_CSR2_ULP);
and a, #0xfd
ld 0x50b3, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 209: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 232: void PWR_PVDITConfig(FunctionalState NewState)
; -----------------------------------------
; function PWR_PVDITConfig
; -----------------------------------------
_PWR_PVDITConfig:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 240: PWR->CSR1 |= PWR_CSR1_PVDIEN;
ld a, 0x50b2
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 237: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 240: PWR->CSR1 |= PWR_CSR1_PVDIEN;
or a, #0x10
ld 0x50b2, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 245: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDIEN);
and a, #0xef
ld 0x50b2, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 247: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 261: FlagStatus PWR_GetFlagStatus(PWR_FLAG_TypeDef PWR_FLAG)
; -----------------------------------------
; function PWR_GetFlagStatus
; -----------------------------------------
_PWR_GetFlagStatus:
push a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 268: if ((PWR_FLAG & PWR_FLAG_VREFINTF) != 0)
ld (0x01, sp), a
srl a
jrnc 00108$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 270: if ((PWR->CSR2 & PWR_CR2_VREFINTF) != (uint8_t)RESET )
btjf 0x50b3, #0, 00102$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 272: bitstatus = SET;
ld a, #0x01
jra 00109$
00102$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 276: bitstatus = RESET;
clr a
jra 00109$
00108$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 281: if ((PWR->CSR1 & PWR_FLAG) != (uint8_t)RESET )
ld a, 0x50b2
and a, (0x01, sp)
jreq 00105$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 283: bitstatus = SET;
ld a, #0x01
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 287: bitstatus = RESET;
.byte 0x21
00105$:
clr a
00109$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 292: return((FlagStatus)bitstatus);
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 293: }
addw sp, #1
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 300: void PWR_PVDClearFlag(void)
; -----------------------------------------
; function PWR_PVDClearFlag
; -----------------------------------------
_PWR_PVDClearFlag:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 303: PWR->CSR1 |= PWR_CSR1_PVDIF;
bset 0x50b2, #5
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 304: }
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 311: ITStatus PWR_PVDGetITStatus(void)
; -----------------------------------------
; function PWR_PVDGetITStatus
; -----------------------------------------
_PWR_PVDGetITStatus:
push a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 317: PVD_itStatus = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIF);
ld a, 0x50b2
and a, #0x20
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 318: PVD_itEnable = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIEN);
ld a, 0x50b2
and a, #0x10
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 320: if ((PVD_itStatus != (uint8_t)RESET ) && (PVD_itEnable != (uint8_t)RESET))
tnz (0x01, sp)
jreq 00102$
tnz a
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 322: bitstatus = (ITStatus)SET;
ld a, #0x01
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 326: bitstatus = (ITStatus)RESET;
.byte 0x21
00102$:
clr a
00103$:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 328: return ((ITStatus)bitstatus);
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 329: }
addw sp, #1
ret
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 336: void PWR_PVDClearITPendingBit(void)
; -----------------------------------------
; function PWR_PVDClearITPendingBit
; -----------------------------------------
_PWR_PVDClearITPendingBit:
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 339: PWR->CSR1 |= PWR_CSR1_PVDIF;
bset 0x50b2, #5
; ../inc/stm8l151x/src/stm8l15x_pwr.c: 340: }
ret
.area CODE
.area CONST
.area INITIALIZER
.area CABS (ABS)

View File

@@ -0,0 +1,267 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_pwr
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _PWR_DeInit
11 .globl _PWR_PVDLevelConfig
12 .globl _PWR_PVDCmd
13 .globl _PWR_FastWakeUpCmd
14 .globl _PWR_UltraLowPowerCmd
15 .globl _PWR_PVDITConfig
16 .globl _PWR_GetFlagStatus
17 .globl _PWR_PVDClearFlag
18 .globl _PWR_PVDGetITStatus
19 .globl _PWR_PVDClearITPendingBit
20 ;--------------------------------------------------------
21 ; ram data
22 ;--------------------------------------------------------
23 .area DATA
24 ;--------------------------------------------------------
25 ; ram data
26 ;--------------------------------------------------------
27 .area INITIALIZED
28 ;--------------------------------------------------------
29 ; absolute external ram data
30 ;--------------------------------------------------------
31 .area DABS (ABS)
32
33 ; default segment ordering for linker
34 .area HOME
35 .area GSINIT
36 .area GSFINAL
37 .area CONST
38 .area INITIALIZER
39 .area CODE
40
41 ;--------------------------------------------------------
42 ; global & static initialisations
43 ;--------------------------------------------------------
44 .area HOME
45 .area GSINIT
46 .area GSFINAL
47 .area GSINIT
48 ;--------------------------------------------------------
49 ; Home
50 ;--------------------------------------------------------
51 .area HOME
52 .area HOME
53 ;--------------------------------------------------------
54 ; code
55 ;--------------------------------------------------------
56 .area CODE
57 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 82: void PWR_DeInit(void)
58 ; -----------------------------------------
59 ; function PWR_DeInit
60 ; -----------------------------------------
000000 61 _PWR_DeInit:
62 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 84: PWR->CSR1 = PWR_CSR1_PVDIF;
000000 35 20 50 B2 [ 1] 63 mov 0x50b2+0, #0x20
64 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 85: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
000004 35 00 50 B3 [ 1] 65 mov 0x50b3+0, #0x00
66 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 86: }
000008 81 [ 4] 67 ret
68 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 102: void PWR_PVDLevelConfig(PWR_PVDLevel_TypeDef PWR_PVDLevel)
69 ; -----------------------------------------
70 ; function PWR_PVDLevelConfig
71 ; -----------------------------------------
000009 72 _PWR_PVDLevelConfig:
000009 88 [ 1] 73 push a
00000A 6B 01 [ 1] 74 ld (0x01, sp), a
75 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 108: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PLS);
00000C C6 50 B2 [ 1] 76 ld a, 0x50b2
00000F A4 F1 [ 1] 77 and a, #0xf1
000011 C7 50 B2 [ 1] 78 ld 0x50b2, a
79 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 111: PWR->CSR1 |= PWR_PVDLevel;
000014 C6 50 B2 [ 1] 80 ld a, 0x50b2
000017 1A 01 [ 1] 81 or a, (0x01, sp)
000019 C7 50 B2 [ 1] 82 ld 0x50b2, a
83 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 113: }
00001C 84 [ 1] 84 pop a
00001D 81 [ 4] 85 ret
86 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 121: void PWR_PVDCmd(FunctionalState NewState)
87 ; -----------------------------------------
88 ; function PWR_PVDCmd
89 ; -----------------------------------------
00001E 90 _PWR_PVDCmd:
00001E 88 [ 1] 91 push a
00001F 6B 01 [ 1] 92 ld (0x01, sp), a
93 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 129: PWR->CSR1 |= PWR_CSR1_PVDE;
000021 C6 50 B2 [ 1] 94 ld a, 0x50b2
95 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 126: if (NewState != DISABLE)
000024 0D 01 [ 1] 96 tnz (0x01, sp)
000026 27 07 [ 1] 97 jreq 00102$
98 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 129: PWR->CSR1 |= PWR_CSR1_PVDE;
000028 AA 01 [ 1] 99 or a, #0x01
00002A C7 50 B2 [ 1] 100 ld 0x50b2, a
00002D 20 05 [ 2] 101 jra 00104$
00002F 102 00102$:
103 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 134: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDE);
00002F A4 FE [ 1] 104 and a, #0xfe
000031 C7 50 B2 [ 1] 105 ld 0x50b2, a
000034 106 00104$:
107 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 136: }
000034 84 [ 1] 108 pop a
000035 81 [ 4] 109 ret
110 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 171: void PWR_FastWakeUpCmd(FunctionalState NewState)
111 ; -----------------------------------------
112 ; function PWR_FastWakeUpCmd
113 ; -----------------------------------------
000036 114 _PWR_FastWakeUpCmd:
000036 88 [ 1] 115 push a
000037 6B 01 [ 1] 116 ld (0x01, sp), a
117 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 179: PWR->CSR2 |= PWR_CSR2_FWU;
000039 C6 50 B3 [ 1] 118 ld a, 0x50b3
119 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 176: if (NewState != DISABLE)
00003C 0D 01 [ 1] 120 tnz (0x01, sp)
00003E 27 07 [ 1] 121 jreq 00102$
122 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 179: PWR->CSR2 |= PWR_CSR2_FWU;
000040 AA 04 [ 1] 123 or a, #0x04
000042 C7 50 B3 [ 1] 124 ld 0x50b3, a
000045 20 05 [ 2] 125 jra 00104$
000047 126 00102$:
127 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 184: PWR->CSR2 &= (uint8_t)(~PWR_CSR2_FWU);
000047 A4 FB [ 1] 128 and a, #0xfb
000049 C7 50 B3 [ 1] 129 ld 0x50b3, a
00004C 130 00104$:
131 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 186: }
00004C 84 [ 1] 132 pop a
00004D 81 [ 4] 133 ret
134 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 194: void PWR_UltraLowPowerCmd(FunctionalState NewState)
135 ; -----------------------------------------
136 ; function PWR_UltraLowPowerCmd
137 ; -----------------------------------------
00004E 138 _PWR_UltraLowPowerCmd:
00004E 88 [ 1] 139 push a
00004F 6B 01 [ 1] 140 ld (0x01, sp), a
141 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 202: PWR->CSR2 |= PWR_CSR2_ULP;
000051 C6 50 B3 [ 1] 142 ld a, 0x50b3
143 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 199: if (NewState != DISABLE)
000054 0D 01 [ 1] 144 tnz (0x01, sp)
000056 27 07 [ 1] 145 jreq 00102$
146 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 202: PWR->CSR2 |= PWR_CSR2_ULP;
000058 AA 02 [ 1] 147 or a, #0x02
00005A C7 50 B3 [ 1] 148 ld 0x50b3, a
00005D 20 05 [ 2] 149 jra 00104$
00005F 150 00102$:
151 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 207: PWR->CSR2 &= (uint8_t)(~PWR_CSR2_ULP);
00005F A4 FD [ 1] 152 and a, #0xfd
000061 C7 50 B3 [ 1] 153 ld 0x50b3, a
000064 154 00104$:
155 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 209: }
000064 84 [ 1] 156 pop a
000065 81 [ 4] 157 ret
158 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 232: void PWR_PVDITConfig(FunctionalState NewState)
159 ; -----------------------------------------
160 ; function PWR_PVDITConfig
161 ; -----------------------------------------
000066 162 _PWR_PVDITConfig:
000066 88 [ 1] 163 push a
000067 6B 01 [ 1] 164 ld (0x01, sp), a
165 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 240: PWR->CSR1 |= PWR_CSR1_PVDIEN;
000069 C6 50 B2 [ 1] 166 ld a, 0x50b2
167 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 237: if (NewState != DISABLE)
00006C 0D 01 [ 1] 168 tnz (0x01, sp)
00006E 27 07 [ 1] 169 jreq 00102$
170 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 240: PWR->CSR1 |= PWR_CSR1_PVDIEN;
000070 AA 10 [ 1] 171 or a, #0x10
000072 C7 50 B2 [ 1] 172 ld 0x50b2, a
000075 20 05 [ 2] 173 jra 00104$
000077 174 00102$:
175 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 245: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDIEN);
000077 A4 EF [ 1] 176 and a, #0xef
000079 C7 50 B2 [ 1] 177 ld 0x50b2, a
00007C 178 00104$:
179 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 247: }
00007C 84 [ 1] 180 pop a
00007D 81 [ 4] 181 ret
182 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 261: FlagStatus PWR_GetFlagStatus(PWR_FLAG_TypeDef PWR_FLAG)
183 ; -----------------------------------------
184 ; function PWR_GetFlagStatus
185 ; -----------------------------------------
00007E 186 _PWR_GetFlagStatus:
00007E 88 [ 1] 187 push a
188 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 268: if ((PWR_FLAG & PWR_FLAG_VREFINTF) != 0)
00007F 6B 01 [ 1] 189 ld (0x01, sp), a
000081 44 [ 1] 190 srl a
000082 24 0C [ 1] 191 jrnc 00108$
192 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 270: if ((PWR->CSR2 & PWR_CR2_VREFINTF) != (uint8_t)RESET )
000084 72 01 50 B3 04 [ 2] 193 btjf 0x50b3, #0, 00102$
194 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 272: bitstatus = SET;
000089 A6 01 [ 1] 195 ld a, #0x01
00008B 20 0E [ 2] 196 jra 00109$
00008D 197 00102$:
198 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 276: bitstatus = RESET;
00008D 4F [ 1] 199 clr a
00008E 20 0B [ 2] 200 jra 00109$
000090 201 00108$:
202 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 281: if ((PWR->CSR1 & PWR_FLAG) != (uint8_t)RESET )
000090 C6 50 B2 [ 1] 203 ld a, 0x50b2
000093 14 01 [ 1] 204 and a, (0x01, sp)
000095 27 03 [ 1] 205 jreq 00105$
206 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 283: bitstatus = SET;
000097 A6 01 [ 1] 207 ld a, #0x01
208 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 287: bitstatus = RESET;
000099 21 209 .byte 0x21
00009A 210 00105$:
00009A 4F [ 1] 211 clr a
00009B 212 00109$:
213 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 292: return((FlagStatus)bitstatus);
214 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 293: }
00009B 5B 01 [ 2] 215 addw sp, #1
00009D 81 [ 4] 216 ret
217 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 300: void PWR_PVDClearFlag(void)
218 ; -----------------------------------------
219 ; function PWR_PVDClearFlag
220 ; -----------------------------------------
00009E 221 _PWR_PVDClearFlag:
222 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 303: PWR->CSR1 |= PWR_CSR1_PVDIF;
00009E 72 1A 50 B2 [ 1] 223 bset 0x50b2, #5
224 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 304: }
0000A2 81 [ 4] 225 ret
226 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 311: ITStatus PWR_PVDGetITStatus(void)
227 ; -----------------------------------------
228 ; function PWR_PVDGetITStatus
229 ; -----------------------------------------
0000A3 230 _PWR_PVDGetITStatus:
0000A3 88 [ 1] 231 push a
232 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 317: PVD_itStatus = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIF);
0000A4 C6 50 B2 [ 1] 233 ld a, 0x50b2
0000A7 A4 20 [ 1] 234 and a, #0x20
0000A9 6B 01 [ 1] 235 ld (0x01, sp), a
236 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 318: PVD_itEnable = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIEN);
0000AB C6 50 B2 [ 1] 237 ld a, 0x50b2
0000AE A4 10 [ 1] 238 and a, #0x10
239 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 320: if ((PVD_itStatus != (uint8_t)RESET ) && (PVD_itEnable != (uint8_t)RESET))
0000B0 0D 01 [ 1] 240 tnz (0x01, sp)
0000B2 27 06 [ 1] 241 jreq 00102$
0000B4 4D [ 1] 242 tnz a
0000B5 27 03 [ 1] 243 jreq 00102$
244 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 322: bitstatus = (ITStatus)SET;
0000B7 A6 01 [ 1] 245 ld a, #0x01
246 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 326: bitstatus = (ITStatus)RESET;
0000B9 21 247 .byte 0x21
0000BA 248 00102$:
0000BA 4F [ 1] 249 clr a
0000BB 250 00103$:
251 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 328: return ((ITStatus)bitstatus);
252 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 329: }
0000BB 5B 01 [ 2] 253 addw sp, #1
0000BD 81 [ 4] 254 ret
255 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 336: void PWR_PVDClearITPendingBit(void)
256 ; -----------------------------------------
257 ; function PWR_PVDClearITPendingBit
258 ; -----------------------------------------
0000BE 259 _PWR_PVDClearITPendingBit:
260 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 339: PWR->CSR1 |= PWR_CSR1_PVDIF;
0000BE 72 1A 50 B2 [ 1] 261 bset 0x50b2, #5
262 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 340: }
0000C2 81 [ 4] 263 ret
264 .area CODE
265 .area CONST
266 .area INITIALIZER
267 .area CABS (ABS)

View File

@@ -0,0 +1,135 @@
XH3
H B areas B global symbols
M stm8l15x_pwr
S .__.ABS. Def000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size C3 flags 0 addr 0
S _PWR_PVDClearFlag Def00009E
S _PWR_PVDClearITPendingBit Def0000BE
S _PWR_UltraLowPowerCmd Def00004E
S _PWR_PVDITConfig Def000066
S _PWR_GetFlagStatus Def00007E
S _PWR_PVDGetITStatus Def0000A3
S _PWR_FastWakeUpCmd Def000036
S _PWR_PVDLevelConfig Def000009
S _PWR_DeInit Def000000
S _PWR_PVDCmd Def00001E
A CABS size 0 flags 8 addr 0
T 00 00 00
R 00 00 00 09
T 00 00 00 35 20 50 B2 35 00 50 B3 81
R 00 00 00 09
T 00 00 09
R 00 00 00 09
T 00 00 09 88 6B 01 C6 50 B2 A4 F1 C7 50 B2 C6
R 00 00 00 09
T 00 00 15 50 B2 1A 01 C7 50 B2 84 81
R 00 00 00 09
T 00 00 1E
R 00 00 00 09
T 00 00 1E 88 6B 01 C6 50 B2 0D 01 27 07 AA 01 C7
R 00 00 00 09
T 00 00 2B 50 B2 20 05
R 00 00 00 09
T 00 00 2F
R 00 00 00 09
T 00 00 2F A4 FE C7 50 B2
R 00 00 00 09
T 00 00 34
R 00 00 00 09
T 00 00 34 84 81
R 00 00 00 09
T 00 00 36
R 00 00 00 09
T 00 00 36 88 6B 01 C6 50 B3 0D 01 27 07 AA 04 C7
R 00 00 00 09
T 00 00 43 50 B3 20 05
R 00 00 00 09
T 00 00 47
R 00 00 00 09
T 00 00 47 A4 FB C7 50 B3
R 00 00 00 09
T 00 00 4C
R 00 00 00 09
T 00 00 4C 84 81
R 00 00 00 09
T 00 00 4E
R 00 00 00 09
T 00 00 4E 88 6B 01 C6 50 B3 0D 01 27 07 AA 02 C7
R 00 00 00 09
T 00 00 5B 50 B3 20 05
R 00 00 00 09
T 00 00 5F
R 00 00 00 09
T 00 00 5F A4 FD C7 50 B3
R 00 00 00 09
T 00 00 64
R 00 00 00 09
T 00 00 64 84 81
R 00 00 00 09
T 00 00 66
R 00 00 00 09
T 00 00 66 88 6B 01 C6 50 B2 0D 01 27 07 AA 10 C7
R 00 00 00 09
T 00 00 73 50 B2 20 05
R 00 00 00 09
T 00 00 77
R 00 00 00 09
T 00 00 77 A4 EF C7 50 B2
R 00 00 00 09
T 00 00 7C
R 00 00 00 09
T 00 00 7C 84 81
R 00 00 00 09
T 00 00 7E
R 00 00 00 09
T 00 00 7E 88 6B 01 44 24 0C 72 01 50 B3 04 A6 01
R 00 00 00 09
T 00 00 8B 20 0E
R 00 00 00 09
T 00 00 8D
R 00 00 00 09
T 00 00 8D 4F 20 0B
R 00 00 00 09
T 00 00 90
R 00 00 00 09
T 00 00 90 C6 50 B2 14 01 27 03 A6 01 21
R 00 00 00 09
T 00 00 9A
R 00 00 00 09
T 00 00 9A 4F
R 00 00 00 09
T 00 00 9B
R 00 00 00 09
T 00 00 9B 5B 01 81
R 00 00 00 09
T 00 00 9E
R 00 00 00 09
T 00 00 9E 72 1A 50 B2 81
R 00 00 00 09
T 00 00 A3
R 00 00 00 09
T 00 00 A3 88 C6 50 B2 A4 20 6B 01 C6 50 B2 A4 10
R 00 00 00 09
T 00 00 B0 0D 01 27 06 4D 27 03 A6 01 21
R 00 00 00 09
T 00 00 BA
R 00 00 00 09
T 00 00 BA 4F
R 00 00 00 09
T 00 00 BB
R 00 00 00 09
T 00 00 BB 5B 01 81
R 00 00 00 09
T 00 00 BE
R 00 00 00 09
T 00 00 BE 72 1A 50 B2 81
R 00 00 00 09

View File

@@ -0,0 +1,267 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_pwr
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _PWR_DeInit
11 .globl _PWR_PVDLevelConfig
12 .globl _PWR_PVDCmd
13 .globl _PWR_FastWakeUpCmd
14 .globl _PWR_UltraLowPowerCmd
15 .globl _PWR_PVDITConfig
16 .globl _PWR_GetFlagStatus
17 .globl _PWR_PVDClearFlag
18 .globl _PWR_PVDGetITStatus
19 .globl _PWR_PVDClearITPendingBit
20 ;--------------------------------------------------------
21 ; ram data
22 ;--------------------------------------------------------
23 .area DATA
24 ;--------------------------------------------------------
25 ; ram data
26 ;--------------------------------------------------------
27 .area INITIALIZED
28 ;--------------------------------------------------------
29 ; absolute external ram data
30 ;--------------------------------------------------------
31 .area DABS (ABS)
32
33 ; default segment ordering for linker
34 .area HOME
35 .area GSINIT
36 .area GSFINAL
37 .area CONST
38 .area INITIALIZER
39 .area CODE
40
41 ;--------------------------------------------------------
42 ; global & static initialisations
43 ;--------------------------------------------------------
44 .area HOME
45 .area GSINIT
46 .area GSFINAL
47 .area GSINIT
48 ;--------------------------------------------------------
49 ; Home
50 ;--------------------------------------------------------
51 .area HOME
52 .area HOME
53 ;--------------------------------------------------------
54 ; code
55 ;--------------------------------------------------------
56 .area CODE
57 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 82: void PWR_DeInit(void)
58 ; -----------------------------------------
59 ; function PWR_DeInit
60 ; -----------------------------------------
008969 61 _PWR_DeInit:
62 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 84: PWR->CSR1 = PWR_CSR1_PVDIF;
008969 35 20 50 B2 [ 1] 63 mov 0x50b2+0, #0x20
64 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 85: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
00896D 35 00 50 B3 [ 1] 65 mov 0x50b3+0, #0x00
66 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 86: }
008971 81 [ 4] 67 ret
68 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 102: void PWR_PVDLevelConfig(PWR_PVDLevel_TypeDef PWR_PVDLevel)
69 ; -----------------------------------------
70 ; function PWR_PVDLevelConfig
71 ; -----------------------------------------
008972 72 _PWR_PVDLevelConfig:
008972 88 [ 1] 73 push a
008973 6B 01 [ 1] 74 ld (0x01, sp), a
75 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 108: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PLS);
008975 C6 50 B2 [ 1] 76 ld a, 0x50b2
008978 A4 F1 [ 1] 77 and a, #0xf1
00897A C7 50 B2 [ 1] 78 ld 0x50b2, a
79 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 111: PWR->CSR1 |= PWR_PVDLevel;
00897D C6 50 B2 [ 1] 80 ld a, 0x50b2
008980 1A 01 [ 1] 81 or a, (0x01, sp)
008982 C7 50 B2 [ 1] 82 ld 0x50b2, a
83 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 113: }
008985 84 [ 1] 84 pop a
008986 81 [ 4] 85 ret
86 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 121: void PWR_PVDCmd(FunctionalState NewState)
87 ; -----------------------------------------
88 ; function PWR_PVDCmd
89 ; -----------------------------------------
008987 90 _PWR_PVDCmd:
008987 88 [ 1] 91 push a
008988 6B 01 [ 1] 92 ld (0x01, sp), a
93 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 129: PWR->CSR1 |= PWR_CSR1_PVDE;
00898A C6 50 B2 [ 1] 94 ld a, 0x50b2
95 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 126: if (NewState != DISABLE)
00898D 0D 01 [ 1] 96 tnz (0x01, sp)
00898F 27 07 [ 1] 97 jreq 00102$
98 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 129: PWR->CSR1 |= PWR_CSR1_PVDE;
008991 AA 01 [ 1] 99 or a, #0x01
008993 C7 50 B2 [ 1] 100 ld 0x50b2, a
008996 20 05 [ 2] 101 jra 00104$
008998 102 00102$:
103 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 134: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDE);
008998 A4 FE [ 1] 104 and a, #0xfe
00899A C7 50 B2 [ 1] 105 ld 0x50b2, a
00899D 106 00104$:
107 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 136: }
00899D 84 [ 1] 108 pop a
00899E 81 [ 4] 109 ret
110 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 171: void PWR_FastWakeUpCmd(FunctionalState NewState)
111 ; -----------------------------------------
112 ; function PWR_FastWakeUpCmd
113 ; -----------------------------------------
00899F 114 _PWR_FastWakeUpCmd:
00899F 88 [ 1] 115 push a
0089A0 6B 01 [ 1] 116 ld (0x01, sp), a
117 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 179: PWR->CSR2 |= PWR_CSR2_FWU;
0089A2 C6 50 B3 [ 1] 118 ld a, 0x50b3
119 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 176: if (NewState != DISABLE)
0089A5 0D 01 [ 1] 120 tnz (0x01, sp)
0089A7 27 07 [ 1] 121 jreq 00102$
122 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 179: PWR->CSR2 |= PWR_CSR2_FWU;
0089A9 AA 04 [ 1] 123 or a, #0x04
0089AB C7 50 B3 [ 1] 124 ld 0x50b3, a
0089AE 20 05 [ 2] 125 jra 00104$
0089B0 126 00102$:
127 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 184: PWR->CSR2 &= (uint8_t)(~PWR_CSR2_FWU);
0089B0 A4 FB [ 1] 128 and a, #0xfb
0089B2 C7 50 B3 [ 1] 129 ld 0x50b3, a
0089B5 130 00104$:
131 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 186: }
0089B5 84 [ 1] 132 pop a
0089B6 81 [ 4] 133 ret
134 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 194: void PWR_UltraLowPowerCmd(FunctionalState NewState)
135 ; -----------------------------------------
136 ; function PWR_UltraLowPowerCmd
137 ; -----------------------------------------
0089B7 138 _PWR_UltraLowPowerCmd:
0089B7 88 [ 1] 139 push a
0089B8 6B 01 [ 1] 140 ld (0x01, sp), a
141 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 202: PWR->CSR2 |= PWR_CSR2_ULP;
0089BA C6 50 B3 [ 1] 142 ld a, 0x50b3
143 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 199: if (NewState != DISABLE)
0089BD 0D 01 [ 1] 144 tnz (0x01, sp)
0089BF 27 07 [ 1] 145 jreq 00102$
146 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 202: PWR->CSR2 |= PWR_CSR2_ULP;
0089C1 AA 02 [ 1] 147 or a, #0x02
0089C3 C7 50 B3 [ 1] 148 ld 0x50b3, a
0089C6 20 05 [ 2] 149 jra 00104$
0089C8 150 00102$:
151 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 207: PWR->CSR2 &= (uint8_t)(~PWR_CSR2_ULP);
0089C8 A4 FD [ 1] 152 and a, #0xfd
0089CA C7 50 B3 [ 1] 153 ld 0x50b3, a
0089CD 154 00104$:
155 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 209: }
0089CD 84 [ 1] 156 pop a
0089CE 81 [ 4] 157 ret
158 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 232: void PWR_PVDITConfig(FunctionalState NewState)
159 ; -----------------------------------------
160 ; function PWR_PVDITConfig
161 ; -----------------------------------------
0089CF 162 _PWR_PVDITConfig:
0089CF 88 [ 1] 163 push a
0089D0 6B 01 [ 1] 164 ld (0x01, sp), a
165 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 240: PWR->CSR1 |= PWR_CSR1_PVDIEN;
0089D2 C6 50 B2 [ 1] 166 ld a, 0x50b2
167 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 237: if (NewState != DISABLE)
0089D5 0D 01 [ 1] 168 tnz (0x01, sp)
0089D7 27 07 [ 1] 169 jreq 00102$
170 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 240: PWR->CSR1 |= PWR_CSR1_PVDIEN;
0089D9 AA 10 [ 1] 171 or a, #0x10
0089DB C7 50 B2 [ 1] 172 ld 0x50b2, a
0089DE 20 05 [ 2] 173 jra 00104$
0089E0 174 00102$:
175 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 245: PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDIEN);
0089E0 A4 EF [ 1] 176 and a, #0xef
0089E2 C7 50 B2 [ 1] 177 ld 0x50b2, a
0089E5 178 00104$:
179 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 247: }
0089E5 84 [ 1] 180 pop a
0089E6 81 [ 4] 181 ret
182 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 261: FlagStatus PWR_GetFlagStatus(PWR_FLAG_TypeDef PWR_FLAG)
183 ; -----------------------------------------
184 ; function PWR_GetFlagStatus
185 ; -----------------------------------------
0089E7 186 _PWR_GetFlagStatus:
0089E7 88 [ 1] 187 push a
188 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 268: if ((PWR_FLAG & PWR_FLAG_VREFINTF) != 0)
0089E8 6B 01 [ 1] 189 ld (0x01, sp), a
0089EA 44 [ 1] 190 srl a
0089EB 24 0C [ 1] 191 jrnc 00108$
192 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 270: if ((PWR->CSR2 & PWR_CR2_VREFINTF) != (uint8_t)RESET )
0089ED 72 01 50 B3 04 [ 2] 193 btjf 0x50b3, #0, 00102$
194 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 272: bitstatus = SET;
0089F2 A6 01 [ 1] 195 ld a, #0x01
0089F4 20 0E [ 2] 196 jra 00109$
0089F6 197 00102$:
198 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 276: bitstatus = RESET;
0089F6 4F [ 1] 199 clr a
0089F7 20 0B [ 2] 200 jra 00109$
0089F9 201 00108$:
202 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 281: if ((PWR->CSR1 & PWR_FLAG) != (uint8_t)RESET )
0089F9 C6 50 B2 [ 1] 203 ld a, 0x50b2
0089FC 14 01 [ 1] 204 and a, (0x01, sp)
0089FE 27 03 [ 1] 205 jreq 00105$
206 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 283: bitstatus = SET;
008A00 A6 01 [ 1] 207 ld a, #0x01
208 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 287: bitstatus = RESET;
008A02 21 209 .byte 0x21
008A03 210 00105$:
008A03 4F [ 1] 211 clr a
008A04 212 00109$:
213 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 292: return((FlagStatus)bitstatus);
214 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 293: }
008A04 5B 01 [ 2] 215 addw sp, #1
008A06 81 [ 4] 216 ret
217 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 300: void PWR_PVDClearFlag(void)
218 ; -----------------------------------------
219 ; function PWR_PVDClearFlag
220 ; -----------------------------------------
008A07 221 _PWR_PVDClearFlag:
222 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 303: PWR->CSR1 |= PWR_CSR1_PVDIF;
008A07 72 1A 50 B2 [ 1] 223 bset 0x50b2, #5
224 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 304: }
008A0B 81 [ 4] 225 ret
226 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 311: ITStatus PWR_PVDGetITStatus(void)
227 ; -----------------------------------------
228 ; function PWR_PVDGetITStatus
229 ; -----------------------------------------
008A0C 230 _PWR_PVDGetITStatus:
008A0C 88 [ 1] 231 push a
232 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 317: PVD_itStatus = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIF);
008A0D C6 50 B2 [ 1] 233 ld a, 0x50b2
008A10 A4 20 [ 1] 234 and a, #0x20
008A12 6B 01 [ 1] 235 ld (0x01, sp), a
236 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 318: PVD_itEnable = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIEN);
008A14 C6 50 B2 [ 1] 237 ld a, 0x50b2
008A17 A4 10 [ 1] 238 and a, #0x10
239 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 320: if ((PVD_itStatus != (uint8_t)RESET ) && (PVD_itEnable != (uint8_t)RESET))
008A19 0D 01 [ 1] 240 tnz (0x01, sp)
008A1B 27 06 [ 1] 241 jreq 00102$
008A1D 4D [ 1] 242 tnz a
008A1E 27 03 [ 1] 243 jreq 00102$
244 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 322: bitstatus = (ITStatus)SET;
008A20 A6 01 [ 1] 245 ld a, #0x01
246 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 326: bitstatus = (ITStatus)RESET;
008A22 21 247 .byte 0x21
008A23 248 00102$:
008A23 4F [ 1] 249 clr a
008A24 250 00103$:
251 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 328: return ((ITStatus)bitstatus);
252 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 329: }
008A24 5B 01 [ 2] 253 addw sp, #1
008A26 81 [ 4] 254 ret
255 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 336: void PWR_PVDClearITPendingBit(void)
256 ; -----------------------------------------
257 ; function PWR_PVDClearITPendingBit
258 ; -----------------------------------------
008A27 259 _PWR_PVDClearITPendingBit:
260 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 339: PWR->CSR1 |= PWR_CSR1_PVDIF;
008A27 72 1A 50 B2 [ 1] 261 bset 0x50b2, #5
262 ; ../inc/stm8l151x/src/stm8l15x_pwr.c: 340: }
008A2B 81 [ 4] 263 ret
264 .area CODE
265 .area CONST
266 .area INITIALIZER
267 .area CABS (ABS)

View File

@@ -0,0 +1,38 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
9 _PWR_DeInit 000000 GR
9 _PWR_FastWakeUpCmd 000036 GR
9 _PWR_GetFlagStatus 00007E GR
9 _PWR_PVDClearFlag 00009E GR
9 _PWR_PVDClearITPendingBit 0000BE GR
9 _PWR_PVDCmd 00001E GR
9 _PWR_PVDGetITStatus 0000A3 GR
9 _PWR_PVDITConfig 000066 GR
9 _PWR_PVDLevelConfig 000009 GR
9 _PWR_UltraLowPowerCmd 00004E GR
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 DABS size 0 flags 8
4 HOME size 0 flags 0
5 GSINIT size 0 flags 0
6 GSFINAL size 0 flags 0
7 CONST size 0 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size C3 flags 0
A CABS size 0 flags 8

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -45,7 +45,7 @@
#include "stm8l15x_gpio.h"
// #include "stm8l15x_i2c.h"
// #include "stm8l15x_irtim.h"
// #include "stm8l15x_itc.h"
#include "stm8l15x_itc.h"
// #include "stm8l15x_iwdg.h"
// #include "stm8l15x_lcd.h"
// #include "stm8l15x_pwr.h"

View File

@@ -6,81 +6,88 @@
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
#define Led_Init GPIO_Init(GPIOC, GPIO_Pin_4, GPIO_Mode_Out_PP_Low_Slow)
#define Led_ON GPIO_SetBits(GPIOC, GPIO_Pin_4)
#define Led_OFF GPIO_ResetBits(GPIOC, GPIO_Pin_4)
#define Led_TOG GPIO_ToggleBits(GPIOC, GPIO_Pin_4)
// #define Led1_Init GPIO_Init(GPIOC, GPIO_Pin_4, GPIO_Mode_Out_PP_Low_Fast)
// #define Led1_ON GPIO_SetBits(GPIOC, GPIO_Pin_4)
// #define Led1_OFF GPIO_ResetBits(GPIOC, GPIO_Pin_4)
#define Led2_Init GPIO_Init(GPIOB, GPIO_Pin_2, GPIO_Mode_Out_PP_Low_Fast)
#define Led2_ON GPIO_SetBits(GPIOB, GPIO_Pin_2)
#define Led2_OFF GPIO_ResetBits(GPIOB, GPIO_Pin_2)
#define Mono_Init GPIO_Init(GPIOB, GPIO_Pin_0, GPIO_Mode_Out_PP_High_Slow)
#define Mono_OFF GPIO_SetBits(GPIOB, GPIO_Pin_0)
#define Mono_ON GPIO_ResetBits(GPIOB, GPIO_Pin_0)
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
static void CLK_Config(void);
static void USART_Config(void);
static void putchar(uint8_t Data);
static void print(const char*);
static void println(const char*);
static void blink(uint16_t);
// static ErrorStatus RTC_Config(void);
static void PWR_Config(void);
static void blink2();
/* Private functions ---------------------------------------------------------*/
void main(void)
{
// CLK_Config();
Led_Init;
blink(1);
// USART_Config();
// println("Hello");
while (1);
GPIO_Init(GPIOC, GPIO_Pin_0, GPIO_Mode_Out_PP_Low_Fast);
// Led1_Init;
// Led1_ON;
CLK_Config();
PWR_Config();
Led2_Init;
Mono_Init;
blink2();
// Led1_OFF;
CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
CLK_PeripheralClockConfig(CLK_Peripheral_RTC, ENABLE);
// RTC_RatioCmd(ENABLE);
RTC_WakeUpCmd(DISABLE);
RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
RTC_SetWakeUpCounter(250);
RTC_WakeUpCmd(ENABLE);
RTC_ITConfig(RTC_IT_WUT, ENABLE);
enableInterrupts();
while (1){
blink2();
halt();
}
}
static void PWR_Config(void){
PWR->CSR1 = PWR_CSR1_PVDIF;
PWR->CSR2 = PWR_CSR2_RESET_VALUE;
PWR->CSR2 |= PWR_CSR2_ULP;
PWR->CSR2 |= PWR_CSR2_FWU;
}
static void CLK_Config(void)
{
/* Select LSE as system clock source */
CLK_SYSCLKSourceSwitchCmd(ENABLE);
CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
/* system clock prescaler: 1*/
CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSI);
CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSI);
}
static void blink(uint16_t repeats) {
for (uint16_t i = 0; i <= repeats; i++) {
Led_ON;
for (uint16_t j = 0; j <= 4000; j++) {nop();}
Led_OFF;
for (uint16_t j = 0; j <= 4000; j++) {nop();}
// static void blink1(uint32_t time) {
// Led1_ON;
// for (uint16_t j = 0; j <= time; j++) {nop();}
// Led1_OFF;
// }
// static void blink1_alt() {
// Led1_ON;
// Led1_OFF;
// }
static void blink2() {
Mono_ON;
Led2_ON;
Led2_OFF;
Mono_OFF;
}
}
// static void putchar(uint8_t Data) {
// while (!(USART1->SR & USART_FLAG_TXE));
// USART1->DR = Data;
// }
// static void print(const char* s){
// while (*s) {
// putchar(*s++);
// }
// }
// static void println(const char* s){
// print(s);
// putchar('\n');
// }
// static void USART_Config(void)
// {
// // remap USART1 to pins 5/6 (PA2/3) (TX/RX)
// SYSCFG->RMPCR1 &= ~(0b11 << 4);
// SYSCFG->RMPCR1 |= (0b01 << 4);
// GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
// GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
// CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
// USART_Init(USART1, (uint32_t)9600,
// USART_WordLength_8b, USART_StopBits_1,
// USART_Parity_No, USART_Mode_Tx);
// USART_Cmd(USART1, ENABLE);
// }
/************************ (C) suuppl *****END OF FILE****/

View File

@@ -110,6 +110,8 @@ INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
*/
INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
{
RTC_ClearITPendingBit(RTC_IT_WUT);
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/