Files
rosaled/firmware/STM8L15X_LD/main.rst
seppl a3ccaae6cc ..
2025-06-30 20:58:09 +02:00

257 lines
17 KiB
ReStructuredText

1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module main
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _main
11 .globl _RTC_ITConfig
12 .globl _RTC_WakeUpCmd
13 .globl _RTC_SetWakeUpCounter
14 .globl _RTC_WakeUpClockConfig
15 .globl _GPIO_ResetBits
16 .globl _GPIO_SetBits
17 .globl _GPIO_Init
18 .globl _CLK_PeripheralClockConfig
19 .globl _CLK_RTCClockConfig
20 .globl _CLK_SYSCLKSourceSwitchCmd
21 .globl _CLK_SYSCLKDivConfig
22 .globl _CLK_GetSYSCLKSource
23 .globl _CLK_SYSCLKSourceConfig
24 ;--------------------------------------------------------
25 ; ram data
26 ;--------------------------------------------------------
27 .area DATA
28 ;--------------------------------------------------------
29 ; ram data
30 ;--------------------------------------------------------
31 .area INITIALIZED
32 ;--------------------------------------------------------
33 ; Stack segment in internal ram
34 ;--------------------------------------------------------
35 .area SSEG
000001 36 __start__stack:
000001 37 .ds 1
38
39 ;--------------------------------------------------------
40 ; absolute external ram data
41 ;--------------------------------------------------------
42 .area DABS (ABS)
43
44 ; default segment ordering for linker
45 .area HOME
46 .area GSINIT
47 .area GSFINAL
48 .area CONST
49 .area INITIALIZER
50 .area CODE
51
52 ;--------------------------------------------------------
53 ; interrupt vector
54 ;--------------------------------------------------------
55 .area HOME
008000 56 __interrupt_vect:
008000 82 00 80 83 57 int s_GSINIT ; reset
008004 82 00 81 51 58 int _TRAP_IRQHandler ; trap
008008 82 00 00 00 59 int 0x000000 ; int0
00800C 82 00 81 52 60 int _FLASH_IRQHandler ; int1
008010 82 00 81 53 61 int _DMA1_CHANNEL0_1_IRQHandler ; int2
008014 82 00 81 54 62 int _DMA1_CHANNEL2_3_IRQHandler ; int3
008018 82 00 81 55 63 int _RTC_CSSLSE_IRQHandler ; int4
00801C 82 00 81 5D 64 int _EXTIE_F_PVD_IRQHandler ; int5
008020 82 00 81 5E 65 int _EXTIB_G_IRQHandler ; int6
008024 82 00 81 5F 66 int _EXTID_H_IRQHandler ; int7
008028 82 00 81 60 67 int _EXTI0_IRQHandler ; int8
00802C 82 00 81 61 68 int _EXTI1_IRQHandler ; int9
008030 82 00 81 62 69 int _EXTI2_IRQHandler ; int10
008034 82 00 81 63 70 int _EXTI3_IRQHandler ; int11
008038 82 00 81 64 71 int _EXTI4_IRQHandler ; int12
00803C 82 00 81 65 72 int _EXTI5_IRQHandler ; int13
008040 82 00 81 66 73 int _EXTI6_IRQHandler ; int14
008044 82 00 81 67 74 int _EXTI7_IRQHandler ; int15
008048 82 00 81 68 75 int _LCD_AES_IRQHandler ; int16
00804C 82 00 81 69 76 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
008050 82 00 81 6A 77 int _ADC1_COMP_IRQHandler ; int18
008054 82 00 81 6B 78 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
008058 82 00 81 6C 79 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00805C 82 00 81 6D 80 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
008060 82 00 81 6E 81 int _TIM3_CC_USART3_RX_IRQHandler ; int22
008064 82 00 81 6F 82 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
008068 82 00 81 70 83 int _TIM1_CC_IRQHandler ; int24
00806C 82 00 81 71 84 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
008070 82 00 81 72 85 int _SPI1_IRQHandler ; int26
008074 82 00 81 73 86 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
008078 82 00 81 74 87 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00807C 82 00 81 75 88 int _I2C1_SPI2_IRQHandler ; int29
89 ;--------------------------------------------------------
90 ; global & static initialisations
91 ;--------------------------------------------------------
92 .area HOME
93 .area GSINIT
94 .area GSFINAL
95 .area GSINIT
008083 CD 8F 2B [ 4] 96 call ___sdcc_external_startup
008086 4D [ 1] 97 tnz a
008087 27 03 [ 1] 98 jreq __sdcc_init_data
008089 CC 80 80 [ 2] 99 jp __sdcc_program_startup
00808C 100 __sdcc_init_data:
101 ; stm8_genXINIT() start
00808C AE 00 00 [ 2] 102 ldw x, #l_DATA
00808F 27 07 [ 1] 103 jreq 00002$
008091 104 00001$:
008091 72 4F 00 00 [ 1] 105 clr (s_DATA - 1, x)
008095 5A [ 2] 106 decw x
008096 26 F9 [ 1] 107 jrne 00001$
008098 108 00002$:
008098 AE 00 00 [ 2] 109 ldw x, #l_INITIALIZER
00809B 27 09 [ 1] 110 jreq 00004$
00809D 111 00003$:
00809D D6 80 AD [ 1] 112 ld a, (s_INITIALIZER - 1, x)
0080A0 D7 00 00 [ 1] 113 ld (s_INITIALIZED - 1, x), a
0080A3 5A [ 2] 114 decw x
0080A4 26 F7 [ 1] 115 jrne 00003$
0080A6 116 00004$:
117 ; stm8_genXINIT() end
118 .area GSFINAL
0080A6 CC 80 80 [ 2] 119 jp __sdcc_program_startup
120 ;--------------------------------------------------------
121 ; Home
122 ;--------------------------------------------------------
123 .area HOME
124 .area HOME
008080 125 __sdcc_program_startup:
008080 CC 80 AE [ 2] 126 jp _main
127 ; return from main will return to caller
128 ;--------------------------------------------------------
129 ; code
130 ;--------------------------------------------------------
131 .area CODE
132 ; ../src/main.c: 28: void main(void)
133 ; -----------------------------------------
134 ; function main
135 ; -----------------------------------------
0080AE 136 _main:
137 ; ../src/main.c: 30: GPIO_Init(GPIOB, GPIO_Pin_2, GPIO_Mode_Out_PP_Low_Fast);
0080AE 4B E0 [ 1] 138 push #0xe0
0080B0 A6 04 [ 1] 139 ld a, #0x04
0080B2 AE 50 05 [ 2] 140 ldw x, #0x5005
0080B5 CD 84 9C [ 4] 141 call _GPIO_Init
142 ; ../src/main.c: 33: CLK_Config();
0080B8 CD 81 18 [ 4] 143 call _CLK_Config
144 ; ../src/main.c: 34: PWR_Config();
0080BB CD 81 07 [ 4] 145 call _PWR_Config
146 ; ../src/main.c: 35: Led2_Init;
0080BE 4B E0 [ 1] 147 push #0xe0
0080C0 A6 04 [ 1] 148 ld a, #0x04
0080C2 AE 50 05 [ 2] 149 ldw x, #0x5005
0080C5 CD 84 9C [ 4] 150 call _GPIO_Init
151 ; ../src/main.c: 36: Mono_Init;
0080C8 4B D0 [ 1] 152 push #0xd0
0080CA A6 01 [ 1] 153 ld a, #0x01
0080CC AE 50 05 [ 2] 154 ldw x, #0x5005
0080CF CD 84 9C [ 4] 155 call _GPIO_Init
156 ; ../src/main.c: 37: blink2();
0080D2 CD 81 31 [ 4] 157 call _blink2
158 ; ../src/main.c: 41: CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
0080D5 4B 00 [ 1] 159 push #0x00
0080D7 A6 10 [ 1] 160 ld a, #0x10
0080D9 CD 82 B9 [ 4] 161 call _CLK_RTCClockConfig
162 ; ../src/main.c: 42: CLK_PeripheralClockConfig(CLK_Peripheral_RTC, ENABLE);
0080DC 4B 01 [ 1] 163 push #0x01
0080DE A6 12 [ 1] 164 ld a, #0x12
0080E0 CD 82 C5 [ 4] 165 call _CLK_PeripheralClockConfig
166 ; ../src/main.c: 45: RTC_WakeUpCmd(DISABLE);
0080E3 4F [ 1] 167 clr a
0080E4 CD 8B F4 [ 4] 168 call _RTC_WakeUpCmd
169 ; ../src/main.c: 46: RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
0080E7 A6 03 [ 1] 170 ld a, #0x03
0080E9 CD 8B AC [ 4] 171 call _RTC_WakeUpClockConfig
172 ; ../src/main.c: 47: RTC_SetWakeUpCounter(250);
0080EC AE 00 FA [ 2] 173 ldw x, #0x00fa
0080EF CD 8B D1 [ 4] 174 call _RTC_SetWakeUpCounter
175 ; ../src/main.c: 48: RTC_WakeUpCmd(ENABLE);
0080F2 A6 01 [ 1] 176 ld a, #0x01
0080F4 CD 8B F4 [ 4] 177 call _RTC_WakeUpCmd
178 ; ../src/main.c: 50: RTC_ITConfig(RTC_IT_WUT, ENABLE);
0080F7 A6 01 [ 1] 179 ld a, #0x01
0080F9 AE 00 40 [ 2] 180 ldw x, #0x0040
0080FC CD 8E 02 [ 4] 181 call _RTC_ITConfig
182 ; ../src/main.c: 52: enableInterrupts();
0080FF 9A [ 1] 183 rim
184 ; ../src/main.c: 53: while (1){
008100 185 00102$:
186 ; ../src/main.c: 54: blink2();
008100 CD 81 31 [ 4] 187 call _blink2
188 ; ../src/main.c: 55: halt();
008103 8E [10] 189 halt
008104 20 FA [ 2] 190 jra 00102$
191 ; ../src/main.c: 57: }
008106 81 [ 4] 192 ret
193 ; ../src/main.c: 59: static void PWR_Config(void){
194 ; -----------------------------------------
195 ; function PWR_Config
196 ; -----------------------------------------
008107 197 _PWR_Config:
198 ; ../src/main.c: 60: PWR->CSR1 = PWR_CSR1_PVDIF;
008107 35 20 50 B2 [ 1] 199 mov 0x50b2+0, #0x20
200 ; ../src/main.c: 61: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
00810B 35 00 50 B3 [ 1] 201 mov 0x50b3+0, #0x00
202 ; ../src/main.c: 62: PWR->CSR2 |= PWR_CSR2_ULP;
00810F 72 12 50 B3 [ 1] 203 bset 0x50b3, #1
204 ; ../src/main.c: 63: PWR->CSR2 |= PWR_CSR2_FWU;
008113 72 14 50 B3 [ 1] 205 bset 0x50b3, #2
206 ; ../src/main.c: 64: }
008117 81 [ 4] 207 ret
208 ; ../src/main.c: 66: static void CLK_Config(void)
209 ; -----------------------------------------
210 ; function CLK_Config
211 ; -----------------------------------------
008118 212 _CLK_Config:
213 ; ../src/main.c: 68: CLK_SYSCLKSourceSwitchCmd(ENABLE);
008118 A6 01 [ 1] 214 ld a, #0x01
00811A CD 82 A1 [ 4] 215 call _CLK_SYSCLKSourceSwitchCmd
216 ; ../src/main.c: 69: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSI);
00811D A6 02 [ 1] 217 ld a, #0x02
00811F CD 82 42 [ 4] 218 call _CLK_SYSCLKSourceConfig
219 ; ../src/main.c: 70: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
008122 4F [ 1] 220 clr a
008123 CD 82 9D [ 4] 221 call _CLK_SYSCLKDivConfig
222 ; ../src/main.c: 71: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSI);
008126 223 00101$:
008126 CD 82 46 [ 4] 224 call _CLK_GetSYSCLKSource
008129 A1 02 [ 1] 225 cp a, #0x02
00812B 26 F9 [ 1] 226 jrne 00101$
00812D 81 [ 4] 227 ret
00812E 20 F6 [ 2] 228 jra 00101$
229 ; ../src/main.c: 72: }
008130 81 [ 4] 230 ret
231 ; ../src/main.c: 85: static void blink2() {
232 ; -----------------------------------------
233 ; function blink2
234 ; -----------------------------------------
008131 235 _blink2:
236 ; ../src/main.c: 86: Mono_ON;
008131 A6 01 [ 1] 237 ld a, #0x01
008133 AE 50 05 [ 2] 238 ldw x, #0x5005
008136 CD 85 53 [ 4] 239 call _GPIO_ResetBits
240 ; ../src/main.c: 87: Led2_ON;
008139 A6 04 [ 1] 241 ld a, #0x04
00813B AE 50 05 [ 2] 242 ldw x, #0x5005
00813E CD 85 4A [ 4] 243 call _GPIO_SetBits
244 ; ../src/main.c: 88: Led2_OFF;
008141 A6 04 [ 1] 245 ld a, #0x04
008143 AE 50 05 [ 2] 246 ldw x, #0x5005
008146 CD 85 53 [ 4] 247 call _GPIO_ResetBits
248 ; ../src/main.c: 89: Mono_OFF;
008149 A6 01 [ 1] 249 ld a, #0x01
00814B AE 50 05 [ 2] 250 ldw x, #0x5005
251 ; ../src/main.c: 90: }
00814E CC 85 4A [ 2] 252 jp _GPIO_SetBits
253 .area CODE
254 .area CONST
255 .area INITIALIZER
256 .area CABS (ABS)