This commit is contained in:
seppl
2025-06-30 20:58:09 +02:00
parent 012355c2e8
commit a3ccaae6cc
33 changed files with 6652 additions and 4418 deletions

View File

@@ -8,317 +8,249 @@
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _main
11 .globl _USART_Cmd
12 .globl _USART_Init
13 .globl _GPIO_ResetBits
14 .globl _GPIO_SetBits
15 .globl _GPIO_Init
16 .globl _CLK_PeripheralClockConfig
17 .globl _CLK_SYSCLKSourceSwitchCmd
18 .globl _CLK_SYSCLKDivConfig
19 .globl _CLK_GetSYSCLKSource
20 .globl _CLK_SYSCLKSourceConfig
21 ;--------------------------------------------------------
22 ; ram data
23 ;--------------------------------------------------------
24 .area DATA
25 ;--------------------------------------------------------
26 ; ram data
27 ;--------------------------------------------------------
28 .area INITIALIZED
29 ;--------------------------------------------------------
30 ; Stack segment in internal ram
31 ;--------------------------------------------------------
32 .area SSEG
000001 33 __start__stack:
000001 34 .ds 1
35
36 ;--------------------------------------------------------
37 ; absolute external ram data
38 ;--------------------------------------------------------
39 .area DABS (ABS)
40
41 ; default segment ordering for linker
42 .area HOME
43 .area GSINIT
44 .area GSFINAL
45 .area CONST
46 .area INITIALIZER
47 .area CODE
48
49 ;--------------------------------------------------------
50 ; interrupt vector
51 ;--------------------------------------------------------
52 .area HOME
008000 53 __interrupt_vect:
008000 82 00 80 83 54 int s_GSINIT ; reset
008004 82 00 81 8F 55 int _TRAP_IRQHandler ; trap
008008 82 00 00 00 56 int 0x000000 ; int0
00800C 82 00 81 90 57 int _FLASH_IRQHandler ; int1
008010 82 00 81 91 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
008014 82 00 81 92 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
008018 82 00 81 93 60 int _RTC_CSSLSE_IRQHandler ; int4
00801C 82 00 81 94 61 int _EXTIE_F_PVD_IRQHandler ; int5
008020 82 00 81 95 62 int _EXTIB_G_IRQHandler ; int6
008024 82 00 81 96 63 int _EXTID_H_IRQHandler ; int7
008028 82 00 81 97 64 int _EXTI0_IRQHandler ; int8
00802C 82 00 81 98 65 int _EXTI1_IRQHandler ; int9
008030 82 00 81 99 66 int _EXTI2_IRQHandler ; int10
008034 82 00 81 9A 67 int _EXTI3_IRQHandler ; int11
008038 82 00 81 9B 68 int _EXTI4_IRQHandler ; int12
00803C 82 00 81 9C 69 int _EXTI5_IRQHandler ; int13
008040 82 00 81 9D 70 int _EXTI6_IRQHandler ; int14
008044 82 00 81 9E 71 int _EXTI7_IRQHandler ; int15
008048 82 00 81 9F 72 int _LCD_AES_IRQHandler ; int16
00804C 82 00 81 A0 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
008050 82 00 81 A1 74 int _ADC1_COMP_IRQHandler ; int18
008054 82 00 81 A2 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
008058 82 00 81 A3 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00805C 82 00 81 A4 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
008060 82 00 81 A5 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
008064 82 00 81 A6 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
008068 82 00 81 A7 80 int _TIM1_CC_IRQHandler ; int24
00806C 82 00 81 A8 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
008070 82 00 81 A9 82 int _SPI1_IRQHandler ; int26
008074 82 00 81 AA 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
008078 82 00 81 AB 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00807C 82 00 81 AC 85 int _I2C1_SPI2_IRQHandler ; int29
86 ;--------------------------------------------------------
87 ; global & static initialisations
88 ;--------------------------------------------------------
89 .area HOME
90 .area GSINIT
91 .area GSFINAL
92 .area GSINIT
008083 CD 92 B7 [ 4] 93 call ___sdcc_external_startup
008086 4D [ 1] 94 tnz a
008087 27 03 [ 1] 95 jreq __sdcc_init_data
008089 CC 80 80 [ 2] 96 jp __sdcc_program_startup
00808C 97 __sdcc_init_data:
98 ; stm8_genXINIT() start
00808C AE 00 00 [ 2] 99 ldw x, #l_DATA
00808F 27 07 [ 1] 100 jreq 00002$
008091 101 00001$:
008091 72 4F 00 00 [ 1] 102 clr (s_DATA - 1, x)
008095 5A [ 2] 103 decw x
008096 26 F9 [ 1] 104 jrne 00001$
008098 105 00002$:
008098 AE 00 00 [ 2] 106 ldw x, #l_INITIALIZER
00809B 27 09 [ 1] 107 jreq 00004$
00809D 108 00003$:
00809D D6 80 B3 [ 1] 109 ld a, (s_INITIALIZER - 1, x)
0080A0 D7 00 00 [ 1] 110 ld (s_INITIALIZED - 1, x), a
0080A3 5A [ 2] 111 decw x
0080A4 26 F7 [ 1] 112 jrne 00003$
0080A6 113 00004$:
114 ; stm8_genXINIT() end
115 .area GSFINAL
0080A6 CC 80 80 [ 2] 116 jp __sdcc_program_startup
117 ;--------------------------------------------------------
118 ; Home
119 ;--------------------------------------------------------
120 .area HOME
121 .area HOME
008080 122 __sdcc_program_startup:
008080 CC 80 B4 [ 2] 123 jp _main
124 ; return from main will return to caller
125 ;--------------------------------------------------------
126 ; code
127 ;--------------------------------------------------------
128 .area CODE
129 ; ../src/main.c: 24: void main(void)
130 ; -----------------------------------------
131 ; function main
132 ; -----------------------------------------
0080B4 133 _main:
134 ; ../src/main.c: 27: Led_Init;
0080B4 4B C0 [ 1] 135 push #0xc0
0080B6 A6 10 [ 1] 136 ld a, #0x10
0080B8 AE 50 0A [ 2] 137 ldw x, #0x500a
0080BB CD 88 28 [ 4] 138 call _GPIO_Init
139 ; ../src/main.c: 28: blink(1);
0080BE 5F [ 1] 140 clrw x
0080BF 5C [ 1] 141 incw x
0080C0 CD 80 E8 [ 4] 142 call _blink
143 ; ../src/main.c: 29: USART_Config();
0080C3 CD 81 4C [ 4] 144 call _USART_Config
145 ; ../src/main.c: 30: println("Hello");
0080C6 AE 80 A9 [ 2] 146 ldw x, #(___str_0+0)
0080C9 CD 81 44 [ 4] 147 call _println
148 ; ../src/main.c: 31: while (1);
0080CC 149 00102$:
0080CC 20 FE [ 2] 150 jra 00102$
151 ; ../src/main.c: 32: }
0080CE 81 [ 4] 152 ret
153 ; ../src/main.c: 34: static void CLK_Config(void)
154 ; -----------------------------------------
155 ; function CLK_Config
156 ; -----------------------------------------
0080CF 157 _CLK_Config:
158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
0080CF A6 01 [ 1] 159 ld a, #0x01
0080D1 CD 86 2D [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
0080D4 A6 08 [ 1] 162 ld a, #0x08
0080D6 CD 85 CE [ 4] 163 call _CLK_SYSCLKSourceConfig
164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
0080D9 4F [ 1] 165 clr a
0080DA CD 86 29 [ 4] 166 call _CLK_SYSCLKDivConfig
167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
0080DD 168 00101$:
0080DD CD 85 D2 [ 4] 169 call _CLK_GetSYSCLKSource
0080E0 A1 08 [ 1] 170 cp a, #0x08
0080E2 26 F9 [ 1] 171 jrne 00101$
0080E4 81 [ 4] 172 ret
0080E5 20 F6 [ 2] 173 jra 00101$
174 ; ../src/main.c: 42: }
0080E7 81 [ 4] 175 ret
176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
177 ; -----------------------------------------
178 ; function blink
179 ; -----------------------------------------
0080E8 180 _blink:
0080E8 52 04 [ 2] 181 sub sp, #4
0080EA 1F 01 [ 2] 182 ldw (0x01, sp), x
183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
0080EC 5F [ 1] 184 clrw x
0080ED 1F 03 [ 2] 185 ldw (0x03, sp), x
0080EF 186 00111$:
0080EF 1E 03 [ 2] 187 ldw x, (0x03, sp)
0080F1 13 01 [ 2] 188 cpw x, (0x01, sp)
0080F3 22 31 [ 1] 189 jrugt 00113$
190 ; ../src/main.c: 46: Led_ON;
0080F5 A6 10 [ 1] 191 ld a, #0x10
0080F7 AE 50 0A [ 2] 192 ldw x, #0x500a
0080FA CD 88 D6 [ 4] 193 call _GPIO_SetBits
194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
0080FD 5F [ 1] 195 clrw x
0080FE 196 00105$:
0080FE 90 93 [ 1] 197 ldw y, x
008100 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
008104 22 04 [ 1] 199 jrugt 00101$
008106 9D [ 1] 200 nop
008107 5C [ 1] 201 incw x
008108 20 F4 [ 2] 202 jra 00105$
00810A 203 00101$:
204 ; ../src/main.c: 48: Led_OFF;
00810A A6 10 [ 1] 205 ld a, #0x10
00810C AE 50 0A [ 2] 206 ldw x, #0x500a
00810F CD 88 DF [ 4] 207 call _GPIO_ResetBits
208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
008112 5F [ 1] 209 clrw x
008113 210 00108$:
008113 90 93 [ 1] 211 ldw y, x
008115 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
008119 22 04 [ 1] 213 jrugt 00112$
00811B 9D [ 1] 214 nop
00811C 5C [ 1] 215 incw x
00811D 20 F4 [ 2] 216 jra 00108$
00811F 217 00112$:
218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
00811F 1E 03 [ 2] 219 ldw x, (0x03, sp)
008121 5C [ 1] 220 incw x
008122 1F 03 [ 2] 221 ldw (0x03, sp), x
008124 20 C9 [ 2] 222 jra 00111$
008126 223 00113$:
224 ; ../src/main.c: 51: }
008126 5B 04 [ 2] 225 addw sp, #4
008128 81 [ 4] 226 ret
227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
228 ; -----------------------------------------
229 ; function putchar
230 ; -----------------------------------------
008129 231 _putchar:
232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
008129 233 00101$:
008129 AE 52 30 [ 2] 234 ldw x, #0x5230
00812C 88 [ 1] 235 push a
00812D F6 [ 1] 236 ld a, (x)
00812E 95 [ 1] 237 ld xh, a
00812F 84 [ 1] 238 pop a
008130 5D [ 2] 239 tnzw x
008131 2A F6 [ 1] 240 jrpl 00101$
241 ; ../src/main.c: 55: USART1->DR = Data;
008133 C7 52 31 [ 1] 242 ld 0x5231, a
243 ; ../src/main.c: 56: }
008136 81 [ 4] 244 ret
245 ; ../src/main.c: 58: static void print(const char* s){
246 ; -----------------------------------------
247 ; function print
248 ; -----------------------------------------
008137 249 _print:
250 ; ../src/main.c: 59: while (*s) {
008137 251 00101$:
008137 F6 [ 1] 252 ld a, (x)
008138 26 01 [ 1] 253 jrne 00121$
00813A 81 [ 4] 254 ret
00813B 255 00121$:
256 ; ../src/main.c: 60: putchar(*s++);
00813B 5C [ 1] 257 incw x
00813C 89 [ 2] 258 pushw x
00813D CD 81 29 [ 4] 259 call _putchar
008140 85 [ 2] 260 popw x
008141 20 F4 [ 2] 261 jra 00101$
262 ; ../src/main.c: 62: }
008143 81 [ 4] 263 ret
264 ; ../src/main.c: 64: static void println(const char* s){
265 ; -----------------------------------------
266 ; function println
267 ; -----------------------------------------
008144 268 _println:
269 ; ../src/main.c: 65: print(s);
008144 CD 81 37 [ 4] 270 call _print
271 ; ../src/main.c: 66: putchar('\n');
008147 A6 0A [ 1] 272 ld a, #0x0a
273 ; ../src/main.c: 67: }
008149 CC 81 29 [ 2] 274 jp _putchar
275 ; ../src/main.c: 69: static void USART_Config(void)
276 ; -----------------------------------------
277 ; function USART_Config
278 ; -----------------------------------------
00814C 279 _USART_Config:
280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
00814C C6 50 9E [ 1] 281 ld a, 0x509e
00814F A4 CF [ 1] 282 and a, #0xcf
008151 C7 50 9E [ 1] 283 ld 0x509e, a
284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
008154 72 18 50 9E [ 1] 285 bset 0x509e, #4
286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
008158 4B F0 [ 1] 287 push #0xf0
00815A A6 04 [ 1] 288 ld a, #0x04
00815C AE 50 00 [ 2] 289 ldw x, #0x5000
00815F CD 88 28 [ 4] 290 call _GPIO_Init
291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
008162 4B 00 [ 1] 292 push #0x00
008164 A6 08 [ 1] 293 ld a, #0x08
008166 AE 50 00 [ 2] 294 ldw x, #0x5000
008169 CD 88 28 [ 4] 295 call _GPIO_Init
296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
00816C 4B 01 [ 1] 297 push #0x01
00816E A6 05 [ 1] 298 ld a, #0x05
008170 CD 86 51 [ 4] 299 call _CLK_PeripheralClockConfig
300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
008173 4B 08 [ 1] 301 push #0x08
008175 4B 00 [ 1] 302 push #0x00
008177 4B 00 [ 1] 303 push #0x00
008179 4B 00 [ 1] 304 push #0x00
00817B 4B 80 [ 1] 305 push #0x80
00817D 4B 25 [ 1] 306 push #0x25
00817F 5F [ 1] 307 clrw x
008180 89 [ 2] 308 pushw x
008181 AE 52 30 [ 2] 309 ldw x, #0x5230
008184 CD 81 C4 [ 4] 310 call _USART_Init
311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
008187 A6 01 [ 1] 312 ld a, #0x01
008189 AE 52 30 [ 2] 313 ldw x, #0x5230
314 ; ../src/main.c: 84: }
00818C CC 82 7B [ 2] 315 jp _USART_Cmd
316 .area CODE
317 .area CONST
318 .area CONST
0080A9 319 ___str_0:
0080A9 48 65 6C 6C 6F 320 .ascii "Hello"
0080AE 00 321 .db 0x00
322 .area CODE
323 .area INITIALIZER
324 .area CABS (ABS)
11 .globl _RTC_ITConfig
12 .globl _RTC_WakeUpCmd
13 .globl _RTC_SetWakeUpCounter
14 .globl _RTC_WakeUpClockConfig
15 .globl _GPIO_ResetBits
16 .globl _GPIO_SetBits
17 .globl _GPIO_Init
18 .globl _CLK_PeripheralClockConfig
19 .globl _CLK_RTCClockConfig
20 .globl _CLK_SYSCLKSourceSwitchCmd
21 .globl _CLK_SYSCLKDivConfig
22 .globl _CLK_GetSYSCLKSource
23 .globl _CLK_SYSCLKSourceConfig
24 ;--------------------------------------------------------
25 ; ram data
26 ;--------------------------------------------------------
27 .area DATA
28 ;--------------------------------------------------------
29 ; ram data
30 ;--------------------------------------------------------
31 .area INITIALIZED
32 ;--------------------------------------------------------
33 ; Stack segment in internal ram
34 ;--------------------------------------------------------
35 .area SSEG
000001 36 __start__stack:
000001 37 .ds 1
38
39 ;--------------------------------------------------------
40 ; absolute external ram data
41 ;--------------------------------------------------------
42 .area DABS (ABS)
43
44 ; default segment ordering for linker
45 .area HOME
46 .area GSINIT
47 .area GSFINAL
48 .area CONST
49 .area INITIALIZER
50 .area CODE
51
52 ;--------------------------------------------------------
53 ; interrupt vector
54 ;--------------------------------------------------------
55 .area HOME
008000 56 __interrupt_vect:
008000 82 00 80 83 57 int s_GSINIT ; reset
008004 82 00 81 51 58 int _TRAP_IRQHandler ; trap
008008 82 00 00 00 59 int 0x000000 ; int0
00800C 82 00 81 52 60 int _FLASH_IRQHandler ; int1
008010 82 00 81 53 61 int _DMA1_CHANNEL0_1_IRQHandler ; int2
008014 82 00 81 54 62 int _DMA1_CHANNEL2_3_IRQHandler ; int3
008018 82 00 81 55 63 int _RTC_CSSLSE_IRQHandler ; int4
00801C 82 00 81 5D 64 int _EXTIE_F_PVD_IRQHandler ; int5
008020 82 00 81 5E 65 int _EXTIB_G_IRQHandler ; int6
008024 82 00 81 5F 66 int _EXTID_H_IRQHandler ; int7
008028 82 00 81 60 67 int _EXTI0_IRQHandler ; int8
00802C 82 00 81 61 68 int _EXTI1_IRQHandler ; int9
008030 82 00 81 62 69 int _EXTI2_IRQHandler ; int10
008034 82 00 81 63 70 int _EXTI3_IRQHandler ; int11
008038 82 00 81 64 71 int _EXTI4_IRQHandler ; int12
00803C 82 00 81 65 72 int _EXTI5_IRQHandler ; int13
008040 82 00 81 66 73 int _EXTI6_IRQHandler ; int14
008044 82 00 81 67 74 int _EXTI7_IRQHandler ; int15
008048 82 00 81 68 75 int _LCD_AES_IRQHandler ; int16
00804C 82 00 81 69 76 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
008050 82 00 81 6A 77 int _ADC1_COMP_IRQHandler ; int18
008054 82 00 81 6B 78 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
008058 82 00 81 6C 79 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00805C 82 00 81 6D 80 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
008060 82 00 81 6E 81 int _TIM3_CC_USART3_RX_IRQHandler ; int22
008064 82 00 81 6F 82 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
008068 82 00 81 70 83 int _TIM1_CC_IRQHandler ; int24
00806C 82 00 81 71 84 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
008070 82 00 81 72 85 int _SPI1_IRQHandler ; int26
008074 82 00 81 73 86 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
008078 82 00 81 74 87 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00807C 82 00 81 75 88 int _I2C1_SPI2_IRQHandler ; int29
89 ;--------------------------------------------------------
90 ; global & static initialisations
91 ;--------------------------------------------------------
92 .area HOME
93 .area GSINIT
94 .area GSFINAL
95 .area GSINIT
008083 CD 8F 2B [ 4] 96 call ___sdcc_external_startup
008086 4D [ 1] 97 tnz a
008087 27 03 [ 1] 98 jreq __sdcc_init_data
008089 CC 80 80 [ 2] 99 jp __sdcc_program_startup
00808C 100 __sdcc_init_data:
101 ; stm8_genXINIT() start
00808C AE 00 00 [ 2] 102 ldw x, #l_DATA
00808F 27 07 [ 1] 103 jreq 00002$
008091 104 00001$:
008091 72 4F 00 00 [ 1] 105 clr (s_DATA - 1, x)
008095 5A [ 2] 106 decw x
008096 26 F9 [ 1] 107 jrne 00001$
008098 108 00002$:
008098 AE 00 00 [ 2] 109 ldw x, #l_INITIALIZER
00809B 27 09 [ 1] 110 jreq 00004$
00809D 111 00003$:
00809D D6 80 AD [ 1] 112 ld a, (s_INITIALIZER - 1, x)
0080A0 D7 00 00 [ 1] 113 ld (s_INITIALIZED - 1, x), a
0080A3 5A [ 2] 114 decw x
0080A4 26 F7 [ 1] 115 jrne 00003$
0080A6 116 00004$:
117 ; stm8_genXINIT() end
118 .area GSFINAL
0080A6 CC 80 80 [ 2] 119 jp __sdcc_program_startup
120 ;--------------------------------------------------------
121 ; Home
122 ;--------------------------------------------------------
123 .area HOME
124 .area HOME
008080 125 __sdcc_program_startup:
008080 CC 80 AE [ 2] 126 jp _main
127 ; return from main will return to caller
128 ;--------------------------------------------------------
129 ; code
130 ;--------------------------------------------------------
131 .area CODE
132 ; ../src/main.c: 28: void main(void)
133 ; -----------------------------------------
134 ; function main
135 ; -----------------------------------------
0080AE 136 _main:
137 ; ../src/main.c: 30: GPIO_Init(GPIOB, GPIO_Pin_2, GPIO_Mode_Out_PP_Low_Fast);
0080AE 4B E0 [ 1] 138 push #0xe0
0080B0 A6 04 [ 1] 139 ld a, #0x04
0080B2 AE 50 05 [ 2] 140 ldw x, #0x5005
0080B5 CD 84 9C [ 4] 141 call _GPIO_Init
142 ; ../src/main.c: 33: CLK_Config();
0080B8 CD 81 18 [ 4] 143 call _CLK_Config
144 ; ../src/main.c: 34: PWR_Config();
0080BB CD 81 07 [ 4] 145 call _PWR_Config
146 ; ../src/main.c: 35: Led2_Init;
0080BE 4B E0 [ 1] 147 push #0xe0
0080C0 A6 04 [ 1] 148 ld a, #0x04
0080C2 AE 50 05 [ 2] 149 ldw x, #0x5005
0080C5 CD 84 9C [ 4] 150 call _GPIO_Init
151 ; ../src/main.c: 36: Mono_Init;
0080C8 4B D0 [ 1] 152 push #0xd0
0080CA A6 01 [ 1] 153 ld a, #0x01
0080CC AE 50 05 [ 2] 154 ldw x, #0x5005
0080CF CD 84 9C [ 4] 155 call _GPIO_Init
156 ; ../src/main.c: 37: blink2();
0080D2 CD 81 31 [ 4] 157 call _blink2
158 ; ../src/main.c: 41: CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
0080D5 4B 00 [ 1] 159 push #0x00
0080D7 A6 10 [ 1] 160 ld a, #0x10
0080D9 CD 82 B9 [ 4] 161 call _CLK_RTCClockConfig
162 ; ../src/main.c: 42: CLK_PeripheralClockConfig(CLK_Peripheral_RTC, ENABLE);
0080DC 4B 01 [ 1] 163 push #0x01
0080DE A6 12 [ 1] 164 ld a, #0x12
0080E0 CD 82 C5 [ 4] 165 call _CLK_PeripheralClockConfig
166 ; ../src/main.c: 45: RTC_WakeUpCmd(DISABLE);
0080E3 4F [ 1] 167 clr a
0080E4 CD 8B F4 [ 4] 168 call _RTC_WakeUpCmd
169 ; ../src/main.c: 46: RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
0080E7 A6 03 [ 1] 170 ld a, #0x03
0080E9 CD 8B AC [ 4] 171 call _RTC_WakeUpClockConfig
172 ; ../src/main.c: 47: RTC_SetWakeUpCounter(250);
0080EC AE 00 FA [ 2] 173 ldw x, #0x00fa
0080EF CD 8B D1 [ 4] 174 call _RTC_SetWakeUpCounter
175 ; ../src/main.c: 48: RTC_WakeUpCmd(ENABLE);
0080F2 A6 01 [ 1] 176 ld a, #0x01
0080F4 CD 8B F4 [ 4] 177 call _RTC_WakeUpCmd
178 ; ../src/main.c: 50: RTC_ITConfig(RTC_IT_WUT, ENABLE);
0080F7 A6 01 [ 1] 179 ld a, #0x01
0080F9 AE 00 40 [ 2] 180 ldw x, #0x0040
0080FC CD 8E 02 [ 4] 181 call _RTC_ITConfig
182 ; ../src/main.c: 52: enableInterrupts();
0080FF 9A [ 1] 183 rim
184 ; ../src/main.c: 53: while (1){
008100 185 00102$:
186 ; ../src/main.c: 54: blink2();
008100 CD 81 31 [ 4] 187 call _blink2
188 ; ../src/main.c: 55: halt();
008103 8E [10] 189 halt
008104 20 FA [ 2] 190 jra 00102$
191 ; ../src/main.c: 57: }
008106 81 [ 4] 192 ret
193 ; ../src/main.c: 59: static void PWR_Config(void){
194 ; -----------------------------------------
195 ; function PWR_Config
196 ; -----------------------------------------
008107 197 _PWR_Config:
198 ; ../src/main.c: 60: PWR->CSR1 = PWR_CSR1_PVDIF;
008107 35 20 50 B2 [ 1] 199 mov 0x50b2+0, #0x20
200 ; ../src/main.c: 61: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
00810B 35 00 50 B3 [ 1] 201 mov 0x50b3+0, #0x00
202 ; ../src/main.c: 62: PWR->CSR2 |= PWR_CSR2_ULP;
00810F 72 12 50 B3 [ 1] 203 bset 0x50b3, #1
204 ; ../src/main.c: 63: PWR->CSR2 |= PWR_CSR2_FWU;
008113 72 14 50 B3 [ 1] 205 bset 0x50b3, #2
206 ; ../src/main.c: 64: }
008117 81 [ 4] 207 ret
208 ; ../src/main.c: 66: static void CLK_Config(void)
209 ; -----------------------------------------
210 ; function CLK_Config
211 ; -----------------------------------------
008118 212 _CLK_Config:
213 ; ../src/main.c: 68: CLK_SYSCLKSourceSwitchCmd(ENABLE);
008118 A6 01 [ 1] 214 ld a, #0x01
00811A CD 82 A1 [ 4] 215 call _CLK_SYSCLKSourceSwitchCmd
216 ; ../src/main.c: 69: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSI);
00811D A6 02 [ 1] 217 ld a, #0x02
00811F CD 82 42 [ 4] 218 call _CLK_SYSCLKSourceConfig
219 ; ../src/main.c: 70: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
008122 4F [ 1] 220 clr a
008123 CD 82 9D [ 4] 221 call _CLK_SYSCLKDivConfig
222 ; ../src/main.c: 71: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSI);
008126 223 00101$:
008126 CD 82 46 [ 4] 224 call _CLK_GetSYSCLKSource
008129 A1 02 [ 1] 225 cp a, #0x02
00812B 26 F9 [ 1] 226 jrne 00101$
00812D 81 [ 4] 227 ret
00812E 20 F6 [ 2] 228 jra 00101$
229 ; ../src/main.c: 72: }
008130 81 [ 4] 230 ret
231 ; ../src/main.c: 85: static void blink2() {
232 ; -----------------------------------------
233 ; function blink2
234 ; -----------------------------------------
008131 235 _blink2:
236 ; ../src/main.c: 86: Mono_ON;
008131 A6 01 [ 1] 237 ld a, #0x01
008133 AE 50 05 [ 2] 238 ldw x, #0x5005
008136 CD 85 53 [ 4] 239 call _GPIO_ResetBits
240 ; ../src/main.c: 87: Led2_ON;
008139 A6 04 [ 1] 241 ld a, #0x04
00813B AE 50 05 [ 2] 242 ldw x, #0x5005
00813E CD 85 4A [ 4] 243 call _GPIO_SetBits
244 ; ../src/main.c: 88: Led2_OFF;
008141 A6 04 [ 1] 245 ld a, #0x04
008143 AE 50 05 [ 2] 246 ldw x, #0x5005
008146 CD 85 53 [ 4] 247 call _GPIO_ResetBits
248 ; ../src/main.c: 89: Mono_OFF;
008149 A6 01 [ 1] 249 ld a, #0x01
00814B AE 50 05 [ 2] 250 ldw x, #0x5005
251 ; ../src/main.c: 90: }
00814E CC 85 4A [ 2] 252 jp _GPIO_SetBits
253 .area CODE
254 .area CONST
255 .area INITIALIZER
256 .area CABS (ABS)