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add spl, first tries programming

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seppl
2025-06-28 16:14:14 +02:00
parent 2155e2b176
commit 012355c2e8
104 changed files with 58111 additions and 3 deletions
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417
firmware/STM8L15X_LD/stm8l15x_clk.rel Normal file
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XH3
H B areas 1D global symbols
M stm8l15x_clk
S .__.ABS. Def000000
S __divulong Ref000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 5 flags 0 addr 0
S _SYSDivFactor Def000000
A INITIALIZER size 0 flags 0 addr 0
A CODE size 319 flags 0 addr 0
S _CLK_ClearITPendingBit Def000309
S _CLK_GetSYSCLKSource Def0000D0
S _CLK_RTCClockConfig Def000143
S _CLK_CCOConfig Def0000C4
S _CLK_ITConfig Def0001F7
S _CLK_LSEClockSecuritySystemEnable Def0001B7
S _CLK_AdjustHSICalibrationValue Def000059
S _CLK_HSEConfig Def00007D
S _CLK_HSICmd Def000041
S _CLK_LSEConfig Def000092
S _CLK_LSICmd Def000065
S _CLK_DeInit Def000000
S _CLK_GetITStatus Def0002CF
S _CLK_MainRegulatorCmd Def0001DF
S _CLK_PeripheralClockConfig Def00014F
S _CLK_ClockSecuritySytemDeglitchCmd Def0000AC
S _CLK_SYSCLKSourceSwitchCmd Def00012B
S _CLK_ClockSecuritySystemEnable Def0000A7
S _CLK_SYSCLKDivConfig Def000127
S _CLK_GetClockFreq Def0000D4
S _CLK_GetFlagStatus Def00025C
S _CLK_BEEPClockConfig Def00014B
S _CLK_HaltConfig Def0001C1
S _CLK_SYSCLKSourceConfig Def0000CC
S _CLK_ClearFlag Def0002CA
S _CLK_RTCCLKSwitchOnLSEFailureEnable Def0001BC
A CABS size 0 flags 8 addr 0
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