From 012355c2e8b82fa8b23867517aab18ce58284e02 Mon Sep 17 00:00:00 2001
From: seppl <>
Date: Sat, 28 Jun 2025 16:14:14 +0200
Subject: [PATCH] add spl, first tries programming
---
electronics/rosaled.kicad_sch | 18 +-
firmware/.vscode/c_cpp_properties.json | 18 +
firmware/.vscode/launch.json | 35 +
firmware/.vscode/settings.json | 10 +
firmware/SDCC/Makefile | 66 +
firmware/SDCC/_UX_clean.sh | 20 +
firmware/SDCC/_UX_compile_run.sh | 48 +
firmware/SDCC/_WIN_clean.bat | 15 +
firmware/SDCC/_WIN_compile_run.bat | 49 +
firmware/SDCC/_WIN_upload.bat | 26 +
firmware/STM8L15X_LD/STM8L15X_LD.hex | 155 +
firmware/STM8L15X_LD/STM8L15X_LD.lk | 16 +
firmware/STM8L15X_LD/STM8L15X_LD.map | 274 ++
firmware/STM8L15X_LD/main.asm | 324 ++
firmware/STM8L15X_LD/main.lst | 324 ++
firmware/STM8L15X_LD/main.rel | 220 ++
firmware/STM8L15X_LD/main.rst | 324 ++
firmware/STM8L15X_LD/main.sym | 92 +
firmware/STM8L15X_LD/stm8l15x_clk.asm | 823 +++++
firmware/STM8L15X_LD/stm8l15x_clk.lst | 823 +++++
firmware/STM8L15X_LD/stm8l15x_clk.rel | 417 +++
firmware/STM8L15X_LD/stm8l15x_clk.rst | 823 +++++
firmware/STM8L15X_LD/stm8l15x_clk.sym | 56 +
firmware/STM8L15X_LD/stm8l15x_gpio.asm | 349 ++
firmware/STM8L15X_LD/stm8l15x_gpio.lst | 349 ++
firmware/STM8L15X_LD/stm8l15x_gpio.rel | 137 +
firmware/STM8L15X_LD/stm8l15x_gpio.rst | 349 ++
firmware/STM8L15X_LD/stm8l15x_gpio.sym | 40 +
firmware/STM8L15X_LD/stm8l15x_it.asm | 290 ++
firmware/STM8L15X_LD/stm8l15x_it.lst | 290 ++
firmware/STM8L15X_LD/stm8l15x_it.rel | 165 +
firmware/STM8L15X_LD/stm8l15x_it.rst | 290 ++
firmware/STM8L15X_LD/stm8l15x_it.sym | 58 +
firmware/STM8L15X_LD/stm8l15x_rtc.asm | 1969 +++++++++++
firmware/STM8L15X_LD/stm8l15x_rtc.lst | 1969 +++++++++++
firmware/STM8L15X_LD/stm8l15x_rtc.rel | 793 +++++
firmware/STM8L15X_LD/stm8l15x_rtc.rst | 1969 +++++++++++
firmware/STM8L15X_LD/stm8l15x_rtc.sym | 71 +
firmware/STM8L15X_LD/stm8l15x_usart.asm | 899 +++++
firmware/STM8L15X_LD/stm8l15x_usart.lst | 899 +++++
firmware/STM8L15X_LD/stm8l15x_usart.rel | 406 +++
firmware/STM8L15X_LD/stm8l15x_usart.rst | 899 +++++
firmware/STM8L15X_LD/stm8l15x_usart.sym | 55 +
firmware/inc/stm8l151x/inc/stm8l15x.h | 3091 ++++++++++++++++++
firmware/inc/stm8l151x/inc/stm8l15x_adc.h | 386 +++
firmware/inc/stm8l151x/inc/stm8l15x_aes.h | 158 +
firmware/inc/stm8l151x/inc/stm8l15x_beep.h | 117 +
firmware/inc/stm8l151x/inc/stm8l15x_clk.h | 444 +++
firmware/inc/stm8l151x/inc/stm8l15x_comp.h | 242 ++
firmware/inc/stm8l151x/inc/stm8l15x_dac.h | 293 ++
firmware/inc/stm8l151x/inc/stm8l15x_dma.h | 341 ++
firmware/inc/stm8l151x/inc/stm8l15x_exti.h | 288 ++
firmware/inc/stm8l151x/inc/stm8l15x_flash.h | 359 ++
firmware/inc/stm8l151x/inc/stm8l15x_gpio.h | 179 +
firmware/inc/stm8l151x/inc/stm8l15x_i2c.h | 809 +++++
firmware/inc/stm8l151x/inc/stm8l15x_irtim.h | 68 +
firmware/inc/stm8l151x/inc/stm8l15x_itc.h | 272 ++
firmware/inc/stm8l151x/inc/stm8l15x_iwdg.h | 140 +
firmware/inc/stm8l151x/inc/stm8l15x_lcd.h | 473 +++
firmware/inc/stm8l151x/inc/stm8l15x_pwr.h | 131 +
firmware/inc/stm8l151x/inc/stm8l15x_rst.h | 91 +
firmware/inc/stm8l151x/inc/stm8l15x_rtc.h | 956 ++++++
firmware/inc/stm8l151x/inc/stm8l15x_spi.h | 404 +++
firmware/inc/stm8l151x/inc/stm8l15x_syscfg.h | 424 +++
firmware/inc/stm8l151x/inc/stm8l15x_tim1.h | 1044 ++++++
firmware/inc/stm8l151x/inc/stm8l15x_tim2.h | 905 +++++
firmware/inc/stm8l151x/inc/stm8l15x_tim3.h | 909 +++++
firmware/inc/stm8l151x/inc/stm8l15x_tim4.h | 374 +++
firmware/inc/stm8l151x/inc/stm8l15x_tim5.h | 771 +++++
firmware/inc/stm8l151x/inc/stm8l15x_usart.h | 393 +++
firmware/inc/stm8l151x/inc/stm8l15x_wfe.h | 154 +
firmware/inc/stm8l151x/inc/stm8l15x_wwdg.h | 96 +
firmware/inc/stm8l151x/src/stm8l15x_adc.c | 988 ++++++
firmware/inc/stm8l151x/src/stm8l15x_aes.c | 488 +++
firmware/inc/stm8l151x/src/stm8l15x_beep.c | 247 ++
firmware/inc/stm8l151x/src/stm8l15x_clk.c | 1123 +++++++
firmware/inc/stm8l151x/src/stm8l15x_comp.c | 728 +++++
firmware/inc/stm8l151x/src/stm8l15x_dac.c | 839 +++++
firmware/inc/stm8l151x/src/stm8l15x_dma.c | 753 +++++
firmware/inc/stm8l151x/src/stm8l15x_exti.c | 559 ++++
firmware/inc/stm8l151x/src/stm8l15x_flash.c | 1045 ++++++
firmware/inc/stm8l151x/src/stm8l15x_gpio.c | 410 +++
firmware/inc/stm8l151x/src/stm8l15x_i2c.c | 1369 ++++++++
firmware/inc/stm8l151x/src/stm8l15x_irtim.c | 199 ++
firmware/inc/stm8l151x/src/stm8l15x_itc.c | 396 +++
firmware/inc/stm8l151x/src/stm8l15x_iwdg.c | 220 ++
firmware/inc/stm8l151x/src/stm8l15x_lcd.c | 632 ++++
firmware/inc/stm8l151x/src/stm8l15x_pwr.c | 358 ++
firmware/inc/stm8l151x/src/stm8l15x_rst.c | 171 +
firmware/inc/stm8l151x/src/stm8l15x_rtc.c | 2245 +++++++++++++
firmware/inc/stm8l151x/src/stm8l15x_spi.c | 794 +++++
firmware/inc/stm8l151x/src/stm8l15x_syscfg.c | 507 +++
firmware/inc/stm8l151x/src/stm8l15x_tim1.c | 2774 ++++++++++++++++
firmware/inc/stm8l151x/src/stm8l15x_tim2.c | 2154 ++++++++++++
firmware/inc/stm8l151x/src/stm8l15x_tim3.c | 2154 ++++++++++++
firmware/inc/stm8l151x/src/stm8l15x_tim4.c | 762 +++++
firmware/inc/stm8l151x/src/stm8l15x_tim5.c | 2154 ++++++++++++
firmware/inc/stm8l151x/src/stm8l15x_usart.c | 1208 +++++++
firmware/inc/stm8l151x/src/stm8l15x_wfe.c | 348 ++
firmware/inc/stm8l151x/src/stm8l15x_wwdg.c | 247 ++
firmware/inc/stm8l15x_conf.h | 91 +
firmware/inc/stm8l15x_it.h | 116 +
firmware/src/main.c | 86 +
firmware/src/stm8l15x_it.c | 415 +++
104 files changed, 58111 insertions(+), 3 deletions(-)
create mode 100644 firmware/.vscode/c_cpp_properties.json
create mode 100644 firmware/.vscode/launch.json
create mode 100644 firmware/.vscode/settings.json
create mode 100644 firmware/SDCC/Makefile
create mode 100755 firmware/SDCC/_UX_clean.sh
create mode 100755 firmware/SDCC/_UX_compile_run.sh
create mode 100644 firmware/SDCC/_WIN_clean.bat
create mode 100644 firmware/SDCC/_WIN_compile_run.bat
create mode 100644 firmware/SDCC/_WIN_upload.bat
create mode 100644 firmware/STM8L15X_LD/STM8L15X_LD.hex
create mode 100644 firmware/STM8L15X_LD/STM8L15X_LD.lk
create mode 100644 firmware/STM8L15X_LD/STM8L15X_LD.map
create mode 100644 firmware/STM8L15X_LD/main.asm
create mode 100644 firmware/STM8L15X_LD/main.lst
create mode 100644 firmware/STM8L15X_LD/main.rel
create mode 100644 firmware/STM8L15X_LD/main.rst
create mode 100644 firmware/STM8L15X_LD/main.sym
create mode 100644 firmware/STM8L15X_LD/stm8l15x_clk.asm
create mode 100644 firmware/STM8L15X_LD/stm8l15x_clk.lst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_clk.rel
create mode 100644 firmware/STM8L15X_LD/stm8l15x_clk.rst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_clk.sym
create mode 100644 firmware/STM8L15X_LD/stm8l15x_gpio.asm
create mode 100644 firmware/STM8L15X_LD/stm8l15x_gpio.lst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_gpio.rel
create mode 100644 firmware/STM8L15X_LD/stm8l15x_gpio.rst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_gpio.sym
create mode 100644 firmware/STM8L15X_LD/stm8l15x_it.asm
create mode 100644 firmware/STM8L15X_LD/stm8l15x_it.lst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_it.rel
create mode 100644 firmware/STM8L15X_LD/stm8l15x_it.rst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_it.sym
create mode 100644 firmware/STM8L15X_LD/stm8l15x_rtc.asm
create mode 100644 firmware/STM8L15X_LD/stm8l15x_rtc.lst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_rtc.rel
create mode 100644 firmware/STM8L15X_LD/stm8l15x_rtc.rst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_rtc.sym
create mode 100644 firmware/STM8L15X_LD/stm8l15x_usart.asm
create mode 100644 firmware/STM8L15X_LD/stm8l15x_usart.lst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_usart.rel
create mode 100644 firmware/STM8L15X_LD/stm8l15x_usart.rst
create mode 100644 firmware/STM8L15X_LD/stm8l15x_usart.sym
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_adc.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_aes.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_beep.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_clk.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_comp.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_dac.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_dma.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_exti.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_flash.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_gpio.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_i2c.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_irtim.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_itc.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_iwdg.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_lcd.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_pwr.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_rst.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_rtc.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_spi.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_syscfg.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_tim1.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_tim2.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_tim3.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_tim4.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_tim5.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_usart.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_wfe.h
create mode 100644 firmware/inc/stm8l151x/inc/stm8l15x_wwdg.h
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_adc.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_aes.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_beep.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_clk.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_comp.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_dac.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_dma.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_exti.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_flash.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_gpio.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_i2c.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_irtim.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_itc.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_iwdg.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_lcd.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_pwr.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_rst.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_rtc.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_spi.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_syscfg.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_tim1.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_tim2.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_tim3.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_tim4.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_tim5.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_usart.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_wfe.c
create mode 100644 firmware/inc/stm8l151x/src/stm8l15x_wwdg.c
create mode 100644 firmware/inc/stm8l15x_conf.h
create mode 100644 firmware/inc/stm8l15x_it.h
create mode 100644 firmware/src/main.c
create mode 100644 firmware/src/stm8l15x_it.c
diff --git a/electronics/rosaled.kicad_sch b/electronics/rosaled.kicad_sch
index 33a157a..e5a3fc5 100644
--- a/electronics/rosaled.kicad_sch
+++ b/electronics/rosaled.kicad_sch
@@ -2179,6 +2179,7 @@
)
(alternate "" input line)
(alternate "OSC_OUT" output line)
+ (alternate "" input line)
(alternate "[SPI_MOSI]" bidirectional line)
(alternate "[USART_RX]" input line)
)
@@ -2369,6 +2370,7 @@
)
)
(alternate "" input line)
+ (alternate "" input line)
)
(pin power_in line
(at 0 -21.59 90)
@@ -2388,6 +2390,7 @@
)
)
(alternate "" input line)
+ (alternate "" input line)
)
(pin bidirectional line
(at 17.78 11.43 180)
@@ -2408,6 +2411,8 @@
)
(alternate "" input line)
(alternate "I2C_SDA" bidirectional line)
+ (alternate "" input line)
+ (alternate "" input line)
)
(pin bidirectional line
(at 17.78 8.89 180)
@@ -2428,6 +2433,7 @@
)
(alternate "" input line)
(alternate "I2C_SCL" bidirectional line)
+ (alternate "" input line)
)
(pin bidirectional line
(at 17.78 6.35 180)
@@ -2452,6 +2458,8 @@
(alternate "COMP1_INP" input line)
(alternate "COMP2_INM" input line)
(alternate "I2C1_SMB" bidirectional line)
+ (alternate "" input line)
+ (alternate "" input line)
(alternate "USART_CK" output line)
)
(pin bidirectional line
@@ -2519,6 +2527,7 @@
(alternate "ADC1_IN22" input line)
(alternate "COMP1_INP" input line)
(alternate "COMP2_INP" input line)
+ (alternate "" input line)
(alternate "TIM3_CH2" bidirectional line)
(alternate "[ADC1_TRIG]" input line)
)
@@ -6312,6 +6321,7 @@
)
(pin "1"
(uuid "8916c4e7-9253-474d-be2b-d978fa4d559c")
+ (alternate "OSC32_IN")
)
(pin "10"
(uuid "45fa452a-64bf-4166-a177-0b9c0b29cfd4")
@@ -6339,21 +6349,23 @@
)
(pin "18"
(uuid "fcfdc83f-b9bc-4d93-a6d9-5b09713ae9a7")
- (alternate "OSC32_IN")
+ (alternate "PC0")
)
(pin "19"
(uuid "4f90a02c-d04c-4396-9cc5-9373393fbafb")
- (alternate "OSC32_OUT")
+ (alternate "PC1")
)
(pin "2"
(uuid "b3830cd6-6f6a-4a83-930b-47bcc649dbd0")
+ (alternate "OSC32_OUT")
)
(pin "20"
(uuid "41fec565-2eac-4722-b138-f04a0dd20b41")
- (alternate "SWIM")
+ (alternate "PC4")
)
(pin "3"
(uuid "50cab925-848a-4400-9717-69e4ed163194")
+ (alternate "SWIM")
)
(pin "4"
(uuid "8abd8544-d06b-4baf-8b59-070ea786c743")
diff --git a/firmware/.vscode/c_cpp_properties.json b/firmware/.vscode/c_cpp_properties.json
new file mode 100644
index 0000000..442e025
--- /dev/null
+++ b/firmware/.vscode/c_cpp_properties.json
@@ -0,0 +1,18 @@
+{
+ "configurations": [
+ {
+ "name": "Linux",
+ "includePath": [
+ "${workspaceFolder}/**",
+ "/usr/lib/stm8l151x/**",
+ "${workspaceFolder}/src"
+ ],
+ "defines": [],
+ "compilerPath": "/usr/bin/gcc",
+ "cStandard": "c17",
+ "cppStandard": "gnu++17",
+ "intelliSenseMode": "linux-gcc-x64"
+ }
+ ],
+ "version": 4
+}
\ No newline at end of file
diff --git a/firmware/.vscode/launch.json b/firmware/.vscode/launch.json
new file mode 100644
index 0000000..ae0f3cd
--- /dev/null
+++ b/firmware/.vscode/launch.json
@@ -0,0 +1,35 @@
+{
+ // Use IntelliSense to learn about possible attributes.
+ // Hover to view descriptions of existing attributes.
+ // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
+ "version": "0.2.0",
+ "configurations": [
+ {
+ "name": "STM8-gdb",
+ "type": "cppdbg",
+ "request": "launch",
+ "program": "${workspaceRoot}/build/main.elf",
+ "args": [],
+ "stopAtEntry": true,
+ "cwd": "${workspaceRoot}",
+ "environment": [],
+ "externalConsole": false,
+ "MIMode": "gdb",
+ "miDebuggerPath": "stm8-gdb",
+ "setupCommands": [
+ {
+ "description": "connect to target",
+ "text": "-target-select extended-remote localhost:3333",
+ "ignoreFailures": true
+ },
+ ],
+ "logging": {
+ "moduleLoad": true,
+ "trace": true,
+ "engineLogging": true,
+ "programOutput": true,
+ "exceptions": true
+ },
+ },
+ ]
+}
\ No newline at end of file
diff --git a/firmware/.vscode/settings.json b/firmware/.vscode/settings.json
new file mode 100644
index 0000000..fd061af
--- /dev/null
+++ b/firmware/.vscode/settings.json
@@ -0,0 +1,10 @@
+{
+ "files.associations": {
+ "stm8l15x.h": "c",
+ "stm8l15x_it.h": "c",
+ "stm8l15x_conf.h": "c",
+ "stm8l15x_rtc.h": "c",
+ "stdio.h": "c",
+ "stm8l15x_usart.h": "c"
+ }
+}
\ No newline at end of file
diff --git a/firmware/SDCC/Makefile b/firmware/SDCC/Makefile
new file mode 100644
index 0000000..4a13418
--- /dev/null
+++ b/firmware/SDCC/Makefile
@@ -0,0 +1,66 @@
+#######
+# makefile for STM8*_StdPeriph_Lib and SDCC compiler
+#
+# note: paths in this Makefile assume unmodified SPL folder structure
+#
+# usage:
+# 1. if SDCC not in PATH set path -> CC_ROOT
+# 2. set correct STM8 device -> DEVICE
+# 3. set project paths -> PRJ_ROOT, PRJ_SRC_DIR, PRJ_INC_DIR
+# 4. set SPL paths -> SPL_ROOT
+# 5. add required SPL modules -> SPL_SOURCE
+# 6. add required STM8_EVAL modules -> EVAL_SOURCE, EVAL_COMM_SOURCE, EVAL_STM8L1526_SOURCE, EVAL_STM8L1528_SOURCE
+#
+#######
+
+# STM8 device (for supported devices see stm8l15x.h)
+DEVICE=STM8L15X_LD
+
+# set compiler path & parameters
+CC_ROOT =
+CC = sdcc
+CFLAGS = -out-fmt-ihx -mstm8 -lstm8 --opt-code-size --stack-auto
+
+# set output folder and target name
+OUTPUT_DIR = ../$(DEVICE)
+TARGET = $(OUTPUT_DIR)/$(DEVICE).hex
+
+# set project folder and files (all *.c)
+PRJ_ROOT = ..
+PRJ_SRC_DIR = $(PRJ_ROOT)/src
+PRJ_INC_DIR = $(PRJ_ROOT)/inc
+PRJ_SOURCE = $(notdir $(wildcard $(PRJ_SRC_DIR)/*.c))
+PRJ_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(PRJ_SOURCE:.c=.rel))
+
+# set SPL paths
+SPL_ROOT = $(PRJ_INC_DIR)/stm8l151x
+SPL_SRC_DIR = $(SPL_ROOT)/src
+SPL_INC_DIR = $(SPL_ROOT)/inc
+SPL_SOURCE = stm8l15x_usart.c stm8l15x_clk.c stm8l15x_gpio.c stm8l15x_rtc.c #$(notdir $(wildcard $(SPL_SRC_DIR)/*.c))
+SPL_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(SPL_SOURCE:.c=.rel))
+
+# collect all include folders
+INCLUDE = -I$(PRJ_INC_DIR) -I$(SPL_INC_DIR)
+
+# collect all source directories
+VPATH=$(PRJ_SRC_DIR):$(SPL_SRC_DIR)
+
+.PHONY: clean
+
+all: $(OUTPUT_DIR) $(TARGET)
+
+$(OUTPUT_DIR):
+ mkdir -p $(OUTPUT_DIR)
+
+$(OUTPUT_DIR)/%.rel: %.c
+ $(CC) $(CFLAGS) $(INCLUDE) -D$(DEVICE) -c $?
+
+$(OUTPUT_DIR)/%.rel: %.c
+ $(CC) $(CFLAGS) $(INCLUDE) -D$(DEVICE) -c $? -o $@
+
+$(TARGET): $(PRJ_OBJECTS) $(SPL_OBJECTS) $(EVAL_OBJECTS) $(EVAL_COMM_OBJECTS) $(EVAL_STM8L1526_OBJECTS) $(EVAL_STM8L1528_OBJECTS)
+ $(CC) $(CFLAGS) -o $(TARGET) $^
+
+clean:
+ rm -fr $(OUTPUT_DIR)
+
diff --git a/firmware/SDCC/_UX_clean.sh b/firmware/SDCC/_UX_clean.sh
new file mode 100755
index 0000000..25f5508
--- /dev/null
+++ b/firmware/SDCC/_UX_clean.sh
@@ -0,0 +1,20 @@
+#!/bin/bash
+
+# change to current working directory
+cd `dirname $0`
+
+# just for output
+echo off
+clear
+
+# target device (for supported devices see stm8l15x.h)
+DEVICE=STM8L15X_MD
+
+# set make tool (if not in PATH, set complete path)
+MAKE=make
+
+# use Makefiles to delete outputs
+$MAKE -f Makefile DEVICE=$DEVICE clean
+
+echo on
+
diff --git a/firmware/SDCC/_UX_compile_run.sh b/firmware/SDCC/_UX_compile_run.sh
new file mode 100755
index 0000000..0d09cf5
--- /dev/null
+++ b/firmware/SDCC/_UX_compile_run.sh
@@ -0,0 +1,48 @@
+#!/bin/bash
+
+# change to current working directory
+# echo $(dirname $0)
+cd `dirname $0`
+
+# just for output
+clear
+
+# target device (for supported devices see stm8l15x.h)
+DEVICE=STM8L15X_LD
+
+# set make tool (if not in PATH, set complete path)
+MAKE=make
+
+# set serial upload tool and serial port (stm8gal from https://github.com/gicking/stm8gal)
+# BSL_LOADER=~/Öffentlich/GitHub/stm8gal/stm8gal/stm8gal
+# BSL_PORT=/dev/ttyUSB0
+
+# set SWIM upload tool and device name (stm8flash from https://github.com/vdudouyt/stm8flash)
+SWIM_LOADER=stm8flash
+SWIM_TOOL=stlinkv2
+SWIM_DEVICE=stm8l151?2
+
+# target hexfile
+TARGET=../$DEVICE/$DEVICE.hex
+
+# make project
+echo "make application"
+$MAKE -f Makefile DEVICE=$DEVICE
+if [ $? -ne 0 ]; then
+ echo " "
+ read -p "press key to close window..."
+ echo on
+ exit
+fi
+echo "done with application"
+echo " "
+
+# upload using STM8 serial bootloader (stm8gal from https://github.com/gicking/stm8gal)
+#$BSL_LOADER -p $BSL_PORT -w $TARGET -v
+
+# upload using SWIM debug interface (stm8flash from https://github.com/vdudouyt/stm8flash)
+$SWIM_LOADER -c $SWIM_TOOL -w "$TARGET" -p $SWIM_DEVICE
+
+# echo " "
+# read -p "press key to close window..."
+# echo " "
\ No newline at end of file
diff --git a/firmware/SDCC/_WIN_clean.bat b/firmware/SDCC/_WIN_clean.bat
new file mode 100644
index 0000000..3d8237a
--- /dev/null
+++ b/firmware/SDCC/_WIN_clean.bat
@@ -0,0 +1,15 @@
+REM just for output
+echo off
+cls
+
+REM target device (for supported devices see stm8l15x.h)
+set DEVICE=STM8L15X_MD
+
+REM set make tool (if not in PATH, set complete path)
+set MAKE=mingw32-make
+
+REM use makefile to delete sdcc output
+%MAKE% -f Makefile DEVICE=%DEVICE% clean
+
+echo on
+
diff --git a/firmware/SDCC/_WIN_compile_run.bat b/firmware/SDCC/_WIN_compile_run.bat
new file mode 100644
index 0000000..77232b9
--- /dev/null
+++ b/firmware/SDCC/_WIN_compile_run.bat
@@ -0,0 +1,49 @@
+REM just for output
+echo off
+cls
+
+REM target device (for supported devices see stm8l15x.h)
+set DEVICE=STM8L15X_MD
+
+REM set make tool (if not in PATH, set complete path)
+set MAKE=mingw32-make
+
+REM set serial upload tool and serial port (stm8gal from https://github.com/gicking/stm8gal)
+set BSL_LOADER="C:\Programme\stm8gal\stm8gal.exe"
+set BSL_PORT=7
+
+REM set SWIM upload tool and device name (stm8flash from https://github.com/vdudouyt/stm8flash)
+REM set SWIM_LOADER=C:\Programme\stm8flash\stm8flash.exe"
+REM set SWIM_TOOL=stlinkv2
+REM set SWIM_DEVICE=stm8l152?6
+
+REM set SWIM upload tool and device name (STVP-STM8 on http://www.st.com)
+set SWIM_LOADER="C:\Programme\STMicroelectronics\st_toolset\stvp\STVP_CmdLine.exe"
+set SWIM_DEVICE=STM8L15xC6
+
+REM name of target hexfile
+set TARGET=.\%DEVICE%\%DEVICE%.hex
+
+REM compile and link
+echo make application
+%MAKE% -f Makefile DEVICE=%DEVICE%
+IF ERRORLEVEL 1 GOTO END
+echo done with application
+echo.
+
+REM GOTO END
+
+REM upload using STM8 serial bootloader (stm8gal from https://github.com/gicking/stm8gal)
+REM %BSL_LOADER% -p %BSL_PORT% -w %TARGET% -v
+
+REM upload using SWIM debug interface (stm8flash from https://github.com/vdudouyt/stm8flash)
+REM %SWIM_LOADER% -c %SWIM_TOOL% -w %TARGET% -p %SWIM_DEVICE%
+
+REM upload using SWIM debug interface (STVP-STM8 on http://www.st.com)
+%SWIM_LOADER% -BoardName=ST-LINK -Port=USB -ProgMode=SWIM -Device=%DEVICE_STVP% -readData -readOption -no_progData -no_progOption -no_loop -no_log -FileProg=%TARGET%
+
+REM clean up
+:END
+PAUSE
+echo on
+
diff --git a/firmware/SDCC/_WIN_upload.bat b/firmware/SDCC/_WIN_upload.bat
new file mode 100644
index 0000000..80b8672
--- /dev/null
+++ b/firmware/SDCC/_WIN_upload.bat
@@ -0,0 +1,26 @@
+REM just for output
+echo off
+cls
+
+REM set serial upload tool and serial port (stm8gal from https://github.com/gicking/stm8gal)
+set LOADER="C:\Programme\stm8gal\stm8gal.exe"
+set PORT=7
+
+REM name of target hexfile
+set TARGET=Debug\stm8l15x.s19
+
+REM ask user to put STM8 to bootloader mode
+echo.
+echo.
+echo reset STM8 and press return
+echo.
+PAUSE
+
+REM upload using STM8 serial bootloader (stm8gal from https://github.com/gicking/stm8gal)
+%LOADER% -p COM%PORT% -w %TARGET% -v
+
+REM clean up
+:END
+PAUSE
+echo on
+
diff --git a/firmware/STM8L15X_LD/STM8L15X_LD.hex b/firmware/STM8L15X_LD/STM8L15X_LD.hex
new file mode 100644
index 0000000..7327c9d
--- /dev/null
+++ b/firmware/STM8L15X_LD/STM8L15X_LD.hex
@@ -0,0 +1,155 @@
+:20800000820080838200818F820000008200819082008191820081928200819382008194DE
+:2080200082008195820081968200819782008198820081998200819A8200819B8200819C64
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+:208F1B00649FC75165AE51667B02F7C651491A01C75149A601214F35FF51598581886B0112
+:208F3B0035CA51593553515972155149C65148A4F8C75148C651481A01C7514835FF515907
+:208F5B00848135CA5159355351599EC751549FC7515535FF51598189C65154950F02C651F0
+:208F7B0055975B0281886B0135CA515935535159C651490D012709AA04C75149A601201CAD
+:208F9B00A4FBC751495F7204514C08A3FFFF27035C20F37204514C024FC5A60135FF515954
+:208FBB005B0181889735CA515935535159C6514AA4FBC7514AC6514A6B019F1A041A01C7F1
+:208FDB00514A35FF5159848584FCC6514AA40481889735CA515935535159C6514AA48FC795
+:208FFB00514AC6514A6B019F1A041A01C7514A35FF5159848584FC886B015135CA5159352A
+:20901B005351597207514C0E5F7207514C08A3FFFF27035C20F37206514C0F909E1A01C729
+:20903B00515A909FC7515BA601214F35FF51595B018188909735CA515935535159720351A6
+:20905B004C0E5F7203514C08A3FFFF27035C20F37202514C15909F1A046B017B051A01C7A7
+:20907B00516A7B06C7516BA601214F35FF51591E025B06FC886B0135CA515935535159C60F
+:20909B00514A0D012707AA08C7514A2005A4F7C7514A35FF51598481886B0135CA515935F3
+:2090BB00535159C6514A0D012707AA80C7514A2005A47FC7514A35FF51598481889735CAC4
+:2090DB00515935535159C6516C6B019F480D0427071A01C7516C2006431401C7516C35FFAF
+:2090FB005159848584FC886B0135CA515935535159C6516DA4E7C7516DC6516D1A01C75108
+:20911B006D35FF51598481886B0135CA515935535159C6516DA4F8C7516DC6516D1A01C70A
+:20913B00516D35FF51598481886B0135CA515935535159C6516DA41FC7516DC6516D1A0139
+:20915B00C7516D35FF515984818835CA515935535159AE516C88F66B02840D0427071A01F5
+:20917B00C7516C2006431401C7516C35FF5159848584FC52036B0335CA515935535159C683
+:20919B0051496B029FA4F0889FA4016B02840D03270F1A02C75149C6516C1A01C7516C20B8
+:2091BB0013431402C75149C6516C6B027B01431402C7516C35FF51595B03815206C6514C06
+:2091DB0090970F02C6514D0F036B06616B05619F1406021405955D2703A601214F5B06813A
+:2091FB009F43C7514D9E43A47FC7514C8188C651496B019F14016B01C6514D545454548973
+:20921B001402850D0127064D2703A601214F5B0181A610629F43C7514D815FA10A25055C82
+:20923B00A00A20F758585858891A0285819097A4F04EA40F97A60A42909FA40F891B0285F5
+:20925B008152095F1F05A6206B097B0C484F49080F090E090D090C160558905917054D27AE
+:20927B000354995913127B0612117B051210252172F0127B0612116B067B0512106B057BC3
+:1E929B000FAA016B047B0E160C6B0E170C7B046B0F0A0926B51E0E160C5B09814F815B
+:00000001FF
diff --git a/firmware/STM8L15X_LD/STM8L15X_LD.lk b/firmware/STM8L15X_LD/STM8L15X_LD.lk
new file mode 100644
index 0000000..11d5f87
--- /dev/null
+++ b/firmware/STM8L15X_LD/STM8L15X_LD.lk
@@ -0,0 +1,16 @@
+-muwx
+-i ../STM8L15X_LD/STM8L15X_LD.hex
+-b HOME = 0x8000
+-b DATA = 0x0001
+-k /opt/sdcc/bin/../share/sdcc/lib/stm8
+-k /usr/local/share/sdcc/lib/stm8
+-l stm8
+-l stm8
+../STM8L15X_LD/main.rel
+../STM8L15X_LD/stm8l15x_it.rel
+../STM8L15X_LD/stm8l15x_usart.rel
+../STM8L15X_LD/stm8l15x_clk.rel
+../STM8L15X_LD/stm8l15x_gpio.rel
+../STM8L15X_LD/stm8l15x_rtc.rel
+
+-e
diff --git a/firmware/STM8L15X_LD/STM8L15X_LD.map b/firmware/STM8L15X_LD/STM8L15X_LD.map
new file mode 100644
index 0000000..b757e48
--- /dev/null
+++ b/firmware/STM8L15X_LD/STM8L15X_LD.map
@@ -0,0 +1,274 @@
+ ASxxxx Linker V03.00/V05.40 + sdld, page 1.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+. .ABS. 00000000 00000000 = 0. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ 00000000 .__.ABS. _startup
+ 00000000 l_CABS
+ 00000000 l_DABS
+ 00000000 l_DATA
+ 00000000 l_INITIALIZED
+ 00000000 l_INITIALIZER
+ 00000000 l__CODE
+ 00000000 s_CABS
+ 00000000 s_DABS
+ 00000000 s__CODE
+ 00000001 l_SSEG
+ 00000001 s_DATA
+ 00000001 s_INITIALIZED
+ 00000001 s_SSEG
+ 00000003 l_GSFINAL
+ 0000000B l_CONST
+ 00000023 l_GSINIT
+ 00000083 l_HOME
+ 00001205 l_CODE
+ 00008000 s_HOME
+ 00008083 s_GSINIT
+ 000080A6 s_GSFINAL
+ 000080A9 s_CONST
+ 000080B4 s_CODE
+ 000080B4 s_INITIALIZER
+
+ ASxxxx Linker V03.00/V05.40 + sdld, page 2.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+SSEG 00000001 00000001 = 1. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00/V05.40 + sdld, page 3.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+HOME 00008000 00000083 = 131. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00/V05.40 + sdld, page 4.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT 00008083 00000023 = 35. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00/V05.40 + sdld, page 5.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSFINAL 000080A6 00000003 = 3. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00/V05.40 + sdld, page 6.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CONST 000080A9 0000000B = 11. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ 000080AF _SYSDivFactor stm8l15x_clk
+
+ ASxxxx Linker V03.00/V05.40 + sdld, page 7.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CODE 000080B4 00001205 = 4613. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ 000080B4 _main main
+ 0000818F _TRAP_IRQHandler stm8l15x_it
+ 00008190 _FLASH_IRQHandler stm8l15x_it
+ 00008191 _DMA1_CHANNEL0_1_IRQHandler stm8l15x_it
+ 00008192 _DMA1_CHANNEL2_3_IRQHandler stm8l15x_it
+ 00008193 _RTC_CSSLSE_IRQHandler stm8l15x_it
+ 00008194 _EXTIE_F_PVD_IRQHandler stm8l15x_it
+ 00008195 _EXTIB_G_IRQHandler stm8l15x_it
+ 00008196 _EXTID_H_IRQHandler stm8l15x_it
+ 00008197 _EXTI0_IRQHandler stm8l15x_it
+ 00008198 _EXTI1_IRQHandler stm8l15x_it
+ 00008199 _EXTI2_IRQHandler stm8l15x_it
+ 0000819A _EXTI3_IRQHandler stm8l15x_it
+ 0000819B _EXTI4_IRQHandler stm8l15x_it
+ 0000819C _EXTI5_IRQHandler stm8l15x_it
+ 0000819D _EXTI6_IRQHandler stm8l15x_it
+ 0000819E _EXTI7_IRQHandler stm8l15x_it
+ 0000819F _LCD_AES_IRQHandler stm8l15x_it
+ 000081A0 _SWITCH_CSS_BREAK_DAC_IRQHandler stm8l15x_it
+ 000081A1 _ADC1_COMP_IRQHandler stm8l15x_it
+ 000081A2 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_ stm8l15x_it
+ 000081A3 _TIM2_CC_USART2_RX_IRQHandler stm8l15x_it
+ 000081A4 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_ stm8l15x_it
+ 000081A5 _TIM3_CC_USART3_RX_IRQHandler stm8l15x_it
+ 000081A6 _TIM1_UPD_OVF_TRG_COM_IRQHandler stm8l15x_it
+ 000081A7 _TIM1_CC_IRQHandler stm8l15x_it
+ 000081A8 _TIM4_UPD_OVF_TRG_IRQHandler stm8l15x_it
+ 000081A9 _SPI1_IRQHandler stm8l15x_it
+ 000081AA _USART1_TX_TIM5_UPD_OVF_TRG_BRK_ stm8l15x_it
+ 000081AB _USART1_RX_TIM5_CC_IRQHandler stm8l15x_it
+ 000081AC _I2C1_SPI2_IRQHandler stm8l15x_it
+ 000081AD _USART_DeInit stm8l15x_usart
+ 000081C4 _USART_Init stm8l15x_usart
+ 00008241 _USART_ClockInit stm8l15x_usart
+ 0000827B _USART_Cmd stm8l15x_usart
+ 00008290 _USART_SetPrescaler stm8l15x_usart
+ 00008295 _USART_SendBreak stm8l15x_usart
+ 0000829D _USART_ReceiveData8 stm8l15x_usart
+ 000082A0 _USART_ReceiveData9 stm8l15x_usart
+ 000082BB _USART_SendData8 stm8l15x_usart
+ 000082BE _USART_SendData9 stm8l15x_usart
+ 000082E3 _USART_ReceiverWakeUpCmd stm8l15x_usart
+ 000082F8 _USART_SetAddress stm8l15x_usart
+ 00008307 _USART_WakeUpConfig stm8l15x_usart
+ 00008316 _USART_HalfDuplexCmd stm8l15x_usart
+ 0000832B _USART_SmartCardCmd stm8l15x_usart
+ 00008340 _USART_SmartCardNACKCmd stm8l15x_usart
+ 00008355 _USART_SetGuardTime stm8l15x_usart
+ 0000835A _USART_IrDAConfig stm8l15x_usart
+ 0000836F _USART_IrDACmd stm8l15x_usart
+ ASxxxx Linker V03.00/V05.40 + sdld, page 8.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CODE 000080B4 00001205 = 4613. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ 00008384 _USART_DMACmd stm8l15x_usart
+ 0000839E _USART_ITConfig stm8l15x_usart
+ 0000842D _USART_GetFlagStatus stm8l15x_usart
+ 00008455 _USART_ClearFlag stm8l15x_usart
+ 00008461 _USART_GetITStatus stm8l15x_usart
+ 000084F9 _USART_ClearITPendingBit stm8l15x_usart
+ 00008502 _CLK_DeInit stm8l15x_clk
+ 00008543 _CLK_HSICmd stm8l15x_clk
+ 0000855B _CLK_AdjustHSICalibrationValue stm8l15x_clk
+ 00008567 _CLK_LSICmd stm8l15x_clk
+ 0000857F _CLK_HSEConfig stm8l15x_clk
+ 00008594 _CLK_LSEConfig stm8l15x_clk
+ 000085A9 _CLK_ClockSecuritySystemEnable stm8l15x_clk
+ 000085AE _CLK_ClockSecuritySytemDeglitchC stm8l15x_clk
+ 000085C6 _CLK_CCOConfig stm8l15x_clk
+ 000085CE _CLK_SYSCLKSourceConfig stm8l15x_clk
+ 000085D2 _CLK_GetSYSCLKSource stm8l15x_clk
+ 000085D6 _CLK_GetClockFreq stm8l15x_clk
+ 00008629 _CLK_SYSCLKDivConfig stm8l15x_clk
+ 0000862D _CLK_SYSCLKSourceSwitchCmd stm8l15x_clk
+ 00008645 _CLK_RTCClockConfig stm8l15x_clk
+ 0000864D _CLK_BEEPClockConfig stm8l15x_clk
+ 00008651 _CLK_PeripheralClockConfig stm8l15x_clk
+ 000086B9 _CLK_LSEClockSecuritySystemEnabl stm8l15x_clk
+ 000086BE _CLK_RTCCLKSwitchOnLSEFailureEna stm8l15x_clk
+ 000086C3 _CLK_HaltConfig stm8l15x_clk
+ 000086E1 _CLK_MainRegulatorCmd stm8l15x_clk
+ 000086F9 _CLK_ITConfig stm8l15x_clk
+ 0000875E _CLK_GetFlagStatus stm8l15x_clk
+ 000087CC _CLK_ClearFlag stm8l15x_clk
+ 000087D1 _CLK_GetITStatus stm8l15x_clk
+ 0000880B _CLK_ClearITPendingBit stm8l15x_clk
+ 0000881B _GPIO_DeInit stm8l15x_gpio
+ 00008828 _GPIO_Init stm8l15x_gpio
+ 000088A3 _GPIO_ExternalPullUpConfig stm8l15x_gpio
+ 000088BD _GPIO_Write stm8l15x_gpio
+ 000088BF _GPIO_WriteBit stm8l15x_gpio
+ 000088D6 _GPIO_SetBits stm8l15x_gpio
+ 000088DF _GPIO_ResetBits stm8l15x_gpio
+ 000088EB _GPIO_ToggleBits stm8l15x_gpio
+ 000088F4 _GPIO_ReadInputData stm8l15x_gpio
+ 000088F7 _GPIO_ReadOutputData stm8l15x_gpio
+ 000088F9 _GPIO_ReadInputDataBit stm8l15x_gpio
+ 00008906 _GPIO_ReadOutputDataBit stm8l15x_gpio
+ 00008912 _RTC_DeInit stm8l15x_rtc
+ 000089DD _RTC_Init stm8l15x_rtc
+ 00008A26 _RTC_StructInit stm8l15x_rtc
+ 00008A36 _RTC_WriteProtectionCmd stm8l15x_rtc
+ 00008A47 _RTC_EnterInitMode stm8l15x_rtc
+ 00008A68 _RTC_ExitInitMode stm8l15x_rtc
+ 00008A6D _RTC_WaitForSynchro stm8l15x_rtc
+ ASxxxx Linker V03.00/V05.40 + sdld, page 9.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CODE 000080B4 00001205 = 4613. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ 00008A99 _RTC_RatioCmd stm8l15x_rtc
+ 00008ABD _RTC_BypassShadowCmd stm8l15x_rtc
+ 00008AE1 _RTC_SetTime stm8l15x_rtc
+ 00008B6D _RTC_TimeStructInit stm8l15x_rtc
+ 00008B7A _RTC_GetTime stm8l15x_rtc
+ 00008BCC _RTC_GetSubSecond stm8l15x_rtc
+ 00008BDD _RTC_SetDate stm8l15x_rtc
+ 00008C84 _RTC_DateStructInit stm8l15x_rtc
+ 00008C98 _RTC_GetDate stm8l15x_rtc
+ 00008CF1 _RTC_SetAlarm stm8l15x_rtc
+ 00008DE9 _RTC_AlarmStructInit stm8l15x_rtc
+ 00008E03 _RTC_GetAlarm stm8l15x_rtc
+ 00008EB5 _RTC_AlarmCmd stm8l15x_rtc
+ 00008EFD _RTC_AlarmSubSecondConfig stm8l15x_rtc
+ 00008F38 _RTC_WakeUpClockConfig stm8l15x_rtc
+ 00008F5D _RTC_SetWakeUpCounter stm8l15x_rtc
+ 00008F72 _RTC_GetWakeUpCounter stm8l15x_rtc
+ 00008F80 _RTC_WakeUpCmd stm8l15x_rtc
+ 00008FBE _RTC_DayLightSavingConfig stm8l15x_rtc
+ 00008FE5 _RTC_GetStoreOperation stm8l15x_rtc
+ 00008FEB _RTC_OutputConfig stm8l15x_rtc
+ 00009012 _RTC_SynchroShiftConfig stm8l15x_rtc
+ 0000904D _RTC_SmoothCalibConfig stm8l15x_rtc
+ 0000908F _RTC_CalibOutputConfig stm8l15x_rtc
+ 000090B3 _RTC_CalibOutputCmd stm8l15x_rtc
+ 000090D7 _RTC_TamperLevelConfig stm8l15x_rtc
+ 00009101 _RTC_TamperFilterConfig stm8l15x_rtc
+ 00009122 _RTC_TamperSamplingFreqConfig stm8l15x_rtc
+ 00009143 _RTC_TamperPinsPrechargeDuration stm8l15x_rtc
+ 00009164 _RTC_TamperCmd stm8l15x_rtc
+ 0000918E _RTC_ITConfig stm8l15x_rtc
+ 000091D6 _RTC_GetFlagStatus stm8l15x_rtc
+ 000091FB _RTC_ClearFlag stm8l15x_rtc
+ 00009208 _RTC_GetITStatus stm8l15x_rtc
+ 0000922C _RTC_ClearITPendingBit stm8l15x_rtc
+ 0000925C __divulong _divulong
+ 000092B7 ___sdcc_external_startup _startup
+ ASxxxx Linker V03.00/V05.40 + sdld, page 10.
+
+Files Linked [ module(s) ]
+
+../STM8L15X_LD/main.rel [ main ]
+../STM8L15X_LD/stm8l15x_it.rel [ stm8l15x_it ]
+../STM8L15X_LD/stm8l15x_usart.rel [ stm8l15x_usart ]
+../STM8L15X_LD/stm8l15x_clk.rel [ stm8l15x_clk ]
+../STM8L15X_LD/stm8l15x_gpio.rel [ stm8l15x_gpio ]
+../STM8L15X_LD/stm8l15x_rtc.rel [ stm8l15x_rtc ]
+
+
+Libraries Linked [ object file ]
+
+/opt/sdcc/bin/../share/sdcc/lib/stm8/stm8.lib
+ [ _divulong.rel ]
+/opt/sdcc/bin/../share/sdcc/lib/stm8/stm8.lib
+ [ _startup.rel ]
+
+ ASxxxx Linker V03.00/V05.40 + sdld, page 11.
+
+User Base Address Definitions
+
+HOME = 0x8000
+DATA = 0x0001
+
+
\ No newline at end of file
diff --git a/firmware/STM8L15X_LD/main.asm b/firmware/STM8L15X_LD/main.asm
new file mode 100644
index 0000000..3ce84e9
--- /dev/null
+++ b/firmware/STM8L15X_LD/main.asm
@@ -0,0 +1,324 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ISO C Compiler
+; Version 4.5.0 #15242 (Linux)
+;--------------------------------------------------------
+ .module main
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _main
+ .globl _USART_Cmd
+ .globl _USART_Init
+ .globl _GPIO_ResetBits
+ .globl _GPIO_SetBits
+ .globl _GPIO_Init
+ .globl _CLK_PeripheralClockConfig
+ .globl _CLK_SYSCLKSourceSwitchCmd
+ .globl _CLK_SYSCLKDivConfig
+ .globl _CLK_GetSYSCLKSource
+ .globl _CLK_SYSCLKSourceConfig
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area INITIALIZED
+;--------------------------------------------------------
+; Stack segment in internal ram
+;--------------------------------------------------------
+ .area SSEG
+__start__stack:
+ .ds 1
+
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area DABS (ABS)
+
+; default segment ordering for linker
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area CONST
+ .area INITIALIZER
+ .area CODE
+
+;--------------------------------------------------------
+; interrupt vector
+;--------------------------------------------------------
+ .area HOME
+__interrupt_vect:
+ int s_GSINIT ; reset
+ int _TRAP_IRQHandler ; trap
+ int 0x000000 ; int0
+ int _FLASH_IRQHandler ; int1
+ int _DMA1_CHANNEL0_1_IRQHandler ; int2
+ int _DMA1_CHANNEL2_3_IRQHandler ; int3
+ int _RTC_CSSLSE_IRQHandler ; int4
+ int _EXTIE_F_PVD_IRQHandler ; int5
+ int _EXTIB_G_IRQHandler ; int6
+ int _EXTID_H_IRQHandler ; int7
+ int _EXTI0_IRQHandler ; int8
+ int _EXTI1_IRQHandler ; int9
+ int _EXTI2_IRQHandler ; int10
+ int _EXTI3_IRQHandler ; int11
+ int _EXTI4_IRQHandler ; int12
+ int _EXTI5_IRQHandler ; int13
+ int _EXTI6_IRQHandler ; int14
+ int _EXTI7_IRQHandler ; int15
+ int _LCD_AES_IRQHandler ; int16
+ int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
+ int _ADC1_COMP_IRQHandler ; int18
+ int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
+ int _TIM2_CC_USART2_RX_IRQHandler ; int20
+ int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
+ int _TIM3_CC_USART3_RX_IRQHandler ; int22
+ int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
+ int _TIM1_CC_IRQHandler ; int24
+ int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
+ int _SPI1_IRQHandler ; int26
+ int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
+ int _USART1_RX_TIM5_CC_IRQHandler ; int28
+ int _I2C1_SPI2_IRQHandler ; int29
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area GSINIT
+ call ___sdcc_external_startup
+ tnz a
+ jreq __sdcc_init_data
+ jp __sdcc_program_startup
+__sdcc_init_data:
+; stm8_genXINIT() start
+ ldw x, #l_DATA
+ jreq 00002$
+00001$:
+ clr (s_DATA - 1, x)
+ decw x
+ jrne 00001$
+00002$:
+ ldw x, #l_INITIALIZER
+ jreq 00004$
+00003$:
+ ld a, (s_INITIALIZER - 1, x)
+ ld (s_INITIALIZED - 1, x), a
+ decw x
+ jrne 00003$
+00004$:
+; stm8_genXINIT() end
+ .area GSFINAL
+ jp __sdcc_program_startup
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME
+ .area HOME
+__sdcc_program_startup:
+ jp _main
+; return from main will return to caller
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CODE
+; ../src/main.c: 24: void main(void)
+; -----------------------------------------
+; function main
+; -----------------------------------------
+_main:
+; ../src/main.c: 27: Led_Init;
+ push #0xc0
+ ld a, #0x10
+ ldw x, #0x500a
+ call _GPIO_Init
+; ../src/main.c: 28: blink(1);
+ clrw x
+ incw x
+ call _blink
+; ../src/main.c: 29: USART_Config();
+ call _USART_Config
+; ../src/main.c: 30: println("Hello");
+ ldw x, #(___str_0+0)
+ call _println
+; ../src/main.c: 31: while (1);
+00102$:
+ jra 00102$
+; ../src/main.c: 32: }
+ ret
+; ../src/main.c: 34: static void CLK_Config(void)
+; -----------------------------------------
+; function CLK_Config
+; -----------------------------------------
+_CLK_Config:
+; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
+ ld a, #0x01
+ call _CLK_SYSCLKSourceSwitchCmd
+; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
+ ld a, #0x08
+ call _CLK_SYSCLKSourceConfig
+; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
+ clr a
+ call _CLK_SYSCLKDivConfig
+; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
+00101$:
+ call _CLK_GetSYSCLKSource
+ cp a, #0x08
+ jrne 00101$
+ ret
+ jra 00101$
+; ../src/main.c: 42: }
+ ret
+; ../src/main.c: 44: static void blink(uint16_t repeats) {
+; -----------------------------------------
+; function blink
+; -----------------------------------------
+_blink:
+ sub sp, #4
+ ldw (0x01, sp), x
+; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
+ clrw x
+ ldw (0x03, sp), x
+00111$:
+ ldw x, (0x03, sp)
+ cpw x, (0x01, sp)
+ jrugt 00113$
+; ../src/main.c: 46: Led_ON;
+ ld a, #0x10
+ ldw x, #0x500a
+ call _GPIO_SetBits
+; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
+ clrw x
+00105$:
+ ldw y, x
+ cpw y, #0x0fa0
+ jrugt 00101$
+ nop
+ incw x
+ jra 00105$
+00101$:
+; ../src/main.c: 48: Led_OFF;
+ ld a, #0x10
+ ldw x, #0x500a
+ call _GPIO_ResetBits
+; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
+ clrw x
+00108$:
+ ldw y, x
+ cpw y, #0x0fa0
+ jrugt 00112$
+ nop
+ incw x
+ jra 00108$
+00112$:
+; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
+ ldw x, (0x03, sp)
+ incw x
+ ldw (0x03, sp), x
+ jra 00111$
+00113$:
+; ../src/main.c: 51: }
+ addw sp, #4
+ ret
+; ../src/main.c: 53: static void putchar(uint8_t Data) {
+; -----------------------------------------
+; function putchar
+; -----------------------------------------
+_putchar:
+; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
+00101$:
+ ldw x, #0x5230
+ push a
+ ld a, (x)
+ ld xh, a
+ pop a
+ tnzw x
+ jrpl 00101$
+; ../src/main.c: 55: USART1->DR = Data;
+ ld 0x5231, a
+; ../src/main.c: 56: }
+ ret
+; ../src/main.c: 58: static void print(const char* s){
+; -----------------------------------------
+; function print
+; -----------------------------------------
+_print:
+; ../src/main.c: 59: while (*s) {
+00101$:
+ ld a, (x)
+ jrne 00121$
+ ret
+00121$:
+; ../src/main.c: 60: putchar(*s++);
+ incw x
+ pushw x
+ call _putchar
+ popw x
+ jra 00101$
+; ../src/main.c: 62: }
+ ret
+; ../src/main.c: 64: static void println(const char* s){
+; -----------------------------------------
+; function println
+; -----------------------------------------
+_println:
+; ../src/main.c: 65: print(s);
+ call _print
+; ../src/main.c: 66: putchar('\n');
+ ld a, #0x0a
+; ../src/main.c: 67: }
+ jp _putchar
+; ../src/main.c: 69: static void USART_Config(void)
+; -----------------------------------------
+; function USART_Config
+; -----------------------------------------
+_USART_Config:
+; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
+ ld a, 0x509e
+ and a, #0xcf
+ ld 0x509e, a
+; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
+ bset 0x509e, #4
+; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
+ push #0xf0
+ ld a, #0x04
+ ldw x, #0x5000
+ call _GPIO_Init
+; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
+ push #0x00
+ ld a, #0x08
+ ldw x, #0x5000
+ call _GPIO_Init
+; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
+ push #0x01
+ ld a, #0x05
+ call _CLK_PeripheralClockConfig
+; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
+ push #0x08
+ push #0x00
+ push #0x00
+ push #0x00
+ push #0x80
+ push #0x25
+ clrw x
+ pushw x
+ ldw x, #0x5230
+ call _USART_Init
+; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
+ ld a, #0x01
+ ldw x, #0x5230
+; ../src/main.c: 84: }
+ jp _USART_Cmd
+ .area CODE
+ .area CONST
+ .area CONST
+___str_0:
+ .ascii "Hello"
+ .db 0x00
+ .area CODE
+ .area INITIALIZER
+ .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/main.lst b/firmware/STM8L15X_LD/main.lst
new file mode 100644
index 0000000..21a7a08
--- /dev/null
+++ b/firmware/STM8L15X_LD/main.lst
@@ -0,0 +1,324 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module main
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _main
+ 11 .globl _USART_Cmd
+ 12 .globl _USART_Init
+ 13 .globl _GPIO_ResetBits
+ 14 .globl _GPIO_SetBits
+ 15 .globl _GPIO_Init
+ 16 .globl _CLK_PeripheralClockConfig
+ 17 .globl _CLK_SYSCLKSourceSwitchCmd
+ 18 .globl _CLK_SYSCLKDivConfig
+ 19 .globl _CLK_GetSYSCLKSource
+ 20 .globl _CLK_SYSCLKSourceConfig
+ 21 ;--------------------------------------------------------
+ 22 ; ram data
+ 23 ;--------------------------------------------------------
+ 24 .area DATA
+ 25 ;--------------------------------------------------------
+ 26 ; ram data
+ 27 ;--------------------------------------------------------
+ 28 .area INITIALIZED
+ 29 ;--------------------------------------------------------
+ 30 ; Stack segment in internal ram
+ 31 ;--------------------------------------------------------
+ 32 .area SSEG
+ 000000 33 __start__stack:
+ 000000 34 .ds 1
+ 35
+ 36 ;--------------------------------------------------------
+ 37 ; absolute external ram data
+ 38 ;--------------------------------------------------------
+ 39 .area DABS (ABS)
+ 40
+ 41 ; default segment ordering for linker
+ 42 .area HOME
+ 43 .area GSINIT
+ 44 .area GSFINAL
+ 45 .area CONST
+ 46 .area INITIALIZER
+ 47 .area CODE
+ 48
+ 49 ;--------------------------------------------------------
+ 50 ; interrupt vector
+ 51 ;--------------------------------------------------------
+ 52 .area HOME
+ 000000 53 __interrupt_vect:
+ 000000 82v00u00u00 54 int s_GSINIT ; reset
+ 000004 82v00u00u00 55 int _TRAP_IRQHandler ; trap
+ 000008 82 00 00 00 56 int 0x000000 ; int0
+ 00000C 82v00u00u00 57 int _FLASH_IRQHandler ; int1
+ 000010 82v00u00u00 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
+ 000014 82v00u00u00 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
+ 000018 82v00u00u00 60 int _RTC_CSSLSE_IRQHandler ; int4
+ 00001C 82v00u00u00 61 int _EXTIE_F_PVD_IRQHandler ; int5
+ 000020 82v00u00u00 62 int _EXTIB_G_IRQHandler ; int6
+ 000024 82v00u00u00 63 int _EXTID_H_IRQHandler ; int7
+ 000028 82v00u00u00 64 int _EXTI0_IRQHandler ; int8
+ 00002C 82v00u00u00 65 int _EXTI1_IRQHandler ; int9
+ 000030 82v00u00u00 66 int _EXTI2_IRQHandler ; int10
+ 000034 82v00u00u00 67 int _EXTI3_IRQHandler ; int11
+ 000038 82v00u00u00 68 int _EXTI4_IRQHandler ; int12
+ 00003C 82v00u00u00 69 int _EXTI5_IRQHandler ; int13
+ 000040 82v00u00u00 70 int _EXTI6_IRQHandler ; int14
+ 000044 82v00u00u00 71 int _EXTI7_IRQHandler ; int15
+ 000048 82v00u00u00 72 int _LCD_AES_IRQHandler ; int16
+ 00004C 82v00u00u00 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
+ 000050 82v00u00u00 74 int _ADC1_COMP_IRQHandler ; int18
+ 000054 82v00u00u00 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
+ 000058 82v00u00u00 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
+ 00005C 82v00u00u00 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
+ 000060 82v00u00u00 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
+ 000064 82v00u00u00 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
+ 000068 82v00u00u00 80 int _TIM1_CC_IRQHandler ; int24
+ 00006C 82v00u00u00 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
+ 000070 82v00u00u00 82 int _SPI1_IRQHandler ; int26
+ 000074 82v00u00u00 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
+ 000078 82v00u00u00 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
+ 00007C 82v00u00u00 85 int _I2C1_SPI2_IRQHandler ; int29
+ 86 ;--------------------------------------------------------
+ 87 ; global & static initialisations
+ 88 ;--------------------------------------------------------
+ 89 .area HOME
+ 90 .area GSINIT
+ 91 .area GSFINAL
+ 92 .area GSINIT
+ 000000 CDr00r00 [ 4] 93 call ___sdcc_external_startup
+ 000003 4D [ 1] 94 tnz a
+ 000004 27 03 [ 1] 95 jreq __sdcc_init_data
+ 000006 CCr00r80 [ 2] 96 jp __sdcc_program_startup
+ 000009 97 __sdcc_init_data:
+ 98 ; stm8_genXINIT() start
+ 000009 AEr00r00 [ 2] 99 ldw x, #l_DATA
+ 00000C 27 07 [ 1] 100 jreq 00002$
+ 00000E 101 00001$:
+ 00000E 72 4FuFFuFF [ 1] 102 clr (s_DATA - 1, x)
+ 000012 5A [ 2] 103 decw x
+ 000013 26 F9 [ 1] 104 jrne 00001$
+ 000015 105 00002$:
+ 000015 AEr00r00 [ 2] 106 ldw x, #l_INITIALIZER
+ 000018 27 09 [ 1] 107 jreq 00004$
+ 00001A 108 00003$:
+ 00001A D6uFFuFF [ 1] 109 ld a, (s_INITIALIZER - 1, x)
+ 00001D D7uFFuFF [ 1] 110 ld (s_INITIALIZED - 1, x), a
+ 000020 5A [ 2] 111 decw x
+ 000021 26 F7 [ 1] 112 jrne 00003$
+ 000023 113 00004$:
+ 114 ; stm8_genXINIT() end
+ 115 .area GSFINAL
+ 000000 CCr00r80 [ 2] 116 jp __sdcc_program_startup
+ 117 ;--------------------------------------------------------
+ 118 ; Home
+ 119 ;--------------------------------------------------------
+ 120 .area HOME
+ 121 .area HOME
+ 000080 122 __sdcc_program_startup:
+ 000080 CCr00r00 [ 2] 123 jp _main
+ 124 ; return from main will return to caller
+ 125 ;--------------------------------------------------------
+ 126 ; code
+ 127 ;--------------------------------------------------------
+ 128 .area CODE
+ 129 ; ../src/main.c: 24: void main(void)
+ 130 ; -----------------------------------------
+ 131 ; function main
+ 132 ; -----------------------------------------
+ 000000 133 _main:
+ 134 ; ../src/main.c: 27: Led_Init;
+ 000000 4B C0 [ 1] 135 push #0xc0
+ 000002 A6 10 [ 1] 136 ld a, #0x10
+ 000004 AE 50 0A [ 2] 137 ldw x, #0x500a
+ 000007 CDr00r00 [ 4] 138 call _GPIO_Init
+ 139 ; ../src/main.c: 28: blink(1);
+ 00000A 5F [ 1] 140 clrw x
+ 00000B 5C [ 1] 141 incw x
+ 00000C CDr00r34 [ 4] 142 call _blink
+ 143 ; ../src/main.c: 29: USART_Config();
+ 00000F CDr00r98 [ 4] 144 call _USART_Config
+ 145 ; ../src/main.c: 30: println("Hello");
+ 000012 AEr00r00 [ 2] 146 ldw x, #(___str_0+0)
+ 000015 CDr00r90 [ 4] 147 call _println
+ 148 ; ../src/main.c: 31: while (1);
+ 000018 149 00102$:
+ 000018 20 FE [ 2] 150 jra 00102$
+ 151 ; ../src/main.c: 32: }
+ 00001A 81 [ 4] 152 ret
+ 153 ; ../src/main.c: 34: static void CLK_Config(void)
+ 154 ; -----------------------------------------
+ 155 ; function CLK_Config
+ 156 ; -----------------------------------------
+ 00001B 157 _CLK_Config:
+ 158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
+ 00001B A6 01 [ 1] 159 ld a, #0x01
+ 00001D CDr00r00 [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
+ 161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
+ 000020 A6 08 [ 1] 162 ld a, #0x08
+ 000022 CDr00r00 [ 4] 163 call _CLK_SYSCLKSourceConfig
+ 164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
+ 000025 4F [ 1] 165 clr a
+ 000026 CDr00r00 [ 4] 166 call _CLK_SYSCLKDivConfig
+ 167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
+ 000029 168 00101$:
+ 000029 CDr00r00 [ 4] 169 call _CLK_GetSYSCLKSource
+ 00002C A1 08 [ 1] 170 cp a, #0x08
+ 00002E 26 F9 [ 1] 171 jrne 00101$
+ 000030 81 [ 4] 172 ret
+ 000031 20 F6 [ 2] 173 jra 00101$
+ 174 ; ../src/main.c: 42: }
+ 000033 81 [ 4] 175 ret
+ 176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
+ 177 ; -----------------------------------------
+ 178 ; function blink
+ 179 ; -----------------------------------------
+ 000034 180 _blink:
+ 000034 52 04 [ 2] 181 sub sp, #4
+ 000036 1F 01 [ 2] 182 ldw (0x01, sp), x
+ 183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
+ 000038 5F [ 1] 184 clrw x
+ 000039 1F 03 [ 2] 185 ldw (0x03, sp), x
+ 00003B 186 00111$:
+ 00003B 1E 03 [ 2] 187 ldw x, (0x03, sp)
+ 00003D 13 01 [ 2] 188 cpw x, (0x01, sp)
+ 00003F 22 31 [ 1] 189 jrugt 00113$
+ 190 ; ../src/main.c: 46: Led_ON;
+ 000041 A6 10 [ 1] 191 ld a, #0x10
+ 000043 AE 50 0A [ 2] 192 ldw x, #0x500a
+ 000046 CDr00r00 [ 4] 193 call _GPIO_SetBits
+ 194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
+ 000049 5F [ 1] 195 clrw x
+ 00004A 196 00105$:
+ 00004A 90 93 [ 1] 197 ldw y, x
+ 00004C 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
+ 000050 22 04 [ 1] 199 jrugt 00101$
+ 000052 9D [ 1] 200 nop
+ 000053 5C [ 1] 201 incw x
+ 000054 20 F4 [ 2] 202 jra 00105$
+ 000056 203 00101$:
+ 204 ; ../src/main.c: 48: Led_OFF;
+ 000056 A6 10 [ 1] 205 ld a, #0x10
+ 000058 AE 50 0A [ 2] 206 ldw x, #0x500a
+ 00005B CDr00r00 [ 4] 207 call _GPIO_ResetBits
+ 208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
+ 00005E 5F [ 1] 209 clrw x
+ 00005F 210 00108$:
+ 00005F 90 93 [ 1] 211 ldw y, x
+ 000061 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
+ 000065 22 04 [ 1] 213 jrugt 00112$
+ 000067 9D [ 1] 214 nop
+ 000068 5C [ 1] 215 incw x
+ 000069 20 F4 [ 2] 216 jra 00108$
+ 00006B 217 00112$:
+ 218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
+ 00006B 1E 03 [ 2] 219 ldw x, (0x03, sp)
+ 00006D 5C [ 1] 220 incw x
+ 00006E 1F 03 [ 2] 221 ldw (0x03, sp), x
+ 000070 20 C9 [ 2] 222 jra 00111$
+ 000072 223 00113$:
+ 224 ; ../src/main.c: 51: }
+ 000072 5B 04 [ 2] 225 addw sp, #4
+ 000074 81 [ 4] 226 ret
+ 227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
+ 228 ; -----------------------------------------
+ 229 ; function putchar
+ 230 ; -----------------------------------------
+ 000075 231 _putchar:
+ 232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
+ 000075 233 00101$:
+ 000075 AE 52 30 [ 2] 234 ldw x, #0x5230
+ 000078 88 [ 1] 235 push a
+ 000079 F6 [ 1] 236 ld a, (x)
+ 00007A 95 [ 1] 237 ld xh, a
+ 00007B 84 [ 1] 238 pop a
+ 00007C 5D [ 2] 239 tnzw x
+ 00007D 2A F6 [ 1] 240 jrpl 00101$
+ 241 ; ../src/main.c: 55: USART1->DR = Data;
+ 00007F C7 52 31 [ 1] 242 ld 0x5231, a
+ 243 ; ../src/main.c: 56: }
+ 000082 81 [ 4] 244 ret
+ 245 ; ../src/main.c: 58: static void print(const char* s){
+ 246 ; -----------------------------------------
+ 247 ; function print
+ 248 ; -----------------------------------------
+ 000083 249 _print:
+ 250 ; ../src/main.c: 59: while (*s) {
+ 000083 251 00101$:
+ 000083 F6 [ 1] 252 ld a, (x)
+ 000084 26 01 [ 1] 253 jrne 00121$
+ 000086 81 [ 4] 254 ret
+ 000087 255 00121$:
+ 256 ; ../src/main.c: 60: putchar(*s++);
+ 000087 5C [ 1] 257 incw x
+ 000088 89 [ 2] 258 pushw x
+ 000089 CDr00r75 [ 4] 259 call _putchar
+ 00008C 85 [ 2] 260 popw x
+ 00008D 20 F4 [ 2] 261 jra 00101$
+ 262 ; ../src/main.c: 62: }
+ 00008F 81 [ 4] 263 ret
+ 264 ; ../src/main.c: 64: static void println(const char* s){
+ 265 ; -----------------------------------------
+ 266 ; function println
+ 267 ; -----------------------------------------
+ 000090 268 _println:
+ 269 ; ../src/main.c: 65: print(s);
+ 000090 CDr00r83 [ 4] 270 call _print
+ 271 ; ../src/main.c: 66: putchar('\n');
+ 000093 A6 0A [ 1] 272 ld a, #0x0a
+ 273 ; ../src/main.c: 67: }
+ 000095 CCr00r75 [ 2] 274 jp _putchar
+ 275 ; ../src/main.c: 69: static void USART_Config(void)
+ 276 ; -----------------------------------------
+ 277 ; function USART_Config
+ 278 ; -----------------------------------------
+ 000098 279 _USART_Config:
+ 280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
+ 000098 C6 50 9E [ 1] 281 ld a, 0x509e
+ 00009B A4 CF [ 1] 282 and a, #0xcf
+ 00009D C7 50 9E [ 1] 283 ld 0x509e, a
+ 284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
+ 0000A0 72 18 50 9E [ 1] 285 bset 0x509e, #4
+ 286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
+ 0000A4 4B F0 [ 1] 287 push #0xf0
+ 0000A6 A6 04 [ 1] 288 ld a, #0x04
+ 0000A8 AE 50 00 [ 2] 289 ldw x, #0x5000
+ 0000AB CDr00r00 [ 4] 290 call _GPIO_Init
+ 291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
+ 0000AE 4B 00 [ 1] 292 push #0x00
+ 0000B0 A6 08 [ 1] 293 ld a, #0x08
+ 0000B2 AE 50 00 [ 2] 294 ldw x, #0x5000
+ 0000B5 CDr00r00 [ 4] 295 call _GPIO_Init
+ 296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
+ 0000B8 4B 01 [ 1] 297 push #0x01
+ 0000BA A6 05 [ 1] 298 ld a, #0x05
+ 0000BC CDr00r00 [ 4] 299 call _CLK_PeripheralClockConfig
+ 300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
+ 0000BF 4B 08 [ 1] 301 push #0x08
+ 0000C1 4B 00 [ 1] 302 push #0x00
+ 0000C3 4B 00 [ 1] 303 push #0x00
+ 0000C5 4B 00 [ 1] 304 push #0x00
+ 0000C7 4B 80 [ 1] 305 push #0x80
+ 0000C9 4B 25 [ 1] 306 push #0x25
+ 0000CB 5F [ 1] 307 clrw x
+ 0000CC 89 [ 2] 308 pushw x
+ 0000CD AE 52 30 [ 2] 309 ldw x, #0x5230
+ 0000D0 CDr00r00 [ 4] 310 call _USART_Init
+ 311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
+ 0000D3 A6 01 [ 1] 312 ld a, #0x01
+ 0000D5 AE 52 30 [ 2] 313 ldw x, #0x5230
+ 314 ; ../src/main.c: 84: }
+ 0000D8 CCr00r00 [ 2] 315 jp _USART_Cmd
+ 316 .area CODE
+ 317 .area CONST
+ 318 .area CONST
+ 000000 319 ___str_0:
+ 000000 48 65 6C 6C 6F 320 .ascii "Hello"
+ 000005 00 321 .db 0x00
+ 322 .area CODE
+ 323 .area INITIALIZER
+ 324 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/main.rel b/firmware/STM8L15X_LD/main.rel
new file mode 100644
index 0000000..3259d7f
--- /dev/null
+++ b/firmware/STM8L15X_LD/main.rel
@@ -0,0 +1,220 @@
+XH3
+H C areas 31 global symbols
+M main
+S _GPIO_Init Ref000000
+S _CLK_GetSYSCLKSource Ref000000
+S _GPIO_ResetBits Ref000000
+S _DMA1_CHANNEL0_1_IRQHandler Ref000000
+S _SPI1_IRQHandler Ref000000
+S _DMA1_CHANNEL2_3_IRQHandler Ref000000
+S s_INITIALIZED Ref000000
+S _EXTIB_G_IRQHandler Ref000000
+S _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler Ref000000
+S _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler Ref000000
+S _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler Ref000000
+S _EXTID_H_IRQHandler Ref000000
+S l_INITIALIZER Ref000000
+S _TIM2_CC_USART2_RX_IRQHandler Ref000000
+S _EXTI0_IRQHandler Ref000000
+S _EXTI1_IRQHandler Ref000000
+S _I2C1_SPI2_IRQHandler Ref000000
+S _USART1_RX_TIM5_CC_IRQHandler Ref000000
+S _TIM3_CC_USART3_RX_IRQHandler Ref000000
+S _EXTI2_IRQHandler Ref000000
+S _EXTI3_IRQHandler Ref000000
+S _EXTIE_F_PVD_IRQHandler Ref000000
+S s_INITIALIZER Ref000000
+S _EXTI4_IRQHandler Ref000000
+S _FLASH_IRQHandler Ref000000
+S _EXTI5_IRQHandler Ref000000
+S _EXTI6_IRQHandler Ref000000
+S _EXTI7_IRQHandler Ref000000
+S .__.ABS. Def000000
+S _TIM1_UPD_OVF_TRG_COM_IRQHandler Ref000000
+S _TRAP_IRQHandler Ref000000
+S s_GSINIT Ref000000
+S _USART_Init Ref000000
+S _USART_Cmd Ref000000
+S _TIM4_UPD_OVF_TRG_IRQHandler Ref000000
+S l_DATA Ref000000
+S _CLK_PeripheralClockConfig Ref000000
+S _TIM1_CC_IRQHandler Ref000000
+S _CLK_SYSCLKSourceSwitchCmd Ref000000
+S _CLK_SYSCLKDivConfig Ref000000
+S _GPIO_SetBits Ref000000
+S s_DATA Ref000000
+S _SWITCH_CSS_BREAK_DAC_IRQHandler Ref000000
+S ___sdcc_external_startup Ref000000
+S _ADC1_COMP_IRQHandler Ref000000
+S _LCD_AES_IRQHandler Ref000000
+S _CLK_SYSCLKSourceConfig Ref000000
+S _RTC_CSSLSE_IRQHandler Ref000000
+A _CODE size 0 flags 0 addr 0
+A DATA size 0 flags 0 addr 0
+A INITIALIZED size 0 flags 0 addr 0
+A SSEG size 1 flags 0 addr 0
+A DABS size 0 flags 8 addr 0
+A HOME size 83 flags 0 addr 0
+A GSINIT size 23 flags 0 addr 0
+A GSFINAL size 3 flags 0 addr 0
+A CONST size 6 flags 0 addr 0
+A INITIALIZER size 0 flags 0 addr 0
+A CODE size DB flags 0 addr 0
+S _main Def000000
+A CABS size 0 flags 8 addr 0
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+R 00 00 00 03
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+T 00 00 6B
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+T 00 00 90 CD 00 83 A6 0A CC 00 75
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+T 00 00 BF 4B 08 4B 00 4B 00 4B 00 4B 80 4B 25 5F
+R 00 00 00 0A
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+R 00 00 00 0A 02 08 00 20
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+T 00 00 00 48 65 6C 6C 6F 00
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diff --git a/firmware/STM8L15X_LD/main.rst b/firmware/STM8L15X_LD/main.rst
new file mode 100644
index 0000000..6dd727b
--- /dev/null
+++ b/firmware/STM8L15X_LD/main.rst
@@ -0,0 +1,324 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module main
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _main
+ 11 .globl _USART_Cmd
+ 12 .globl _USART_Init
+ 13 .globl _GPIO_ResetBits
+ 14 .globl _GPIO_SetBits
+ 15 .globl _GPIO_Init
+ 16 .globl _CLK_PeripheralClockConfig
+ 17 .globl _CLK_SYSCLKSourceSwitchCmd
+ 18 .globl _CLK_SYSCLKDivConfig
+ 19 .globl _CLK_GetSYSCLKSource
+ 20 .globl _CLK_SYSCLKSourceConfig
+ 21 ;--------------------------------------------------------
+ 22 ; ram data
+ 23 ;--------------------------------------------------------
+ 24 .area DATA
+ 25 ;--------------------------------------------------------
+ 26 ; ram data
+ 27 ;--------------------------------------------------------
+ 28 .area INITIALIZED
+ 29 ;--------------------------------------------------------
+ 30 ; Stack segment in internal ram
+ 31 ;--------------------------------------------------------
+ 32 .area SSEG
+ 000001 33 __start__stack:
+ 000001 34 .ds 1
+ 35
+ 36 ;--------------------------------------------------------
+ 37 ; absolute external ram data
+ 38 ;--------------------------------------------------------
+ 39 .area DABS (ABS)
+ 40
+ 41 ; default segment ordering for linker
+ 42 .area HOME
+ 43 .area GSINIT
+ 44 .area GSFINAL
+ 45 .area CONST
+ 46 .area INITIALIZER
+ 47 .area CODE
+ 48
+ 49 ;--------------------------------------------------------
+ 50 ; interrupt vector
+ 51 ;--------------------------------------------------------
+ 52 .area HOME
+ 008000 53 __interrupt_vect:
+ 008000 82 00 80 83 54 int s_GSINIT ; reset
+ 008004 82 00 81 8F 55 int _TRAP_IRQHandler ; trap
+ 008008 82 00 00 00 56 int 0x000000 ; int0
+ 00800C 82 00 81 90 57 int _FLASH_IRQHandler ; int1
+ 008010 82 00 81 91 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
+ 008014 82 00 81 92 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
+ 008018 82 00 81 93 60 int _RTC_CSSLSE_IRQHandler ; int4
+ 00801C 82 00 81 94 61 int _EXTIE_F_PVD_IRQHandler ; int5
+ 008020 82 00 81 95 62 int _EXTIB_G_IRQHandler ; int6
+ 008024 82 00 81 96 63 int _EXTID_H_IRQHandler ; int7
+ 008028 82 00 81 97 64 int _EXTI0_IRQHandler ; int8
+ 00802C 82 00 81 98 65 int _EXTI1_IRQHandler ; int9
+ 008030 82 00 81 99 66 int _EXTI2_IRQHandler ; int10
+ 008034 82 00 81 9A 67 int _EXTI3_IRQHandler ; int11
+ 008038 82 00 81 9B 68 int _EXTI4_IRQHandler ; int12
+ 00803C 82 00 81 9C 69 int _EXTI5_IRQHandler ; int13
+ 008040 82 00 81 9D 70 int _EXTI6_IRQHandler ; int14
+ 008044 82 00 81 9E 71 int _EXTI7_IRQHandler ; int15
+ 008048 82 00 81 9F 72 int _LCD_AES_IRQHandler ; int16
+ 00804C 82 00 81 A0 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
+ 008050 82 00 81 A1 74 int _ADC1_COMP_IRQHandler ; int18
+ 008054 82 00 81 A2 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
+ 008058 82 00 81 A3 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
+ 00805C 82 00 81 A4 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
+ 008060 82 00 81 A5 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
+ 008064 82 00 81 A6 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
+ 008068 82 00 81 A7 80 int _TIM1_CC_IRQHandler ; int24
+ 00806C 82 00 81 A8 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
+ 008070 82 00 81 A9 82 int _SPI1_IRQHandler ; int26
+ 008074 82 00 81 AA 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
+ 008078 82 00 81 AB 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
+ 00807C 82 00 81 AC 85 int _I2C1_SPI2_IRQHandler ; int29
+ 86 ;--------------------------------------------------------
+ 87 ; global & static initialisations
+ 88 ;--------------------------------------------------------
+ 89 .area HOME
+ 90 .area GSINIT
+ 91 .area GSFINAL
+ 92 .area GSINIT
+ 008083 CD 92 B7 [ 4] 93 call ___sdcc_external_startup
+ 008086 4D [ 1] 94 tnz a
+ 008087 27 03 [ 1] 95 jreq __sdcc_init_data
+ 008089 CC 80 80 [ 2] 96 jp __sdcc_program_startup
+ 00808C 97 __sdcc_init_data:
+ 98 ; stm8_genXINIT() start
+ 00808C AE 00 00 [ 2] 99 ldw x, #l_DATA
+ 00808F 27 07 [ 1] 100 jreq 00002$
+ 008091 101 00001$:
+ 008091 72 4F 00 00 [ 1] 102 clr (s_DATA - 1, x)
+ 008095 5A [ 2] 103 decw x
+ 008096 26 F9 [ 1] 104 jrne 00001$
+ 008098 105 00002$:
+ 008098 AE 00 00 [ 2] 106 ldw x, #l_INITIALIZER
+ 00809B 27 09 [ 1] 107 jreq 00004$
+ 00809D 108 00003$:
+ 00809D D6 80 B3 [ 1] 109 ld a, (s_INITIALIZER - 1, x)
+ 0080A0 D7 00 00 [ 1] 110 ld (s_INITIALIZED - 1, x), a
+ 0080A3 5A [ 2] 111 decw x
+ 0080A4 26 F7 [ 1] 112 jrne 00003$
+ 0080A6 113 00004$:
+ 114 ; stm8_genXINIT() end
+ 115 .area GSFINAL
+ 0080A6 CC 80 80 [ 2] 116 jp __sdcc_program_startup
+ 117 ;--------------------------------------------------------
+ 118 ; Home
+ 119 ;--------------------------------------------------------
+ 120 .area HOME
+ 121 .area HOME
+ 008080 122 __sdcc_program_startup:
+ 008080 CC 80 B4 [ 2] 123 jp _main
+ 124 ; return from main will return to caller
+ 125 ;--------------------------------------------------------
+ 126 ; code
+ 127 ;--------------------------------------------------------
+ 128 .area CODE
+ 129 ; ../src/main.c: 24: void main(void)
+ 130 ; -----------------------------------------
+ 131 ; function main
+ 132 ; -----------------------------------------
+ 0080B4 133 _main:
+ 134 ; ../src/main.c: 27: Led_Init;
+ 0080B4 4B C0 [ 1] 135 push #0xc0
+ 0080B6 A6 10 [ 1] 136 ld a, #0x10
+ 0080B8 AE 50 0A [ 2] 137 ldw x, #0x500a
+ 0080BB CD 88 28 [ 4] 138 call _GPIO_Init
+ 139 ; ../src/main.c: 28: blink(1);
+ 0080BE 5F [ 1] 140 clrw x
+ 0080BF 5C [ 1] 141 incw x
+ 0080C0 CD 80 E8 [ 4] 142 call _blink
+ 143 ; ../src/main.c: 29: USART_Config();
+ 0080C3 CD 81 4C [ 4] 144 call _USART_Config
+ 145 ; ../src/main.c: 30: println("Hello");
+ 0080C6 AE 80 A9 [ 2] 146 ldw x, #(___str_0+0)
+ 0080C9 CD 81 44 [ 4] 147 call _println
+ 148 ; ../src/main.c: 31: while (1);
+ 0080CC 149 00102$:
+ 0080CC 20 FE [ 2] 150 jra 00102$
+ 151 ; ../src/main.c: 32: }
+ 0080CE 81 [ 4] 152 ret
+ 153 ; ../src/main.c: 34: static void CLK_Config(void)
+ 154 ; -----------------------------------------
+ 155 ; function CLK_Config
+ 156 ; -----------------------------------------
+ 0080CF 157 _CLK_Config:
+ 158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
+ 0080CF A6 01 [ 1] 159 ld a, #0x01
+ 0080D1 CD 86 2D [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
+ 161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
+ 0080D4 A6 08 [ 1] 162 ld a, #0x08
+ 0080D6 CD 85 CE [ 4] 163 call _CLK_SYSCLKSourceConfig
+ 164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
+ 0080D9 4F [ 1] 165 clr a
+ 0080DA CD 86 29 [ 4] 166 call _CLK_SYSCLKDivConfig
+ 167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
+ 0080DD 168 00101$:
+ 0080DD CD 85 D2 [ 4] 169 call _CLK_GetSYSCLKSource
+ 0080E0 A1 08 [ 1] 170 cp a, #0x08
+ 0080E2 26 F9 [ 1] 171 jrne 00101$
+ 0080E4 81 [ 4] 172 ret
+ 0080E5 20 F6 [ 2] 173 jra 00101$
+ 174 ; ../src/main.c: 42: }
+ 0080E7 81 [ 4] 175 ret
+ 176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
+ 177 ; -----------------------------------------
+ 178 ; function blink
+ 179 ; -----------------------------------------
+ 0080E8 180 _blink:
+ 0080E8 52 04 [ 2] 181 sub sp, #4
+ 0080EA 1F 01 [ 2] 182 ldw (0x01, sp), x
+ 183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
+ 0080EC 5F [ 1] 184 clrw x
+ 0080ED 1F 03 [ 2] 185 ldw (0x03, sp), x
+ 0080EF 186 00111$:
+ 0080EF 1E 03 [ 2] 187 ldw x, (0x03, sp)
+ 0080F1 13 01 [ 2] 188 cpw x, (0x01, sp)
+ 0080F3 22 31 [ 1] 189 jrugt 00113$
+ 190 ; ../src/main.c: 46: Led_ON;
+ 0080F5 A6 10 [ 1] 191 ld a, #0x10
+ 0080F7 AE 50 0A [ 2] 192 ldw x, #0x500a
+ 0080FA CD 88 D6 [ 4] 193 call _GPIO_SetBits
+ 194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
+ 0080FD 5F [ 1] 195 clrw x
+ 0080FE 196 00105$:
+ 0080FE 90 93 [ 1] 197 ldw y, x
+ 008100 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
+ 008104 22 04 [ 1] 199 jrugt 00101$
+ 008106 9D [ 1] 200 nop
+ 008107 5C [ 1] 201 incw x
+ 008108 20 F4 [ 2] 202 jra 00105$
+ 00810A 203 00101$:
+ 204 ; ../src/main.c: 48: Led_OFF;
+ 00810A A6 10 [ 1] 205 ld a, #0x10
+ 00810C AE 50 0A [ 2] 206 ldw x, #0x500a
+ 00810F CD 88 DF [ 4] 207 call _GPIO_ResetBits
+ 208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
+ 008112 5F [ 1] 209 clrw x
+ 008113 210 00108$:
+ 008113 90 93 [ 1] 211 ldw y, x
+ 008115 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
+ 008119 22 04 [ 1] 213 jrugt 00112$
+ 00811B 9D [ 1] 214 nop
+ 00811C 5C [ 1] 215 incw x
+ 00811D 20 F4 [ 2] 216 jra 00108$
+ 00811F 217 00112$:
+ 218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
+ 00811F 1E 03 [ 2] 219 ldw x, (0x03, sp)
+ 008121 5C [ 1] 220 incw x
+ 008122 1F 03 [ 2] 221 ldw (0x03, sp), x
+ 008124 20 C9 [ 2] 222 jra 00111$
+ 008126 223 00113$:
+ 224 ; ../src/main.c: 51: }
+ 008126 5B 04 [ 2] 225 addw sp, #4
+ 008128 81 [ 4] 226 ret
+ 227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
+ 228 ; -----------------------------------------
+ 229 ; function putchar
+ 230 ; -----------------------------------------
+ 008129 231 _putchar:
+ 232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
+ 008129 233 00101$:
+ 008129 AE 52 30 [ 2] 234 ldw x, #0x5230
+ 00812C 88 [ 1] 235 push a
+ 00812D F6 [ 1] 236 ld a, (x)
+ 00812E 95 [ 1] 237 ld xh, a
+ 00812F 84 [ 1] 238 pop a
+ 008130 5D [ 2] 239 tnzw x
+ 008131 2A F6 [ 1] 240 jrpl 00101$
+ 241 ; ../src/main.c: 55: USART1->DR = Data;
+ 008133 C7 52 31 [ 1] 242 ld 0x5231, a
+ 243 ; ../src/main.c: 56: }
+ 008136 81 [ 4] 244 ret
+ 245 ; ../src/main.c: 58: static void print(const char* s){
+ 246 ; -----------------------------------------
+ 247 ; function print
+ 248 ; -----------------------------------------
+ 008137 249 _print:
+ 250 ; ../src/main.c: 59: while (*s) {
+ 008137 251 00101$:
+ 008137 F6 [ 1] 252 ld a, (x)
+ 008138 26 01 [ 1] 253 jrne 00121$
+ 00813A 81 [ 4] 254 ret
+ 00813B 255 00121$:
+ 256 ; ../src/main.c: 60: putchar(*s++);
+ 00813B 5C [ 1] 257 incw x
+ 00813C 89 [ 2] 258 pushw x
+ 00813D CD 81 29 [ 4] 259 call _putchar
+ 008140 85 [ 2] 260 popw x
+ 008141 20 F4 [ 2] 261 jra 00101$
+ 262 ; ../src/main.c: 62: }
+ 008143 81 [ 4] 263 ret
+ 264 ; ../src/main.c: 64: static void println(const char* s){
+ 265 ; -----------------------------------------
+ 266 ; function println
+ 267 ; -----------------------------------------
+ 008144 268 _println:
+ 269 ; ../src/main.c: 65: print(s);
+ 008144 CD 81 37 [ 4] 270 call _print
+ 271 ; ../src/main.c: 66: putchar('\n');
+ 008147 A6 0A [ 1] 272 ld a, #0x0a
+ 273 ; ../src/main.c: 67: }
+ 008149 CC 81 29 [ 2] 274 jp _putchar
+ 275 ; ../src/main.c: 69: static void USART_Config(void)
+ 276 ; -----------------------------------------
+ 277 ; function USART_Config
+ 278 ; -----------------------------------------
+ 00814C 279 _USART_Config:
+ 280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
+ 00814C C6 50 9E [ 1] 281 ld a, 0x509e
+ 00814F A4 CF [ 1] 282 and a, #0xcf
+ 008151 C7 50 9E [ 1] 283 ld 0x509e, a
+ 284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
+ 008154 72 18 50 9E [ 1] 285 bset 0x509e, #4
+ 286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
+ 008158 4B F0 [ 1] 287 push #0xf0
+ 00815A A6 04 [ 1] 288 ld a, #0x04
+ 00815C AE 50 00 [ 2] 289 ldw x, #0x5000
+ 00815F CD 88 28 [ 4] 290 call _GPIO_Init
+ 291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
+ 008162 4B 00 [ 1] 292 push #0x00
+ 008164 A6 08 [ 1] 293 ld a, #0x08
+ 008166 AE 50 00 [ 2] 294 ldw x, #0x5000
+ 008169 CD 88 28 [ 4] 295 call _GPIO_Init
+ 296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
+ 00816C 4B 01 [ 1] 297 push #0x01
+ 00816E A6 05 [ 1] 298 ld a, #0x05
+ 008170 CD 86 51 [ 4] 299 call _CLK_PeripheralClockConfig
+ 300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
+ 008173 4B 08 [ 1] 301 push #0x08
+ 008175 4B 00 [ 1] 302 push #0x00
+ 008177 4B 00 [ 1] 303 push #0x00
+ 008179 4B 00 [ 1] 304 push #0x00
+ 00817B 4B 80 [ 1] 305 push #0x80
+ 00817D 4B 25 [ 1] 306 push #0x25
+ 00817F 5F [ 1] 307 clrw x
+ 008180 89 [ 2] 308 pushw x
+ 008181 AE 52 30 [ 2] 309 ldw x, #0x5230
+ 008184 CD 81 C4 [ 4] 310 call _USART_Init
+ 311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
+ 008187 A6 01 [ 1] 312 ld a, #0x01
+ 008189 AE 52 30 [ 2] 313 ldw x, #0x5230
+ 314 ; ../src/main.c: 84: }
+ 00818C CC 82 7B [ 2] 315 jp _USART_Cmd
+ 316 .area CODE
+ 317 .area CONST
+ 318 .area CONST
+ 0080A9 319 ___str_0:
+ 0080A9 48 65 6C 6C 6F 320 .ascii "Hello"
+ 0080AE 00 321 .db 0x00
+ 322 .area CODE
+ 323 .area INITIALIZER
+ 324 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/main.sym b/firmware/STM8L15X_LD/main.sym
new file mode 100644
index 0000000..0fc5fba
--- /dev/null
+++ b/firmware/STM8L15X_LD/main.sym
@@ -0,0 +1,92 @@
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
+Hexadecimal [24-Bits]
+
+Symbol Table
+
+ .__.$$$. = 002710 L
+ .__.ABS. = 000000 G
+ .__.CPU. = 000000 L
+ .__.H$L. = 000001 L
+ _ADC1_COMP_IRQHandler ****** GX
+ A _CLK_Config 00001B R
+ _CLK_GetSYSCLKSource ****** GX
+ _CLK_PeripheralClockConfig ****** GX
+ _CLK_SYSCLKDivConfig ****** GX
+ _CLK_SYSCLKSourceConfig ****** GX
+ _CLK_SYSCLKSourceSwitchCmd ****** GX
+ _DMA1_CHANNEL0_1_IRQHandler ****** GX
+ _DMA1_CHANNEL2_3_IRQHandler ****** GX
+ _EXTI0_IRQHandler ****** GX
+ _EXTI1_IRQHandler ****** GX
+ _EXTI2_IRQHandler ****** GX
+ _EXTI3_IRQHandler ****** GX
+ _EXTI4_IRQHandler ****** GX
+ _EXTI5_IRQHandler ****** GX
+ _EXTI6_IRQHandler ****** GX
+ _EXTI7_IRQHandler ****** GX
+ _EXTIB_G_IRQHandler ****** GX
+ _EXTID_H_IRQHandler ****** GX
+ _EXTIE_F_PVD_IRQHandler ****** GX
+ _FLASH_IRQHandler ****** GX
+ _GPIO_Init ****** GX
+ _GPIO_ResetBits ****** GX
+ _GPIO_SetBits ****** GX
+ _I2C1_SPI2_IRQHandler ****** GX
+ _LCD_AES_IRQHandler ****** GX
+ _RTC_CSSLSE_IRQHandler ****** GX
+ _SPI1_IRQHandler ****** GX
+ _SWITCH_CSS_BREAK_DAC_IRQHandler ****** GX
+ _TIM1_CC_IRQHandler ****** GX
+ _TIM1_UPD_OVF_TRG_COM_IRQHandler ****** GX
+ _TIM2_CC_USART2_RX_IRQHandler ****** GX
+ _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ****** GX
+ _TIM3_CC_USART3_RX_IRQHandler ****** GX
+ _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ****** GX
+ _TIM4_UPD_OVF_TRG_IRQHandler ****** GX
+ _TRAP_IRQHandler ****** GX
+ _USART1_RX_TIM5_CC_IRQHandler ****** GX
+ _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ****** GX
+ _USART_Cmd ****** GX
+ A _USART_Config 000098 R
+ _USART_Init ****** GX
+ ___sdcc_external_startup ****** GX
+ 8 ___str_0 000000 R
+ 5 __interrupt_vect 000000 R
+ 6 __sdcc_init_data 000009 R
+ 5 __sdcc_program_startup 000080 R
+ 3 __start__stack 000000 R
+ A _blink 000034 R
+ A _main 000000 GR
+ A _print 000083 R
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
+Hexadecimal [24-Bits]
+
+Symbol Table
+
+ A _println 000090 R
+ A _putchar 000075 R
+ l_DATA ****** GX
+ l_INITIALIZER ****** GX
+ s_DATA ****** GX
+ s_GSINIT ****** GX
+ s_INITIALIZED ****** GX
+ s_INITIALIZER ****** GX
+
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 3
+Hexadecimal [24-Bits]
+
+Area Table
+
+ 0 _CODE size 0 flags 0
+ 1 DATA size 0 flags 0
+ 2 INITIALIZED size 0 flags 0
+ 3 SSEG size 1 flags 0
+ 4 DABS size 0 flags 8
+ 5 HOME size 83 flags 0
+ 6 GSINIT size 23 flags 0
+ 7 GSFINAL size 3 flags 0
+ 8 CONST size 6 flags 0
+ 9 INITIALIZER size 0 flags 0
+ A CODE size DB flags 0
+ B CABS size 0 flags 8
+
diff --git a/firmware/STM8L15X_LD/stm8l15x_clk.asm b/firmware/STM8L15X_LD/stm8l15x_clk.asm
new file mode 100644
index 0000000..9ba5d66
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_clk.asm
@@ -0,0 +1,823 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ISO C Compiler
+; Version 4.5.0 #15242 (Linux)
+;--------------------------------------------------------
+ .module stm8l15x_clk
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _SYSDivFactor
+ .globl _CLK_DeInit
+ .globl _CLK_HSICmd
+ .globl _CLK_AdjustHSICalibrationValue
+ .globl _CLK_LSICmd
+ .globl _CLK_HSEConfig
+ .globl _CLK_LSEConfig
+ .globl _CLK_ClockSecuritySystemEnable
+ .globl _CLK_ClockSecuritySytemDeglitchCmd
+ .globl _CLK_CCOConfig
+ .globl _CLK_SYSCLKSourceConfig
+ .globl _CLK_GetSYSCLKSource
+ .globl _CLK_GetClockFreq
+ .globl _CLK_SYSCLKDivConfig
+ .globl _CLK_SYSCLKSourceSwitchCmd
+ .globl _CLK_RTCClockConfig
+ .globl _CLK_BEEPClockConfig
+ .globl _CLK_PeripheralClockConfig
+ .globl _CLK_LSEClockSecuritySystemEnable
+ .globl _CLK_RTCCLKSwitchOnLSEFailureEnable
+ .globl _CLK_HaltConfig
+ .globl _CLK_MainRegulatorCmd
+ .globl _CLK_ITConfig
+ .globl _CLK_GetFlagStatus
+ .globl _CLK_ClearFlag
+ .globl _CLK_GetITStatus
+ .globl _CLK_ClearITPendingBit
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area DABS (ABS)
+
+; default segment ordering for linker
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area CONST
+ .area INITIALIZER
+ .area CODE
+
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME
+ .area HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CODE
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void)
+; -----------------------------------------
+; function CLK_DeInit
+; -----------------------------------------
+_CLK_DeInit:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE;
+ mov 0x50c2+0, #0x11
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE;
+ mov 0x50c6+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE;
+ mov 0x50c1+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE;
+ mov 0x50cb+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE;
+ mov 0x50c8+0, #0x01
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE;
+ mov 0x50c9+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
+ mov 0x50c0+0, #0x03
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
+ mov 0x50c3+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
+ mov 0x50c4+0, #0x80
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE;
+ mov 0x50d0+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE;
+ mov 0x50ca+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE;
+ mov 0x50c5+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
+ mov 0x50cd+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE;
+ mov 0x50cc+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE;
+ mov 0x50ce+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE;
+ mov 0x50cf+0, #0xb9
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState)
+; -----------------------------------------
+; function CLK_HSICmd
+; -----------------------------------------
+_CLK_HSICmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
+ ld a, 0x50c2
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
+ or a, #0x01
+ ld 0x50c2, a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION);
+ and a, #0xfe
+ ld 0x50c2, a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue)
+; -----------------------------------------
+; function CLK_AdjustHSICalibrationValue
+; -----------------------------------------
+_CLK_AdjustHSICalibrationValue:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC;
+ mov 0x50ce+0, #0xac
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35;
+ mov 0x50ce+0, #0x35
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue;
+ ld 0x50cd, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState)
+; -----------------------------------------
+; function CLK_LSICmd
+; -----------------------------------------
+_CLK_LSICmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
+ ld a, 0x50c2
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
+ or a, #0x04
+ ld 0x50c2, a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION);
+ and a, #0xfb
+ ld 0x50c2, a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE)
+; -----------------------------------------
+; function CLK_HSEConfig
+; -----------------------------------------
+_CLK_HSEConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON;
+ bres 0x50c6, #0
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP;
+ bres 0x50c6, #4
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE;
+ ld a, 0x50c6
+ or a, (0x01, sp)
+ ld 0x50c6, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE)
+; -----------------------------------------
+; function CLK_LSEConfig
+; -----------------------------------------
+_CLK_LSEConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON;
+ bres 0x50c6, #2
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP;
+ bres 0x50c6, #5
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE;
+ ld a, 0x50c6
+ or a, (0x01, sp)
+ ld 0x50c6, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void)
+; -----------------------------------------
+; function CLK_ClockSecuritySystemEnable
+; -----------------------------------------
+_CLK_ClockSecuritySystemEnable:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN;
+ bset 0x50ca, #0
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState)
+; -----------------------------------------
+; function CLK_ClockSecuritySytemDeglitchCmd
+; -----------------------------------------
+_CLK_ClockSecuritySytemDeglitchCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
+ ld a, 0x50ca
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
+ or a, #0x10
+ ld 0x50ca, a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON);
+ and a, #0xef
+ ld 0x50ca, a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv)
+; -----------------------------------------
+; function CLK_CCOConfig
+; -----------------------------------------
+_CLK_CCOConfig:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv);
+ or a, (0x03, sp)
+ ld 0x50c5, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: }
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
+; -----------------------------------------
+; function CLK_SYSCLKSourceConfig
+; -----------------------------------------
+_CLK_SYSCLKSourceConfig:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource;
+ ld 0x50c8, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
+; -----------------------------------------
+; function CLK_GetSYSCLKSource
+; -----------------------------------------
+_CLK_GetSYSCLKSource:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
+ ld a, 0x50c7
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void)
+; -----------------------------------------
+; function CLK_GetClockFreq
+; -----------------------------------------
+_CLK_GetClockFreq:
+ sub sp, #8
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0;
+ clrw x
+ ldw (0x03, sp), x
+ ldw (0x01, sp), x
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;
+ ld a, 0x50c7
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI)
+ cp a, #0x01
+ jrne 00108$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE;
+ ldw x, #0x2400
+ ldw (0x03, sp), x
+ ldw x, #0x00f4
+ ldw (0x01, sp), x
+ jra 00109$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI)
+ cp a, #0x02
+ jrne 00105$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE;
+ ldw x, #0x9470
+ ldw (0x03, sp), x
+ clrw x
+ ldw (0x01, sp), x
+ jra 00109$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE)
+ cp a, #0x04
+ jrne 00109$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE;
+ ldw x, #0x2400
+ ldw (0x03, sp), x
+ ldw x, #0x00f4
+ ldw (0x01, sp), x
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE;
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
+ ld a, 0x50c0
+ and a, #0x07
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp];
+ clrw x
+ ld xl, a
+ ld a, (_SYSDivFactor+0, x)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc;
+ clrw x
+ clr (0x05, sp)
+ push a
+ pushw x
+ clr a
+ push a
+ ldw x, (0x07, sp)
+ pushw x
+ ldw x, (0x07, sp)
+ pushw x
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency);
+ call __divulong
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: }
+ addw sp, #16
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
+; -----------------------------------------
+; function CLK_SYSCLKDivConfig
+; -----------------------------------------
+_CLK_SYSCLKDivConfig:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
+ ld 0x50c0, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
+; -----------------------------------------
+; function CLK_SYSCLKSourceSwitchCmd
+; -----------------------------------------
+_CLK_SYSCLKSourceSwitchCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
+ ld a, 0x50c9
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
+ or a, #0x02
+ ld 0x50c9, a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
+ and a, #0xfd
+ ld 0x50c9, a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
+; -----------------------------------------
+; function CLK_RTCClockConfig
+; -----------------------------------------
+_CLK_RTCClockConfig:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
+ or a, (0x03, sp)
+ ld 0x50c1, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: }
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
+; -----------------------------------------
+; function CLK_BEEPClockConfig
+; -----------------------------------------
+_CLK_BEEPClockConfig:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);
+ ld 0x50cb, a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
+; -----------------------------------------
+; function CLK_PeripheralClockConfig
+; -----------------------------------------
+_CLK_PeripheralClockConfig:
+ pushw x
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);
+ push a
+ and a, #0xf0
+ ld xl, a
+ pop a
+ ldw y, x
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ and a, #0x0f
+ push a
+ ld a, #0x01
+ ld (0x02, sp), a
+ pop a
+ tnz a
+ jreq 00154$
+00153$:
+ sll (0x01, sp)
+ dec a
+ jrne 00153$
+00154$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ ld a, (0x01, sp)
+ cpl a
+ ld (0x02, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00)
+ ld a, xl
+ tnz a
+ jrne 00114$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ ld a, 0x50c3
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE)
+ tnz (0x05, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ or a, (0x01, sp)
+ ld 0x50c3, a
+ jra 00116$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ and a, (0x02, sp)
+ ld 0x50c3, a
+ jra 00116$
+00114$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10)
+ ld a, yl
+ cp a, #0x10
+ jrne 00111$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ ld a, 0x50c4
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE)
+ tnz (0x05, sp)
+ jreq 00105$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ or a, (0x01, sp)
+ ld 0x50c4, a
+ jra 00116$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ and a, (0x02, sp)
+ ld 0x50c4, a
+ jra 00116$
+00111$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ ld a, 0x50d0
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE)
+ tnz (0x05, sp)
+ jreq 00108$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ or a, (0x01, sp)
+ ld 0x50d0, a
+ jra 00116$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ and a, (0x02, sp)
+ ld 0x50d0, a
+00116$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: }
+ popw x
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void)
+; -----------------------------------------
+; function CLK_LSEClockSecuritySystemEnable
+; -----------------------------------------
+_CLK_LSEClockSecuritySystemEnable:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
+ bset 0x5190, #0
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
+; -----------------------------------------
+; function CLK_RTCCLKSwitchOnLSEFailureEnable
+; -----------------------------------------
+_CLK_RTCCLKSwitchOnLSEFailureEnable:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
+ bset 0x5190, #1
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
+; -----------------------------------------
+; function CLK_HaltConfig
+; -----------------------------------------
+_CLK_HaltConfig:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
+ ldw x, #0x50c2
+ push a
+ ld a, (x)
+ ld (0x02, sp), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE)
+ tnz (0x04, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
+ or a, (0x01, sp)
+ ld 0x50c2, a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt);
+ cpl a
+ and a, (0x01, sp)
+ ld 0x50c2, a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState)
+; -----------------------------------------
+; function CLK_MainRegulatorCmd
+; -----------------------------------------
+_CLK_MainRegulatorCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
+ ld a, 0x50cf
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
+ and a, #0xfd
+ ld 0x50cf, a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF;
+ or a, #0x02
+ ld 0x50cf, a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
+; -----------------------------------------
+; function CLK_ITConfig
+; -----------------------------------------
+_CLK_ITConfig:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
+ cp a, #0x1c
+ jrne 00154$
+ push a
+ ld a, #0x01
+ ld (0x02, sp), a
+ pop a
+ .byte 0xc5
+00154$:
+ clr (0x01, sp)
+00155$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
+ sub a, #0x2c
+ jrne 00157$
+ inc a
+ .byte 0x21
+00157$:
+ clr a
+00158$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE)
+ tnz (0x04, sp)
+ jreq 00114$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
+ tnz (0x01, sp)
+ jreq 00105$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN;
+ ld a, 0x50c9
+ or a, #0x04
+ ld 0x50c9, a
+ jra 00116$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
+ tnz a
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
+ ld a, 0x5190
+ or a, #0x04
+ ld 0x5190, a
+ jra 00116$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE;
+ ld a, 0x50ca
+ or a, #0x04
+ ld 0x50ca, a
+ jra 00116$
+00114$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF)
+ tnz (0x01, sp)
+ jreq 00111$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
+ ld a, 0x50c9
+ and a, #0xfb
+ ld 0x50c9, a
+ jra 00116$
+00111$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF)
+ tnz a
+ jreq 00108$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
+ ld a, 0x5190
+ and a, #0xfb
+ ld 0x5190, a
+ jra 00116$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
+ ld a, 0x50ca
+ and a, #0xfb
+ ld 0x50ca, a
+00116$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
+; -----------------------------------------
+; function CLK_GetFlagStatus
+; -----------------------------------------
+_CLK_GetFlagStatus:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
+ ld xl, a
+ and a, #0xf0
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
+ push a
+ ld a, xl
+ and a, #0x0f
+ ld xl, a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */
+ tnz a
+ jrne 00123$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR;
+ ld a, 0x50c1
+ jra 00124$
+00123$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */
+ cp a, #0x10
+ jrne 00120$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR;
+ ld a, 0x50c2
+ jra 00124$
+00120$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */
+ cp a, #0x20
+ jrne 00117$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR;
+ ld a, 0x50c5
+ jra 00124$
+00117$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */
+ cp a, #0x30
+ jrne 00114$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR;
+ ld a, 0x50c6
+ jra 00124$
+00114$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */
+ cp a, #0x40
+ jrne 00111$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR;
+ ld a, 0x50c9
+ jra 00124$
+00111$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */
+ cp a, #0x50
+ jrne 00108$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR;
+ ld a, 0x50ca
+ jra 00124$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */
+ cp a, #0x70
+ jrne 00105$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR;
+ ld a, 0x50cf
+ jra 00124$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
+ cp a, #0x80
+ jrne 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR;
+ ld a, 0x5190
+ jra 00124$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR;
+ ld a, 0x50cb
+00124$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
+ push a
+ ld a, #0x01
+ ld (0x02, sp), a
+ ld a, xl
+ tnz a
+ jreq 00216$
+00215$:
+ sll (0x02, sp)
+ dec a
+ jrne 00215$
+00216$:
+ pop a
+ and a, (0x01, sp)
+ jreq 00126$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET;
+ .byte 0x21
+00126$:
+ clr a
+00127$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus);
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: }
+ addw sp, #1
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void)
+; -----------------------------------------
+; function CLK_ClearFlag
+; -----------------------------------------
+_CLK_ClearFlag:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
+ bres 0x5190, #3
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
+; -----------------------------------------
+; function CLK_GetITStatus
+; -----------------------------------------
+_CLK_GetITStatus:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF)
+ ld (0x01, sp), a
+ cp a, #0x1c
+ jrne 00114$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ ld a, 0x50c9
+ and a, (0x01, sp)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET;
+ sub a, #0x0c
+ jrne 00102$
+ inc a
+ jra 00115$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET;
+ clr a
+ jra 00115$
+00114$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF)
+ ld a, (0x01, sp)
+ cp a, #0x2c
+ jrne 00111$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ ld a, 0x5190
+ and a, (0x01, sp)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET;
+ sub a, #0x0c
+ jrne 00105$
+ inc a
+ jra 00115$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET;
+ clr a
+ jra 00115$
+00111$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ ld a, 0x50ca
+ and a, (0x01, sp)
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET;
+ sub a, #0x0c
+ jrne 00108$
+ inc a
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET;
+ .byte 0x21
+00108$:
+ clr a
+00115$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus;
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: }
+ addw sp, #1
+ ret
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
+; -----------------------------------------
+; function CLK_ClearITPendingBit
+; -----------------------------------------
+_CLK_ClearITPendingBit:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
+ and a, #0xf0
+ cp a, #0x20
+ jrne 00102$
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
+ bres 0x5190, #3
+ ret
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
+ bres 0x50c9, #3
+; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: }
+ ret
+ .area CODE
+ .area CONST
+ .area CONST
+_SYSDivFactor:
+ .db #0x01 ; 1
+ .db #0x02 ; 2
+ .db #0x04 ; 4
+ .db #0x08 ; 8
+ .db #0x10 ; 16
+ .area CODE
+ .area INITIALIZER
+ .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_clk.lst b/firmware/STM8L15X_LD/stm8l15x_clk.lst
new file mode 100644
index 0000000..30390f8
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_clk.lst
@@ -0,0 +1,823 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_clk
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _SYSDivFactor
+ 11 .globl _CLK_DeInit
+ 12 .globl _CLK_HSICmd
+ 13 .globl _CLK_AdjustHSICalibrationValue
+ 14 .globl _CLK_LSICmd
+ 15 .globl _CLK_HSEConfig
+ 16 .globl _CLK_LSEConfig
+ 17 .globl _CLK_ClockSecuritySystemEnable
+ 18 .globl _CLK_ClockSecuritySytemDeglitchCmd
+ 19 .globl _CLK_CCOConfig
+ 20 .globl _CLK_SYSCLKSourceConfig
+ 21 .globl _CLK_GetSYSCLKSource
+ 22 .globl _CLK_GetClockFreq
+ 23 .globl _CLK_SYSCLKDivConfig
+ 24 .globl _CLK_SYSCLKSourceSwitchCmd
+ 25 .globl _CLK_RTCClockConfig
+ 26 .globl _CLK_BEEPClockConfig
+ 27 .globl _CLK_PeripheralClockConfig
+ 28 .globl _CLK_LSEClockSecuritySystemEnable
+ 29 .globl _CLK_RTCCLKSwitchOnLSEFailureEnable
+ 30 .globl _CLK_HaltConfig
+ 31 .globl _CLK_MainRegulatorCmd
+ 32 .globl _CLK_ITConfig
+ 33 .globl _CLK_GetFlagStatus
+ 34 .globl _CLK_ClearFlag
+ 35 .globl _CLK_GetITStatus
+ 36 .globl _CLK_ClearITPendingBit
+ 37 ;--------------------------------------------------------
+ 38 ; ram data
+ 39 ;--------------------------------------------------------
+ 40 .area DATA
+ 41 ;--------------------------------------------------------
+ 42 ; ram data
+ 43 ;--------------------------------------------------------
+ 44 .area INITIALIZED
+ 45 ;--------------------------------------------------------
+ 46 ; absolute external ram data
+ 47 ;--------------------------------------------------------
+ 48 .area DABS (ABS)
+ 49
+ 50 ; default segment ordering for linker
+ 51 .area HOME
+ 52 .area GSINIT
+ 53 .area GSFINAL
+ 54 .area CONST
+ 55 .area INITIALIZER
+ 56 .area CODE
+ 57
+ 58 ;--------------------------------------------------------
+ 59 ; global & static initialisations
+ 60 ;--------------------------------------------------------
+ 61 .area HOME
+ 62 .area GSINIT
+ 63 .area GSFINAL
+ 64 .area GSINIT
+ 65 ;--------------------------------------------------------
+ 66 ; Home
+ 67 ;--------------------------------------------------------
+ 68 .area HOME
+ 69 .area HOME
+ 70 ;--------------------------------------------------------
+ 71 ; code
+ 72 ;--------------------------------------------------------
+ 73 .area CODE
+ 74 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void)
+ 75 ; -----------------------------------------
+ 76 ; function CLK_DeInit
+ 77 ; -----------------------------------------
+ 000000 78 _CLK_DeInit:
+ 79 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE;
+ 000000 35 11 50 C2 [ 1] 80 mov 0x50c2+0, #0x11
+ 81 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE;
+ 000004 35 00 50 C6 [ 1] 82 mov 0x50c6+0, #0x00
+ 83 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE;
+ 000008 35 00 50 C1 [ 1] 84 mov 0x50c1+0, #0x00
+ 85 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE;
+ 00000C 35 00 50 CB [ 1] 86 mov 0x50cb+0, #0x00
+ 87 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE;
+ 000010 35 01 50 C8 [ 1] 88 mov 0x50c8+0, #0x01
+ 89 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE;
+ 000014 35 00 50 C9 [ 1] 90 mov 0x50c9+0, #0x00
+ 91 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
+ 000018 35 03 50 C0 [ 1] 92 mov 0x50c0+0, #0x03
+ 93 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
+ 00001C 35 00 50 C3 [ 1] 94 mov 0x50c3+0, #0x00
+ 95 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
+ 000020 35 80 50 C4 [ 1] 96 mov 0x50c4+0, #0x80
+ 97 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE;
+ 000024 35 00 50 D0 [ 1] 98 mov 0x50d0+0, #0x00
+ 99 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE;
+ 000028 35 00 50 CA [ 1] 100 mov 0x50ca+0, #0x00
+ 101 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE;
+ 00002C 35 00 50 C5 [ 1] 102 mov 0x50c5+0, #0x00
+ 103 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
+ 000030 35 00 50 CD [ 1] 104 mov 0x50cd+0, #0x00
+ 105 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE;
+ 000034 35 00 50 CC [ 1] 106 mov 0x50cc+0, #0x00
+ 107 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE;
+ 000038 35 00 50 CE [ 1] 108 mov 0x50ce+0, #0x00
+ 109 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE;
+ 00003C 35 B9 50 CF [ 1] 110 mov 0x50cf+0, #0xb9
+ 111 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: }
+ 000040 81 [ 4] 112 ret
+ 113 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState)
+ 114 ; -----------------------------------------
+ 115 ; function CLK_HSICmd
+ 116 ; -----------------------------------------
+ 000041 117 _CLK_HSICmd:
+ 000041 88 [ 1] 118 push a
+ 000042 6B 01 [ 1] 119 ld (0x01, sp), a
+ 120 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
+ 000044 C6 50 C2 [ 1] 121 ld a, 0x50c2
+ 122 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE)
+ 000047 0D 01 [ 1] 123 tnz (0x01, sp)
+ 000049 27 07 [ 1] 124 jreq 00102$
+ 125 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
+ 00004B AA 01 [ 1] 126 or a, #0x01
+ 00004D C7 50 C2 [ 1] 127 ld 0x50c2, a
+ 000050 20 05 [ 2] 128 jra 00104$
+ 000052 129 00102$:
+ 130 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION);
+ 000052 A4 FE [ 1] 131 and a, #0xfe
+ 000054 C7 50 C2 [ 1] 132 ld 0x50c2, a
+ 000057 133 00104$:
+ 134 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: }
+ 000057 84 [ 1] 135 pop a
+ 000058 81 [ 4] 136 ret
+ 137 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue)
+ 138 ; -----------------------------------------
+ 139 ; function CLK_AdjustHSICalibrationValue
+ 140 ; -----------------------------------------
+ 000059 141 _CLK_AdjustHSICalibrationValue:
+ 142 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC;
+ 000059 35 AC 50 CE [ 1] 143 mov 0x50ce+0, #0xac
+ 144 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35;
+ 00005D 35 35 50 CE [ 1] 145 mov 0x50ce+0, #0x35
+ 146 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue;
+ 000061 C7 50 CD [ 1] 147 ld 0x50cd, a
+ 148 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: }
+ 000064 81 [ 4] 149 ret
+ 150 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState)
+ 151 ; -----------------------------------------
+ 152 ; function CLK_LSICmd
+ 153 ; -----------------------------------------
+ 000065 154 _CLK_LSICmd:
+ 000065 88 [ 1] 155 push a
+ 000066 6B 01 [ 1] 156 ld (0x01, sp), a
+ 157 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
+ 000068 C6 50 C2 [ 1] 158 ld a, 0x50c2
+ 159 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE)
+ 00006B 0D 01 [ 1] 160 tnz (0x01, sp)
+ 00006D 27 07 [ 1] 161 jreq 00102$
+ 162 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
+ 00006F AA 04 [ 1] 163 or a, #0x04
+ 000071 C7 50 C2 [ 1] 164 ld 0x50c2, a
+ 000074 20 05 [ 2] 165 jra 00104$
+ 000076 166 00102$:
+ 167 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION);
+ 000076 A4 FB [ 1] 168 and a, #0xfb
+ 000078 C7 50 C2 [ 1] 169 ld 0x50c2, a
+ 00007B 170 00104$:
+ 171 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: }
+ 00007B 84 [ 1] 172 pop a
+ 00007C 81 [ 4] 173 ret
+ 174 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE)
+ 175 ; -----------------------------------------
+ 176 ; function CLK_HSEConfig
+ 177 ; -----------------------------------------
+ 00007D 178 _CLK_HSEConfig:
+ 00007D 88 [ 1] 179 push a
+ 00007E 6B 01 [ 1] 180 ld (0x01, sp), a
+ 181 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON;
+ 000080 72 11 50 C6 [ 1] 182 bres 0x50c6, #0
+ 183 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP;
+ 000084 72 19 50 C6 [ 1] 184 bres 0x50c6, #4
+ 185 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE;
+ 000088 C6 50 C6 [ 1] 186 ld a, 0x50c6
+ 00008B 1A 01 [ 1] 187 or a, (0x01, sp)
+ 00008D C7 50 C6 [ 1] 188 ld 0x50c6, a
+ 189 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: }
+ 000090 84 [ 1] 190 pop a
+ 000091 81 [ 4] 191 ret
+ 192 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE)
+ 193 ; -----------------------------------------
+ 194 ; function CLK_LSEConfig
+ 195 ; -----------------------------------------
+ 000092 196 _CLK_LSEConfig:
+ 000092 88 [ 1] 197 push a
+ 000093 6B 01 [ 1] 198 ld (0x01, sp), a
+ 199 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON;
+ 000095 72 15 50 C6 [ 1] 200 bres 0x50c6, #2
+ 201 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP;
+ 000099 72 1B 50 C6 [ 1] 202 bres 0x50c6, #5
+ 203 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE;
+ 00009D C6 50 C6 [ 1] 204 ld a, 0x50c6
+ 0000A0 1A 01 [ 1] 205 or a, (0x01, sp)
+ 0000A2 C7 50 C6 [ 1] 206 ld 0x50c6, a
+ 207 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: }
+ 0000A5 84 [ 1] 208 pop a
+ 0000A6 81 [ 4] 209 ret
+ 210 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void)
+ 211 ; -----------------------------------------
+ 212 ; function CLK_ClockSecuritySystemEnable
+ 213 ; -----------------------------------------
+ 0000A7 214 _CLK_ClockSecuritySystemEnable:
+ 215 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN;
+ 0000A7 72 10 50 CA [ 1] 216 bset 0x50ca, #0
+ 217 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: }
+ 0000AB 81 [ 4] 218 ret
+ 219 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState)
+ 220 ; -----------------------------------------
+ 221 ; function CLK_ClockSecuritySytemDeglitchCmd
+ 222 ; -----------------------------------------
+ 0000AC 223 _CLK_ClockSecuritySytemDeglitchCmd:
+ 0000AC 88 [ 1] 224 push a
+ 0000AD 6B 01 [ 1] 225 ld (0x01, sp), a
+ 226 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
+ 0000AF C6 50 CA [ 1] 227 ld a, 0x50ca
+ 228 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE)
+ 0000B2 0D 01 [ 1] 229 tnz (0x01, sp)
+ 0000B4 27 07 [ 1] 230 jreq 00102$
+ 231 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
+ 0000B6 AA 10 [ 1] 232 or a, #0x10
+ 0000B8 C7 50 CA [ 1] 233 ld 0x50ca, a
+ 0000BB 20 05 [ 2] 234 jra 00104$
+ 0000BD 235 00102$:
+ 236 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON);
+ 0000BD A4 EF [ 1] 237 and a, #0xef
+ 0000BF C7 50 CA [ 1] 238 ld 0x50ca, a
+ 0000C2 239 00104$:
+ 240 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: }
+ 0000C2 84 [ 1] 241 pop a
+ 0000C3 81 [ 4] 242 ret
+ 243 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv)
+ 244 ; -----------------------------------------
+ 245 ; function CLK_CCOConfig
+ 246 ; -----------------------------------------
+ 0000C4 247 _CLK_CCOConfig:
+ 248 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv);
+ 0000C4 1A 03 [ 1] 249 or a, (0x03, sp)
+ 0000C6 C7 50 C5 [ 1] 250 ld 0x50c5, a
+ 251 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: }
+ 0000C9 85 [ 2] 252 popw x
+ 0000CA 84 [ 1] 253 pop a
+ 0000CB FC [ 2] 254 jp (x)
+ 255 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
+ 256 ; -----------------------------------------
+ 257 ; function CLK_SYSCLKSourceConfig
+ 258 ; -----------------------------------------
+ 0000CC 259 _CLK_SYSCLKSourceConfig:
+ 260 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource;
+ 0000CC C7 50 C8 [ 1] 261 ld 0x50c8, a
+ 262 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: }
+ 0000CF 81 [ 4] 263 ret
+ 264 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
+ 265 ; -----------------------------------------
+ 266 ; function CLK_GetSYSCLKSource
+ 267 ; -----------------------------------------
+ 0000D0 268 _CLK_GetSYSCLKSource:
+ 269 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
+ 0000D0 C6 50 C7 [ 1] 270 ld a, 0x50c7
+ 271 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: }
+ 0000D3 81 [ 4] 272 ret
+ 273 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void)
+ 274 ; -----------------------------------------
+ 275 ; function CLK_GetClockFreq
+ 276 ; -----------------------------------------
+ 0000D4 277 _CLK_GetClockFreq:
+ 0000D4 52 08 [ 2] 278 sub sp, #8
+ 279 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0;
+ 0000D6 5F [ 1] 280 clrw x
+ 0000D7 1F 03 [ 2] 281 ldw (0x03, sp), x
+ 0000D9 1F 01 [ 2] 282 ldw (0x01, sp), x
+ 283 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;
+ 0000DB C6 50 C7 [ 1] 284 ld a, 0x50c7
+ 285 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI)
+ 0000DE A1 01 [ 1] 286 cp a, #0x01
+ 0000E0 26 0C [ 1] 287 jrne 00108$
+ 288 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE;
+ 0000E2 AE 24 00 [ 2] 289 ldw x, #0x2400
+ 0000E5 1F 03 [ 2] 290 ldw (0x03, sp), x
+ 0000E7 AE 00 F4 [ 2] 291 ldw x, #0x00f4
+ 0000EA 1F 01 [ 2] 292 ldw (0x01, sp), x
+ 0000EC 20 1C [ 2] 293 jra 00109$
+ 0000EE 294 00108$:
+ 295 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI)
+ 0000EE A1 02 [ 1] 296 cp a, #0x02
+ 0000F0 26 0A [ 1] 297 jrne 00105$
+ 298 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE;
+ 0000F2 AE 94 70 [ 2] 299 ldw x, #0x9470
+ 0000F5 1F 03 [ 2] 300 ldw (0x03, sp), x
+ 0000F7 5F [ 1] 301 clrw x
+ 0000F8 1F 01 [ 2] 302 ldw (0x01, sp), x
+ 0000FA 20 0E [ 2] 303 jra 00109$
+ 0000FC 304 00105$:
+ 305 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE)
+ 0000FC A1 04 [ 1] 306 cp a, #0x04
+ 0000FE 26 0A [ 1] 307 jrne 00109$
+ 308 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE;
+ 000100 AE 24 00 [ 2] 309 ldw x, #0x2400
+ 000103 1F 03 [ 2] 310 ldw (0x03, sp), x
+ 000105 AE 00 F4 [ 2] 311 ldw x, #0x00f4
+ 000108 1F 01 [ 2] 312 ldw (0x01, sp), x
+ 313 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE;
+ 00010A 314 00109$:
+ 315 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
+ 00010A C6 50 C0 [ 1] 316 ld a, 0x50c0
+ 00010D A4 07 [ 1] 317 and a, #0x07
+ 318 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp];
+ 00010F 5F [ 1] 319 clrw x
+ 000110 97 [ 1] 320 ld xl, a
+ 000111 D6u00u00 [ 1] 321 ld a, (_SYSDivFactor+0, x)
+ 322 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc;
+ 000114 5F [ 1] 323 clrw x
+ 000115 0F 05 [ 1] 324 clr (0x05, sp)
+ 000117 88 [ 1] 325 push a
+ 000118 89 [ 2] 326 pushw x
+ 000119 4F [ 1] 327 clr a
+ 00011A 88 [ 1] 328 push a
+ 00011B 1E 07 [ 2] 329 ldw x, (0x07, sp)
+ 00011D 89 [ 2] 330 pushw x
+ 00011E 1E 07 [ 2] 331 ldw x, (0x07, sp)
+ 000120 89 [ 2] 332 pushw x
+ 333 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency);
+ 000121 CDr00r00 [ 4] 334 call __divulong
+ 335 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: }
+ 000124 5B 10 [ 2] 336 addw sp, #16
+ 000126 81 [ 4] 337 ret
+ 338 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
+ 339 ; -----------------------------------------
+ 340 ; function CLK_SYSCLKDivConfig
+ 341 ; -----------------------------------------
+ 000127 342 _CLK_SYSCLKDivConfig:
+ 343 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
+ 000127 C7 50 C0 [ 1] 344 ld 0x50c0, a
+ 345 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: }
+ 00012A 81 [ 4] 346 ret
+ 347 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
+ 348 ; -----------------------------------------
+ 349 ; function CLK_SYSCLKSourceSwitchCmd
+ 350 ; -----------------------------------------
+ 00012B 351 _CLK_SYSCLKSourceSwitchCmd:
+ 00012B 88 [ 1] 352 push a
+ 00012C 6B 01 [ 1] 353 ld (0x01, sp), a
+ 354 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
+ 00012E C6 50 C9 [ 1] 355 ld a, 0x50c9
+ 356 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE)
+ 000131 0D 01 [ 1] 357 tnz (0x01, sp)
+ 000133 27 07 [ 1] 358 jreq 00102$
+ 359 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
+ 000135 AA 02 [ 1] 360 or a, #0x02
+ 000137 C7 50 C9 [ 1] 361 ld 0x50c9, a
+ 00013A 20 05 [ 2] 362 jra 00104$
+ 00013C 363 00102$:
+ 364 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
+ 00013C A4 FD [ 1] 365 and a, #0xfd
+ 00013E C7 50 C9 [ 1] 366 ld 0x50c9, a
+ 000141 367 00104$:
+ 368 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: }
+ 000141 84 [ 1] 369 pop a
+ 000142 81 [ 4] 370 ret
+ 371 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
+ 372 ; -----------------------------------------
+ 373 ; function CLK_RTCClockConfig
+ 374 ; -----------------------------------------
+ 000143 375 _CLK_RTCClockConfig:
+ 376 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
+ 000143 1A 03 [ 1] 377 or a, (0x03, sp)
+ 000145 C7 50 C1 [ 1] 378 ld 0x50c1, a
+ 379 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: }
+ 000148 85 [ 2] 380 popw x
+ 000149 84 [ 1] 381 pop a
+ 00014A FC [ 2] 382 jp (x)
+ 383 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
+ 384 ; -----------------------------------------
+ 385 ; function CLK_BEEPClockConfig
+ 386 ; -----------------------------------------
+ 00014B 387 _CLK_BEEPClockConfig:
+ 388 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);
+ 00014B C7 50 CB [ 1] 389 ld 0x50cb, a
+ 390 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: }
+ 00014E 81 [ 4] 391 ret
+ 392 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
+ 393 ; -----------------------------------------
+ 394 ; function CLK_PeripheralClockConfig
+ 395 ; -----------------------------------------
+ 00014F 396 _CLK_PeripheralClockConfig:
+ 00014F 89 [ 2] 397 pushw x
+ 398 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);
+ 000150 88 [ 1] 399 push a
+ 000151 A4 F0 [ 1] 400 and a, #0xf0
+ 000153 97 [ 1] 401 ld xl, a
+ 000154 84 [ 1] 402 pop a
+ 000155 90 93 [ 1] 403 ldw y, x
+ 404 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 000157 A4 0F [ 1] 405 and a, #0x0f
+ 000159 88 [ 1] 406 push a
+ 00015A A6 01 [ 1] 407 ld a, #0x01
+ 00015C 6B 02 [ 1] 408 ld (0x02, sp), a
+ 00015E 84 [ 1] 409 pop a
+ 00015F 4D [ 1] 410 tnz a
+ 000160 27 05 [ 1] 411 jreq 00154$
+ 000162 412 00153$:
+ 000162 08 01 [ 1] 413 sll (0x01, sp)
+ 000164 4A [ 1] 414 dec a
+ 000165 26 FB [ 1] 415 jrne 00153$
+ 000167 416 00154$:
+ 417 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 000167 7B 01 [ 1] 418 ld a, (0x01, sp)
+ 000169 43 [ 1] 419 cpl a
+ 00016A 6B 02 [ 1] 420 ld (0x02, sp), a
+ 421 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00)
+ 00016C 9F [ 1] 422 ld a, xl
+ 00016D 4D [ 1] 423 tnz a
+ 00016E 26 15 [ 1] 424 jrne 00114$
+ 425 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 000170 C6 50 C3 [ 1] 426 ld a, 0x50c3
+ 427 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE)
+ 000173 0D 05 [ 1] 428 tnz (0x05, sp)
+ 000175 27 07 [ 1] 429 jreq 00102$
+ 430 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 000177 1A 01 [ 1] 431 or a, (0x01, sp)
+ 000179 C7 50 C3 [ 1] 432 ld 0x50c3, a
+ 00017C 20 35 [ 2] 433 jra 00116$
+ 00017E 434 00102$:
+ 435 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 00017E 14 02 [ 1] 436 and a, (0x02, sp)
+ 000180 C7 50 C3 [ 1] 437 ld 0x50c3, a
+ 000183 20 2E [ 2] 438 jra 00116$
+ 000185 439 00114$:
+ 440 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10)
+ 000185 90 9F [ 1] 441 ld a, yl
+ 000187 A1 10 [ 1] 442 cp a, #0x10
+ 000189 26 15 [ 1] 443 jrne 00111$
+ 444 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 00018B C6 50 C4 [ 1] 445 ld a, 0x50c4
+ 446 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE)
+ 00018E 0D 05 [ 1] 447 tnz (0x05, sp)
+ 000190 27 07 [ 1] 448 jreq 00105$
+ 449 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 000192 1A 01 [ 1] 450 or a, (0x01, sp)
+ 000194 C7 50 C4 [ 1] 451 ld 0x50c4, a
+ 000197 20 1A [ 2] 452 jra 00116$
+ 000199 453 00105$:
+ 454 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 000199 14 02 [ 1] 455 and a, (0x02, sp)
+ 00019B C7 50 C4 [ 1] 456 ld 0x50c4, a
+ 00019E 20 13 [ 2] 457 jra 00116$
+ 0001A0 458 00111$:
+ 459 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 0001A0 C6 50 D0 [ 1] 460 ld a, 0x50d0
+ 461 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE)
+ 0001A3 0D 05 [ 1] 462 tnz (0x05, sp)
+ 0001A5 27 07 [ 1] 463 jreq 00108$
+ 464 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 0001A7 1A 01 [ 1] 465 or a, (0x01, sp)
+ 0001A9 C7 50 D0 [ 1] 466 ld 0x50d0, a
+ 0001AC 20 05 [ 2] 467 jra 00116$
+ 0001AE 468 00108$:
+ 469 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 0001AE 14 02 [ 1] 470 and a, (0x02, sp)
+ 0001B0 C7 50 D0 [ 1] 471 ld 0x50d0, a
+ 0001B3 472 00116$:
+ 473 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: }
+ 0001B3 85 [ 2] 474 popw x
+ 0001B4 85 [ 2] 475 popw x
+ 0001B5 84 [ 1] 476 pop a
+ 0001B6 FC [ 2] 477 jp (x)
+ 478 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void)
+ 479 ; -----------------------------------------
+ 480 ; function CLK_LSEClockSecuritySystemEnable
+ 481 ; -----------------------------------------
+ 0001B7 482 _CLK_LSEClockSecuritySystemEnable:
+ 483 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
+ 0001B7 72 10 51 90 [ 1] 484 bset 0x5190, #0
+ 485 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: }
+ 0001BB 81 [ 4] 486 ret
+ 487 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
+ 488 ; -----------------------------------------
+ 489 ; function CLK_RTCCLKSwitchOnLSEFailureEnable
+ 490 ; -----------------------------------------
+ 0001BC 491 _CLK_RTCCLKSwitchOnLSEFailureEnable:
+ 492 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
+ 0001BC 72 12 51 90 [ 1] 493 bset 0x5190, #1
+ 494 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: }
+ 0001C0 81 [ 4] 495 ret
+ 496 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
+ 497 ; -----------------------------------------
+ 498 ; function CLK_HaltConfig
+ 499 ; -----------------------------------------
+ 0001C1 500 _CLK_HaltConfig:
+ 0001C1 88 [ 1] 501 push a
+ 502 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
+ 0001C2 AE 50 C2 [ 2] 503 ldw x, #0x50c2
+ 0001C5 88 [ 1] 504 push a
+ 0001C6 F6 [ 1] 505 ld a, (x)
+ 0001C7 6B 02 [ 1] 506 ld (0x02, sp), a
+ 0001C9 84 [ 1] 507 pop a
+ 508 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE)
+ 0001CA 0D 04 [ 1] 509 tnz (0x04, sp)
+ 0001CC 27 07 [ 1] 510 jreq 00102$
+ 511 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
+ 0001CE 1A 01 [ 1] 512 or a, (0x01, sp)
+ 0001D0 C7 50 C2 [ 1] 513 ld 0x50c2, a
+ 0001D3 20 06 [ 2] 514 jra 00104$
+ 0001D5 515 00102$:
+ 516 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt);
+ 0001D5 43 [ 1] 517 cpl a
+ 0001D6 14 01 [ 1] 518 and a, (0x01, sp)
+ 0001D8 C7 50 C2 [ 1] 519 ld 0x50c2, a
+ 0001DB 520 00104$:
+ 521 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: }
+ 0001DB 84 [ 1] 522 pop a
+ 0001DC 85 [ 2] 523 popw x
+ 0001DD 84 [ 1] 524 pop a
+ 0001DE FC [ 2] 525 jp (x)
+ 526 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState)
+ 527 ; -----------------------------------------
+ 528 ; function CLK_MainRegulatorCmd
+ 529 ; -----------------------------------------
+ 0001DF 530 _CLK_MainRegulatorCmd:
+ 0001DF 88 [ 1] 531 push a
+ 0001E0 6B 01 [ 1] 532 ld (0x01, sp), a
+ 533 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
+ 0001E2 C6 50 CF [ 1] 534 ld a, 0x50cf
+ 535 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE)
+ 0001E5 0D 01 [ 1] 536 tnz (0x01, sp)
+ 0001E7 27 07 [ 1] 537 jreq 00102$
+ 538 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
+ 0001E9 A4 FD [ 1] 539 and a, #0xfd
+ 0001EB C7 50 CF [ 1] 540 ld 0x50cf, a
+ 0001EE 20 05 [ 2] 541 jra 00104$
+ 0001F0 542 00102$:
+ 543 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF;
+ 0001F0 AA 02 [ 1] 544 or a, #0x02
+ 0001F2 C7 50 CF [ 1] 545 ld 0x50cf, a
+ 0001F5 546 00104$:
+ 547 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: }
+ 0001F5 84 [ 1] 548 pop a
+ 0001F6 81 [ 4] 549 ret
+ 550 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
+ 551 ; -----------------------------------------
+ 552 ; function CLK_ITConfig
+ 553 ; -----------------------------------------
+ 0001F7 554 _CLK_ITConfig:
+ 0001F7 88 [ 1] 555 push a
+ 556 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
+ 0001F8 A1 1C [ 1] 557 cp a, #0x1c
+ 0001FA 26 07 [ 1] 558 jrne 00154$
+ 0001FC 88 [ 1] 559 push a
+ 0001FD A6 01 [ 1] 560 ld a, #0x01
+ 0001FF 6B 02 [ 1] 561 ld (0x02, sp), a
+ 000201 84 [ 1] 562 pop a
+ 000202 C5 563 .byte 0xc5
+ 000203 564 00154$:
+ 000203 0F 01 [ 1] 565 clr (0x01, sp)
+ 000205 566 00155$:
+ 567 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
+ 000205 A0 2C [ 1] 568 sub a, #0x2c
+ 000207 26 02 [ 1] 569 jrne 00157$
+ 000209 4C [ 1] 570 inc a
+ 00020A 21 571 .byte 0x21
+ 00020B 572 00157$:
+ 00020B 4F [ 1] 573 clr a
+ 00020C 574 00158$:
+ 575 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE)
+ 00020C 0D 04 [ 1] 576 tnz (0x04, sp)
+ 00020E 27 25 [ 1] 577 jreq 00114$
+ 578 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
+ 000210 0D 01 [ 1] 579 tnz (0x01, sp)
+ 000212 27 0A [ 1] 580 jreq 00105$
+ 581 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN;
+ 000214 C6 50 C9 [ 1] 582 ld a, 0x50c9
+ 000217 AA 04 [ 1] 583 or a, #0x04
+ 000219 C7 50 C9 [ 1] 584 ld 0x50c9, a
+ 00021C 20 3A [ 2] 585 jra 00116$
+ 00021E 586 00105$:
+ 587 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
+ 00021E 4D [ 1] 588 tnz a
+ 00021F 27 0A [ 1] 589 jreq 00102$
+ 590 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
+ 000221 C6 51 90 [ 1] 591 ld a, 0x5190
+ 000224 AA 04 [ 1] 592 or a, #0x04
+ 000226 C7 51 90 [ 1] 593 ld 0x5190, a
+ 000229 20 2D [ 2] 594 jra 00116$
+ 00022B 595 00102$:
+ 596 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE;
+ 00022B C6 50 CA [ 1] 597 ld a, 0x50ca
+ 00022E AA 04 [ 1] 598 or a, #0x04
+ 000230 C7 50 CA [ 1] 599 ld 0x50ca, a
+ 000233 20 23 [ 2] 600 jra 00116$
+ 000235 601 00114$:
+ 602 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF)
+ 000235 0D 01 [ 1] 603 tnz (0x01, sp)
+ 000237 27 0A [ 1] 604 jreq 00111$
+ 605 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
+ 000239 C6 50 C9 [ 1] 606 ld a, 0x50c9
+ 00023C A4 FB [ 1] 607 and a, #0xfb
+ 00023E C7 50 C9 [ 1] 608 ld 0x50c9, a
+ 000241 20 15 [ 2] 609 jra 00116$
+ 000243 610 00111$:
+ 611 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF)
+ 000243 4D [ 1] 612 tnz a
+ 000244 27 0A [ 1] 613 jreq 00108$
+ 614 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
+ 000246 C6 51 90 [ 1] 615 ld a, 0x5190
+ 000249 A4 FB [ 1] 616 and a, #0xfb
+ 00024B C7 51 90 [ 1] 617 ld 0x5190, a
+ 00024E 20 08 [ 2] 618 jra 00116$
+ 000250 619 00108$:
+ 620 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
+ 000250 C6 50 CA [ 1] 621 ld a, 0x50ca
+ 000253 A4 FB [ 1] 622 and a, #0xfb
+ 000255 C7 50 CA [ 1] 623 ld 0x50ca, a
+ 000258 624 00116$:
+ 625 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: }
+ 000258 84 [ 1] 626 pop a
+ 000259 85 [ 2] 627 popw x
+ 00025A 84 [ 1] 628 pop a
+ 00025B FC [ 2] 629 jp (x)
+ 630 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
+ 631 ; -----------------------------------------
+ 632 ; function CLK_GetFlagStatus
+ 633 ; -----------------------------------------
+ 00025C 634 _CLK_GetFlagStatus:
+ 00025C 88 [ 1] 635 push a
+ 636 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
+ 00025D 97 [ 1] 637 ld xl, a
+ 00025E A4 F0 [ 1] 638 and a, #0xf0
+ 639 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
+ 000260 88 [ 1] 640 push a
+ 000261 9F [ 1] 641 ld a, xl
+ 000262 A4 0F [ 1] 642 and a, #0x0f
+ 000264 97 [ 1] 643 ld xl, a
+ 000265 84 [ 1] 644 pop a
+ 645 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */
+ 000266 4D [ 1] 646 tnz a
+ 000267 26 05 [ 1] 647 jrne 00123$
+ 648 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR;
+ 000269 C6 50 C1 [ 1] 649 ld a, 0x50c1
+ 00026C 20 42 [ 2] 650 jra 00124$
+ 00026E 651 00123$:
+ 652 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */
+ 00026E A1 10 [ 1] 653 cp a, #0x10
+ 000270 26 05 [ 1] 654 jrne 00120$
+ 655 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR;
+ 000272 C6 50 C2 [ 1] 656 ld a, 0x50c2
+ 000275 20 39 [ 2] 657 jra 00124$
+ 000277 658 00120$:
+ 659 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */
+ 000277 A1 20 [ 1] 660 cp a, #0x20
+ 000279 26 05 [ 1] 661 jrne 00117$
+ 662 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR;
+ 00027B C6 50 C5 [ 1] 663 ld a, 0x50c5
+ 00027E 20 30 [ 2] 664 jra 00124$
+ 000280 665 00117$:
+ 666 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */
+ 000280 A1 30 [ 1] 667 cp a, #0x30
+ 000282 26 05 [ 1] 668 jrne 00114$
+ 669 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR;
+ 000284 C6 50 C6 [ 1] 670 ld a, 0x50c6
+ 000287 20 27 [ 2] 671 jra 00124$
+ 000289 672 00114$:
+ 673 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */
+ 000289 A1 40 [ 1] 674 cp a, #0x40
+ 00028B 26 05 [ 1] 675 jrne 00111$
+ 676 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR;
+ 00028D C6 50 C9 [ 1] 677 ld a, 0x50c9
+ 000290 20 1E [ 2] 678 jra 00124$
+ 000292 679 00111$:
+ 680 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */
+ 000292 A1 50 [ 1] 681 cp a, #0x50
+ 000294 26 05 [ 1] 682 jrne 00108$
+ 683 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR;
+ 000296 C6 50 CA [ 1] 684 ld a, 0x50ca
+ 000299 20 15 [ 2] 685 jra 00124$
+ 00029B 686 00108$:
+ 687 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */
+ 00029B A1 70 [ 1] 688 cp a, #0x70
+ 00029D 26 05 [ 1] 689 jrne 00105$
+ 690 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR;
+ 00029F C6 50 CF [ 1] 691 ld a, 0x50cf
+ 0002A2 20 0C [ 2] 692 jra 00124$
+ 0002A4 693 00105$:
+ 694 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
+ 0002A4 A1 80 [ 1] 695 cp a, #0x80
+ 0002A6 26 05 [ 1] 696 jrne 00102$
+ 697 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR;
+ 0002A8 C6 51 90 [ 1] 698 ld a, 0x5190
+ 0002AB 20 03 [ 2] 699 jra 00124$
+ 0002AD 700 00102$:
+ 701 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR;
+ 0002AD C6 50 CB [ 1] 702 ld a, 0x50cb
+ 0002B0 703 00124$:
+ 704 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
+ 0002B0 88 [ 1] 705 push a
+ 0002B1 A6 01 [ 1] 706 ld a, #0x01
+ 0002B3 6B 02 [ 1] 707 ld (0x02, sp), a
+ 0002B5 9F [ 1] 708 ld a, xl
+ 0002B6 4D [ 1] 709 tnz a
+ 0002B7 27 05 [ 1] 710 jreq 00216$
+ 0002B9 711 00215$:
+ 0002B9 08 02 [ 1] 712 sll (0x02, sp)
+ 0002BB 4A [ 1] 713 dec a
+ 0002BC 26 FB [ 1] 714 jrne 00215$
+ 0002BE 715 00216$:
+ 0002BE 84 [ 1] 716 pop a
+ 0002BF 14 01 [ 1] 717 and a, (0x01, sp)
+ 0002C1 27 03 [ 1] 718 jreq 00126$
+ 719 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET;
+ 0002C3 A6 01 [ 1] 720 ld a, #0x01
+ 721 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET;
+ 0002C5 21 722 .byte 0x21
+ 0002C6 723 00126$:
+ 0002C6 4F [ 1] 724 clr a
+ 0002C7 725 00127$:
+ 726 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus);
+ 727 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: }
+ 0002C7 5B 01 [ 2] 728 addw sp, #1
+ 0002C9 81 [ 4] 729 ret
+ 730 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void)
+ 731 ; -----------------------------------------
+ 732 ; function CLK_ClearFlag
+ 733 ; -----------------------------------------
+ 0002CA 734 _CLK_ClearFlag:
+ 735 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
+ 0002CA 72 17 51 90 [ 1] 736 bres 0x5190, #3
+ 737 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: }
+ 0002CE 81 [ 4] 738 ret
+ 739 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
+ 740 ; -----------------------------------------
+ 741 ; function CLK_GetITStatus
+ 742 ; -----------------------------------------
+ 0002CF 743 _CLK_GetITStatus:
+ 0002CF 88 [ 1] 744 push a
+ 745 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF)
+ 0002D0 6B 01 [ 1] 746 ld (0x01, sp), a
+ 0002D2 A1 1C [ 1] 747 cp a, #0x1c
+ 0002D4 26 0F [ 1] 748 jrne 00114$
+ 749 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ 0002D6 C6 50 C9 [ 1] 750 ld a, 0x50c9
+ 0002D9 14 01 [ 1] 751 and a, (0x01, sp)
+ 752 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET;
+ 0002DB A0 0C [ 1] 753 sub a, #0x0c
+ 0002DD 26 03 [ 1] 754 jrne 00102$
+ 0002DF 4C [ 1] 755 inc a
+ 0002E0 20 24 [ 2] 756 jra 00115$
+ 0002E2 757 00102$:
+ 758 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET;
+ 0002E2 4F [ 1] 759 clr a
+ 0002E3 20 21 [ 2] 760 jra 00115$
+ 0002E5 761 00114$:
+ 762 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF)
+ 0002E5 7B 01 [ 1] 763 ld a, (0x01, sp)
+ 0002E7 A1 2C [ 1] 764 cp a, #0x2c
+ 0002E9 26 0F [ 1] 765 jrne 00111$
+ 766 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ 0002EB C6 51 90 [ 1] 767 ld a, 0x5190
+ 0002EE 14 01 [ 1] 768 and a, (0x01, sp)
+ 769 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET;
+ 0002F0 A0 0C [ 1] 770 sub a, #0x0c
+ 0002F2 26 03 [ 1] 771 jrne 00105$
+ 0002F4 4C [ 1] 772 inc a
+ 0002F5 20 0F [ 2] 773 jra 00115$
+ 0002F7 774 00105$:
+ 775 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET;
+ 0002F7 4F [ 1] 776 clr a
+ 0002F8 20 0C [ 2] 777 jra 00115$
+ 0002FA 778 00111$:
+ 779 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ 0002FA C6 50 CA [ 1] 780 ld a, 0x50ca
+ 0002FD 14 01 [ 1] 781 and a, (0x01, sp)
+ 782 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET;
+ 0002FF A0 0C [ 1] 783 sub a, #0x0c
+ 000301 26 02 [ 1] 784 jrne 00108$
+ 000303 4C [ 1] 785 inc a
+ 786 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET;
+ 000304 21 787 .byte 0x21
+ 000305 788 00108$:
+ 000305 4F [ 1] 789 clr a
+ 000306 790 00115$:
+ 791 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus;
+ 792 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: }
+ 000306 5B 01 [ 2] 793 addw sp, #1
+ 000308 81 [ 4] 794 ret
+ 795 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
+ 796 ; -----------------------------------------
+ 797 ; function CLK_ClearITPendingBit
+ 798 ; -----------------------------------------
+ 000309 799 _CLK_ClearITPendingBit:
+ 800 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
+ 000309 A4 F0 [ 1] 801 and a, #0xf0
+ 00030B A1 20 [ 1] 802 cp a, #0x20
+ 00030D 26 05 [ 1] 803 jrne 00102$
+ 804 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
+ 00030F 72 17 51 90 [ 1] 805 bres 0x5190, #3
+ 000313 81 [ 4] 806 ret
+ 000314 807 00102$:
+ 808 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
+ 000314 72 17 50 C9 [ 1] 809 bres 0x50c9, #3
+ 810 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: }
+ 000318 81 [ 4] 811 ret
+ 812 .area CODE
+ 813 .area CONST
+ 814 .area CONST
+ 000000 815 _SYSDivFactor:
+ 000000 01 816 .db #0x01 ; 1
+ 000001 02 817 .db #0x02 ; 2
+ 000002 04 818 .db #0x04 ; 4
+ 000003 08 819 .db #0x08 ; 8
+ 000004 10 820 .db #0x10 ; 16
+ 821 .area CODE
+ 822 .area INITIALIZER
+ 823 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_clk.rel b/firmware/STM8L15X_LD/stm8l15x_clk.rel
new file mode 100644
index 0000000..3dde110
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_clk.rel
@@ -0,0 +1,417 @@
+XH3
+H B areas 1D global symbols
+M stm8l15x_clk
+S .__.ABS. Def000000
+S __divulong Ref000000
+A _CODE size 0 flags 0 addr 0
+A DATA size 0 flags 0 addr 0
+A INITIALIZED size 0 flags 0 addr 0
+A DABS size 0 flags 8 addr 0
+A HOME size 0 flags 0 addr 0
+A GSINIT size 0 flags 0 addr 0
+A GSFINAL size 0 flags 0 addr 0
+A CONST size 5 flags 0 addr 0
+S _SYSDivFactor Def000000
+A INITIALIZER size 0 flags 0 addr 0
+A CODE size 319 flags 0 addr 0
+S _CLK_ClearITPendingBit Def000309
+S _CLK_GetSYSCLKSource Def0000D0
+S _CLK_RTCClockConfig Def000143
+S _CLK_CCOConfig Def0000C4
+S _CLK_ITConfig Def0001F7
+S _CLK_LSEClockSecuritySystemEnable Def0001B7
+S _CLK_AdjustHSICalibrationValue Def000059
+S _CLK_HSEConfig Def00007D
+S _CLK_HSICmd Def000041
+S _CLK_LSEConfig Def000092
+S _CLK_LSICmd Def000065
+S _CLK_DeInit Def000000
+S _CLK_GetITStatus Def0002CF
+S _CLK_MainRegulatorCmd Def0001DF
+S _CLK_PeripheralClockConfig Def00014F
+S _CLK_ClockSecuritySytemDeglitchCmd Def0000AC
+S _CLK_SYSCLKSourceSwitchCmd Def00012B
+S _CLK_ClockSecuritySystemEnable Def0000A7
+S _CLK_SYSCLKDivConfig Def000127
+S _CLK_GetClockFreq Def0000D4
+S _CLK_GetFlagStatus Def00025C
+S _CLK_BEEPClockConfig Def00014B
+S _CLK_HaltConfig Def0001C1
+S _CLK_SYSCLKSourceConfig Def0000CC
+S _CLK_ClearFlag Def0002CA
+S _CLK_RTCCLKSwitchOnLSEFailureEnable Def0001BC
+A CABS size 0 flags 8 addr 0
+T 00 00 00
+R 00 00 00 09
+T 00 00 00 35 11 50 C2 35 00 50 C6 35 00 50 C1 35
+R 00 00 00 09
+T 00 00 0D 00 50 CB 35 01 50 C8 35 00 50 C9 35 03
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+T 00 01 17 88 89 4F 88 1E 07 89 1E 07 89 CD 00 00
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+R 00 00 00 09
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+R 00 00 00 09
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+R 00 00 00 09
+T 00 03 06 5B 01 81
+R 00 00 00 09
+T 00 03 09
+R 00 00 00 09
+T 00 03 09 A4 F0 A1 20 26 05 72 17 51 90 81
+R 00 00 00 09
+T 00 03 14
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+T 00 00 00
+R 00 00 00 07
+T 00 00 00 01 02 04 08 10
+R 00 00 00 07
diff --git a/firmware/STM8L15X_LD/stm8l15x_clk.rst b/firmware/STM8L15X_LD/stm8l15x_clk.rst
new file mode 100644
index 0000000..a23d252
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_clk.rst
@@ -0,0 +1,823 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_clk
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _SYSDivFactor
+ 11 .globl _CLK_DeInit
+ 12 .globl _CLK_HSICmd
+ 13 .globl _CLK_AdjustHSICalibrationValue
+ 14 .globl _CLK_LSICmd
+ 15 .globl _CLK_HSEConfig
+ 16 .globl _CLK_LSEConfig
+ 17 .globl _CLK_ClockSecuritySystemEnable
+ 18 .globl _CLK_ClockSecuritySytemDeglitchCmd
+ 19 .globl _CLK_CCOConfig
+ 20 .globl _CLK_SYSCLKSourceConfig
+ 21 .globl _CLK_GetSYSCLKSource
+ 22 .globl _CLK_GetClockFreq
+ 23 .globl _CLK_SYSCLKDivConfig
+ 24 .globl _CLK_SYSCLKSourceSwitchCmd
+ 25 .globl _CLK_RTCClockConfig
+ 26 .globl _CLK_BEEPClockConfig
+ 27 .globl _CLK_PeripheralClockConfig
+ 28 .globl _CLK_LSEClockSecuritySystemEnable
+ 29 .globl _CLK_RTCCLKSwitchOnLSEFailureEnable
+ 30 .globl _CLK_HaltConfig
+ 31 .globl _CLK_MainRegulatorCmd
+ 32 .globl _CLK_ITConfig
+ 33 .globl _CLK_GetFlagStatus
+ 34 .globl _CLK_ClearFlag
+ 35 .globl _CLK_GetITStatus
+ 36 .globl _CLK_ClearITPendingBit
+ 37 ;--------------------------------------------------------
+ 38 ; ram data
+ 39 ;--------------------------------------------------------
+ 40 .area DATA
+ 41 ;--------------------------------------------------------
+ 42 ; ram data
+ 43 ;--------------------------------------------------------
+ 44 .area INITIALIZED
+ 45 ;--------------------------------------------------------
+ 46 ; absolute external ram data
+ 47 ;--------------------------------------------------------
+ 48 .area DABS (ABS)
+ 49
+ 50 ; default segment ordering for linker
+ 51 .area HOME
+ 52 .area GSINIT
+ 53 .area GSFINAL
+ 54 .area CONST
+ 55 .area INITIALIZER
+ 56 .area CODE
+ 57
+ 58 ;--------------------------------------------------------
+ 59 ; global & static initialisations
+ 60 ;--------------------------------------------------------
+ 61 .area HOME
+ 62 .area GSINIT
+ 63 .area GSFINAL
+ 64 .area GSINIT
+ 65 ;--------------------------------------------------------
+ 66 ; Home
+ 67 ;--------------------------------------------------------
+ 68 .area HOME
+ 69 .area HOME
+ 70 ;--------------------------------------------------------
+ 71 ; code
+ 72 ;--------------------------------------------------------
+ 73 .area CODE
+ 74 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void)
+ 75 ; -----------------------------------------
+ 76 ; function CLK_DeInit
+ 77 ; -----------------------------------------
+ 008502 78 _CLK_DeInit:
+ 79 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE;
+ 008502 35 11 50 C2 [ 1] 80 mov 0x50c2+0, #0x11
+ 81 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE;
+ 008506 35 00 50 C6 [ 1] 82 mov 0x50c6+0, #0x00
+ 83 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE;
+ 00850A 35 00 50 C1 [ 1] 84 mov 0x50c1+0, #0x00
+ 85 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE;
+ 00850E 35 00 50 CB [ 1] 86 mov 0x50cb+0, #0x00
+ 87 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE;
+ 008512 35 01 50 C8 [ 1] 88 mov 0x50c8+0, #0x01
+ 89 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE;
+ 008516 35 00 50 C9 [ 1] 90 mov 0x50c9+0, #0x00
+ 91 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
+ 00851A 35 03 50 C0 [ 1] 92 mov 0x50c0+0, #0x03
+ 93 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
+ 00851E 35 00 50 C3 [ 1] 94 mov 0x50c3+0, #0x00
+ 95 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
+ 008522 35 80 50 C4 [ 1] 96 mov 0x50c4+0, #0x80
+ 97 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE;
+ 008526 35 00 50 D0 [ 1] 98 mov 0x50d0+0, #0x00
+ 99 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE;
+ 00852A 35 00 50 CA [ 1] 100 mov 0x50ca+0, #0x00
+ 101 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE;
+ 00852E 35 00 50 C5 [ 1] 102 mov 0x50c5+0, #0x00
+ 103 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
+ 008532 35 00 50 CD [ 1] 104 mov 0x50cd+0, #0x00
+ 105 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE;
+ 008536 35 00 50 CC [ 1] 106 mov 0x50cc+0, #0x00
+ 107 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE;
+ 00853A 35 00 50 CE [ 1] 108 mov 0x50ce+0, #0x00
+ 109 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE;
+ 00853E 35 B9 50 CF [ 1] 110 mov 0x50cf+0, #0xb9
+ 111 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: }
+ 008542 81 [ 4] 112 ret
+ 113 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState)
+ 114 ; -----------------------------------------
+ 115 ; function CLK_HSICmd
+ 116 ; -----------------------------------------
+ 008543 117 _CLK_HSICmd:
+ 008543 88 [ 1] 118 push a
+ 008544 6B 01 [ 1] 119 ld (0x01, sp), a
+ 120 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
+ 008546 C6 50 C2 [ 1] 121 ld a, 0x50c2
+ 122 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE)
+ 008549 0D 01 [ 1] 123 tnz (0x01, sp)
+ 00854B 27 07 [ 1] 124 jreq 00102$
+ 125 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
+ 00854D AA 01 [ 1] 126 or a, #0x01
+ 00854F C7 50 C2 [ 1] 127 ld 0x50c2, a
+ 008552 20 05 [ 2] 128 jra 00104$
+ 008554 129 00102$:
+ 130 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION);
+ 008554 A4 FE [ 1] 131 and a, #0xfe
+ 008556 C7 50 C2 [ 1] 132 ld 0x50c2, a
+ 008559 133 00104$:
+ 134 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: }
+ 008559 84 [ 1] 135 pop a
+ 00855A 81 [ 4] 136 ret
+ 137 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue)
+ 138 ; -----------------------------------------
+ 139 ; function CLK_AdjustHSICalibrationValue
+ 140 ; -----------------------------------------
+ 00855B 141 _CLK_AdjustHSICalibrationValue:
+ 142 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC;
+ 00855B 35 AC 50 CE [ 1] 143 mov 0x50ce+0, #0xac
+ 144 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35;
+ 00855F 35 35 50 CE [ 1] 145 mov 0x50ce+0, #0x35
+ 146 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue;
+ 008563 C7 50 CD [ 1] 147 ld 0x50cd, a
+ 148 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: }
+ 008566 81 [ 4] 149 ret
+ 150 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState)
+ 151 ; -----------------------------------------
+ 152 ; function CLK_LSICmd
+ 153 ; -----------------------------------------
+ 008567 154 _CLK_LSICmd:
+ 008567 88 [ 1] 155 push a
+ 008568 6B 01 [ 1] 156 ld (0x01, sp), a
+ 157 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
+ 00856A C6 50 C2 [ 1] 158 ld a, 0x50c2
+ 159 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE)
+ 00856D 0D 01 [ 1] 160 tnz (0x01, sp)
+ 00856F 27 07 [ 1] 161 jreq 00102$
+ 162 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
+ 008571 AA 04 [ 1] 163 or a, #0x04
+ 008573 C7 50 C2 [ 1] 164 ld 0x50c2, a
+ 008576 20 05 [ 2] 165 jra 00104$
+ 008578 166 00102$:
+ 167 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION);
+ 008578 A4 FB [ 1] 168 and a, #0xfb
+ 00857A C7 50 C2 [ 1] 169 ld 0x50c2, a
+ 00857D 170 00104$:
+ 171 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: }
+ 00857D 84 [ 1] 172 pop a
+ 00857E 81 [ 4] 173 ret
+ 174 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE)
+ 175 ; -----------------------------------------
+ 176 ; function CLK_HSEConfig
+ 177 ; -----------------------------------------
+ 00857F 178 _CLK_HSEConfig:
+ 00857F 88 [ 1] 179 push a
+ 008580 6B 01 [ 1] 180 ld (0x01, sp), a
+ 181 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON;
+ 008582 72 11 50 C6 [ 1] 182 bres 0x50c6, #0
+ 183 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP;
+ 008586 72 19 50 C6 [ 1] 184 bres 0x50c6, #4
+ 185 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE;
+ 00858A C6 50 C6 [ 1] 186 ld a, 0x50c6
+ 00858D 1A 01 [ 1] 187 or a, (0x01, sp)
+ 00858F C7 50 C6 [ 1] 188 ld 0x50c6, a
+ 189 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: }
+ 008592 84 [ 1] 190 pop a
+ 008593 81 [ 4] 191 ret
+ 192 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE)
+ 193 ; -----------------------------------------
+ 194 ; function CLK_LSEConfig
+ 195 ; -----------------------------------------
+ 008594 196 _CLK_LSEConfig:
+ 008594 88 [ 1] 197 push a
+ 008595 6B 01 [ 1] 198 ld (0x01, sp), a
+ 199 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON;
+ 008597 72 15 50 C6 [ 1] 200 bres 0x50c6, #2
+ 201 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP;
+ 00859B 72 1B 50 C6 [ 1] 202 bres 0x50c6, #5
+ 203 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE;
+ 00859F C6 50 C6 [ 1] 204 ld a, 0x50c6
+ 0085A2 1A 01 [ 1] 205 or a, (0x01, sp)
+ 0085A4 C7 50 C6 [ 1] 206 ld 0x50c6, a
+ 207 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: }
+ 0085A7 84 [ 1] 208 pop a
+ 0085A8 81 [ 4] 209 ret
+ 210 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void)
+ 211 ; -----------------------------------------
+ 212 ; function CLK_ClockSecuritySystemEnable
+ 213 ; -----------------------------------------
+ 0085A9 214 _CLK_ClockSecuritySystemEnable:
+ 215 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN;
+ 0085A9 72 10 50 CA [ 1] 216 bset 0x50ca, #0
+ 217 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: }
+ 0085AD 81 [ 4] 218 ret
+ 219 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState)
+ 220 ; -----------------------------------------
+ 221 ; function CLK_ClockSecuritySytemDeglitchCmd
+ 222 ; -----------------------------------------
+ 0085AE 223 _CLK_ClockSecuritySytemDeglitchCmd:
+ 0085AE 88 [ 1] 224 push a
+ 0085AF 6B 01 [ 1] 225 ld (0x01, sp), a
+ 226 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
+ 0085B1 C6 50 CA [ 1] 227 ld a, 0x50ca
+ 228 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE)
+ 0085B4 0D 01 [ 1] 229 tnz (0x01, sp)
+ 0085B6 27 07 [ 1] 230 jreq 00102$
+ 231 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
+ 0085B8 AA 10 [ 1] 232 or a, #0x10
+ 0085BA C7 50 CA [ 1] 233 ld 0x50ca, a
+ 0085BD 20 05 [ 2] 234 jra 00104$
+ 0085BF 235 00102$:
+ 236 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON);
+ 0085BF A4 EF [ 1] 237 and a, #0xef
+ 0085C1 C7 50 CA [ 1] 238 ld 0x50ca, a
+ 0085C4 239 00104$:
+ 240 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: }
+ 0085C4 84 [ 1] 241 pop a
+ 0085C5 81 [ 4] 242 ret
+ 243 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv)
+ 244 ; -----------------------------------------
+ 245 ; function CLK_CCOConfig
+ 246 ; -----------------------------------------
+ 0085C6 247 _CLK_CCOConfig:
+ 248 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv);
+ 0085C6 1A 03 [ 1] 249 or a, (0x03, sp)
+ 0085C8 C7 50 C5 [ 1] 250 ld 0x50c5, a
+ 251 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: }
+ 0085CB 85 [ 2] 252 popw x
+ 0085CC 84 [ 1] 253 pop a
+ 0085CD FC [ 2] 254 jp (x)
+ 255 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
+ 256 ; -----------------------------------------
+ 257 ; function CLK_SYSCLKSourceConfig
+ 258 ; -----------------------------------------
+ 0085CE 259 _CLK_SYSCLKSourceConfig:
+ 260 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource;
+ 0085CE C7 50 C8 [ 1] 261 ld 0x50c8, a
+ 262 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: }
+ 0085D1 81 [ 4] 263 ret
+ 264 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
+ 265 ; -----------------------------------------
+ 266 ; function CLK_GetSYSCLKSource
+ 267 ; -----------------------------------------
+ 0085D2 268 _CLK_GetSYSCLKSource:
+ 269 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
+ 0085D2 C6 50 C7 [ 1] 270 ld a, 0x50c7
+ 271 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: }
+ 0085D5 81 [ 4] 272 ret
+ 273 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void)
+ 274 ; -----------------------------------------
+ 275 ; function CLK_GetClockFreq
+ 276 ; -----------------------------------------
+ 0085D6 277 _CLK_GetClockFreq:
+ 0085D6 52 08 [ 2] 278 sub sp, #8
+ 279 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0;
+ 0085D8 5F [ 1] 280 clrw x
+ 0085D9 1F 03 [ 2] 281 ldw (0x03, sp), x
+ 0085DB 1F 01 [ 2] 282 ldw (0x01, sp), x
+ 283 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;
+ 0085DD C6 50 C7 [ 1] 284 ld a, 0x50c7
+ 285 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI)
+ 0085E0 A1 01 [ 1] 286 cp a, #0x01
+ 0085E2 26 0C [ 1] 287 jrne 00108$
+ 288 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE;
+ 0085E4 AE 24 00 [ 2] 289 ldw x, #0x2400
+ 0085E7 1F 03 [ 2] 290 ldw (0x03, sp), x
+ 0085E9 AE 00 F4 [ 2] 291 ldw x, #0x00f4
+ 0085EC 1F 01 [ 2] 292 ldw (0x01, sp), x
+ 0085EE 20 1C [ 2] 293 jra 00109$
+ 0085F0 294 00108$:
+ 295 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI)
+ 0085F0 A1 02 [ 1] 296 cp a, #0x02
+ 0085F2 26 0A [ 1] 297 jrne 00105$
+ 298 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE;
+ 0085F4 AE 94 70 [ 2] 299 ldw x, #0x9470
+ 0085F7 1F 03 [ 2] 300 ldw (0x03, sp), x
+ 0085F9 5F [ 1] 301 clrw x
+ 0085FA 1F 01 [ 2] 302 ldw (0x01, sp), x
+ 0085FC 20 0E [ 2] 303 jra 00109$
+ 0085FE 304 00105$:
+ 305 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE)
+ 0085FE A1 04 [ 1] 306 cp a, #0x04
+ 008600 26 0A [ 1] 307 jrne 00109$
+ 308 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE;
+ 008602 AE 24 00 [ 2] 309 ldw x, #0x2400
+ 008605 1F 03 [ 2] 310 ldw (0x03, sp), x
+ 008607 AE 00 F4 [ 2] 311 ldw x, #0x00f4
+ 00860A 1F 01 [ 2] 312 ldw (0x01, sp), x
+ 313 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE;
+ 00860C 314 00109$:
+ 315 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
+ 00860C C6 50 C0 [ 1] 316 ld a, 0x50c0
+ 00860F A4 07 [ 1] 317 and a, #0x07
+ 318 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp];
+ 008611 5F [ 1] 319 clrw x
+ 008612 97 [ 1] 320 ld xl, a
+ 008613 D6 80 AF [ 1] 321 ld a, (_SYSDivFactor+0, x)
+ 322 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc;
+ 008616 5F [ 1] 323 clrw x
+ 008617 0F 05 [ 1] 324 clr (0x05, sp)
+ 008619 88 [ 1] 325 push a
+ 00861A 89 [ 2] 326 pushw x
+ 00861B 4F [ 1] 327 clr a
+ 00861C 88 [ 1] 328 push a
+ 00861D 1E 07 [ 2] 329 ldw x, (0x07, sp)
+ 00861F 89 [ 2] 330 pushw x
+ 008620 1E 07 [ 2] 331 ldw x, (0x07, sp)
+ 008622 89 [ 2] 332 pushw x
+ 333 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency);
+ 008623 CD 92 5C [ 4] 334 call __divulong
+ 335 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: }
+ 008626 5B 10 [ 2] 336 addw sp, #16
+ 008628 81 [ 4] 337 ret
+ 338 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
+ 339 ; -----------------------------------------
+ 340 ; function CLK_SYSCLKDivConfig
+ 341 ; -----------------------------------------
+ 008629 342 _CLK_SYSCLKDivConfig:
+ 343 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
+ 008629 C7 50 C0 [ 1] 344 ld 0x50c0, a
+ 345 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: }
+ 00862C 81 [ 4] 346 ret
+ 347 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
+ 348 ; -----------------------------------------
+ 349 ; function CLK_SYSCLKSourceSwitchCmd
+ 350 ; -----------------------------------------
+ 00862D 351 _CLK_SYSCLKSourceSwitchCmd:
+ 00862D 88 [ 1] 352 push a
+ 00862E 6B 01 [ 1] 353 ld (0x01, sp), a
+ 354 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
+ 008630 C6 50 C9 [ 1] 355 ld a, 0x50c9
+ 356 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE)
+ 008633 0D 01 [ 1] 357 tnz (0x01, sp)
+ 008635 27 07 [ 1] 358 jreq 00102$
+ 359 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
+ 008637 AA 02 [ 1] 360 or a, #0x02
+ 008639 C7 50 C9 [ 1] 361 ld 0x50c9, a
+ 00863C 20 05 [ 2] 362 jra 00104$
+ 00863E 363 00102$:
+ 364 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
+ 00863E A4 FD [ 1] 365 and a, #0xfd
+ 008640 C7 50 C9 [ 1] 366 ld 0x50c9, a
+ 008643 367 00104$:
+ 368 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: }
+ 008643 84 [ 1] 369 pop a
+ 008644 81 [ 4] 370 ret
+ 371 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
+ 372 ; -----------------------------------------
+ 373 ; function CLK_RTCClockConfig
+ 374 ; -----------------------------------------
+ 008645 375 _CLK_RTCClockConfig:
+ 376 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
+ 008645 1A 03 [ 1] 377 or a, (0x03, sp)
+ 008647 C7 50 C1 [ 1] 378 ld 0x50c1, a
+ 379 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: }
+ 00864A 85 [ 2] 380 popw x
+ 00864B 84 [ 1] 381 pop a
+ 00864C FC [ 2] 382 jp (x)
+ 383 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
+ 384 ; -----------------------------------------
+ 385 ; function CLK_BEEPClockConfig
+ 386 ; -----------------------------------------
+ 00864D 387 _CLK_BEEPClockConfig:
+ 388 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);
+ 00864D C7 50 CB [ 1] 389 ld 0x50cb, a
+ 390 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: }
+ 008650 81 [ 4] 391 ret
+ 392 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
+ 393 ; -----------------------------------------
+ 394 ; function CLK_PeripheralClockConfig
+ 395 ; -----------------------------------------
+ 008651 396 _CLK_PeripheralClockConfig:
+ 008651 89 [ 2] 397 pushw x
+ 398 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);
+ 008652 88 [ 1] 399 push a
+ 008653 A4 F0 [ 1] 400 and a, #0xf0
+ 008655 97 [ 1] 401 ld xl, a
+ 008656 84 [ 1] 402 pop a
+ 008657 90 93 [ 1] 403 ldw y, x
+ 404 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 008659 A4 0F [ 1] 405 and a, #0x0f
+ 00865B 88 [ 1] 406 push a
+ 00865C A6 01 [ 1] 407 ld a, #0x01
+ 00865E 6B 02 [ 1] 408 ld (0x02, sp), a
+ 008660 84 [ 1] 409 pop a
+ 008661 4D [ 1] 410 tnz a
+ 008662 27 05 [ 1] 411 jreq 00154$
+ 008664 412 00153$:
+ 008664 08 01 [ 1] 413 sll (0x01, sp)
+ 008666 4A [ 1] 414 dec a
+ 008667 26 FB [ 1] 415 jrne 00153$
+ 008669 416 00154$:
+ 417 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 008669 7B 01 [ 1] 418 ld a, (0x01, sp)
+ 00866B 43 [ 1] 419 cpl a
+ 00866C 6B 02 [ 1] 420 ld (0x02, sp), a
+ 421 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00)
+ 00866E 9F [ 1] 422 ld a, xl
+ 00866F 4D [ 1] 423 tnz a
+ 008670 26 15 [ 1] 424 jrne 00114$
+ 425 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 008672 C6 50 C3 [ 1] 426 ld a, 0x50c3
+ 427 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE)
+ 008675 0D 05 [ 1] 428 tnz (0x05, sp)
+ 008677 27 07 [ 1] 429 jreq 00102$
+ 430 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 008679 1A 01 [ 1] 431 or a, (0x01, sp)
+ 00867B C7 50 C3 [ 1] 432 ld 0x50c3, a
+ 00867E 20 35 [ 2] 433 jra 00116$
+ 008680 434 00102$:
+ 435 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 008680 14 02 [ 1] 436 and a, (0x02, sp)
+ 008682 C7 50 C3 [ 1] 437 ld 0x50c3, a
+ 008685 20 2E [ 2] 438 jra 00116$
+ 008687 439 00114$:
+ 440 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10)
+ 008687 90 9F [ 1] 441 ld a, yl
+ 008689 A1 10 [ 1] 442 cp a, #0x10
+ 00868B 26 15 [ 1] 443 jrne 00111$
+ 444 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 00868D C6 50 C4 [ 1] 445 ld a, 0x50c4
+ 446 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE)
+ 008690 0D 05 [ 1] 447 tnz (0x05, sp)
+ 008692 27 07 [ 1] 448 jreq 00105$
+ 449 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 008694 1A 01 [ 1] 450 or a, (0x01, sp)
+ 008696 C7 50 C4 [ 1] 451 ld 0x50c4, a
+ 008699 20 1A [ 2] 452 jra 00116$
+ 00869B 453 00105$:
+ 454 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 00869B 14 02 [ 1] 455 and a, (0x02, sp)
+ 00869D C7 50 C4 [ 1] 456 ld 0x50c4, a
+ 0086A0 20 13 [ 2] 457 jra 00116$
+ 0086A2 458 00111$:
+ 459 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 0086A2 C6 50 D0 [ 1] 460 ld a, 0x50d0
+ 461 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE)
+ 0086A5 0D 05 [ 1] 462 tnz (0x05, sp)
+ 0086A7 27 07 [ 1] 463 jreq 00108$
+ 464 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
+ 0086A9 1A 01 [ 1] 465 or a, (0x01, sp)
+ 0086AB C7 50 D0 [ 1] 466 ld 0x50d0, a
+ 0086AE 20 05 [ 2] 467 jra 00116$
+ 0086B0 468 00108$:
+ 469 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
+ 0086B0 14 02 [ 1] 470 and a, (0x02, sp)
+ 0086B2 C7 50 D0 [ 1] 471 ld 0x50d0, a
+ 0086B5 472 00116$:
+ 473 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: }
+ 0086B5 85 [ 2] 474 popw x
+ 0086B6 85 [ 2] 475 popw x
+ 0086B7 84 [ 1] 476 pop a
+ 0086B8 FC [ 2] 477 jp (x)
+ 478 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void)
+ 479 ; -----------------------------------------
+ 480 ; function CLK_LSEClockSecuritySystemEnable
+ 481 ; -----------------------------------------
+ 0086B9 482 _CLK_LSEClockSecuritySystemEnable:
+ 483 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
+ 0086B9 72 10 51 90 [ 1] 484 bset 0x5190, #0
+ 485 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: }
+ 0086BD 81 [ 4] 486 ret
+ 487 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
+ 488 ; -----------------------------------------
+ 489 ; function CLK_RTCCLKSwitchOnLSEFailureEnable
+ 490 ; -----------------------------------------
+ 0086BE 491 _CLK_RTCCLKSwitchOnLSEFailureEnable:
+ 492 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
+ 0086BE 72 12 51 90 [ 1] 493 bset 0x5190, #1
+ 494 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: }
+ 0086C2 81 [ 4] 495 ret
+ 496 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
+ 497 ; -----------------------------------------
+ 498 ; function CLK_HaltConfig
+ 499 ; -----------------------------------------
+ 0086C3 500 _CLK_HaltConfig:
+ 0086C3 88 [ 1] 501 push a
+ 502 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
+ 0086C4 AE 50 C2 [ 2] 503 ldw x, #0x50c2
+ 0086C7 88 [ 1] 504 push a
+ 0086C8 F6 [ 1] 505 ld a, (x)
+ 0086C9 6B 02 [ 1] 506 ld (0x02, sp), a
+ 0086CB 84 [ 1] 507 pop a
+ 508 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE)
+ 0086CC 0D 04 [ 1] 509 tnz (0x04, sp)
+ 0086CE 27 07 [ 1] 510 jreq 00102$
+ 511 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
+ 0086D0 1A 01 [ 1] 512 or a, (0x01, sp)
+ 0086D2 C7 50 C2 [ 1] 513 ld 0x50c2, a
+ 0086D5 20 06 [ 2] 514 jra 00104$
+ 0086D7 515 00102$:
+ 516 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt);
+ 0086D7 43 [ 1] 517 cpl a
+ 0086D8 14 01 [ 1] 518 and a, (0x01, sp)
+ 0086DA C7 50 C2 [ 1] 519 ld 0x50c2, a
+ 0086DD 520 00104$:
+ 521 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: }
+ 0086DD 84 [ 1] 522 pop a
+ 0086DE 85 [ 2] 523 popw x
+ 0086DF 84 [ 1] 524 pop a
+ 0086E0 FC [ 2] 525 jp (x)
+ 526 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState)
+ 527 ; -----------------------------------------
+ 528 ; function CLK_MainRegulatorCmd
+ 529 ; -----------------------------------------
+ 0086E1 530 _CLK_MainRegulatorCmd:
+ 0086E1 88 [ 1] 531 push a
+ 0086E2 6B 01 [ 1] 532 ld (0x01, sp), a
+ 533 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
+ 0086E4 C6 50 CF [ 1] 534 ld a, 0x50cf
+ 535 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE)
+ 0086E7 0D 01 [ 1] 536 tnz (0x01, sp)
+ 0086E9 27 07 [ 1] 537 jreq 00102$
+ 538 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
+ 0086EB A4 FD [ 1] 539 and a, #0xfd
+ 0086ED C7 50 CF [ 1] 540 ld 0x50cf, a
+ 0086F0 20 05 [ 2] 541 jra 00104$
+ 0086F2 542 00102$:
+ 543 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF;
+ 0086F2 AA 02 [ 1] 544 or a, #0x02
+ 0086F4 C7 50 CF [ 1] 545 ld 0x50cf, a
+ 0086F7 546 00104$:
+ 547 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: }
+ 0086F7 84 [ 1] 548 pop a
+ 0086F8 81 [ 4] 549 ret
+ 550 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
+ 551 ; -----------------------------------------
+ 552 ; function CLK_ITConfig
+ 553 ; -----------------------------------------
+ 0086F9 554 _CLK_ITConfig:
+ 0086F9 88 [ 1] 555 push a
+ 556 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
+ 0086FA A1 1C [ 1] 557 cp a, #0x1c
+ 0086FC 26 07 [ 1] 558 jrne 00154$
+ 0086FE 88 [ 1] 559 push a
+ 0086FF A6 01 [ 1] 560 ld a, #0x01
+ 008701 6B 02 [ 1] 561 ld (0x02, sp), a
+ 008703 84 [ 1] 562 pop a
+ 008704 C5 563 .byte 0xc5
+ 008705 564 00154$:
+ 008705 0F 01 [ 1] 565 clr (0x01, sp)
+ 008707 566 00155$:
+ 567 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
+ 008707 A0 2C [ 1] 568 sub a, #0x2c
+ 008709 26 02 [ 1] 569 jrne 00157$
+ 00870B 4C [ 1] 570 inc a
+ 00870C 21 571 .byte 0x21
+ 00870D 572 00157$:
+ 00870D 4F [ 1] 573 clr a
+ 00870E 574 00158$:
+ 575 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE)
+ 00870E 0D 04 [ 1] 576 tnz (0x04, sp)
+ 008710 27 25 [ 1] 577 jreq 00114$
+ 578 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
+ 008712 0D 01 [ 1] 579 tnz (0x01, sp)
+ 008714 27 0A [ 1] 580 jreq 00105$
+ 581 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN;
+ 008716 C6 50 C9 [ 1] 582 ld a, 0x50c9
+ 008719 AA 04 [ 1] 583 or a, #0x04
+ 00871B C7 50 C9 [ 1] 584 ld 0x50c9, a
+ 00871E 20 3A [ 2] 585 jra 00116$
+ 008720 586 00105$:
+ 587 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
+ 008720 4D [ 1] 588 tnz a
+ 008721 27 0A [ 1] 589 jreq 00102$
+ 590 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
+ 008723 C6 51 90 [ 1] 591 ld a, 0x5190
+ 008726 AA 04 [ 1] 592 or a, #0x04
+ 008728 C7 51 90 [ 1] 593 ld 0x5190, a
+ 00872B 20 2D [ 2] 594 jra 00116$
+ 00872D 595 00102$:
+ 596 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE;
+ 00872D C6 50 CA [ 1] 597 ld a, 0x50ca
+ 008730 AA 04 [ 1] 598 or a, #0x04
+ 008732 C7 50 CA [ 1] 599 ld 0x50ca, a
+ 008735 20 23 [ 2] 600 jra 00116$
+ 008737 601 00114$:
+ 602 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF)
+ 008737 0D 01 [ 1] 603 tnz (0x01, sp)
+ 008739 27 0A [ 1] 604 jreq 00111$
+ 605 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
+ 00873B C6 50 C9 [ 1] 606 ld a, 0x50c9
+ 00873E A4 FB [ 1] 607 and a, #0xfb
+ 008740 C7 50 C9 [ 1] 608 ld 0x50c9, a
+ 008743 20 15 [ 2] 609 jra 00116$
+ 008745 610 00111$:
+ 611 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF)
+ 008745 4D [ 1] 612 tnz a
+ 008746 27 0A [ 1] 613 jreq 00108$
+ 614 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
+ 008748 C6 51 90 [ 1] 615 ld a, 0x5190
+ 00874B A4 FB [ 1] 616 and a, #0xfb
+ 00874D C7 51 90 [ 1] 617 ld 0x5190, a
+ 008750 20 08 [ 2] 618 jra 00116$
+ 008752 619 00108$:
+ 620 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
+ 008752 C6 50 CA [ 1] 621 ld a, 0x50ca
+ 008755 A4 FB [ 1] 622 and a, #0xfb
+ 008757 C7 50 CA [ 1] 623 ld 0x50ca, a
+ 00875A 624 00116$:
+ 625 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: }
+ 00875A 84 [ 1] 626 pop a
+ 00875B 85 [ 2] 627 popw x
+ 00875C 84 [ 1] 628 pop a
+ 00875D FC [ 2] 629 jp (x)
+ 630 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
+ 631 ; -----------------------------------------
+ 632 ; function CLK_GetFlagStatus
+ 633 ; -----------------------------------------
+ 00875E 634 _CLK_GetFlagStatus:
+ 00875E 88 [ 1] 635 push a
+ 636 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
+ 00875F 97 [ 1] 637 ld xl, a
+ 008760 A4 F0 [ 1] 638 and a, #0xf0
+ 639 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
+ 008762 88 [ 1] 640 push a
+ 008763 9F [ 1] 641 ld a, xl
+ 008764 A4 0F [ 1] 642 and a, #0x0f
+ 008766 97 [ 1] 643 ld xl, a
+ 008767 84 [ 1] 644 pop a
+ 645 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */
+ 008768 4D [ 1] 646 tnz a
+ 008769 26 05 [ 1] 647 jrne 00123$
+ 648 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR;
+ 00876B C6 50 C1 [ 1] 649 ld a, 0x50c1
+ 00876E 20 42 [ 2] 650 jra 00124$
+ 008770 651 00123$:
+ 652 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */
+ 008770 A1 10 [ 1] 653 cp a, #0x10
+ 008772 26 05 [ 1] 654 jrne 00120$
+ 655 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR;
+ 008774 C6 50 C2 [ 1] 656 ld a, 0x50c2
+ 008777 20 39 [ 2] 657 jra 00124$
+ 008779 658 00120$:
+ 659 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */
+ 008779 A1 20 [ 1] 660 cp a, #0x20
+ 00877B 26 05 [ 1] 661 jrne 00117$
+ 662 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR;
+ 00877D C6 50 C5 [ 1] 663 ld a, 0x50c5
+ 008780 20 30 [ 2] 664 jra 00124$
+ 008782 665 00117$:
+ 666 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */
+ 008782 A1 30 [ 1] 667 cp a, #0x30
+ 008784 26 05 [ 1] 668 jrne 00114$
+ 669 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR;
+ 008786 C6 50 C6 [ 1] 670 ld a, 0x50c6
+ 008789 20 27 [ 2] 671 jra 00124$
+ 00878B 672 00114$:
+ 673 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */
+ 00878B A1 40 [ 1] 674 cp a, #0x40
+ 00878D 26 05 [ 1] 675 jrne 00111$
+ 676 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR;
+ 00878F C6 50 C9 [ 1] 677 ld a, 0x50c9
+ 008792 20 1E [ 2] 678 jra 00124$
+ 008794 679 00111$:
+ 680 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */
+ 008794 A1 50 [ 1] 681 cp a, #0x50
+ 008796 26 05 [ 1] 682 jrne 00108$
+ 683 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR;
+ 008798 C6 50 CA [ 1] 684 ld a, 0x50ca
+ 00879B 20 15 [ 2] 685 jra 00124$
+ 00879D 686 00108$:
+ 687 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */
+ 00879D A1 70 [ 1] 688 cp a, #0x70
+ 00879F 26 05 [ 1] 689 jrne 00105$
+ 690 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR;
+ 0087A1 C6 50 CF [ 1] 691 ld a, 0x50cf
+ 0087A4 20 0C [ 2] 692 jra 00124$
+ 0087A6 693 00105$:
+ 694 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
+ 0087A6 A1 80 [ 1] 695 cp a, #0x80
+ 0087A8 26 05 [ 1] 696 jrne 00102$
+ 697 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR;
+ 0087AA C6 51 90 [ 1] 698 ld a, 0x5190
+ 0087AD 20 03 [ 2] 699 jra 00124$
+ 0087AF 700 00102$:
+ 701 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR;
+ 0087AF C6 50 CB [ 1] 702 ld a, 0x50cb
+ 0087B2 703 00124$:
+ 704 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
+ 0087B2 88 [ 1] 705 push a
+ 0087B3 A6 01 [ 1] 706 ld a, #0x01
+ 0087B5 6B 02 [ 1] 707 ld (0x02, sp), a
+ 0087B7 9F [ 1] 708 ld a, xl
+ 0087B8 4D [ 1] 709 tnz a
+ 0087B9 27 05 [ 1] 710 jreq 00216$
+ 0087BB 711 00215$:
+ 0087BB 08 02 [ 1] 712 sll (0x02, sp)
+ 0087BD 4A [ 1] 713 dec a
+ 0087BE 26 FB [ 1] 714 jrne 00215$
+ 0087C0 715 00216$:
+ 0087C0 84 [ 1] 716 pop a
+ 0087C1 14 01 [ 1] 717 and a, (0x01, sp)
+ 0087C3 27 03 [ 1] 718 jreq 00126$
+ 719 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET;
+ 0087C5 A6 01 [ 1] 720 ld a, #0x01
+ 721 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET;
+ 0087C7 21 722 .byte 0x21
+ 0087C8 723 00126$:
+ 0087C8 4F [ 1] 724 clr a
+ 0087C9 725 00127$:
+ 726 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus);
+ 727 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: }
+ 0087C9 5B 01 [ 2] 728 addw sp, #1
+ 0087CB 81 [ 4] 729 ret
+ 730 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void)
+ 731 ; -----------------------------------------
+ 732 ; function CLK_ClearFlag
+ 733 ; -----------------------------------------
+ 0087CC 734 _CLK_ClearFlag:
+ 735 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
+ 0087CC 72 17 51 90 [ 1] 736 bres 0x5190, #3
+ 737 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: }
+ 0087D0 81 [ 4] 738 ret
+ 739 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
+ 740 ; -----------------------------------------
+ 741 ; function CLK_GetITStatus
+ 742 ; -----------------------------------------
+ 0087D1 743 _CLK_GetITStatus:
+ 0087D1 88 [ 1] 744 push a
+ 745 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF)
+ 0087D2 6B 01 [ 1] 746 ld (0x01, sp), a
+ 0087D4 A1 1C [ 1] 747 cp a, #0x1c
+ 0087D6 26 0F [ 1] 748 jrne 00114$
+ 749 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ 0087D8 C6 50 C9 [ 1] 750 ld a, 0x50c9
+ 0087DB 14 01 [ 1] 751 and a, (0x01, sp)
+ 752 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET;
+ 0087DD A0 0C [ 1] 753 sub a, #0x0c
+ 0087DF 26 03 [ 1] 754 jrne 00102$
+ 0087E1 4C [ 1] 755 inc a
+ 0087E2 20 24 [ 2] 756 jra 00115$
+ 0087E4 757 00102$:
+ 758 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET;
+ 0087E4 4F [ 1] 759 clr a
+ 0087E5 20 21 [ 2] 760 jra 00115$
+ 0087E7 761 00114$:
+ 762 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF)
+ 0087E7 7B 01 [ 1] 763 ld a, (0x01, sp)
+ 0087E9 A1 2C [ 1] 764 cp a, #0x2c
+ 0087EB 26 0F [ 1] 765 jrne 00111$
+ 766 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ 0087ED C6 51 90 [ 1] 767 ld a, 0x5190
+ 0087F0 14 01 [ 1] 768 and a, (0x01, sp)
+ 769 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET;
+ 0087F2 A0 0C [ 1] 770 sub a, #0x0c
+ 0087F4 26 03 [ 1] 771 jrne 00105$
+ 0087F6 4C [ 1] 772 inc a
+ 0087F7 20 0F [ 2] 773 jra 00115$
+ 0087F9 774 00105$:
+ 775 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET;
+ 0087F9 4F [ 1] 776 clr a
+ 0087FA 20 0C [ 2] 777 jra 00115$
+ 0087FC 778 00111$:
+ 779 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
+ 0087FC C6 50 CA [ 1] 780 ld a, 0x50ca
+ 0087FF 14 01 [ 1] 781 and a, (0x01, sp)
+ 782 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET;
+ 008801 A0 0C [ 1] 783 sub a, #0x0c
+ 008803 26 02 [ 1] 784 jrne 00108$
+ 008805 4C [ 1] 785 inc a
+ 786 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET;
+ 008806 21 787 .byte 0x21
+ 008807 788 00108$:
+ 008807 4F [ 1] 789 clr a
+ 008808 790 00115$:
+ 791 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus;
+ 792 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: }
+ 008808 5B 01 [ 2] 793 addw sp, #1
+ 00880A 81 [ 4] 794 ret
+ 795 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
+ 796 ; -----------------------------------------
+ 797 ; function CLK_ClearITPendingBit
+ 798 ; -----------------------------------------
+ 00880B 799 _CLK_ClearITPendingBit:
+ 800 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
+ 00880B A4 F0 [ 1] 801 and a, #0xf0
+ 00880D A1 20 [ 1] 802 cp a, #0x20
+ 00880F 26 05 [ 1] 803 jrne 00102$
+ 804 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
+ 008811 72 17 51 90 [ 1] 805 bres 0x5190, #3
+ 008815 81 [ 4] 806 ret
+ 008816 807 00102$:
+ 808 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
+ 008816 72 17 50 C9 [ 1] 809 bres 0x50c9, #3
+ 810 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: }
+ 00881A 81 [ 4] 811 ret
+ 812 .area CODE
+ 813 .area CONST
+ 814 .area CONST
+ 0080AF 815 _SYSDivFactor:
+ 0080AF 01 816 .db #0x01 ; 1
+ 0080B0 02 817 .db #0x02 ; 2
+ 0080B1 04 818 .db #0x04 ; 4
+ 0080B2 08 819 .db #0x08 ; 8
+ 0080B3 10 820 .db #0x10 ; 16
+ 821 .area CODE
+ 822 .area INITIALIZER
+ 823 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_clk.sym b/firmware/STM8L15X_LD/stm8l15x_clk.sym
new file mode 100644
index 0000000..186bfa2
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_clk.sym
@@ -0,0 +1,56 @@
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
+Hexadecimal [24-Bits]
+
+Symbol Table
+
+ .__.$$$. = 002710 L
+ .__.ABS. = 000000 G
+ .__.CPU. = 000000 L
+ .__.H$L. = 000001 L
+ 9 _CLK_AdjustHSICalibrationValue 000059 GR
+ 9 _CLK_BEEPClockConfig 00014B GR
+ 9 _CLK_CCOConfig 0000C4 GR
+ 9 _CLK_ClearFlag 0002CA GR
+ 9 _CLK_ClearITPendingBit 000309 GR
+ 9 _CLK_ClockSecuritySystemEnable 0000A7 GR
+ 9 _CLK_ClockSecuritySytemDeglitchCmd 0000AC GR
+ 9 _CLK_DeInit 000000 GR
+ 9 _CLK_GetClockFreq 0000D4 GR
+ 9 _CLK_GetFlagStatus 00025C GR
+ 9 _CLK_GetITStatus 0002CF GR
+ 9 _CLK_GetSYSCLKSource 0000D0 GR
+ 9 _CLK_HSEConfig 00007D GR
+ 9 _CLK_HSICmd 000041 GR
+ 9 _CLK_HaltConfig 0001C1 GR
+ 9 _CLK_ITConfig 0001F7 GR
+ 9 _CLK_LSEClockSecuritySystemEnable 0001B7 GR
+ 9 _CLK_LSEConfig 000092 GR
+ 9 _CLK_LSICmd 000065 GR
+ 9 _CLK_MainRegulatorCmd 0001DF GR
+ 9 _CLK_PeripheralClockConfig 00014F GR
+ 9 _CLK_RTCCLKSwitchOnLSEFailureEnable 0001BC GR
+ 9 _CLK_RTCClockConfig 000143 GR
+ 9 _CLK_SYSCLKDivConfig 000127 GR
+ 9 _CLK_SYSCLKSourceConfig 0000CC GR
+ 9 _CLK_SYSCLKSourceSwitchCmd 00012B GR
+ 7 _SYSDivFactor 000000 GR
+ __divulong ****** GX
+
+
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
+Hexadecimal [24-Bits]
+
+Area Table
+
+ 0 _CODE size 0 flags 0
+ 1 DATA size 0 flags 0
+ 2 INITIALIZED size 0 flags 0
+ 3 DABS size 0 flags 8
+ 4 HOME size 0 flags 0
+ 5 GSINIT size 0 flags 0
+ 6 GSFINAL size 0 flags 0
+ 7 CONST size 5 flags 0
+ 8 INITIALIZER size 0 flags 0
+ 9 CODE size 319 flags 0
+ A CABS size 0 flags 8
+
diff --git a/firmware/STM8L15X_LD/stm8l15x_gpio.asm b/firmware/STM8L15X_LD/stm8l15x_gpio.asm
new file mode 100644
index 0000000..26b1f5c
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_gpio.asm
@@ -0,0 +1,349 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ISO C Compiler
+; Version 4.5.0 #15242 (Linux)
+;--------------------------------------------------------
+ .module stm8l15x_gpio
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _GPIO_DeInit
+ .globl _GPIO_Init
+ .globl _GPIO_ExternalPullUpConfig
+ .globl _GPIO_Write
+ .globl _GPIO_WriteBit
+ .globl _GPIO_SetBits
+ .globl _GPIO_ResetBits
+ .globl _GPIO_ToggleBits
+ .globl _GPIO_ReadInputData
+ .globl _GPIO_ReadOutputData
+ .globl _GPIO_ReadInputDataBit
+ .globl _GPIO_ReadOutputDataBit
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area DABS (ABS)
+
+; default segment ordering for linker
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area CONST
+ .area INITIALIZER
+ .area CODE
+
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME
+ .area HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CODE
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 96: void GPIO_DeInit(GPIO_TypeDef* GPIOx)
+; -----------------------------------------
+; function GPIO_DeInit
+; -----------------------------------------
+_GPIO_DeInit:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 98: GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
+ ldw y, x
+ clr (0x0004, x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 99: GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
+ clr (y)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 100: GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
+ ldw x, y
+ clr (0x02, x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 101: GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
+ ldw x, y
+ clr (0x0003, x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 102: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 133: void GPIO_Init(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
+; -----------------------------------------
+; function GPIO_Init
+; -----------------------------------------
+_GPIO_Init:
+ sub sp, #8
+ ldw (0x07, sp), x
+ ld (0x06, sp), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ ldw x, (0x07, sp)
+ addw x, #0x0004
+ ldw (0x01, sp), x
+ ld a, (x)
+ push a
+ ld a, (0x07, sp)
+ cpl a
+ ld (0x04, sp), a
+ pop a
+ and a, (0x03, sp)
+ ldw x, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
+ ldw x, (0x07, sp)
+ incw x
+ incw x
+ ldw (0x04, sp), x
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 149: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x80) != (uint8_t)0x00) /* Output mode */
+ tnz (0x0b, sp)
+ jrpl 00105$
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
+ ldw x, (0x07, sp)
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 151: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x10) != (uint8_t)0x00) /* High level */
+ push a
+ ld a, (0x0c, sp)
+ bcp a, #0x10
+ pop a
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
+ or a, (0x06, sp)
+ ld (x), a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 156: GPIOx->ODR &= (uint8_t)(~(GPIO_Pin));
+ and a, (0x03, sp)
+ ld (x), a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
+ ldw x, (0x04, sp)
+ ld a, (x)
+ or a, (0x06, sp)
+ ldw x, (0x04, sp)
+ ld (x), a
+ jra 00106$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 163: GPIOx->DDR &= (uint8_t)(~(GPIO_Pin));
+ ldw x, (0x04, sp)
+ ld a, (x)
+ and a, (0x03, sp)
+ ldw x, (0x04, sp)
+ ld (x), a
+00106$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
+ ldw x, (0x07, sp)
+ addw x, #0x0003
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 170: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x40) != (uint8_t)0x00) /* Pull-Up or Push-Pull */
+ push a
+ ld a, (0x0c, sp)
+ bcp a, #0x40
+ pop a
+ jreq 00108$
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
+ or a, (0x06, sp)
+ ld (x), a
+ jra 00109$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 175: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
+ and a, (0x03, sp)
+ ld (x), a
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ ldw x, (0x01, sp)
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 182: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x20) != (uint8_t)0x00) /* Interrupt or Slow slope */
+ push a
+ ld a, (0x0c, sp)
+ bcp a, #0x20
+ pop a
+ jreq 00111$
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 184: GPIOx->CR2 |= GPIO_Pin;
+ or a, (0x06, sp)
+ ldw x, (0x01, sp)
+ ld (x), a
+ jra 00113$
+00111$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 187: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ and a, (0x03, sp)
+ ldw x, (0x01, sp)
+ ld (x), a
+00113$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 190: }
+ addw sp, #8
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 209: void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, FunctionalState NewState)
+; -----------------------------------------
+; function GPIO_ExternalPullUpConfig
+; -----------------------------------------
+_GPIO_ExternalPullUpConfig:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
+ addw x, #0x0003
+ push a
+ ld a, (x)
+ ld (0x02, sp), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 215: if (NewState != DISABLE) /* External Pull-Up Set*/
+ tnz (0x04, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
+ or a, (0x01, sp)
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 220: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
+ cpl a
+ and a, (0x01, sp)
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 222: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 248: void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t GPIO_PortVal)
+; -----------------------------------------
+; function GPIO_Write
+; -----------------------------------------
+_GPIO_Write:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 250: GPIOx->ODR = GPIO_PortVal;
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 251: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 270: void GPIO_WriteBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction GPIO_BitVal)
+; -----------------------------------------
+; function GPIO_WriteBit
+; -----------------------------------------
+_GPIO_WriteBit:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
+ push a
+ ld a, (x)
+ ld (0x02, sp), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 276: if (GPIO_BitVal != RESET)
+ tnz (0x04, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
+ or a, (0x01, sp)
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 283: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
+ cpl a
+ and a, (0x01, sp)
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 285: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 303: void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+; -----------------------------------------
+; function GPIO_SetBits
+; -----------------------------------------
+_GPIO_SetBits:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 305: GPIOx->ODR |= GPIO_Pin;
+ ld a, (x)
+ or a, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 306: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 324: void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+; -----------------------------------------
+; function GPIO_ResetBits
+; -----------------------------------------
+_GPIO_ResetBits:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 326: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
+ push a
+ ld a, (x)
+ ld (0x02, sp), a
+ pop a
+ cpl a
+ and a, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 327: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 336: void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+; -----------------------------------------
+; function GPIO_ToggleBits
+; -----------------------------------------
+_GPIO_ToggleBits:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 338: GPIOx->ODR ^= GPIO_Pin;
+ ld a, (x)
+ xor a, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 339: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 347: uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
+; -----------------------------------------
+; function GPIO_ReadInputData
+; -----------------------------------------
+_GPIO_ReadInputData:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 349: return ((uint8_t)GPIOx->IDR);
+ ld a, (0x1, x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 350: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 358: uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
+; -----------------------------------------
+; function GPIO_ReadOutputData
+; -----------------------------------------
+_GPIO_ReadOutputData:
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 360: return ((uint8_t)GPIOx->ODR);
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 361: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 378: BitStatus GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
+; -----------------------------------------
+; function GPIO_ReadInputDataBit
+; -----------------------------------------
+_GPIO_ReadInputDataBit:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 380: return ((BitStatus)(GPIOx->IDR & (uint8_t)GPIO_Pin));
+ ld a, (0x1, x)
+ and a, (0x01, sp)
+ neg a
+ clr a
+ rlc a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 381: }
+ addw sp, #1
+ ret
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 389: BitStatus GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
+; -----------------------------------------
+; function GPIO_ReadOutputDataBit
+; -----------------------------------------
+_GPIO_ReadOutputDataBit:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 391: return ((BitStatus)(GPIOx->ODR & (uint8_t)GPIO_Pin));
+ ld a, (x)
+ and a, (0x01, sp)
+ neg a
+ clr a
+ rlc a
+; ../inc/stm8l151x/src/stm8l15x_gpio.c: 392: }
+ addw sp, #1
+ ret
+ .area CODE
+ .area CONST
+ .area INITIALIZER
+ .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_gpio.lst b/firmware/STM8L15X_LD/stm8l15x_gpio.lst
new file mode 100644
index 0000000..268114e
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_gpio.lst
@@ -0,0 +1,349 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_gpio
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _GPIO_DeInit
+ 11 .globl _GPIO_Init
+ 12 .globl _GPIO_ExternalPullUpConfig
+ 13 .globl _GPIO_Write
+ 14 .globl _GPIO_WriteBit
+ 15 .globl _GPIO_SetBits
+ 16 .globl _GPIO_ResetBits
+ 17 .globl _GPIO_ToggleBits
+ 18 .globl _GPIO_ReadInputData
+ 19 .globl _GPIO_ReadOutputData
+ 20 .globl _GPIO_ReadInputDataBit
+ 21 .globl _GPIO_ReadOutputDataBit
+ 22 ;--------------------------------------------------------
+ 23 ; ram data
+ 24 ;--------------------------------------------------------
+ 25 .area DATA
+ 26 ;--------------------------------------------------------
+ 27 ; ram data
+ 28 ;--------------------------------------------------------
+ 29 .area INITIALIZED
+ 30 ;--------------------------------------------------------
+ 31 ; absolute external ram data
+ 32 ;--------------------------------------------------------
+ 33 .area DABS (ABS)
+ 34
+ 35 ; default segment ordering for linker
+ 36 .area HOME
+ 37 .area GSINIT
+ 38 .area GSFINAL
+ 39 .area CONST
+ 40 .area INITIALIZER
+ 41 .area CODE
+ 42
+ 43 ;--------------------------------------------------------
+ 44 ; global & static initialisations
+ 45 ;--------------------------------------------------------
+ 46 .area HOME
+ 47 .area GSINIT
+ 48 .area GSFINAL
+ 49 .area GSINIT
+ 50 ;--------------------------------------------------------
+ 51 ; Home
+ 52 ;--------------------------------------------------------
+ 53 .area HOME
+ 54 .area HOME
+ 55 ;--------------------------------------------------------
+ 56 ; code
+ 57 ;--------------------------------------------------------
+ 58 .area CODE
+ 59 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 96: void GPIO_DeInit(GPIO_TypeDef* GPIOx)
+ 60 ; -----------------------------------------
+ 61 ; function GPIO_DeInit
+ 62 ; -----------------------------------------
+ 000000 63 _GPIO_DeInit:
+ 64 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 98: GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
+ 000000 90 93 [ 1] 65 ldw y, x
+ 000002 6F 04 [ 1] 66 clr (0x0004, x)
+ 67 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 99: GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
+ 000004 90 7F [ 1] 68 clr (y)
+ 69 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 100: GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
+ 000006 93 [ 1] 70 ldw x, y
+ 000007 6F 02 [ 1] 71 clr (0x02, x)
+ 72 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 101: GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
+ 000009 93 [ 1] 73 ldw x, y
+ 00000A 6F 03 [ 1] 74 clr (0x0003, x)
+ 75 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 102: }
+ 00000C 81 [ 4] 76 ret
+ 77 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 133: void GPIO_Init(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
+ 78 ; -----------------------------------------
+ 79 ; function GPIO_Init
+ 80 ; -----------------------------------------
+ 00000D 81 _GPIO_Init:
+ 00000D 52 08 [ 2] 82 sub sp, #8
+ 00000F 1F 07 [ 2] 83 ldw (0x07, sp), x
+ 000011 6B 06 [ 1] 84 ld (0x06, sp), a
+ 85 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ 000013 1E 07 [ 2] 86 ldw x, (0x07, sp)
+ 000015 1C 00 04 [ 2] 87 addw x, #0x0004
+ 000018 1F 01 [ 2] 88 ldw (0x01, sp), x
+ 00001A F6 [ 1] 89 ld a, (x)
+ 00001B 88 [ 1] 90 push a
+ 00001C 7B 07 [ 1] 91 ld a, (0x07, sp)
+ 00001E 43 [ 1] 92 cpl a
+ 00001F 6B 04 [ 1] 93 ld (0x04, sp), a
+ 000021 84 [ 1] 94 pop a
+ 000022 14 03 [ 1] 95 and a, (0x03, sp)
+ 000024 1E 01 [ 2] 96 ldw x, (0x01, sp)
+ 000026 F7 [ 1] 97 ld (x), a
+ 98 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
+ 000027 1E 07 [ 2] 99 ldw x, (0x07, sp)
+ 000029 5C [ 1] 100 incw x
+ 00002A 5C [ 1] 101 incw x
+ 00002B 1F 04 [ 2] 102 ldw (0x04, sp), x
+ 103 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 149: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x80) != (uint8_t)0x00) /* Output mode */
+ 00002D 0D 0B [ 1] 104 tnz (0x0b, sp)
+ 00002F 2A 1D [ 1] 105 jrpl 00105$
+ 106 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
+ 000031 1E 07 [ 2] 107 ldw x, (0x07, sp)
+ 000033 F6 [ 1] 108 ld a, (x)
+ 109 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 151: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x10) != (uint8_t)0x00) /* High level */
+ 000034 88 [ 1] 110 push a
+ 000035 7B 0C [ 1] 111 ld a, (0x0c, sp)
+ 000037 A5 10 [ 1] 112 bcp a, #0x10
+ 000039 84 [ 1] 113 pop a
+ 00003A 27 05 [ 1] 114 jreq 00102$
+ 115 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
+ 00003C 1A 06 [ 1] 116 or a, (0x06, sp)
+ 00003E F7 [ 1] 117 ld (x), a
+ 00003F 20 03 [ 2] 118 jra 00103$
+ 000041 119 00102$:
+ 120 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 156: GPIOx->ODR &= (uint8_t)(~(GPIO_Pin));
+ 000041 14 03 [ 1] 121 and a, (0x03, sp)
+ 000043 F7 [ 1] 122 ld (x), a
+ 000044 123 00103$:
+ 124 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
+ 000044 1E 04 [ 2] 125 ldw x, (0x04, sp)
+ 000046 F6 [ 1] 126 ld a, (x)
+ 000047 1A 06 [ 1] 127 or a, (0x06, sp)
+ 000049 1E 04 [ 2] 128 ldw x, (0x04, sp)
+ 00004B F7 [ 1] 129 ld (x), a
+ 00004C 20 08 [ 2] 130 jra 00106$
+ 00004E 131 00105$:
+ 132 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 163: GPIOx->DDR &= (uint8_t)(~(GPIO_Pin));
+ 00004E 1E 04 [ 2] 133 ldw x, (0x04, sp)
+ 000050 F6 [ 1] 134 ld a, (x)
+ 000051 14 03 [ 1] 135 and a, (0x03, sp)
+ 000053 1E 04 [ 2] 136 ldw x, (0x04, sp)
+ 000055 F7 [ 1] 137 ld (x), a
+ 000056 138 00106$:
+ 139 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
+ 000056 1E 07 [ 2] 140 ldw x, (0x07, sp)
+ 000058 1C 00 03 [ 2] 141 addw x, #0x0003
+ 00005B F6 [ 1] 142 ld a, (x)
+ 143 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 170: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x40) != (uint8_t)0x00) /* Pull-Up or Push-Pull */
+ 00005C 88 [ 1] 144 push a
+ 00005D 7B 0C [ 1] 145 ld a, (0x0c, sp)
+ 00005F A5 40 [ 1] 146 bcp a, #0x40
+ 000061 84 [ 1] 147 pop a
+ 000062 27 05 [ 1] 148 jreq 00108$
+ 149 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
+ 000064 1A 06 [ 1] 150 or a, (0x06, sp)
+ 000066 F7 [ 1] 151 ld (x), a
+ 000067 20 03 [ 2] 152 jra 00109$
+ 000069 153 00108$:
+ 154 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 175: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
+ 000069 14 03 [ 1] 155 and a, (0x03, sp)
+ 00006B F7 [ 1] 156 ld (x), a
+ 00006C 157 00109$:
+ 158 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ 00006C 1E 01 [ 2] 159 ldw x, (0x01, sp)
+ 00006E F6 [ 1] 160 ld a, (x)
+ 161 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 182: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x20) != (uint8_t)0x00) /* Interrupt or Slow slope */
+ 00006F 88 [ 1] 162 push a
+ 000070 7B 0C [ 1] 163 ld a, (0x0c, sp)
+ 000072 A5 20 [ 1] 164 bcp a, #0x20
+ 000074 84 [ 1] 165 pop a
+ 000075 27 07 [ 1] 166 jreq 00111$
+ 167 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 184: GPIOx->CR2 |= GPIO_Pin;
+ 000077 1A 06 [ 1] 168 or a, (0x06, sp)
+ 000079 1E 01 [ 2] 169 ldw x, (0x01, sp)
+ 00007B F7 [ 1] 170 ld (x), a
+ 00007C 20 05 [ 2] 171 jra 00113$
+ 00007E 172 00111$:
+ 173 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 187: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ 00007E 14 03 [ 1] 174 and a, (0x03, sp)
+ 000080 1E 01 [ 2] 175 ldw x, (0x01, sp)
+ 000082 F7 [ 1] 176 ld (x), a
+ 000083 177 00113$:
+ 178 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 190: }
+ 000083 5B 08 [ 2] 179 addw sp, #8
+ 000085 85 [ 2] 180 popw x
+ 000086 84 [ 1] 181 pop a
+ 000087 FC [ 2] 182 jp (x)
+ 183 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 209: void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, FunctionalState NewState)
+ 184 ; -----------------------------------------
+ 185 ; function GPIO_ExternalPullUpConfig
+ 186 ; -----------------------------------------
+ 000088 187 _GPIO_ExternalPullUpConfig:
+ 000088 88 [ 1] 188 push a
+ 189 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
+ 000089 1C 00 03 [ 2] 190 addw x, #0x0003
+ 00008C 88 [ 1] 191 push a
+ 00008D F6 [ 1] 192 ld a, (x)
+ 00008E 6B 02 [ 1] 193 ld (0x02, sp), a
+ 000090 84 [ 1] 194 pop a
+ 195 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 215: if (NewState != DISABLE) /* External Pull-Up Set*/
+ 000091 0D 04 [ 1] 196 tnz (0x04, sp)
+ 000093 27 05 [ 1] 197 jreq 00102$
+ 198 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
+ 000095 1A 01 [ 1] 199 or a, (0x01, sp)
+ 000097 F7 [ 1] 200 ld (x), a
+ 000098 20 04 [ 2] 201 jra 00104$
+ 00009A 202 00102$:
+ 203 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 220: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
+ 00009A 43 [ 1] 204 cpl a
+ 00009B 14 01 [ 1] 205 and a, (0x01, sp)
+ 00009D F7 [ 1] 206 ld (x), a
+ 00009E 207 00104$:
+ 208 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 222: }
+ 00009E 84 [ 1] 209 pop a
+ 00009F 85 [ 2] 210 popw x
+ 0000A0 84 [ 1] 211 pop a
+ 0000A1 FC [ 2] 212 jp (x)
+ 213 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 248: void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t GPIO_PortVal)
+ 214 ; -----------------------------------------
+ 215 ; function GPIO_Write
+ 216 ; -----------------------------------------
+ 0000A2 217 _GPIO_Write:
+ 218 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 250: GPIOx->ODR = GPIO_PortVal;
+ 0000A2 F7 [ 1] 219 ld (x), a
+ 220 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 251: }
+ 0000A3 81 [ 4] 221 ret
+ 222 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 270: void GPIO_WriteBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction GPIO_BitVal)
+ 223 ; -----------------------------------------
+ 224 ; function GPIO_WriteBit
+ 225 ; -----------------------------------------
+ 0000A4 226 _GPIO_WriteBit:
+ 0000A4 88 [ 1] 227 push a
+ 228 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
+ 0000A5 88 [ 1] 229 push a
+ 0000A6 F6 [ 1] 230 ld a, (x)
+ 0000A7 6B 02 [ 1] 231 ld (0x02, sp), a
+ 0000A9 84 [ 1] 232 pop a
+ 233 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 276: if (GPIO_BitVal != RESET)
+ 0000AA 0D 04 [ 1] 234 tnz (0x04, sp)
+ 0000AC 27 05 [ 1] 235 jreq 00102$
+ 236 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
+ 0000AE 1A 01 [ 1] 237 or a, (0x01, sp)
+ 0000B0 F7 [ 1] 238 ld (x), a
+ 0000B1 20 04 [ 2] 239 jra 00104$
+ 0000B3 240 00102$:
+ 241 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 283: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
+ 0000B3 43 [ 1] 242 cpl a
+ 0000B4 14 01 [ 1] 243 and a, (0x01, sp)
+ 0000B6 F7 [ 1] 244 ld (x), a
+ 0000B7 245 00104$:
+ 246 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 285: }
+ 0000B7 84 [ 1] 247 pop a
+ 0000B8 85 [ 2] 248 popw x
+ 0000B9 84 [ 1] 249 pop a
+ 0000BA FC [ 2] 250 jp (x)
+ 251 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 303: void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+ 252 ; -----------------------------------------
+ 253 ; function GPIO_SetBits
+ 254 ; -----------------------------------------
+ 0000BB 255 _GPIO_SetBits:
+ 0000BB 88 [ 1] 256 push a
+ 0000BC 6B 01 [ 1] 257 ld (0x01, sp), a
+ 258 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 305: GPIOx->ODR |= GPIO_Pin;
+ 0000BE F6 [ 1] 259 ld a, (x)
+ 0000BF 1A 01 [ 1] 260 or a, (0x01, sp)
+ 0000C1 F7 [ 1] 261 ld (x), a
+ 262 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 306: }
+ 0000C2 84 [ 1] 263 pop a
+ 0000C3 81 [ 4] 264 ret
+ 265 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 324: void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+ 266 ; -----------------------------------------
+ 267 ; function GPIO_ResetBits
+ 268 ; -----------------------------------------
+ 0000C4 269 _GPIO_ResetBits:
+ 0000C4 88 [ 1] 270 push a
+ 271 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 326: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
+ 0000C5 88 [ 1] 272 push a
+ 0000C6 F6 [ 1] 273 ld a, (x)
+ 0000C7 6B 02 [ 1] 274 ld (0x02, sp), a
+ 0000C9 84 [ 1] 275 pop a
+ 0000CA 43 [ 1] 276 cpl a
+ 0000CB 14 01 [ 1] 277 and a, (0x01, sp)
+ 0000CD F7 [ 1] 278 ld (x), a
+ 279 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 327: }
+ 0000CE 84 [ 1] 280 pop a
+ 0000CF 81 [ 4] 281 ret
+ 282 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 336: void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+ 283 ; -----------------------------------------
+ 284 ; function GPIO_ToggleBits
+ 285 ; -----------------------------------------
+ 0000D0 286 _GPIO_ToggleBits:
+ 0000D0 88 [ 1] 287 push a
+ 0000D1 6B 01 [ 1] 288 ld (0x01, sp), a
+ 289 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 338: GPIOx->ODR ^= GPIO_Pin;
+ 0000D3 F6 [ 1] 290 ld a, (x)
+ 0000D4 18 01 [ 1] 291 xor a, (0x01, sp)
+ 0000D6 F7 [ 1] 292 ld (x), a
+ 293 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 339: }
+ 0000D7 84 [ 1] 294 pop a
+ 0000D8 81 [ 4] 295 ret
+ 296 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 347: uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
+ 297 ; -----------------------------------------
+ 298 ; function GPIO_ReadInputData
+ 299 ; -----------------------------------------
+ 0000D9 300 _GPIO_ReadInputData:
+ 301 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 349: return ((uint8_t)GPIOx->IDR);
+ 0000D9 E6 01 [ 1] 302 ld a, (0x1, x)
+ 303 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 350: }
+ 0000DB 81 [ 4] 304 ret
+ 305 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 358: uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
+ 306 ; -----------------------------------------
+ 307 ; function GPIO_ReadOutputData
+ 308 ; -----------------------------------------
+ 0000DC 309 _GPIO_ReadOutputData:
+ 310 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 360: return ((uint8_t)GPIOx->ODR);
+ 0000DC F6 [ 1] 311 ld a, (x)
+ 312 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 361: }
+ 0000DD 81 [ 4] 313 ret
+ 314 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 378: BitStatus GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
+ 315 ; -----------------------------------------
+ 316 ; function GPIO_ReadInputDataBit
+ 317 ; -----------------------------------------
+ 0000DE 318 _GPIO_ReadInputDataBit:
+ 0000DE 88 [ 1] 319 push a
+ 0000DF 6B 01 [ 1] 320 ld (0x01, sp), a
+ 321 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 380: return ((BitStatus)(GPIOx->IDR & (uint8_t)GPIO_Pin));
+ 0000E1 E6 01 [ 1] 322 ld a, (0x1, x)
+ 0000E3 14 01 [ 1] 323 and a, (0x01, sp)
+ 0000E5 40 [ 1] 324 neg a
+ 0000E6 4F [ 1] 325 clr a
+ 0000E7 49 [ 1] 326 rlc a
+ 327 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 381: }
+ 0000E8 5B 01 [ 2] 328 addw sp, #1
+ 0000EA 81 [ 4] 329 ret
+ 330 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 389: BitStatus GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
+ 331 ; -----------------------------------------
+ 332 ; function GPIO_ReadOutputDataBit
+ 333 ; -----------------------------------------
+ 0000EB 334 _GPIO_ReadOutputDataBit:
+ 0000EB 88 [ 1] 335 push a
+ 0000EC 6B 01 [ 1] 336 ld (0x01, sp), a
+ 337 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 391: return ((BitStatus)(GPIOx->ODR & (uint8_t)GPIO_Pin));
+ 0000EE F6 [ 1] 338 ld a, (x)
+ 0000EF 14 01 [ 1] 339 and a, (0x01, sp)
+ 0000F1 40 [ 1] 340 neg a
+ 0000F2 4F [ 1] 341 clr a
+ 0000F3 49 [ 1] 342 rlc a
+ 343 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 392: }
+ 0000F4 5B 01 [ 2] 344 addw sp, #1
+ 0000F6 81 [ 4] 345 ret
+ 346 .area CODE
+ 347 .area CONST
+ 348 .area INITIALIZER
+ 349 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_gpio.rel b/firmware/STM8L15X_LD/stm8l15x_gpio.rel
new file mode 100644
index 0000000..bc75a58
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_gpio.rel
@@ -0,0 +1,137 @@
+XH3
+H B areas D global symbols
+M stm8l15x_gpio
+S .__.ABS. Def000000
+A _CODE size 0 flags 0 addr 0
+A DATA size 0 flags 0 addr 0
+A INITIALIZED size 0 flags 0 addr 0
+A DABS size 0 flags 8 addr 0
+A HOME size 0 flags 0 addr 0
+A GSINIT size 0 flags 0 addr 0
+A GSFINAL size 0 flags 0 addr 0
+A CONST size 0 flags 0 addr 0
+A INITIALIZER size 0 flags 0 addr 0
+A CODE size F7 flags 0 addr 0
+S _GPIO_Init Def00000D
+S _GPIO_ResetBits Def0000C4
+S _GPIO_ReadInputDataBit Def0000DE
+S _GPIO_ReadOutputDataBit Def0000EB
+S _GPIO_WriteBit Def0000A4
+S _GPIO_ToggleBits Def0000D0
+S _GPIO_ExternalPullUpConfig Def000088
+S _GPIO_DeInit Def000000
+S _GPIO_SetBits Def0000BB
+S _GPIO_ReadInputData Def0000D9
+S _GPIO_ReadOutputData Def0000DC
+S _GPIO_Write Def0000A2
+A CABS size 0 flags 8 addr 0
+T 00 00 00
+R 00 00 00 09
+T 00 00 00 90 93 6F 04 90 7F 93 6F 02 93 6F 03 81
+R 00 00 00 09
+T 00 00 0D
+R 00 00 00 09
+T 00 00 0D 52 08 1F 07 6B 06 1E 07 1C 00 04 1F 01
+R 00 00 00 09
+T 00 00 1A F6 88 7B 07 43 6B 04 84 14 03 1E 01 F7
+R 00 00 00 09
+T 00 00 27 1E 07 5C 5C 1F 04 0D 0B 2A 1D 1E 07 F6
+R 00 00 00 09
+T 00 00 34 88 7B 0C A5 10 84 27 05 1A 06 F7 20 03
+R 00 00 00 09
+T 00 00 41
+R 00 00 00 09
+T 00 00 41 14 03 F7
+R 00 00 00 09
+T 00 00 44
+R 00 00 00 09
+T 00 00 44 1E 04 F6 1A 06 1E 04 F7 20 08
+R 00 00 00 09
+T 00 00 4E
+R 00 00 00 09
+T 00 00 4E 1E 04 F6 14 03 1E 04 F7
+R 00 00 00 09
+T 00 00 56
+R 00 00 00 09
+T 00 00 56 1E 07 1C 00 03 F6 88 7B 0C A5 40 84 27
+R 00 00 00 09
+T 00 00 63 05 1A 06 F7 20 03
+R 00 00 00 09
+T 00 00 69
+R 00 00 00 09
+T 00 00 69 14 03 F7
+R 00 00 00 09
+T 00 00 6C
+R 00 00 00 09
+T 00 00 6C 1E 01 F6 88 7B 0C A5 20 84 27 07 1A 06
+R 00 00 00 09
+T 00 00 79 1E 01 F7 20 05
+R 00 00 00 09
+T 00 00 7E
+R 00 00 00 09
+T 00 00 7E 14 03 1E 01 F7
+R 00 00 00 09
+T 00 00 83
+R 00 00 00 09
+T 00 00 83 5B 08 85 84 FC
+R 00 00 00 09
+T 00 00 88
+R 00 00 00 09
+T 00 00 88 88 1C 00 03 88 F6 6B 02 84 0D 04 27 05
+R 00 00 00 09
+T 00 00 95 1A 01 F7 20 04
+R 00 00 00 09
+T 00 00 9A
+R 00 00 00 09
+T 00 00 9A 43 14 01 F7
+R 00 00 00 09
+T 00 00 9E
+R 00 00 00 09
+T 00 00 9E 84 85 84 FC
+R 00 00 00 09
+T 00 00 A2
+R 00 00 00 09
+T 00 00 A2 F7 81
+R 00 00 00 09
+T 00 00 A4
+R 00 00 00 09
+T 00 00 A4 88 88 F6 6B 02 84 0D 04 27 05 1A 01 F7
+R 00 00 00 09
+T 00 00 B1 20 04
+R 00 00 00 09
+T 00 00 B3
+R 00 00 00 09
+T 00 00 B3 43 14 01 F7
+R 00 00 00 09
+T 00 00 B7
+R 00 00 00 09
+T 00 00 B7 84 85 84 FC
+R 00 00 00 09
+T 00 00 BB
+R 00 00 00 09
+T 00 00 BB 88 6B 01 F6 1A 01 F7 84 81
+R 00 00 00 09
+T 00 00 C4
+R 00 00 00 09
+T 00 00 C4 88 88 F6 6B 02 84 43 14 01 F7 84 81
+R 00 00 00 09
+T 00 00 D0
+R 00 00 00 09
+T 00 00 D0 88 6B 01 F6 18 01 F7 84 81
+R 00 00 00 09
+T 00 00 D9
+R 00 00 00 09
+T 00 00 D9 E6 01 81
+R 00 00 00 09
+T 00 00 DC
+R 00 00 00 09
+T 00 00 DC F6 81
+R 00 00 00 09
+T 00 00 DE
+R 00 00 00 09
+T 00 00 DE 88 6B 01 E6 01 14 01 40 4F 49 5B 01 81
+R 00 00 00 09
+T 00 00 EB
+R 00 00 00 09
+T 00 00 EB 88 6B 01 F6 14 01 40 4F 49 5B 01 81
+R 00 00 00 09
diff --git a/firmware/STM8L15X_LD/stm8l15x_gpio.rst b/firmware/STM8L15X_LD/stm8l15x_gpio.rst
new file mode 100644
index 0000000..2e66d9f
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_gpio.rst
@@ -0,0 +1,349 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_gpio
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _GPIO_DeInit
+ 11 .globl _GPIO_Init
+ 12 .globl _GPIO_ExternalPullUpConfig
+ 13 .globl _GPIO_Write
+ 14 .globl _GPIO_WriteBit
+ 15 .globl _GPIO_SetBits
+ 16 .globl _GPIO_ResetBits
+ 17 .globl _GPIO_ToggleBits
+ 18 .globl _GPIO_ReadInputData
+ 19 .globl _GPIO_ReadOutputData
+ 20 .globl _GPIO_ReadInputDataBit
+ 21 .globl _GPIO_ReadOutputDataBit
+ 22 ;--------------------------------------------------------
+ 23 ; ram data
+ 24 ;--------------------------------------------------------
+ 25 .area DATA
+ 26 ;--------------------------------------------------------
+ 27 ; ram data
+ 28 ;--------------------------------------------------------
+ 29 .area INITIALIZED
+ 30 ;--------------------------------------------------------
+ 31 ; absolute external ram data
+ 32 ;--------------------------------------------------------
+ 33 .area DABS (ABS)
+ 34
+ 35 ; default segment ordering for linker
+ 36 .area HOME
+ 37 .area GSINIT
+ 38 .area GSFINAL
+ 39 .area CONST
+ 40 .area INITIALIZER
+ 41 .area CODE
+ 42
+ 43 ;--------------------------------------------------------
+ 44 ; global & static initialisations
+ 45 ;--------------------------------------------------------
+ 46 .area HOME
+ 47 .area GSINIT
+ 48 .area GSFINAL
+ 49 .area GSINIT
+ 50 ;--------------------------------------------------------
+ 51 ; Home
+ 52 ;--------------------------------------------------------
+ 53 .area HOME
+ 54 .area HOME
+ 55 ;--------------------------------------------------------
+ 56 ; code
+ 57 ;--------------------------------------------------------
+ 58 .area CODE
+ 59 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 96: void GPIO_DeInit(GPIO_TypeDef* GPIOx)
+ 60 ; -----------------------------------------
+ 61 ; function GPIO_DeInit
+ 62 ; -----------------------------------------
+ 00881B 63 _GPIO_DeInit:
+ 64 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 98: GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
+ 00881B 90 93 [ 1] 65 ldw y, x
+ 00881D 6F 04 [ 1] 66 clr (0x0004, x)
+ 67 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 99: GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
+ 00881F 90 7F [ 1] 68 clr (y)
+ 69 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 100: GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
+ 008821 93 [ 1] 70 ldw x, y
+ 008822 6F 02 [ 1] 71 clr (0x02, x)
+ 72 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 101: GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
+ 008824 93 [ 1] 73 ldw x, y
+ 008825 6F 03 [ 1] 74 clr (0x0003, x)
+ 75 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 102: }
+ 008827 81 [ 4] 76 ret
+ 77 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 133: void GPIO_Init(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
+ 78 ; -----------------------------------------
+ 79 ; function GPIO_Init
+ 80 ; -----------------------------------------
+ 008828 81 _GPIO_Init:
+ 008828 52 08 [ 2] 82 sub sp, #8
+ 00882A 1F 07 [ 2] 83 ldw (0x07, sp), x
+ 00882C 6B 06 [ 1] 84 ld (0x06, sp), a
+ 85 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ 00882E 1E 07 [ 2] 86 ldw x, (0x07, sp)
+ 008830 1C 00 04 [ 2] 87 addw x, #0x0004
+ 008833 1F 01 [ 2] 88 ldw (0x01, sp), x
+ 008835 F6 [ 1] 89 ld a, (x)
+ 008836 88 [ 1] 90 push a
+ 008837 7B 07 [ 1] 91 ld a, (0x07, sp)
+ 008839 43 [ 1] 92 cpl a
+ 00883A 6B 04 [ 1] 93 ld (0x04, sp), a
+ 00883C 84 [ 1] 94 pop a
+ 00883D 14 03 [ 1] 95 and a, (0x03, sp)
+ 00883F 1E 01 [ 2] 96 ldw x, (0x01, sp)
+ 008841 F7 [ 1] 97 ld (x), a
+ 98 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
+ 008842 1E 07 [ 2] 99 ldw x, (0x07, sp)
+ 008844 5C [ 1] 100 incw x
+ 008845 5C [ 1] 101 incw x
+ 008846 1F 04 [ 2] 102 ldw (0x04, sp), x
+ 103 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 149: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x80) != (uint8_t)0x00) /* Output mode */
+ 008848 0D 0B [ 1] 104 tnz (0x0b, sp)
+ 00884A 2A 1D [ 1] 105 jrpl 00105$
+ 106 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
+ 00884C 1E 07 [ 2] 107 ldw x, (0x07, sp)
+ 00884E F6 [ 1] 108 ld a, (x)
+ 109 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 151: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x10) != (uint8_t)0x00) /* High level */
+ 00884F 88 [ 1] 110 push a
+ 008850 7B 0C [ 1] 111 ld a, (0x0c, sp)
+ 008852 A5 10 [ 1] 112 bcp a, #0x10
+ 008854 84 [ 1] 113 pop a
+ 008855 27 05 [ 1] 114 jreq 00102$
+ 115 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
+ 008857 1A 06 [ 1] 116 or a, (0x06, sp)
+ 008859 F7 [ 1] 117 ld (x), a
+ 00885A 20 03 [ 2] 118 jra 00103$
+ 00885C 119 00102$:
+ 120 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 156: GPIOx->ODR &= (uint8_t)(~(GPIO_Pin));
+ 00885C 14 03 [ 1] 121 and a, (0x03, sp)
+ 00885E F7 [ 1] 122 ld (x), a
+ 00885F 123 00103$:
+ 124 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
+ 00885F 1E 04 [ 2] 125 ldw x, (0x04, sp)
+ 008861 F6 [ 1] 126 ld a, (x)
+ 008862 1A 06 [ 1] 127 or a, (0x06, sp)
+ 008864 1E 04 [ 2] 128 ldw x, (0x04, sp)
+ 008866 F7 [ 1] 129 ld (x), a
+ 008867 20 08 [ 2] 130 jra 00106$
+ 008869 131 00105$:
+ 132 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 163: GPIOx->DDR &= (uint8_t)(~(GPIO_Pin));
+ 008869 1E 04 [ 2] 133 ldw x, (0x04, sp)
+ 00886B F6 [ 1] 134 ld a, (x)
+ 00886C 14 03 [ 1] 135 and a, (0x03, sp)
+ 00886E 1E 04 [ 2] 136 ldw x, (0x04, sp)
+ 008870 F7 [ 1] 137 ld (x), a
+ 008871 138 00106$:
+ 139 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
+ 008871 1E 07 [ 2] 140 ldw x, (0x07, sp)
+ 008873 1C 00 03 [ 2] 141 addw x, #0x0003
+ 008876 F6 [ 1] 142 ld a, (x)
+ 143 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 170: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x40) != (uint8_t)0x00) /* Pull-Up or Push-Pull */
+ 008877 88 [ 1] 144 push a
+ 008878 7B 0C [ 1] 145 ld a, (0x0c, sp)
+ 00887A A5 40 [ 1] 146 bcp a, #0x40
+ 00887C 84 [ 1] 147 pop a
+ 00887D 27 05 [ 1] 148 jreq 00108$
+ 149 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
+ 00887F 1A 06 [ 1] 150 or a, (0x06, sp)
+ 008881 F7 [ 1] 151 ld (x), a
+ 008882 20 03 [ 2] 152 jra 00109$
+ 008884 153 00108$:
+ 154 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 175: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
+ 008884 14 03 [ 1] 155 and a, (0x03, sp)
+ 008886 F7 [ 1] 156 ld (x), a
+ 008887 157 00109$:
+ 158 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ 008887 1E 01 [ 2] 159 ldw x, (0x01, sp)
+ 008889 F6 [ 1] 160 ld a, (x)
+ 161 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 182: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x20) != (uint8_t)0x00) /* Interrupt or Slow slope */
+ 00888A 88 [ 1] 162 push a
+ 00888B 7B 0C [ 1] 163 ld a, (0x0c, sp)
+ 00888D A5 20 [ 1] 164 bcp a, #0x20
+ 00888F 84 [ 1] 165 pop a
+ 008890 27 07 [ 1] 166 jreq 00111$
+ 167 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 184: GPIOx->CR2 |= GPIO_Pin;
+ 008892 1A 06 [ 1] 168 or a, (0x06, sp)
+ 008894 1E 01 [ 2] 169 ldw x, (0x01, sp)
+ 008896 F7 [ 1] 170 ld (x), a
+ 008897 20 05 [ 2] 171 jra 00113$
+ 008899 172 00111$:
+ 173 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 187: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
+ 008899 14 03 [ 1] 174 and a, (0x03, sp)
+ 00889B 1E 01 [ 2] 175 ldw x, (0x01, sp)
+ 00889D F7 [ 1] 176 ld (x), a
+ 00889E 177 00113$:
+ 178 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 190: }
+ 00889E 5B 08 [ 2] 179 addw sp, #8
+ 0088A0 85 [ 2] 180 popw x
+ 0088A1 84 [ 1] 181 pop a
+ 0088A2 FC [ 2] 182 jp (x)
+ 183 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 209: void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, FunctionalState NewState)
+ 184 ; -----------------------------------------
+ 185 ; function GPIO_ExternalPullUpConfig
+ 186 ; -----------------------------------------
+ 0088A3 187 _GPIO_ExternalPullUpConfig:
+ 0088A3 88 [ 1] 188 push a
+ 189 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
+ 0088A4 1C 00 03 [ 2] 190 addw x, #0x0003
+ 0088A7 88 [ 1] 191 push a
+ 0088A8 F6 [ 1] 192 ld a, (x)
+ 0088A9 6B 02 [ 1] 193 ld (0x02, sp), a
+ 0088AB 84 [ 1] 194 pop a
+ 195 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 215: if (NewState != DISABLE) /* External Pull-Up Set*/
+ 0088AC 0D 04 [ 1] 196 tnz (0x04, sp)
+ 0088AE 27 05 [ 1] 197 jreq 00102$
+ 198 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
+ 0088B0 1A 01 [ 1] 199 or a, (0x01, sp)
+ 0088B2 F7 [ 1] 200 ld (x), a
+ 0088B3 20 04 [ 2] 201 jra 00104$
+ 0088B5 202 00102$:
+ 203 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 220: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
+ 0088B5 43 [ 1] 204 cpl a
+ 0088B6 14 01 [ 1] 205 and a, (0x01, sp)
+ 0088B8 F7 [ 1] 206 ld (x), a
+ 0088B9 207 00104$:
+ 208 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 222: }
+ 0088B9 84 [ 1] 209 pop a
+ 0088BA 85 [ 2] 210 popw x
+ 0088BB 84 [ 1] 211 pop a
+ 0088BC FC [ 2] 212 jp (x)
+ 213 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 248: void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t GPIO_PortVal)
+ 214 ; -----------------------------------------
+ 215 ; function GPIO_Write
+ 216 ; -----------------------------------------
+ 0088BD 217 _GPIO_Write:
+ 218 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 250: GPIOx->ODR = GPIO_PortVal;
+ 0088BD F7 [ 1] 219 ld (x), a
+ 220 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 251: }
+ 0088BE 81 [ 4] 221 ret
+ 222 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 270: void GPIO_WriteBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction GPIO_BitVal)
+ 223 ; -----------------------------------------
+ 224 ; function GPIO_WriteBit
+ 225 ; -----------------------------------------
+ 0088BF 226 _GPIO_WriteBit:
+ 0088BF 88 [ 1] 227 push a
+ 228 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
+ 0088C0 88 [ 1] 229 push a
+ 0088C1 F6 [ 1] 230 ld a, (x)
+ 0088C2 6B 02 [ 1] 231 ld (0x02, sp), a
+ 0088C4 84 [ 1] 232 pop a
+ 233 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 276: if (GPIO_BitVal != RESET)
+ 0088C5 0D 04 [ 1] 234 tnz (0x04, sp)
+ 0088C7 27 05 [ 1] 235 jreq 00102$
+ 236 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
+ 0088C9 1A 01 [ 1] 237 or a, (0x01, sp)
+ 0088CB F7 [ 1] 238 ld (x), a
+ 0088CC 20 04 [ 2] 239 jra 00104$
+ 0088CE 240 00102$:
+ 241 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 283: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
+ 0088CE 43 [ 1] 242 cpl a
+ 0088CF 14 01 [ 1] 243 and a, (0x01, sp)
+ 0088D1 F7 [ 1] 244 ld (x), a
+ 0088D2 245 00104$:
+ 246 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 285: }
+ 0088D2 84 [ 1] 247 pop a
+ 0088D3 85 [ 2] 248 popw x
+ 0088D4 84 [ 1] 249 pop a
+ 0088D5 FC [ 2] 250 jp (x)
+ 251 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 303: void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+ 252 ; -----------------------------------------
+ 253 ; function GPIO_SetBits
+ 254 ; -----------------------------------------
+ 0088D6 255 _GPIO_SetBits:
+ 0088D6 88 [ 1] 256 push a
+ 0088D7 6B 01 [ 1] 257 ld (0x01, sp), a
+ 258 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 305: GPIOx->ODR |= GPIO_Pin;
+ 0088D9 F6 [ 1] 259 ld a, (x)
+ 0088DA 1A 01 [ 1] 260 or a, (0x01, sp)
+ 0088DC F7 [ 1] 261 ld (x), a
+ 262 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 306: }
+ 0088DD 84 [ 1] 263 pop a
+ 0088DE 81 [ 4] 264 ret
+ 265 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 324: void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+ 266 ; -----------------------------------------
+ 267 ; function GPIO_ResetBits
+ 268 ; -----------------------------------------
+ 0088DF 269 _GPIO_ResetBits:
+ 0088DF 88 [ 1] 270 push a
+ 271 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 326: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
+ 0088E0 88 [ 1] 272 push a
+ 0088E1 F6 [ 1] 273 ld a, (x)
+ 0088E2 6B 02 [ 1] 274 ld (0x02, sp), a
+ 0088E4 84 [ 1] 275 pop a
+ 0088E5 43 [ 1] 276 cpl a
+ 0088E6 14 01 [ 1] 277 and a, (0x01, sp)
+ 0088E8 F7 [ 1] 278 ld (x), a
+ 279 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 327: }
+ 0088E9 84 [ 1] 280 pop a
+ 0088EA 81 [ 4] 281 ret
+ 282 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 336: void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
+ 283 ; -----------------------------------------
+ 284 ; function GPIO_ToggleBits
+ 285 ; -----------------------------------------
+ 0088EB 286 _GPIO_ToggleBits:
+ 0088EB 88 [ 1] 287 push a
+ 0088EC 6B 01 [ 1] 288 ld (0x01, sp), a
+ 289 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 338: GPIOx->ODR ^= GPIO_Pin;
+ 0088EE F6 [ 1] 290 ld a, (x)
+ 0088EF 18 01 [ 1] 291 xor a, (0x01, sp)
+ 0088F1 F7 [ 1] 292 ld (x), a
+ 293 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 339: }
+ 0088F2 84 [ 1] 294 pop a
+ 0088F3 81 [ 4] 295 ret
+ 296 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 347: uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
+ 297 ; -----------------------------------------
+ 298 ; function GPIO_ReadInputData
+ 299 ; -----------------------------------------
+ 0088F4 300 _GPIO_ReadInputData:
+ 301 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 349: return ((uint8_t)GPIOx->IDR);
+ 0088F4 E6 01 [ 1] 302 ld a, (0x1, x)
+ 303 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 350: }
+ 0088F6 81 [ 4] 304 ret
+ 305 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 358: uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
+ 306 ; -----------------------------------------
+ 307 ; function GPIO_ReadOutputData
+ 308 ; -----------------------------------------
+ 0088F7 309 _GPIO_ReadOutputData:
+ 310 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 360: return ((uint8_t)GPIOx->ODR);
+ 0088F7 F6 [ 1] 311 ld a, (x)
+ 312 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 361: }
+ 0088F8 81 [ 4] 313 ret
+ 314 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 378: BitStatus GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
+ 315 ; -----------------------------------------
+ 316 ; function GPIO_ReadInputDataBit
+ 317 ; -----------------------------------------
+ 0088F9 318 _GPIO_ReadInputDataBit:
+ 0088F9 88 [ 1] 319 push a
+ 0088FA 6B 01 [ 1] 320 ld (0x01, sp), a
+ 321 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 380: return ((BitStatus)(GPIOx->IDR & (uint8_t)GPIO_Pin));
+ 0088FC E6 01 [ 1] 322 ld a, (0x1, x)
+ 0088FE 14 01 [ 1] 323 and a, (0x01, sp)
+ 008900 40 [ 1] 324 neg a
+ 008901 4F [ 1] 325 clr a
+ 008902 49 [ 1] 326 rlc a
+ 327 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 381: }
+ 008903 5B 01 [ 2] 328 addw sp, #1
+ 008905 81 [ 4] 329 ret
+ 330 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 389: BitStatus GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
+ 331 ; -----------------------------------------
+ 332 ; function GPIO_ReadOutputDataBit
+ 333 ; -----------------------------------------
+ 008906 334 _GPIO_ReadOutputDataBit:
+ 008906 88 [ 1] 335 push a
+ 008907 6B 01 [ 1] 336 ld (0x01, sp), a
+ 337 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 391: return ((BitStatus)(GPIOx->ODR & (uint8_t)GPIO_Pin));
+ 008909 F6 [ 1] 338 ld a, (x)
+ 00890A 14 01 [ 1] 339 and a, (0x01, sp)
+ 00890C 40 [ 1] 340 neg a
+ 00890D 4F [ 1] 341 clr a
+ 00890E 49 [ 1] 342 rlc a
+ 343 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 392: }
+ 00890F 5B 01 [ 2] 344 addw sp, #1
+ 008911 81 [ 4] 345 ret
+ 346 .area CODE
+ 347 .area CONST
+ 348 .area INITIALIZER
+ 349 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_gpio.sym b/firmware/STM8L15X_LD/stm8l15x_gpio.sym
new file mode 100644
index 0000000..53f0ed5
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_gpio.sym
@@ -0,0 +1,40 @@
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
+Hexadecimal [24-Bits]
+
+Symbol Table
+
+ .__.$$$. = 002710 L
+ .__.ABS. = 000000 G
+ .__.CPU. = 000000 L
+ .__.H$L. = 000001 L
+ 9 _GPIO_DeInit 000000 GR
+ 9 _GPIO_ExternalPullUpConfig 000088 GR
+ 9 _GPIO_Init 00000D GR
+ 9 _GPIO_ReadInputData 0000D9 GR
+ 9 _GPIO_ReadInputDataBit 0000DE GR
+ 9 _GPIO_ReadOutputData 0000DC GR
+ 9 _GPIO_ReadOutputDataBit 0000EB GR
+ 9 _GPIO_ResetBits 0000C4 GR
+ 9 _GPIO_SetBits 0000BB GR
+ 9 _GPIO_ToggleBits 0000D0 GR
+ 9 _GPIO_Write 0000A2 GR
+ 9 _GPIO_WriteBit 0000A4 GR
+
+
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
+Hexadecimal [24-Bits]
+
+Area Table
+
+ 0 _CODE size 0 flags 0
+ 1 DATA size 0 flags 0
+ 2 INITIALIZED size 0 flags 0
+ 3 DABS size 0 flags 8
+ 4 HOME size 0 flags 0
+ 5 GSINIT size 0 flags 0
+ 6 GSFINAL size 0 flags 0
+ 7 CONST size 0 flags 0
+ 8 INITIALIZER size 0 flags 0
+ 9 CODE size F7 flags 0
+ A CABS size 0 flags 8
+
diff --git a/firmware/STM8L15X_LD/stm8l15x_it.asm b/firmware/STM8L15X_LD/stm8l15x_it.asm
new file mode 100644
index 0000000..5f2e401
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_it.asm
@@ -0,0 +1,290 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ISO C Compiler
+; Version 4.5.0 #15242 (Linux)
+;--------------------------------------------------------
+ .module stm8l15x_it
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _TRAP_IRQHandler
+ .globl _FLASH_IRQHandler
+ .globl _DMA1_CHANNEL0_1_IRQHandler
+ .globl _DMA1_CHANNEL2_3_IRQHandler
+ .globl _RTC_CSSLSE_IRQHandler
+ .globl _EXTIE_F_PVD_IRQHandler
+ .globl _EXTIB_G_IRQHandler
+ .globl _EXTID_H_IRQHandler
+ .globl _EXTI0_IRQHandler
+ .globl _EXTI1_IRQHandler
+ .globl _EXTI2_IRQHandler
+ .globl _EXTI3_IRQHandler
+ .globl _EXTI4_IRQHandler
+ .globl _EXTI5_IRQHandler
+ .globl _EXTI6_IRQHandler
+ .globl _EXTI7_IRQHandler
+ .globl _LCD_AES_IRQHandler
+ .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
+ .globl _ADC1_COMP_IRQHandler
+ .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
+ .globl _TIM2_CC_USART2_RX_IRQHandler
+ .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
+ .globl _TIM3_CC_USART3_RX_IRQHandler
+ .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
+ .globl _TIM1_CC_IRQHandler
+ .globl _TIM4_UPD_OVF_TRG_IRQHandler
+ .globl _SPI1_IRQHandler
+ .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
+ .globl _USART1_RX_TIM5_CC_IRQHandler
+ .globl _I2C1_SPI2_IRQHandler
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area DABS (ABS)
+
+; default segment ordering for linker
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area CONST
+ .area INITIALIZER
+ .area CODE
+
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME
+ .area HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CODE
+; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
+; -----------------------------------------
+; function TRAP_IRQHandler
+; -----------------------------------------
+_TRAP_IRQHandler:
+; ../src/stm8l15x_it.c: 72: }
+ iret
+; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
+; -----------------------------------------
+; function FLASH_IRQHandler
+; -----------------------------------------
+_FLASH_IRQHandler:
+; ../src/stm8l15x_it.c: 83: }
+ iret
+; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
+; -----------------------------------------
+; function DMA1_CHANNEL0_1_IRQHandler
+; -----------------------------------------
+_DMA1_CHANNEL0_1_IRQHandler:
+; ../src/stm8l15x_it.c: 94: }
+ iret
+; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
+; -----------------------------------------
+; function DMA1_CHANNEL2_3_IRQHandler
+; -----------------------------------------
+_DMA1_CHANNEL2_3_IRQHandler:
+; ../src/stm8l15x_it.c: 105: }
+ iret
+; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
+; -----------------------------------------
+; function RTC_CSSLSE_IRQHandler
+; -----------------------------------------
+_RTC_CSSLSE_IRQHandler:
+; ../src/stm8l15x_it.c: 116: }
+ iret
+; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
+; -----------------------------------------
+; function EXTIE_F_PVD_IRQHandler
+; -----------------------------------------
+_EXTIE_F_PVD_IRQHandler:
+; ../src/stm8l15x_it.c: 127: }
+ iret
+; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
+; -----------------------------------------
+; function EXTIB_G_IRQHandler
+; -----------------------------------------
+_EXTIB_G_IRQHandler:
+; ../src/stm8l15x_it.c: 139: }
+ iret
+; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
+; -----------------------------------------
+; function EXTID_H_IRQHandler
+; -----------------------------------------
+_EXTID_H_IRQHandler:
+; ../src/stm8l15x_it.c: 151: }
+ iret
+; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
+; -----------------------------------------
+; function EXTI0_IRQHandler
+; -----------------------------------------
+_EXTI0_IRQHandler:
+; ../src/stm8l15x_it.c: 163: }
+ iret
+; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
+; -----------------------------------------
+; function EXTI1_IRQHandler
+; -----------------------------------------
+_EXTI1_IRQHandler:
+; ../src/stm8l15x_it.c: 175: }
+ iret
+; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
+; -----------------------------------------
+; function EXTI2_IRQHandler
+; -----------------------------------------
+_EXTI2_IRQHandler:
+; ../src/stm8l15x_it.c: 187: }
+ iret
+; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
+; -----------------------------------------
+; function EXTI3_IRQHandler
+; -----------------------------------------
+_EXTI3_IRQHandler:
+; ../src/stm8l15x_it.c: 199: }
+ iret
+; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
+; -----------------------------------------
+; function EXTI4_IRQHandler
+; -----------------------------------------
+_EXTI4_IRQHandler:
+; ../src/stm8l15x_it.c: 211: }
+ iret
+; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
+; -----------------------------------------
+; function EXTI5_IRQHandler
+; -----------------------------------------
+_EXTI5_IRQHandler:
+; ../src/stm8l15x_it.c: 223: }
+ iret
+; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
+; -----------------------------------------
+; function EXTI6_IRQHandler
+; -----------------------------------------
+_EXTI6_IRQHandler:
+; ../src/stm8l15x_it.c: 235: }
+ iret
+; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
+; -----------------------------------------
+; function EXTI7_IRQHandler
+; -----------------------------------------
+_EXTI7_IRQHandler:
+; ../src/stm8l15x_it.c: 247: }
+ iret
+; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
+; -----------------------------------------
+; function LCD_AES_IRQHandler
+; -----------------------------------------
+_LCD_AES_IRQHandler:
+; ../src/stm8l15x_it.c: 258: }
+ iret
+; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
+; -----------------------------------------
+; function SWITCH_CSS_BREAK_DAC_IRQHandler
+; -----------------------------------------
+_SWITCH_CSS_BREAK_DAC_IRQHandler:
+; ../src/stm8l15x_it.c: 269: }
+ iret
+; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
+; -----------------------------------------
+; function ADC1_COMP_IRQHandler
+; -----------------------------------------
+_ADC1_COMP_IRQHandler:
+; ../src/stm8l15x_it.c: 281: }
+ iret
+; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
+; -----------------------------------------
+; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
+; -----------------------------------------
+_TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
+; ../src/stm8l15x_it.c: 293: }
+ iret
+; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
+; -----------------------------------------
+; function TIM2_CC_USART2_RX_IRQHandler
+; -----------------------------------------
+_TIM2_CC_USART2_RX_IRQHandler:
+; ../src/stm8l15x_it.c: 305: }
+ iret
+; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
+; -----------------------------------------
+; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
+; -----------------------------------------
+_TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
+; ../src/stm8l15x_it.c: 318: }
+ iret
+; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
+; -----------------------------------------
+; function TIM3_CC_USART3_RX_IRQHandler
+; -----------------------------------------
+_TIM3_CC_USART3_RX_IRQHandler:
+; ../src/stm8l15x_it.c: 329: }
+ iret
+; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
+; -----------------------------------------
+; function TIM1_UPD_OVF_TRG_COM_IRQHandler
+; -----------------------------------------
+_TIM1_UPD_OVF_TRG_COM_IRQHandler:
+; ../src/stm8l15x_it.c: 340: }
+ iret
+; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
+; -----------------------------------------
+; function TIM1_CC_IRQHandler
+; -----------------------------------------
+_TIM1_CC_IRQHandler:
+; ../src/stm8l15x_it.c: 351: }
+ iret
+; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
+; -----------------------------------------
+; function TIM4_UPD_OVF_TRG_IRQHandler
+; -----------------------------------------
+_TIM4_UPD_OVF_TRG_IRQHandler:
+; ../src/stm8l15x_it.c: 363: }
+ iret
+; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
+; -----------------------------------------
+; function SPI1_IRQHandler
+; -----------------------------------------
+_SPI1_IRQHandler:
+; ../src/stm8l15x_it.c: 374: }
+ iret
+; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
+; -----------------------------------------
+; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
+; -----------------------------------------
+_USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
+; ../src/stm8l15x_it.c: 386: }
+ iret
+; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
+; -----------------------------------------
+; function USART1_RX_TIM5_CC_IRQHandler
+; -----------------------------------------
+_USART1_RX_TIM5_CC_IRQHandler:
+; ../src/stm8l15x_it.c: 398: }
+ iret
+; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
+; -----------------------------------------
+; function I2C1_SPI2_IRQHandler
+; -----------------------------------------
+_I2C1_SPI2_IRQHandler:
+; ../src/stm8l15x_it.c: 410: }
+ iret
+ .area CODE
+ .area CONST
+ .area INITIALIZER
+ .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_it.lst b/firmware/STM8L15X_LD/stm8l15x_it.lst
new file mode 100644
index 0000000..ac4a222
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_it.lst
@@ -0,0 +1,290 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_it
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _TRAP_IRQHandler
+ 11 .globl _FLASH_IRQHandler
+ 12 .globl _DMA1_CHANNEL0_1_IRQHandler
+ 13 .globl _DMA1_CHANNEL2_3_IRQHandler
+ 14 .globl _RTC_CSSLSE_IRQHandler
+ 15 .globl _EXTIE_F_PVD_IRQHandler
+ 16 .globl _EXTIB_G_IRQHandler
+ 17 .globl _EXTID_H_IRQHandler
+ 18 .globl _EXTI0_IRQHandler
+ 19 .globl _EXTI1_IRQHandler
+ 20 .globl _EXTI2_IRQHandler
+ 21 .globl _EXTI3_IRQHandler
+ 22 .globl _EXTI4_IRQHandler
+ 23 .globl _EXTI5_IRQHandler
+ 24 .globl _EXTI6_IRQHandler
+ 25 .globl _EXTI7_IRQHandler
+ 26 .globl _LCD_AES_IRQHandler
+ 27 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
+ 28 .globl _ADC1_COMP_IRQHandler
+ 29 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
+ 30 .globl _TIM2_CC_USART2_RX_IRQHandler
+ 31 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
+ 32 .globl _TIM3_CC_USART3_RX_IRQHandler
+ 33 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
+ 34 .globl _TIM1_CC_IRQHandler
+ 35 .globl _TIM4_UPD_OVF_TRG_IRQHandler
+ 36 .globl _SPI1_IRQHandler
+ 37 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
+ 38 .globl _USART1_RX_TIM5_CC_IRQHandler
+ 39 .globl _I2C1_SPI2_IRQHandler
+ 40 ;--------------------------------------------------------
+ 41 ; ram data
+ 42 ;--------------------------------------------------------
+ 43 .area DATA
+ 44 ;--------------------------------------------------------
+ 45 ; ram data
+ 46 ;--------------------------------------------------------
+ 47 .area INITIALIZED
+ 48 ;--------------------------------------------------------
+ 49 ; absolute external ram data
+ 50 ;--------------------------------------------------------
+ 51 .area DABS (ABS)
+ 52
+ 53 ; default segment ordering for linker
+ 54 .area HOME
+ 55 .area GSINIT
+ 56 .area GSFINAL
+ 57 .area CONST
+ 58 .area INITIALIZER
+ 59 .area CODE
+ 60
+ 61 ;--------------------------------------------------------
+ 62 ; global & static initialisations
+ 63 ;--------------------------------------------------------
+ 64 .area HOME
+ 65 .area GSINIT
+ 66 .area GSFINAL
+ 67 .area GSINIT
+ 68 ;--------------------------------------------------------
+ 69 ; Home
+ 70 ;--------------------------------------------------------
+ 71 .area HOME
+ 72 .area HOME
+ 73 ;--------------------------------------------------------
+ 74 ; code
+ 75 ;--------------------------------------------------------
+ 76 .area CODE
+ 77 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
+ 78 ; -----------------------------------------
+ 79 ; function TRAP_IRQHandler
+ 80 ; -----------------------------------------
+ 000000 81 _TRAP_IRQHandler:
+ 82 ; ../src/stm8l15x_it.c: 72: }
+ 000000 80 [11] 83 iret
+ 84 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
+ 85 ; -----------------------------------------
+ 86 ; function FLASH_IRQHandler
+ 87 ; -----------------------------------------
+ 000001 88 _FLASH_IRQHandler:
+ 89 ; ../src/stm8l15x_it.c: 83: }
+ 000001 80 [11] 90 iret
+ 91 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
+ 92 ; -----------------------------------------
+ 93 ; function DMA1_CHANNEL0_1_IRQHandler
+ 94 ; -----------------------------------------
+ 000002 95 _DMA1_CHANNEL0_1_IRQHandler:
+ 96 ; ../src/stm8l15x_it.c: 94: }
+ 000002 80 [11] 97 iret
+ 98 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
+ 99 ; -----------------------------------------
+ 100 ; function DMA1_CHANNEL2_3_IRQHandler
+ 101 ; -----------------------------------------
+ 000003 102 _DMA1_CHANNEL2_3_IRQHandler:
+ 103 ; ../src/stm8l15x_it.c: 105: }
+ 000003 80 [11] 104 iret
+ 105 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
+ 106 ; -----------------------------------------
+ 107 ; function RTC_CSSLSE_IRQHandler
+ 108 ; -----------------------------------------
+ 000004 109 _RTC_CSSLSE_IRQHandler:
+ 110 ; ../src/stm8l15x_it.c: 116: }
+ 000004 80 [11] 111 iret
+ 112 ; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
+ 113 ; -----------------------------------------
+ 114 ; function EXTIE_F_PVD_IRQHandler
+ 115 ; -----------------------------------------
+ 000005 116 _EXTIE_F_PVD_IRQHandler:
+ 117 ; ../src/stm8l15x_it.c: 127: }
+ 000005 80 [11] 118 iret
+ 119 ; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
+ 120 ; -----------------------------------------
+ 121 ; function EXTIB_G_IRQHandler
+ 122 ; -----------------------------------------
+ 000006 123 _EXTIB_G_IRQHandler:
+ 124 ; ../src/stm8l15x_it.c: 139: }
+ 000006 80 [11] 125 iret
+ 126 ; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
+ 127 ; -----------------------------------------
+ 128 ; function EXTID_H_IRQHandler
+ 129 ; -----------------------------------------
+ 000007 130 _EXTID_H_IRQHandler:
+ 131 ; ../src/stm8l15x_it.c: 151: }
+ 000007 80 [11] 132 iret
+ 133 ; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
+ 134 ; -----------------------------------------
+ 135 ; function EXTI0_IRQHandler
+ 136 ; -----------------------------------------
+ 000008 137 _EXTI0_IRQHandler:
+ 138 ; ../src/stm8l15x_it.c: 163: }
+ 000008 80 [11] 139 iret
+ 140 ; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
+ 141 ; -----------------------------------------
+ 142 ; function EXTI1_IRQHandler
+ 143 ; -----------------------------------------
+ 000009 144 _EXTI1_IRQHandler:
+ 145 ; ../src/stm8l15x_it.c: 175: }
+ 000009 80 [11] 146 iret
+ 147 ; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
+ 148 ; -----------------------------------------
+ 149 ; function EXTI2_IRQHandler
+ 150 ; -----------------------------------------
+ 00000A 151 _EXTI2_IRQHandler:
+ 152 ; ../src/stm8l15x_it.c: 187: }
+ 00000A 80 [11] 153 iret
+ 154 ; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
+ 155 ; -----------------------------------------
+ 156 ; function EXTI3_IRQHandler
+ 157 ; -----------------------------------------
+ 00000B 158 _EXTI3_IRQHandler:
+ 159 ; ../src/stm8l15x_it.c: 199: }
+ 00000B 80 [11] 160 iret
+ 161 ; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
+ 162 ; -----------------------------------------
+ 163 ; function EXTI4_IRQHandler
+ 164 ; -----------------------------------------
+ 00000C 165 _EXTI4_IRQHandler:
+ 166 ; ../src/stm8l15x_it.c: 211: }
+ 00000C 80 [11] 167 iret
+ 168 ; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
+ 169 ; -----------------------------------------
+ 170 ; function EXTI5_IRQHandler
+ 171 ; -----------------------------------------
+ 00000D 172 _EXTI5_IRQHandler:
+ 173 ; ../src/stm8l15x_it.c: 223: }
+ 00000D 80 [11] 174 iret
+ 175 ; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
+ 176 ; -----------------------------------------
+ 177 ; function EXTI6_IRQHandler
+ 178 ; -----------------------------------------
+ 00000E 179 _EXTI6_IRQHandler:
+ 180 ; ../src/stm8l15x_it.c: 235: }
+ 00000E 80 [11] 181 iret
+ 182 ; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
+ 183 ; -----------------------------------------
+ 184 ; function EXTI7_IRQHandler
+ 185 ; -----------------------------------------
+ 00000F 186 _EXTI7_IRQHandler:
+ 187 ; ../src/stm8l15x_it.c: 247: }
+ 00000F 80 [11] 188 iret
+ 189 ; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
+ 190 ; -----------------------------------------
+ 191 ; function LCD_AES_IRQHandler
+ 192 ; -----------------------------------------
+ 000010 193 _LCD_AES_IRQHandler:
+ 194 ; ../src/stm8l15x_it.c: 258: }
+ 000010 80 [11] 195 iret
+ 196 ; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
+ 197 ; -----------------------------------------
+ 198 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
+ 199 ; -----------------------------------------
+ 000011 200 _SWITCH_CSS_BREAK_DAC_IRQHandler:
+ 201 ; ../src/stm8l15x_it.c: 269: }
+ 000011 80 [11] 202 iret
+ 203 ; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
+ 204 ; -----------------------------------------
+ 205 ; function ADC1_COMP_IRQHandler
+ 206 ; -----------------------------------------
+ 000012 207 _ADC1_COMP_IRQHandler:
+ 208 ; ../src/stm8l15x_it.c: 281: }
+ 000012 80 [11] 209 iret
+ 210 ; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
+ 211 ; -----------------------------------------
+ 212 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
+ 213 ; -----------------------------------------
+ 000013 214 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
+ 215 ; ../src/stm8l15x_it.c: 293: }
+ 000013 80 [11] 216 iret
+ 217 ; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
+ 218 ; -----------------------------------------
+ 219 ; function TIM2_CC_USART2_RX_IRQHandler
+ 220 ; -----------------------------------------
+ 000014 221 _TIM2_CC_USART2_RX_IRQHandler:
+ 222 ; ../src/stm8l15x_it.c: 305: }
+ 000014 80 [11] 223 iret
+ 224 ; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
+ 225 ; -----------------------------------------
+ 226 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
+ 227 ; -----------------------------------------
+ 000015 228 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
+ 229 ; ../src/stm8l15x_it.c: 318: }
+ 000015 80 [11] 230 iret
+ 231 ; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
+ 232 ; -----------------------------------------
+ 233 ; function TIM3_CC_USART3_RX_IRQHandler
+ 234 ; -----------------------------------------
+ 000016 235 _TIM3_CC_USART3_RX_IRQHandler:
+ 236 ; ../src/stm8l15x_it.c: 329: }
+ 000016 80 [11] 237 iret
+ 238 ; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
+ 239 ; -----------------------------------------
+ 240 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
+ 241 ; -----------------------------------------
+ 000017 242 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
+ 243 ; ../src/stm8l15x_it.c: 340: }
+ 000017 80 [11] 244 iret
+ 245 ; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
+ 246 ; -----------------------------------------
+ 247 ; function TIM1_CC_IRQHandler
+ 248 ; -----------------------------------------
+ 000018 249 _TIM1_CC_IRQHandler:
+ 250 ; ../src/stm8l15x_it.c: 351: }
+ 000018 80 [11] 251 iret
+ 252 ; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
+ 253 ; -----------------------------------------
+ 254 ; function TIM4_UPD_OVF_TRG_IRQHandler
+ 255 ; -----------------------------------------
+ 000019 256 _TIM4_UPD_OVF_TRG_IRQHandler:
+ 257 ; ../src/stm8l15x_it.c: 363: }
+ 000019 80 [11] 258 iret
+ 259 ; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
+ 260 ; -----------------------------------------
+ 261 ; function SPI1_IRQHandler
+ 262 ; -----------------------------------------
+ 00001A 263 _SPI1_IRQHandler:
+ 264 ; ../src/stm8l15x_it.c: 374: }
+ 00001A 80 [11] 265 iret
+ 266 ; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
+ 267 ; -----------------------------------------
+ 268 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
+ 269 ; -----------------------------------------
+ 00001B 270 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
+ 271 ; ../src/stm8l15x_it.c: 386: }
+ 00001B 80 [11] 272 iret
+ 273 ; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
+ 274 ; -----------------------------------------
+ 275 ; function USART1_RX_TIM5_CC_IRQHandler
+ 276 ; -----------------------------------------
+ 00001C 277 _USART1_RX_TIM5_CC_IRQHandler:
+ 278 ; ../src/stm8l15x_it.c: 398: }
+ 00001C 80 [11] 279 iret
+ 280 ; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
+ 281 ; -----------------------------------------
+ 282 ; function I2C1_SPI2_IRQHandler
+ 283 ; -----------------------------------------
+ 00001D 284 _I2C1_SPI2_IRQHandler:
+ 285 ; ../src/stm8l15x_it.c: 410: }
+ 00001D 80 [11] 286 iret
+ 287 .area CODE
+ 288 .area CONST
+ 289 .area INITIALIZER
+ 290 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_it.rel b/firmware/STM8L15X_LD/stm8l15x_it.rel
new file mode 100644
index 0000000..ffa8e64
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_it.rel
@@ -0,0 +1,165 @@
+XH3
+H B areas 1F global symbols
+M stm8l15x_it
+S .__.ABS. Def000000
+A _CODE size 0 flags 0 addr 0
+A DATA size 0 flags 0 addr 0
+A INITIALIZED size 0 flags 0 addr 0
+A DABS size 0 flags 8 addr 0
+A HOME size 0 flags 0 addr 0
+A GSINIT size 0 flags 0 addr 0
+A GSFINAL size 0 flags 0 addr 0
+A CONST size 0 flags 0 addr 0
+A INITIALIZER size 0 flags 0 addr 0
+A CODE size 1E flags 0 addr 0
+S _DMA1_CHANNEL0_1_IRQHandler Def000002
+S _SPI1_IRQHandler Def00001A
+S _DMA1_CHANNEL2_3_IRQHandler Def000003
+S _EXTIB_G_IRQHandler Def000006
+S _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler Def000013
+S _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler Def00001B
+S _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler Def000015
+S _EXTID_H_IRQHandler Def000007
+S _TIM2_CC_USART2_RX_IRQHandler Def000014
+S _EXTI0_IRQHandler Def000008
+S _EXTI1_IRQHandler Def000009
+S _I2C1_SPI2_IRQHandler Def00001D
+S _USART1_RX_TIM5_CC_IRQHandler Def00001C
+S _TIM3_CC_USART3_RX_IRQHandler Def000016
+S _EXTI2_IRQHandler Def00000A
+S _EXTI3_IRQHandler Def00000B
+S _EXTIE_F_PVD_IRQHandler Def000005
+S _EXTI4_IRQHandler Def00000C
+S _FLASH_IRQHandler Def000001
+S _EXTI5_IRQHandler Def00000D
+S _EXTI6_IRQHandler Def00000E
+S _EXTI7_IRQHandler Def00000F
+S _TIM1_UPD_OVF_TRG_COM_IRQHandler Def000017
+S _TRAP_IRQHandler Def000000
+S _TIM4_UPD_OVF_TRG_IRQHandler Def000019
+S _TIM1_CC_IRQHandler Def000018
+S _SWITCH_CSS_BREAK_DAC_IRQHandler Def000011
+S _ADC1_COMP_IRQHandler Def000012
+S _LCD_AES_IRQHandler Def000010
+S _RTC_CSSLSE_IRQHandler Def000004
+A CABS size 0 flags 8 addr 0
+T 00 00 00
+R 00 00 00 09
+T 00 00 00 80
+R 00 00 00 09
+T 00 00 01
+R 00 00 00 09
+T 00 00 01 80
+R 00 00 00 09
+T 00 00 02
+R 00 00 00 09
+T 00 00 02 80
+R 00 00 00 09
+T 00 00 03
+R 00 00 00 09
+T 00 00 03 80
+R 00 00 00 09
+T 00 00 04
+R 00 00 00 09
+T 00 00 04 80
+R 00 00 00 09
+T 00 00 05
+R 00 00 00 09
+T 00 00 05 80
+R 00 00 00 09
+T 00 00 06
+R 00 00 00 09
+T 00 00 06 80
+R 00 00 00 09
+T 00 00 07
+R 00 00 00 09
+T 00 00 07 80
+R 00 00 00 09
+T 00 00 08
+R 00 00 00 09
+T 00 00 08 80
+R 00 00 00 09
+T 00 00 09
+R 00 00 00 09
+T 00 00 09 80
+R 00 00 00 09
+T 00 00 0A
+R 00 00 00 09
+T 00 00 0A 80
+R 00 00 00 09
+T 00 00 0B
+R 00 00 00 09
+T 00 00 0B 80
+R 00 00 00 09
+T 00 00 0C
+R 00 00 00 09
+T 00 00 0C 80
+R 00 00 00 09
+T 00 00 0D
+R 00 00 00 09
+T 00 00 0D 80
+R 00 00 00 09
+T 00 00 0E
+R 00 00 00 09
+T 00 00 0E 80
+R 00 00 00 09
+T 00 00 0F
+R 00 00 00 09
+T 00 00 0F 80
+R 00 00 00 09
+T 00 00 10
+R 00 00 00 09
+T 00 00 10 80
+R 00 00 00 09
+T 00 00 11
+R 00 00 00 09
+T 00 00 11 80
+R 00 00 00 09
+T 00 00 12
+R 00 00 00 09
+T 00 00 12 80
+R 00 00 00 09
+T 00 00 13
+R 00 00 00 09
+T 00 00 13 80
+R 00 00 00 09
+T 00 00 14
+R 00 00 00 09
+T 00 00 14 80
+R 00 00 00 09
+T 00 00 15
+R 00 00 00 09
+T 00 00 15 80
+R 00 00 00 09
+T 00 00 16
+R 00 00 00 09
+T 00 00 16 80
+R 00 00 00 09
+T 00 00 17
+R 00 00 00 09
+T 00 00 17 80
+R 00 00 00 09
+T 00 00 18
+R 00 00 00 09
+T 00 00 18 80
+R 00 00 00 09
+T 00 00 19
+R 00 00 00 09
+T 00 00 19 80
+R 00 00 00 09
+T 00 00 1A
+R 00 00 00 09
+T 00 00 1A 80
+R 00 00 00 09
+T 00 00 1B
+R 00 00 00 09
+T 00 00 1B 80
+R 00 00 00 09
+T 00 00 1C
+R 00 00 00 09
+T 00 00 1C 80
+R 00 00 00 09
+T 00 00 1D
+R 00 00 00 09
+T 00 00 1D 80
+R 00 00 00 09
diff --git a/firmware/STM8L15X_LD/stm8l15x_it.rst b/firmware/STM8L15X_LD/stm8l15x_it.rst
new file mode 100644
index 0000000..fa98c6d
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_it.rst
@@ -0,0 +1,290 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_it
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _TRAP_IRQHandler
+ 11 .globl _FLASH_IRQHandler
+ 12 .globl _DMA1_CHANNEL0_1_IRQHandler
+ 13 .globl _DMA1_CHANNEL2_3_IRQHandler
+ 14 .globl _RTC_CSSLSE_IRQHandler
+ 15 .globl _EXTIE_F_PVD_IRQHandler
+ 16 .globl _EXTIB_G_IRQHandler
+ 17 .globl _EXTID_H_IRQHandler
+ 18 .globl _EXTI0_IRQHandler
+ 19 .globl _EXTI1_IRQHandler
+ 20 .globl _EXTI2_IRQHandler
+ 21 .globl _EXTI3_IRQHandler
+ 22 .globl _EXTI4_IRQHandler
+ 23 .globl _EXTI5_IRQHandler
+ 24 .globl _EXTI6_IRQHandler
+ 25 .globl _EXTI7_IRQHandler
+ 26 .globl _LCD_AES_IRQHandler
+ 27 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
+ 28 .globl _ADC1_COMP_IRQHandler
+ 29 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
+ 30 .globl _TIM2_CC_USART2_RX_IRQHandler
+ 31 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
+ 32 .globl _TIM3_CC_USART3_RX_IRQHandler
+ 33 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
+ 34 .globl _TIM1_CC_IRQHandler
+ 35 .globl _TIM4_UPD_OVF_TRG_IRQHandler
+ 36 .globl _SPI1_IRQHandler
+ 37 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
+ 38 .globl _USART1_RX_TIM5_CC_IRQHandler
+ 39 .globl _I2C1_SPI2_IRQHandler
+ 40 ;--------------------------------------------------------
+ 41 ; ram data
+ 42 ;--------------------------------------------------------
+ 43 .area DATA
+ 44 ;--------------------------------------------------------
+ 45 ; ram data
+ 46 ;--------------------------------------------------------
+ 47 .area INITIALIZED
+ 48 ;--------------------------------------------------------
+ 49 ; absolute external ram data
+ 50 ;--------------------------------------------------------
+ 51 .area DABS (ABS)
+ 52
+ 53 ; default segment ordering for linker
+ 54 .area HOME
+ 55 .area GSINIT
+ 56 .area GSFINAL
+ 57 .area CONST
+ 58 .area INITIALIZER
+ 59 .area CODE
+ 60
+ 61 ;--------------------------------------------------------
+ 62 ; global & static initialisations
+ 63 ;--------------------------------------------------------
+ 64 .area HOME
+ 65 .area GSINIT
+ 66 .area GSFINAL
+ 67 .area GSINIT
+ 68 ;--------------------------------------------------------
+ 69 ; Home
+ 70 ;--------------------------------------------------------
+ 71 .area HOME
+ 72 .area HOME
+ 73 ;--------------------------------------------------------
+ 74 ; code
+ 75 ;--------------------------------------------------------
+ 76 .area CODE
+ 77 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
+ 78 ; -----------------------------------------
+ 79 ; function TRAP_IRQHandler
+ 80 ; -----------------------------------------
+ 00818F 81 _TRAP_IRQHandler:
+ 82 ; ../src/stm8l15x_it.c: 72: }
+ 00818F 80 [11] 83 iret
+ 84 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
+ 85 ; -----------------------------------------
+ 86 ; function FLASH_IRQHandler
+ 87 ; -----------------------------------------
+ 008190 88 _FLASH_IRQHandler:
+ 89 ; ../src/stm8l15x_it.c: 83: }
+ 008190 80 [11] 90 iret
+ 91 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
+ 92 ; -----------------------------------------
+ 93 ; function DMA1_CHANNEL0_1_IRQHandler
+ 94 ; -----------------------------------------
+ 008191 95 _DMA1_CHANNEL0_1_IRQHandler:
+ 96 ; ../src/stm8l15x_it.c: 94: }
+ 008191 80 [11] 97 iret
+ 98 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
+ 99 ; -----------------------------------------
+ 100 ; function DMA1_CHANNEL2_3_IRQHandler
+ 101 ; -----------------------------------------
+ 008192 102 _DMA1_CHANNEL2_3_IRQHandler:
+ 103 ; ../src/stm8l15x_it.c: 105: }
+ 008192 80 [11] 104 iret
+ 105 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
+ 106 ; -----------------------------------------
+ 107 ; function RTC_CSSLSE_IRQHandler
+ 108 ; -----------------------------------------
+ 008193 109 _RTC_CSSLSE_IRQHandler:
+ 110 ; ../src/stm8l15x_it.c: 116: }
+ 008193 80 [11] 111 iret
+ 112 ; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
+ 113 ; -----------------------------------------
+ 114 ; function EXTIE_F_PVD_IRQHandler
+ 115 ; -----------------------------------------
+ 008194 116 _EXTIE_F_PVD_IRQHandler:
+ 117 ; ../src/stm8l15x_it.c: 127: }
+ 008194 80 [11] 118 iret
+ 119 ; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
+ 120 ; -----------------------------------------
+ 121 ; function EXTIB_G_IRQHandler
+ 122 ; -----------------------------------------
+ 008195 123 _EXTIB_G_IRQHandler:
+ 124 ; ../src/stm8l15x_it.c: 139: }
+ 008195 80 [11] 125 iret
+ 126 ; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
+ 127 ; -----------------------------------------
+ 128 ; function EXTID_H_IRQHandler
+ 129 ; -----------------------------------------
+ 008196 130 _EXTID_H_IRQHandler:
+ 131 ; ../src/stm8l15x_it.c: 151: }
+ 008196 80 [11] 132 iret
+ 133 ; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
+ 134 ; -----------------------------------------
+ 135 ; function EXTI0_IRQHandler
+ 136 ; -----------------------------------------
+ 008197 137 _EXTI0_IRQHandler:
+ 138 ; ../src/stm8l15x_it.c: 163: }
+ 008197 80 [11] 139 iret
+ 140 ; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
+ 141 ; -----------------------------------------
+ 142 ; function EXTI1_IRQHandler
+ 143 ; -----------------------------------------
+ 008198 144 _EXTI1_IRQHandler:
+ 145 ; ../src/stm8l15x_it.c: 175: }
+ 008198 80 [11] 146 iret
+ 147 ; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
+ 148 ; -----------------------------------------
+ 149 ; function EXTI2_IRQHandler
+ 150 ; -----------------------------------------
+ 008199 151 _EXTI2_IRQHandler:
+ 152 ; ../src/stm8l15x_it.c: 187: }
+ 008199 80 [11] 153 iret
+ 154 ; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
+ 155 ; -----------------------------------------
+ 156 ; function EXTI3_IRQHandler
+ 157 ; -----------------------------------------
+ 00819A 158 _EXTI3_IRQHandler:
+ 159 ; ../src/stm8l15x_it.c: 199: }
+ 00819A 80 [11] 160 iret
+ 161 ; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
+ 162 ; -----------------------------------------
+ 163 ; function EXTI4_IRQHandler
+ 164 ; -----------------------------------------
+ 00819B 165 _EXTI4_IRQHandler:
+ 166 ; ../src/stm8l15x_it.c: 211: }
+ 00819B 80 [11] 167 iret
+ 168 ; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
+ 169 ; -----------------------------------------
+ 170 ; function EXTI5_IRQHandler
+ 171 ; -----------------------------------------
+ 00819C 172 _EXTI5_IRQHandler:
+ 173 ; ../src/stm8l15x_it.c: 223: }
+ 00819C 80 [11] 174 iret
+ 175 ; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
+ 176 ; -----------------------------------------
+ 177 ; function EXTI6_IRQHandler
+ 178 ; -----------------------------------------
+ 00819D 179 _EXTI6_IRQHandler:
+ 180 ; ../src/stm8l15x_it.c: 235: }
+ 00819D 80 [11] 181 iret
+ 182 ; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
+ 183 ; -----------------------------------------
+ 184 ; function EXTI7_IRQHandler
+ 185 ; -----------------------------------------
+ 00819E 186 _EXTI7_IRQHandler:
+ 187 ; ../src/stm8l15x_it.c: 247: }
+ 00819E 80 [11] 188 iret
+ 189 ; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
+ 190 ; -----------------------------------------
+ 191 ; function LCD_AES_IRQHandler
+ 192 ; -----------------------------------------
+ 00819F 193 _LCD_AES_IRQHandler:
+ 194 ; ../src/stm8l15x_it.c: 258: }
+ 00819F 80 [11] 195 iret
+ 196 ; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
+ 197 ; -----------------------------------------
+ 198 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
+ 199 ; -----------------------------------------
+ 0081A0 200 _SWITCH_CSS_BREAK_DAC_IRQHandler:
+ 201 ; ../src/stm8l15x_it.c: 269: }
+ 0081A0 80 [11] 202 iret
+ 203 ; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
+ 204 ; -----------------------------------------
+ 205 ; function ADC1_COMP_IRQHandler
+ 206 ; -----------------------------------------
+ 0081A1 207 _ADC1_COMP_IRQHandler:
+ 208 ; ../src/stm8l15x_it.c: 281: }
+ 0081A1 80 [11] 209 iret
+ 210 ; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
+ 211 ; -----------------------------------------
+ 212 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
+ 213 ; -----------------------------------------
+ 0081A2 214 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
+ 215 ; ../src/stm8l15x_it.c: 293: }
+ 0081A2 80 [11] 216 iret
+ 217 ; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
+ 218 ; -----------------------------------------
+ 219 ; function TIM2_CC_USART2_RX_IRQHandler
+ 220 ; -----------------------------------------
+ 0081A3 221 _TIM2_CC_USART2_RX_IRQHandler:
+ 222 ; ../src/stm8l15x_it.c: 305: }
+ 0081A3 80 [11] 223 iret
+ 224 ; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
+ 225 ; -----------------------------------------
+ 226 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
+ 227 ; -----------------------------------------
+ 0081A4 228 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
+ 229 ; ../src/stm8l15x_it.c: 318: }
+ 0081A4 80 [11] 230 iret
+ 231 ; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
+ 232 ; -----------------------------------------
+ 233 ; function TIM3_CC_USART3_RX_IRQHandler
+ 234 ; -----------------------------------------
+ 0081A5 235 _TIM3_CC_USART3_RX_IRQHandler:
+ 236 ; ../src/stm8l15x_it.c: 329: }
+ 0081A5 80 [11] 237 iret
+ 238 ; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
+ 239 ; -----------------------------------------
+ 240 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
+ 241 ; -----------------------------------------
+ 0081A6 242 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
+ 243 ; ../src/stm8l15x_it.c: 340: }
+ 0081A6 80 [11] 244 iret
+ 245 ; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
+ 246 ; -----------------------------------------
+ 247 ; function TIM1_CC_IRQHandler
+ 248 ; -----------------------------------------
+ 0081A7 249 _TIM1_CC_IRQHandler:
+ 250 ; ../src/stm8l15x_it.c: 351: }
+ 0081A7 80 [11] 251 iret
+ 252 ; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
+ 253 ; -----------------------------------------
+ 254 ; function TIM4_UPD_OVF_TRG_IRQHandler
+ 255 ; -----------------------------------------
+ 0081A8 256 _TIM4_UPD_OVF_TRG_IRQHandler:
+ 257 ; ../src/stm8l15x_it.c: 363: }
+ 0081A8 80 [11] 258 iret
+ 259 ; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
+ 260 ; -----------------------------------------
+ 261 ; function SPI1_IRQHandler
+ 262 ; -----------------------------------------
+ 0081A9 263 _SPI1_IRQHandler:
+ 264 ; ../src/stm8l15x_it.c: 374: }
+ 0081A9 80 [11] 265 iret
+ 266 ; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
+ 267 ; -----------------------------------------
+ 268 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
+ 269 ; -----------------------------------------
+ 0081AA 270 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
+ 271 ; ../src/stm8l15x_it.c: 386: }
+ 0081AA 80 [11] 272 iret
+ 273 ; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
+ 274 ; -----------------------------------------
+ 275 ; function USART1_RX_TIM5_CC_IRQHandler
+ 276 ; -----------------------------------------
+ 0081AB 277 _USART1_RX_TIM5_CC_IRQHandler:
+ 278 ; ../src/stm8l15x_it.c: 398: }
+ 0081AB 80 [11] 279 iret
+ 280 ; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
+ 281 ; -----------------------------------------
+ 282 ; function I2C1_SPI2_IRQHandler
+ 283 ; -----------------------------------------
+ 0081AC 284 _I2C1_SPI2_IRQHandler:
+ 285 ; ../src/stm8l15x_it.c: 410: }
+ 0081AC 80 [11] 286 iret
+ 287 .area CODE
+ 288 .area CONST
+ 289 .area INITIALIZER
+ 290 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_it.sym b/firmware/STM8L15X_LD/stm8l15x_it.sym
new file mode 100644
index 0000000..289d7bf
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_it.sym
@@ -0,0 +1,58 @@
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
+Hexadecimal [24-Bits]
+
+Symbol Table
+
+ .__.$$$. = 002710 L
+ .__.ABS. = 000000 G
+ .__.CPU. = 000000 L
+ .__.H$L. = 000001 L
+ 9 _ADC1_COMP_IRQHandler 000012 GR
+ 9 _DMA1_CHANNEL0_1_IRQHandler 000002 GR
+ 9 _DMA1_CHANNEL2_3_IRQHandler 000003 GR
+ 9 _EXTI0_IRQHandler 000008 GR
+ 9 _EXTI1_IRQHandler 000009 GR
+ 9 _EXTI2_IRQHandler 00000A GR
+ 9 _EXTI3_IRQHandler 00000B GR
+ 9 _EXTI4_IRQHandler 00000C GR
+ 9 _EXTI5_IRQHandler 00000D GR
+ 9 _EXTI6_IRQHandler 00000E GR
+ 9 _EXTI7_IRQHandler 00000F GR
+ 9 _EXTIB_G_IRQHandler 000006 GR
+ 9 _EXTID_H_IRQHandler 000007 GR
+ 9 _EXTIE_F_PVD_IRQHandler 000005 GR
+ 9 _FLASH_IRQHandler 000001 GR
+ 9 _I2C1_SPI2_IRQHandler 00001D GR
+ 9 _LCD_AES_IRQHandler 000010 GR
+ 9 _RTC_CSSLSE_IRQHandler 000004 GR
+ 9 _SPI1_IRQHandler 00001A GR
+ 9 _SWITCH_CSS_BREAK_DAC_IRQHandler 000011 GR
+ 9 _TIM1_CC_IRQHandler 000018 GR
+ 9 _TIM1_UPD_OVF_TRG_COM_IRQHandler 000017 GR
+ 9 _TIM2_CC_USART2_RX_IRQHandler 000014 GR
+ 9 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler 000013 GR
+ 9 _TIM3_CC_USART3_RX_IRQHandler 000016 GR
+ 9 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler 000015 GR
+ 9 _TIM4_UPD_OVF_TRG_IRQHandler 000019 GR
+ 9 _TRAP_IRQHandler 000000 GR
+ 9 _USART1_RX_TIM5_CC_IRQHandler 00001C GR
+ 9 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler 00001B GR
+
+
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
+Hexadecimal [24-Bits]
+
+Area Table
+
+ 0 _CODE size 0 flags 0
+ 1 DATA size 0 flags 0
+ 2 INITIALIZED size 0 flags 0
+ 3 DABS size 0 flags 8
+ 4 HOME size 0 flags 0
+ 5 GSINIT size 0 flags 0
+ 6 GSFINAL size 0 flags 0
+ 7 CONST size 0 flags 0
+ 8 INITIALIZER size 0 flags 0
+ 9 CODE size 1E flags 0
+ A CABS size 0 flags 8
+
diff --git a/firmware/STM8L15X_LD/stm8l15x_rtc.asm b/firmware/STM8L15X_LD/stm8l15x_rtc.asm
new file mode 100644
index 0000000..231cf27
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_rtc.asm
@@ -0,0 +1,1969 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ISO C Compiler
+; Version 4.5.0 #15242 (Linux)
+;--------------------------------------------------------
+ .module stm8l15x_rtc
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _RTC_DeInit
+ .globl _RTC_Init
+ .globl _RTC_StructInit
+ .globl _RTC_WriteProtectionCmd
+ .globl _RTC_EnterInitMode
+ .globl _RTC_ExitInitMode
+ .globl _RTC_WaitForSynchro
+ .globl _RTC_RatioCmd
+ .globl _RTC_BypassShadowCmd
+ .globl _RTC_SetTime
+ .globl _RTC_TimeStructInit
+ .globl _RTC_GetTime
+ .globl _RTC_GetSubSecond
+ .globl _RTC_SetDate
+ .globl _RTC_DateStructInit
+ .globl _RTC_GetDate
+ .globl _RTC_SetAlarm
+ .globl _RTC_AlarmStructInit
+ .globl _RTC_GetAlarm
+ .globl _RTC_AlarmCmd
+ .globl _RTC_AlarmSubSecondConfig
+ .globl _RTC_WakeUpClockConfig
+ .globl _RTC_SetWakeUpCounter
+ .globl _RTC_GetWakeUpCounter
+ .globl _RTC_WakeUpCmd
+ .globl _RTC_DayLightSavingConfig
+ .globl _RTC_GetStoreOperation
+ .globl _RTC_OutputConfig
+ .globl _RTC_SynchroShiftConfig
+ .globl _RTC_SmoothCalibConfig
+ .globl _RTC_CalibOutputConfig
+ .globl _RTC_CalibOutputCmd
+ .globl _RTC_TamperLevelConfig
+ .globl _RTC_TamperFilterConfig
+ .globl _RTC_TamperSamplingFreqConfig
+ .globl _RTC_TamperPinsPrechargeDuration
+ .globl _RTC_TamperCmd
+ .globl _RTC_ITConfig
+ .globl _RTC_GetFlagStatus
+ .globl _RTC_ClearFlag
+ .globl _RTC_GetITStatus
+ .globl _RTC_ClearITPendingBit
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area DABS (ABS)
+
+; default segment ordering for linker
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area CONST
+ .area INITIALIZER
+ .area CODE
+
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME
+ .area HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CODE
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 232: ErrorStatus RTC_DeInit(void)
+; -----------------------------------------
+; function RTC_DeInit
+; -----------------------------------------
+_RTC_DeInit:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 239: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 240: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 243: if (RTC_EnterInitMode() == ERROR)
+ call _RTC_EnterInitMode
+ tnz a
+ jrne 00121$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 245: status = ERROR;
+ clr a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 247: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+ ret
+00121$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 252: RTC->TR1 = RTC_TR1_RESET_VALUE;
+ mov 0x5140+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 253: RTC->TR2 = RTC_TR2_RESET_VALUE;
+ mov 0x5141+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 254: RTC->TR3 = RTC_TR3_RESET_VALUE;
+ mov 0x5142+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 257: RTC->DR1 = RTC_DR1_RESET_VALUE;
+ mov 0x5144+0, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 258: RTC->DR2 = RTC_DR2_RESET_VALUE;
+ mov 0x5145+0, #0x21
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 259: RTC->DR3 = RTC_DR3_RESET_VALUE;
+ mov 0x5146+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 262: RTC->SPRERH = RTC_SPRERH_RESET_VALUE;
+ mov 0x5150+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 263: RTC->SPRERL = RTC_SPRERL_RESET_VALUE;
+ mov 0x5151+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 264: RTC->APRER = RTC_APRER_RESET_VALUE;
+ mov 0x5152+0, #0x7f
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 266: RTC->TCR1 = RTC_TCR1_RESET_VALUE;
+ mov 0x516c+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 267: RTC->TCR2 = RTC_TCR2_RESET_VALUE;
+ mov 0x516d+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 271: RTC->CR1 = RTC_CR1_RESET_VALUE;
+ mov 0x5148+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 272: RTC->CR2 = RTC_CR2_RESET_VALUE;
+ mov 0x5149+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 273: RTC->CR3 = RTC_CR3_RESET_VALUE;
+ mov 0x514a+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 276: while (((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET) && ( wutwfcount != WUTWF_TIMEOUT))
+ clrw x
+00102$:
+ btjt 0x514c, #2, 00104$
+ cpw x, #0xffff
+ jreq 00104$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 278: wutwfcount++;
+ incw x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 279: RTC->ISR1 = 0;
+ mov 0x514c+0, #0x00
+ jra 00102$
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 282: if ((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET)
+ btjt 0x514c, #2, 00118$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 284: status = ERROR;
+ clr a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 286: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+ ret
+00118$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 291: RTC->CR1 = RTC_CR1_RESET_VALUE;
+ mov 0x5148+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 294: RTC->WUTRH = RTC_WUTRH_RESET_VALUE;
+ mov 0x5154+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 295: RTC->WUTRL = RTC_WUTRL_RESET_VALUE;
+ mov 0x5155+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 298: RTC->ALRMAR1 = RTC_ALRMAR1_RESET_VALUE;
+ mov 0x515c+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 299: RTC->ALRMAR2 = RTC_ALRMAR2_RESET_VALUE;
+ mov 0x515d+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 300: RTC->ALRMAR3 = RTC_ALRMAR3_RESET_VALUE;
+ mov 0x515e+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 301: RTC->ALRMAR4 = RTC_ALRMAR4_RESET_VALUE;
+ mov 0x515f+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 303: RTC->ALRMASSRH = RTC_ALRMASSRH_RESET_VALUE;
+ mov 0x5164+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 304: RTC->ALRMASSRL = RTC_ALRMASSRL_RESET_VALUE;
+ mov 0x5165+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 305: RTC->ALRMASSMSKR = RTC_ALRMASSMSKR_RESET_VALUE;
+ mov 0x5166+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 308: RTC->ISR1 = (uint8_t)0x00;
+ mov 0x514c+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 309: RTC->ISR2 = RTC_ISR2_RESET_VALUE;
+ mov 0x514d+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 311: if ((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET)
+ btjf 0x514c, #1, 00110$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 313: while (((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET) && (recalpfcount != RECALPF_TIMEOUT))
+ clrw x
+00106$:
+ btjf 0x514c, #1, 00110$
+ cpw x, #0xffff
+ jreq 00110$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 315: recalpfcount++;
+ incw x
+ jra 00106$
+00110$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 318: if ((RTC->ISR1 & RTC_ISR1_RECALPF) == RESET)
+ btjt 0x514c, #1, 00115$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 320: RTC->CALRH = RTC_CALRH_RESET_VALUE;
+ mov 0x516a+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 321: RTC->CALRL = RTC_CALRL_RESET_VALUE;
+ mov 0x516b+0, #0x00
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 323: if (RTC_WaitForSynchro() == ERROR)
+ call _RTC_WaitForSynchro
+ tnz a
+ jrne 00112$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 325: status = ERROR;
+ clr a
+ jra 00116$
+00112$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 329: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 334: status = ERROR;
+ .byte 0x21
+00115$:
+ clr a
+00116$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 338: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 343: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 344: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 359: ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct)
+; -----------------------------------------
+; function RTC_Init
+; -----------------------------------------
+_RTC_Init:
+ sub sp, #3
+ ldw (0x02, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 369: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 370: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 373: if (RTC_EnterInitMode() == ERROR)
+ call _RTC_EnterInitMode
+ tnz a
+ jrne 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 375: status = ERROR;
+ clr a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 380: RTC->CR1 &= ((uint8_t)~( RTC_CR1_FMT ));
+ bres 0x5148, #6
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 383: RTC->CR1 |= ((uint8_t)(RTC_InitStruct->RTC_HourFormat));
+ ld a, 0x5148
+ ld (0x01, sp), a
+ ldw x, (0x02, sp)
+ ld a, (x)
+ or a, (0x01, sp)
+ ld 0x5148, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 386: RTC->SPRERH = (uint8_t)(RTC_InitStruct->RTC_SynchPrediv >> 8);
+ ldw x, (0x02, sp)
+ incw x
+ incw x
+ ld a, (0x1, x)
+ ld a, (x)
+ ld 0x5150, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 387: RTC->SPRERL = (uint8_t)(RTC_InitStruct->RTC_SynchPrediv);
+ ld a, (0x1, x)
+ ld 0x5151, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 388: RTC->APRER = (uint8_t)(RTC_InitStruct->RTC_AsynchPrediv);
+ ldw x, (0x02, sp)
+ ld a, (0x1, x)
+ ld 0x5152, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 391: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ bres 0x514c, #7
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 393: status = SUCCESS;
+ ld a, #0x01
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 397: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 400: return (ErrorStatus)(status);
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 401: }
+ addw sp, #3
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 410: void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct)
+; -----------------------------------------
+; function RTC_StructInit
+; -----------------------------------------
+_RTC_StructInit:
+ exgw x, y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 413: RTC_InitStruct->RTC_HourFormat = RTC_HourFormat_24;
+ clr (y)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 416: RTC_InitStruct->RTC_AsynchPrediv = RTC_APRER_RESET_VALUE;
+ ldw x, y
+ incw x
+ ld a, #0x7f
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 419: RTC_InitStruct->RTC_SynchPrediv = RTC_SPRERL_RESET_VALUE;
+ ldw x, y
+ ldw y, #0x00ff
+ ldw (0x02, x), y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 420: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 430: void RTC_WriteProtectionCmd(FunctionalState NewState)
+; -----------------------------------------
+; function RTC_WriteProtectionCmd
+; -----------------------------------------
+_RTC_WriteProtectionCmd:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 435: if (NewState != DISABLE)
+ tnz a
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 438: RTC->WPR = RTC_WPR_EnableKey;
+ mov 0x5159+0, #0xff
+ ret
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 443: RTC->WPR = RTC_WPR_DisableKey1;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 444: RTC->WPR = RTC_WPR_DisableKey2;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 446: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 458: ErrorStatus RTC_EnterInitMode(void)
+; -----------------------------------------
+; function RTC_EnterInitMode
+; -----------------------------------------
+_RTC_EnterInitMode:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 464: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ btjt 0x514c, #6, 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 467: RTC->ISR1 = (uint8_t)RTC_ISR1_INIT;
+ mov 0x514c+0, #0x80
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 470: while (((RTC->ISR1 & RTC_ISR1_INITF) == RESET) && ( initfcount != INITF_TIMEOUT))
+ clrw x
+00102$:
+ btjt 0x514c, #6, 00106$
+ cpw x, #0xffff
+ jreq 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 472: initfcount++;
+ incw x
+ jra 00102$
+00106$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 476: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ btjt 0x514c, #6, 00108$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 478: status = ERROR;
+ clr a
+ ret
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 482: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 485: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 486: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 498: void RTC_ExitInitMode(void)
+; -----------------------------------------
+; function RTC_ExitInitMode
+; -----------------------------------------
+_RTC_ExitInitMode:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 501: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ bres 0x514c, #7
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 502: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 527: ErrorStatus RTC_WaitForSynchro(void)
+; -----------------------------------------
+; function RTC_WaitForSynchro
+; -----------------------------------------
+_RTC_WaitForSynchro:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 533: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 534: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 537: RTC->ISR1 &= (uint8_t)~(RTC_ISR1_RSF | RTC_ISR1_INIT);
+ ld a, 0x514c
+ and a, #0x5f
+ ld 0x514c, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 540: while (((RTC->ISR1 & RTC_ISR1_RSF) == RESET) && ( rsfcount != RSF_TIMEOUT))
+ clrw x
+00102$:
+ btjt 0x514c, #5, 00104$
+ cpw x, #0xffff
+ jreq 00104$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 542: rsfcount++;
+ incw x
+ jra 00102$
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 546: if ((RTC->ISR1 & RTC_ISR1_RSF) != RESET)
+ btjf 0x514c, #5, 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 548: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 552: status = ERROR;
+ .byte 0x21
+00106$:
+ clr a
+00107$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 556: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 558: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 559: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 568: void RTC_RatioCmd(FunctionalState NewState)
+; -----------------------------------------
+; function RTC_RatioCmd
+; -----------------------------------------
+_RTC_RatioCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 574: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 575: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 580: RTC->CR1 |= (uint8_t)RTC_CR1_RATIO;
+ ld a, 0x5148
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 577: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 580: RTC->CR1 |= (uint8_t)RTC_CR1_RATIO;
+ or a, #0x20
+ ld 0x5148, a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 585: RTC->CR1 &= (uint8_t)~RTC_CR1_RATIO;
+ and a, #0xdf
+ ld 0x5148, a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 589: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 590: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 598: void RTC_BypassShadowCmd(FunctionalState NewState)
+; -----------------------------------------
+; function RTC_BypassShadowCmd
+; -----------------------------------------
+_RTC_BypassShadowCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 604: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 605: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 610: RTC->CR1 |= (uint8_t)RTC_CR1_BYPSHAD;
+ ld a, 0x5148
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 607: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 610: RTC->CR1 |= (uint8_t)RTC_CR1_BYPSHAD;
+ or a, #0x10
+ ld 0x5148, a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 615: RTC->CR1 &= (uint8_t)~RTC_CR1_BYPSHAD;
+ and a, #0xef
+ ld 0x5148, a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 619: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 620: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 659: ErrorStatus RTC_SetTime(RTC_Format_TypeDef RTC_Format,
+; -----------------------------------------
+; function RTC_SetTime
+; -----------------------------------------
+_RTC_SetTime:
+ sub sp, #6
+ ld (0x06, sp), a
+ ldw (0x04, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 671: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ ld a, 0x5148
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 701: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 702: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 705: if (RTC_EnterInitMode() == ERROR)
+ call _RTC_EnterInitMode
+ tnz a
+ jrne 00123$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 707: status = ERROR;
+ clr a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 709: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+ jra 00124$
+00123$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 714: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ btjf 0x5148, #6, 00111$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 717: temp = RTC_TimeStruct->RTC_H12;
+ ldw x, (0x04, sp)
+ ld a, (0x3, x)
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 721: temp = 0;
+ .byte 0xc5
+00111$:
+ clr (0x01, sp)
+00112$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ ldw y, (0x04, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 727: RTC->TR2 = (uint8_t)(RTC_TimeStruct->RTC_Minutes) ;
+ ldw x, (0x04, sp)
+ incw x
+ ldw (0x02, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 728: RTC->TR3 = (uint8_t)( temp | RTC_TimeStruct->RTC_Hours) ;
+ ldw x, (0x04, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ ld a, (0x2, y)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 724: if (RTC_Format != RTC_Format_BIN)
+ tnz (0x06, sp)
+ jreq 00114$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ ld 0x5140, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 727: RTC->TR2 = (uint8_t)(RTC_TimeStruct->RTC_Minutes) ;
+ ldw y, (0x02, sp)
+ ld a, (y)
+ ld 0x5141, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 728: RTC->TR3 = (uint8_t)( temp | RTC_TimeStruct->RTC_Hours) ;
+ ld a, (x)
+ or a, (0x01, sp)
+ ld 0x5142, a
+ jra 00115$
+00114$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 732: RTC->TR1 = (uint8_t)(ByteToBcd2(RTC_TimeStruct->RTC_Seconds));
+ pushw x
+ call _ByteToBcd2
+ popw x
+ ld 0x5140, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 733: RTC->TR2 = (uint8_t)(ByteToBcd2(RTC_TimeStruct->RTC_Minutes)) ;
+ ldw y, (0x02, sp)
+ ld a, (y)
+ pushw x
+ call _ByteToBcd2
+ popw x
+ ld 0x5141, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 734: RTC->TR3 = (uint8_t)( temp | ByteToBcd2(RTC_TimeStruct->RTC_Hours));
+ ld a, (x)
+ call _ByteToBcd2
+ or a, (0x01, sp)
+ ld 0x5142, a
+00115$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 737: (void)(RTC->DR3);
+ ld a, 0x5146
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 740: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ bres 0x514c, #7
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 743: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 746: if ((RTC->CR1 & RTC_CR1_BYPSHAD) == RESET)
+ btjt 0x5148, #4, 00120$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 748: if (RTC_WaitForSynchro() == ERROR)
+ call _RTC_WaitForSynchro
+ tnz a
+ jrne 00117$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 750: status = ERROR;
+ clr a
+ jra 00124$
+00117$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 754: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 759: status = SUCCESS;
+ .byte 0xc5
+00120$:
+ ld a, #0x01
+00124$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 763: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 764: }
+ addw sp, #6
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 775: void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct)
+; -----------------------------------------
+; function RTC_TimeStructInit
+; -----------------------------------------
+_RTC_TimeStructInit:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 778: RTC_TimeStruct->RTC_H12 = RTC_H12_AM;
+ ldw y, x
+ clr (0x0003, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 779: RTC_TimeStruct->RTC_Hours = 0;
+ clr (y)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 780: RTC_TimeStruct->RTC_Minutes = 0;
+ ldw x, y
+ clr (0x01, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 781: RTC_TimeStruct->RTC_Seconds = 0;
+ ldw x, y
+ clr (0x02, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 782: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 798: void RTC_GetTime(RTC_Format_TypeDef RTC_Format,
+; -----------------------------------------
+; function RTC_GetTime
+; -----------------------------------------
+_RTC_GetTime:
+ sub sp, #6
+ ld (0x06, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 808: RTC_TimeStruct->RTC_Seconds = RTC->TR1;
+ ldw y, x
+ incw x
+ incw x
+ ldw (0x01, sp), x
+ ld a, 0x5140
+ ldw x, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 811: RTC_TimeStruct->RTC_Minutes = RTC->TR2;
+ ldw x, y
+ incw x
+ ldw (0x03, sp), x
+ ld a, 0x5141
+ ldw x, (0x03, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 814: tmpreg = (uint8_t)RTC->TR3;
+ ld a, 0x5142
+ ld (0x05, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 817: (void) (RTC->DR3) ;
+ ld a, 0x5146
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 821: RTC_TimeStruct->RTC_Hours = (uint8_t)(tmpreg & (uint8_t)~(RTC_TR3_PM));
+ ldw x, y
+ ld a, (0x05, sp)
+ and a, #0xbf
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 824: RTC_TimeStruct->RTC_H12 = (RTC_H12_TypeDef)(tmpreg & RTC_TR3_PM);
+ addw y, #0x0003
+ ld a, (0x05, sp)
+ and a, #0x40
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 827: if (RTC_Format == RTC_Format_BIN)
+ tnz (0x06, sp)
+ jrne 00103$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 830: RTC_TimeStruct->RTC_Hours = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Hours);
+ ld a, (x)
+ pushw x
+ call _Bcd2ToByte
+ popw x
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 831: RTC_TimeStruct->RTC_Minutes = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Minutes);
+ ldw x, (0x03, sp)
+ ld a, (x)
+ call _Bcd2ToByte
+ ldw x, (0x03, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 832: RTC_TimeStruct->RTC_Seconds = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Seconds);
+ ldw x, (0x01, sp)
+ ld a, (x)
+ call _Bcd2ToByte
+ ldw x, (0x01, sp)
+ ld (x), a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 834: }
+ addw sp, #6
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 845: uint16_t RTC_GetSubSecond(void)
+; -----------------------------------------
+; function RTC_GetSubSecond
+; -----------------------------------------
+_RTC_GetSubSecond:
+ pushw x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 851: ssrhreg = RTC->SSRH;
+ ld a, 0x5157
+ ld xh, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 852: ssrlreg = RTC->SSRL;
+ ld a, 0x5158
+ ld xl, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 855: (void) (RTC->DR3);
+ ld a, 0x5146
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 858: ssrreg = (uint16_t)((uint16_t)((uint16_t)ssrhreg << 8) | (uint16_t)(ssrlreg));
+ clr (0x02, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 859: return (uint16_t)(ssrreg);
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 860: }
+ addw sp, #2
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 876: ErrorStatus RTC_SetDate(RTC_Format_TypeDef RTC_Format,
+; -----------------------------------------
+; function RTC_SetDate
+; -----------------------------------------
+_RTC_SetDate:
+ sub sp, #10
+ ld (0x0a, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 881: if ((RTC_Format == RTC_Format_BIN) && ((RTC_DateStruct->RTC_Month & TEN_VALUE_BCD) == TEN_VALUE_BCD))
+ ldw (0x08, sp), x
+ incw x
+ ldw (0x01, sp), x
+ tnz (0x0a, sp)
+ jrne 00106$
+ ldw x, (0x01, sp)
+ ld a, (x)
+ ld xl, a
+ cpl a
+ bcp a, #0x10
+ jrne 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 883: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)((RTC_DateStruct->RTC_Month & (uint8_t)~(TEN_VALUE_BCD)) + TEN_VALUE_BIN);
+ ld a, xl
+ and a, #0xef
+ add a, #0x0a
+ ldw x, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 902: assert_param(IS_RTC_DATE_MAX(Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Date)));
+00106$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 907: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 908: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 911: if (RTC_EnterInitMode() == ERROR)
+ call _RTC_EnterInitMode
+ tnz a
+ jrne 00117$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 913: status = ERROR;
+ clr a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 915: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+ jra 00118$
+00117$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 919: (void)(RTC->TR1);
+ ld a, 0x5140
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ ldw x, (0x08, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 925: RTC->DR2 = (uint8_t)((RTC_DateStruct->RTC_Month) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ ldw y, (0x08, sp)
+ ldw (0x03, sp), y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 926: RTC->DR3 = (uint8_t)((RTC_DateStruct->RTC_Year));
+ ldw y, (0x08, sp)
+ addw y, #0x0003
+ ldw (0x05, sp), y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ ld a, (0x2, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 922: if (RTC_Format != RTC_Format_BIN)
+ tnz (0x0a, sp)
+ jreq 00108$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ ld 0x5144, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 925: RTC->DR2 = (uint8_t)((RTC_DateStruct->RTC_Month) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ ldw x, (0x01, sp)
+ ld a, (x)
+ ld (0x07, sp), a
+ ldw x, (0x03, sp)
+ ld a, (x)
+ swap a
+ and a, #0xf0
+ sll a
+ or a, (0x07, sp)
+ ld 0x5145, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 926: RTC->DR3 = (uint8_t)((RTC_DateStruct->RTC_Year));
+ ldw x, (0x05, sp)
+ ld a, (x)
+ ld 0x5146, a
+ jra 00109$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 930: RTC->DR1 = (uint8_t)(ByteToBcd2 ((uint8_t)RTC_DateStruct->RTC_Date));
+ call _ByteToBcd2
+ ld 0x5144, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 931: RTC->DR2 = (uint8_t)((ByteToBcd2((uint8_t)RTC_DateStruct->RTC_Month)) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ ldw x, (0x01, sp)
+ ld a, (x)
+ call _ByteToBcd2
+ ld (0x07, sp), a
+ ldw x, (0x03, sp)
+ ld a, (x)
+ swap a
+ and a, #0xf0
+ sll a
+ or a, (0x07, sp)
+ ld 0x5145, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 932: RTC->DR3 = (uint8_t)(ByteToBcd2((uint8_t)RTC_DateStruct->RTC_Year));
+ ldw x, (0x05, sp)
+ ld a, (x)
+ call _ByteToBcd2
+ ld 0x5146, a
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 936: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ bres 0x514c, #7
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 939: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 942: if ((RTC->CR1 & RTC_CR1_BYPSHAD) == RESET)
+ btjt 0x5148, #4, 00114$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 944: if (RTC_WaitForSynchro() == ERROR)
+ call _RTC_WaitForSynchro
+ tnz a
+ jrne 00111$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 946: status = ERROR;
+ clr a
+ jra 00118$
+00111$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 950: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 955: status = SUCCESS;
+ .byte 0xc5
+00114$:
+ ld a, #0x01
+00118$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 959: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 960: }
+ addw sp, #10
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 968: void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct)
+; -----------------------------------------
+; function RTC_DateStructInit
+; -----------------------------------------
+_RTC_DateStructInit:
+ exgw x, y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 971: RTC_DateStruct->RTC_WeekDay = RTC_Weekday_Monday;
+ ld a, #0x01
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 972: RTC_DateStruct->RTC_Date = 1;
+ ldw x, y
+ incw x
+ incw x
+ ld a, #0x01
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 973: RTC_DateStruct->RTC_Month = RTC_Month_January;
+ ldw x, y
+ incw x
+ ld a, #0x01
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 974: RTC_DateStruct->RTC_Year = 0;
+ ldw x, y
+ clr (0x0003, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 975: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 988: void RTC_GetDate(RTC_Format_TypeDef RTC_Format,
+; -----------------------------------------
+; function RTC_GetDate
+; -----------------------------------------
+_RTC_GetDate:
+ sub sp, #6
+ ld (0x06, sp), a
+ exgw x, y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 997: (void) (RTC->TR1) ;
+ ld a, 0x5140
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 998: RTC_DateStruct->RTC_Date = (uint8_t)(RTC->DR1);
+ ldw x, y
+ incw x
+ incw x
+ ldw (0x01, sp), x
+ ld a, 0x5144
+ ldw x, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 999: tmpreg = (uint8_t)RTC->DR2;
+ ld a, 0x5145
+ ld (0x03, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1000: RTC_DateStruct->RTC_Year = (uint8_t)(RTC->DR3);
+ ldw x, y
+ addw x, #0x0003
+ ldw (0x04, sp), x
+ ld a, 0x5146
+ ldw x, (0x04, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1003: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)(tmpreg & (uint8_t)(RTC_DR2_MT | RTC_DR2_MU));
+ ldw x, y
+ incw x
+ ld a, (0x03, sp)
+ and a, #0x1f
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1004: RTC_DateStruct->RTC_WeekDay = (RTC_Weekday_TypeDef)((uint8_t)((uint8_t)tmpreg & (uint8_t)(RTC_DR2_WDU)) >> (uint8_t)5);
+ ld a, (0x03, sp)
+ and a, #0xe0
+ swap a
+ and a, #0x0f
+ srl a
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1007: if (RTC_Format == RTC_Format_BIN)
+ tnz (0x06, sp)
+ jrne 00103$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1010: RTC_DateStruct->RTC_Year = (uint8_t)Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Year);
+ ldw y, (0x04, sp)
+ ld a, (y)
+ pushw x
+ call _Bcd2ToByte
+ popw x
+ ldw y, (0x04, sp)
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1011: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Month);
+ ld a, (x)
+ pushw x
+ call _Bcd2ToByte
+ popw x
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1012: RTC_DateStruct->RTC_Date = (uint8_t)(Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Date));
+ ldw x, (0x01, sp)
+ ld a, (x)
+ call _Bcd2ToByte
+ ldw x, (0x01, sp)
+ ld (x), a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1014: }
+ addw sp, #6
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1044: void RTC_SetAlarm(RTC_Format_TypeDef RTC_Format,
+; -----------------------------------------
+; function RTC_SetAlarm
+; -----------------------------------------
+_RTC_SetAlarm:
+ sub sp, #17
+ ld (0x11, sp), a
+ exgw x, y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1062: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ ld a, 0x5148
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1094: if ((RTC_AlarmStruct->RTC_AlarmMask & RTC_AlarmMask_DateWeekDay) == RESET )
+ ldw x, y
+ addw x, #0x0004
+ ldw (0x05, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1108: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1109: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ ldw (0x01, sp), y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1118: tmpreg2 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) | \
+ ldw x, y
+ incw x
+ ldw (0x03, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1121: tmpreg3 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) | \
+ ldw (0x07, sp), y
+ ldw x, y
+ addw x, #0x0003
+ ldw (0x09, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1125: tmpreg4 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmDateWeekDay) | \
+ ldw x, y
+ addw x, #0x0006
+ ldw (0x0b, sp), x
+ ldw x, y
+ addw x, #0x0005
+ ldw (0x0d, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ ldw x, (0x01, sp)
+ ld a, (0x2, x)
+ ld (0x10, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1113: if (RTC_Format != RTC_Format_BIN)
+ tnz (0x11, sp)
+ jreq 00116$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ ldw x, (0x05, sp)
+ ld a, (x)
+ ld xl, a
+ and a, #0x80
+ or a, (0x10, sp)
+ ld (0x0f, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1118: tmpreg2 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) | \
+ ldw y, (0x03, sp)
+ ld a, (y)
+ ld (0x10, sp), a
+ ld a, xl
+ sll a
+ and a, #0x80
+ or a, (0x10, sp)
+ ld (0x10, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1121: tmpreg3 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) | \
+ ldw y, (0x07, sp)
+ ld a, (y)
+ ld (0x06, sp), a
+ ldw y, (0x09, sp)
+ ld a, (y)
+ or a, (0x06, sp)
+ ld (0x0a, sp), a
+ ld a, xl
+ sll a
+ sll a
+ and a, #0x80
+ or a, (0x0a, sp)
+ ld (0x0a, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1125: tmpreg4 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmDateWeekDay) | \
+ ldw y, (0x0b, sp)
+ ld a, (y)
+ ld (0x09, sp), a
+ ldw y, (0x0d, sp)
+ ld a, (y)
+ or a, (0x09, sp)
+ ld (0x0e, sp), a
+ ld a, xl
+ sll a
+ sll a
+ sll a
+ and a, #0x80
+ or a, (0x0e, sp)
+ jra 00117$
+00116$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1132: tmpreg1 = (uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds)) | \
+ ld a, (0x10, sp)
+ call _ByteToBcd2
+ ld (0x10, sp), a
+ ldw x, (0x05, sp)
+ ld a, (x)
+ and a, #0x80
+ or a, (0x10, sp)
+ ld (0x0f, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1135: tmpreg2 = (uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes)) | \
+ ldw x, (0x03, sp)
+ ld a, (x)
+ call _ByteToBcd2
+ ld (0x10, sp), a
+ ldw x, (0x05, sp)
+ ld a, (x)
+ sll a
+ and a, #0x80
+ or a, (0x10, sp)
+ ld (0x10, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1138: tmpreg3 = (uint8_t)((uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours)) | \
+ ldw x, (0x07, sp)
+ ld a, (x)
+ call _ByteToBcd2
+ ld (0x08, sp), a
+ ldw x, (0x09, sp)
+ ld a, (x)
+ or a, (0x08, sp)
+ ld (0x0a, sp), a
+ ldw x, (0x05, sp)
+ ld a, (x)
+ sll a
+ sll a
+ and a, #0x80
+ or a, (0x0a, sp)
+ ld (0x0a, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1142: tmpreg4 = (uint8_t)((uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmDateWeekDay)) | \
+ ldw x, (0x0b, sp)
+ ld a, (x)
+ call _ByteToBcd2
+ ld (0x0c, sp), a
+ ldw x, (0x0d, sp)
+ ld a, (x)
+ or a, (0x0c, sp)
+ ld (0x0e, sp), a
+ ldw x, (0x05, sp)
+ ld a, (x)
+ sll a
+ sll a
+ sll a
+ and a, #0x80
+ or a, (0x0e, sp)
+00117$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1148: RTC->ALRMAR1 = tmpreg1;
+ ldw x, #0x515c
+ push a
+ ld a, (0x10, sp)
+ ld (x), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1149: RTC->ALRMAR2 = tmpreg2;
+ ldw x, #0x515d
+ push a
+ ld a, (0x11, sp)
+ ld (x), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1150: RTC->ALRMAR3 = tmpreg3;
+ ldw x, #0x515e
+ push a
+ ld a, (0x0b, sp)
+ ld (x), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1151: RTC->ALRMAR4 = tmpreg4;
+ ld 0x515f, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1154: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1155: }
+ addw sp, #17
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1165: void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct)
+; -----------------------------------------
+; function RTC_AlarmStructInit
+; -----------------------------------------
+_RTC_AlarmStructInit:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1168: RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = RTC_H12_AM;
+ ldw y, x
+ clr (0x0003, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1169: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = 0;
+ clr (y)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1170: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = 0;
+ ldw x, y
+ clr (0x01, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1171: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = 0;
+ ldw x, y
+ clr (0x02, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1174: RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = RTC_AlarmDateWeekDaySel_Date;
+ ldw x, y
+ clr (0x0005, x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1175: RTC_AlarmStruct->RTC_AlarmDateWeekDay = 1;
+ ld a, #0x01
+ ld (0x0006, y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1178: RTC_AlarmStruct->RTC_AlarmMask = RTC_AlarmMask_All;
+ ld a, #0xf0
+ ld (0x0004, y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1179: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1188: void RTC_GetAlarm(RTC_Format_TypeDef RTC_Format,
+; -----------------------------------------
+; function RTC_GetAlarm
+; -----------------------------------------
+_RTC_GetAlarm:
+ sub sp, #11
+ ld (0x0b, sp), a
+ ldw (0x09, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1201: tmpreg1 = (uint8_t)RTC->ALRMAR1;
+ ld a, 0x515c
+ ld (0x08, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1202: tmpreg2 = (uint8_t)RTC->ALRMAR2;
+ ld a, 0x515d
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1203: tmpreg3 = (uint8_t)RTC->ALRMAR3;
+ ld a, 0x515e
+ ld (0x02, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1204: tmpreg4 = (uint8_t)RTC->ALRMAR4;
+ ld a, 0x515f
+ ld (0x03, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1207: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = (uint8_t)((uint8_t)tmpreg1 & (uint8_t)((uint8_t)RTC_ALRMAR1_ST | (uint8_t)RTC_ALRMAR1_SU));
+ ldw x, (0x09, sp)
+ incw x
+ incw x
+ ldw (0x04, sp), x
+ ld a, (0x08, sp)
+ and a, #0x7f
+ ldw x, (0x04, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1208: alarmmask = (uint8_t)(tmpreg1 & RTC_ALRMAR1_MSK1);
+ ld a, (0x08, sp)
+ and a, #0x80
+ ld (0x08, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1211: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = (uint8_t)((uint8_t)tmpreg2 & (uint8_t)((uint8_t)RTC_ALRMAR2_MNT | (uint8_t)RTC_ALRMAR2_MNU));
+ ldw x, (0x09, sp)
+ incw x
+ ldw (0x06, sp), x
+ ld a, (0x01, sp)
+ and a, #0x7f
+ ldw x, (0x06, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1212: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)(tmpreg2 & RTC_ALRMAR2_MSK2) >> 1));
+ ld a, (0x01, sp)
+ and a, #0x80
+ srl a
+ or a, (0x08, sp)
+ ld (0x08, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1215: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = (uint8_t)((uint8_t)tmpreg3 & (uint8_t)((uint8_t)RTC_ALRMAR3_HT | (uint8_t)RTC_ALRMAR3_HU));
+ ldw y, (0x09, sp)
+ ld a, (0x02, sp)
+ and a, #0x3f
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1216: RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = (RTC_H12_TypeDef)((uint8_t)tmpreg3 & (uint8_t)RTC_ALRMAR3_PM);
+ ldw x, (0x09, sp)
+ addw x, #0x0003
+ ld a, (0x02, sp)
+ and a, #0x40
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1217: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)((uint8_t)tmpreg3 & (uint8_t)RTC_ALRMAR3_MSK3) >> 2));
+ ld a, (0x02, sp)
+ and a, #0x80
+ srl a
+ srl a
+ or a, (0x08, sp)
+ ld (0x08, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1220: RTC_AlarmStruct->RTC_AlarmDateWeekDay = (uint8_t)((uint8_t)tmpreg4 & (uint8_t)((uint8_t)RTC_ALRMAR4_DT | (uint8_t)RTC_ALRMAR4_DU));
+ ldw x, (0x09, sp)
+ addw x, #0x0006
+ ldw (0x01, sp), x
+ ld a, (0x03, sp)
+ and a, #0x3f
+ ldw x, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1221: RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = (RTC_AlarmDateWeekDaySel_TypeDef)((uint8_t)tmpreg4 & (uint8_t)RTC_ALRMAR4_WDSEL);
+ ldw x, (0x09, sp)
+ addw x, #0x0005
+ ld a, (0x03, sp)
+ and a, #0x40
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1222: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)((uint8_t)tmpreg4 & RTC_ALRMAR4_MSK4) >> 3));
+ ld a, (0x03, sp)
+ and a, #0x80
+ srl a
+ srl a
+ srl a
+ or a, (0x08, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1224: RTC_AlarmStruct->RTC_AlarmMask = alarmmask;
+ ldw x, (0x09, sp)
+ addw x, #0x0004
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1226: if (RTC_Format == RTC_Format_BIN)
+ tnz (0x0b, sp)
+ jrne 00103$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1228: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours);
+ ld a, (y)
+ pushw y
+ call _Bcd2ToByte
+ popw y
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1229: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes);
+ ldw x, (0x06, sp)
+ ld a, (x)
+ call _Bcd2ToByte
+ ldw x, (0x06, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1230: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds);
+ ldw x, (0x04, sp)
+ ld a, (x)
+ call _Bcd2ToByte
+ ldw x, (0x04, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1231: RTC_AlarmStruct->RTC_AlarmDateWeekDay = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmDateWeekDay);
+ ldw x, (0x01, sp)
+ ld a, (x)
+ call _Bcd2ToByte
+ ldw x, (0x01, sp)
+ ld (x), a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1233: }
+ addw sp, #11
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1242: ErrorStatus RTC_AlarmCmd(FunctionalState NewState)
+; -----------------------------------------
+; function RTC_AlarmCmd
+; -----------------------------------------
+_RTC_AlarmCmd:
+ sub sp, #3
+ ld (0x03, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1244: __IO uint16_t alrawfcount = 0;
+ clrw x
+ ldw (0x01, sp), x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1252: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1253: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1258: RTC->CR2 |= (uint8_t)(RTC_CR2_ALRAE);
+ ld a, 0x5149
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1256: if (NewState != DISABLE)
+ tnz (0x03, sp)
+ jreq 00109$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1258: RTC->CR2 |= (uint8_t)(RTC_CR2_ALRAE);
+ or a, #0x01
+ ld 0x5149, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1259: status = SUCCESS;
+ ld a, #0x01
+ jra 00110$
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1263: RTC->CR2 &= (uint8_t)~(RTC_CR2_ALRAE) ;
+ and a, #0xfe
+ ld 0x5149, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1266: temp1 = (uint8_t)(RTC->ISR1 & RTC_ISR1_ALRAWF);
+ ld a, 0x514c
+ and a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1267: while ((alrawfcount != ALRAWF_TIMEOUT) && (temp1 == RESET))
+00102$:
+ ldw x, (0x01, sp)
+ incw x
+ jreq 00104$
+ tnz a
+ jrne 00104$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1269: alrawfcount++;
+ ldw x, (0x01, sp)
+ incw x
+ ldw (0x01, sp), x
+ jra 00102$
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1272: if ((RTC->ISR1 & RTC_ISR1_ALRAWF) == RESET)
+ btjt 0x514c, #0, 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1274: status = ERROR;
+ clr a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1278: status = SUCCESS;
+ .byte 0xc5
+00106$:
+ ld a, #0x01
+00110$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1283: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1286: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1287: }
+ addw sp, #3
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1298: ErrorStatus RTC_AlarmSubSecondConfig(uint16_t RTC_AlarmSubSecondValue,
+; -----------------------------------------
+; function RTC_AlarmSubSecondConfig
+; -----------------------------------------
+_RTC_AlarmSubSecondConfig:
+ pushw x
+ ld (0x02, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1309: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1310: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1313: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ btjt 0x514c, #6, 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1316: alarmstatus = (uint8_t)(RTC->CR2 | RTC_CR2_ALRAE);
+ ld a, 0x5149
+ or a, #0x01
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1319: RTC->CR2 &= (uint8_t)~(RTC_CR2_ALRAE);
+ bres 0x5149, #0
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1322: RTC->ALRMASSRH = (uint8_t)(RTC_AlarmSubSecondValue >> 8);
+ ld a, xh
+ ld 0x5164, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1323: RTC->ALRMASSRL = (uint8_t)(RTC_AlarmSubSecondValue);
+ ld a, xl
+ ld 0x5165, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1324: RTC->ALRMASSMSKR = (uint8_t)RTC_AlarmSubSecondMask;
+ ldw x, #0x5166
+ ld a, (0x02, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1327: RTC->CR2 |= alarmstatus;
+ ld a, 0x5149
+ or a, (0x01, sp)
+ ld 0x5149, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1329: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1333: status = ERROR;
+ .byte 0x21
+00102$:
+ clr a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1337: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1339: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1340: }
+ popw x
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1369: void RTC_WakeUpClockConfig(RTC_WakeUpClock_TypeDef RTC_WakeUpClock)
+; -----------------------------------------
+; function RTC_WakeUpClockConfig
+; -----------------------------------------
+_RTC_WakeUpClockConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1376: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1377: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1380: RTC->CR2 &= (uint8_t)~RTC_CR2_WUTE;
+ bres 0x5149, #2
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1383: RTC->CR1 &= (uint8_t)~RTC_CR1_WUCKSEL;
+ ld a, 0x5148
+ and a, #0xf8
+ ld 0x5148, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1386: RTC->CR1 |= (uint8_t)RTC_WakeUpClock;
+ ld a, 0x5148
+ or a, (0x01, sp)
+ ld 0x5148, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1389: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1390: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1400: void RTC_SetWakeUpCounter(uint16_t RTC_WakeupCounter)
+; -----------------------------------------
+; function RTC_SetWakeUpCounter
+; -----------------------------------------
+_RTC_SetWakeUpCounter:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1403: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1404: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1408: RTC->WUTRH = (uint8_t)(RTC_WakeupCounter >> 8);
+ ld a, xh
+ ld 0x5154, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1409: RTC->WUTRL = (uint8_t)(RTC_WakeupCounter);
+ ld a, xl
+ ld 0x5155, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1412: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1413: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1420: uint16_t RTC_GetWakeUpCounter(void)
+; -----------------------------------------
+; function RTC_GetWakeUpCounter
+; -----------------------------------------
+_RTC_GetWakeUpCounter:
+ pushw x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1425: tmpreg = ((uint16_t)RTC->WUTRH) << 8;
+ ld a, 0x5154
+ ld xh, a
+ clr (0x02, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1426: tmpreg |= RTC->WUTRL;
+ ld a, 0x5155
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1429: return (uint16_t)tmpreg;
+ ld xl, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1430: }
+ addw sp, #2
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1440: ErrorStatus RTC_WakeUpCmd(FunctionalState NewState)
+; -----------------------------------------
+; function RTC_WakeUpCmd
+; -----------------------------------------
+_RTC_WakeUpCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1449: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1450: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1455: RTC->CR2 |= (uint8_t)RTC_CR2_WUTE;
+ ld a, 0x5149
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1452: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00109$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1455: RTC->CR2 |= (uint8_t)RTC_CR2_WUTE;
+ or a, #0x04
+ ld 0x5149, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1457: status = SUCCESS;
+ ld a, #0x01
+ jra 00110$
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1462: RTC->CR2 &= (uint8_t)~RTC_CR2_WUTE;
+ and a, #0xfb
+ ld 0x5149, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1465: while (((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET) && ( wutwfcount != WUTWF_TIMEOUT))
+ clrw x
+00102$:
+ btjt 0x514c, #2, 00104$
+ cpw x, #0xffff
+ jreq 00104$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1467: wutwfcount++;
+ incw x
+ jra 00102$
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1471: if ((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET)
+ btjt 0x514c, #2, 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1473: status = ERROR;
+ clr a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1477: status = SUCCESS;
+ .byte 0xc5
+00106$:
+ ld a, #0x01
+00110$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1482: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1485: return (ErrorStatus)status;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1486: }
+ addw sp, #1
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1522: void RTC_DayLightSavingConfig(RTC_DayLightSaving_TypeDef RTC_DayLightSaving,
+; -----------------------------------------
+; function RTC_DayLightSavingConfig
+; -----------------------------------------
+_RTC_DayLightSavingConfig:
+ push a
+ ld xl, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1530: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1531: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1534: RTC->CR3 &= (uint8_t)~(RTC_CR3_BCK);
+ ld a, 0x514a
+ and a, #0xfb
+ ld 0x514a, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1537: RTC->CR3 |= (uint8_t)((uint8_t)RTC_DayLightSaving | (uint8_t)RTC_StoreOperation);
+ ld a, 0x514a
+ ld (0x01, sp), a
+ ld a, xl
+ or a, (0x04, sp)
+ or a, (0x01, sp)
+ ld 0x514a, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1540: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1541: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1549: RTC_StoreOperation_TypeDef RTC_GetStoreOperation(void)
+; -----------------------------------------
+; function RTC_GetStoreOperation
+; -----------------------------------------
+_RTC_GetStoreOperation:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1552: return (RTC_StoreOperation_TypeDef)(RTC->CR3 & RTC_CR3_BCK);
+ ld a, 0x514a
+ and a, #0x04
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1553: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1587: void RTC_OutputConfig(RTC_Output_TypeDef RTC_Output,
+; -----------------------------------------
+; function RTC_OutputConfig
+; -----------------------------------------
+_RTC_OutputConfig:
+ push a
+ ld xl, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1595: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1596: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1599: RTC->CR3 &= (uint8_t)~(RTC_CR3_OSEL | RTC_CR3_POL);
+ ld a, 0x514a
+ and a, #0x8f
+ ld 0x514a, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1602: RTC->CR3 |= (uint8_t)((uint8_t)RTC_Output | (uint8_t)RTC_OutputPolarity);
+ ld a, 0x514a
+ ld (0x01, sp), a
+ ld a, xl
+ or a, (0x04, sp)
+ or a, (0x01, sp)
+ ld 0x514a, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1605: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1606: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1639: ErrorStatus RTC_SynchroShiftConfig(RTC_ShiftAdd1S_TypeDef RTC_ShiftAdd1S,
+; -----------------------------------------
+; function RTC_SynchroShiftConfig
+; -----------------------------------------
+_RTC_SynchroShiftConfig:
+ push a
+ ld (0x01, sp), a
+ exgw x, y
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1651: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1652: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1655: if ((RTC->ISR1 & RTC_ISR1_SHPF) != RESET)
+ btjf 0x514c, #3, 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1658: while (((RTC->ISR1 & RTC_ISR1_SHPF) != RESET) && (shpfcount != SHPF_TIMEOUT))
+ clrw x
+00102$:
+ btjf 0x514c, #3, 00106$
+ cpw x, #0xffff
+ jreq 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1660: shpfcount++;
+ incw x
+ jra 00102$
+00106$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1665: if ((RTC->ISR1 & RTC_ISR1_SHPF) == RESET)
+ btjt 0x514c, #3, 00108$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1668: shiftrhreg = (uint8_t)((uint8_t)(RTC_ShiftSubFS >> 8) | (uint8_t)(RTC_ShiftAdd1S));
+ ld a, yh
+ or a, (0x01, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1669: RTC->SHIFTRH = (uint8_t)(shiftrhreg);
+ ld 0x515a, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1670: RTC->SHIFTRL = (uint8_t)(RTC_ShiftSubFS);
+ ld a, yl
+ ld 0x515b, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1672: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1676: status = ERROR;
+ .byte 0x21
+00108$:
+ clr a
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1680: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1682: return (ErrorStatus)(status);
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1683: }
+ addw sp, #1
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1718: ErrorStatus RTC_SmoothCalibConfig(RTC_SmoothCalibPeriod_TypeDef RTC_SmoothCalibPeriod,
+; -----------------------------------------
+; function RTC_SmoothCalibConfig
+; -----------------------------------------
+_RTC_SmoothCalibConfig:
+ push a
+ ld yl, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1731: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1732: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1735: if ((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET)
+ btjf 0x514c, #1, 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1738: while (((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET) && (recalpfcount != RECALPF_TIMEOUT))
+ clrw x
+00102$:
+ btjf 0x514c, #1, 00106$
+ cpw x, #0xffff
+ jreq 00106$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1740: recalpfcount++;
+ incw x
+ jra 00102$
+00106$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1746: if ((RTC->ISR1 & RTC_ISR1_RECALPF) == RESET)
+ btjt 0x514c, #1, 00108$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1749: RTC->CALRH = (uint8_t)((uint8_t)((uint8_t)RTC_SmoothCalibPeriod | \
+ ld a, yl
+ or a, (0x04, sp)
+ ld (0x01, sp), a
+ ld a, (0x05, sp)
+ or a, (0x01, sp)
+ ld 0x516a, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1752: RTC->CALRL = (uint8_t)(RTC_SmouthCalibMinusPulsesValue);
+ ld a, (0x06, sp)
+ ld 0x516b, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1754: status = SUCCESS;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1758: status = ERROR;
+ .byte 0x21
+00108$:
+ clr a
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1762: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1764: return (ErrorStatus)(status);
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1765: }
+ ldw x, (2, sp)
+ addw sp, #6
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1790: void RTC_CalibOutputConfig(RTC_CalibOutput_TypeDef RTC_CalibOutput)
+; -----------------------------------------
+; function RTC_CalibOutputConfig
+; -----------------------------------------
+_RTC_CalibOutputConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1796: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1797: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1802: RTC->CR3 |= (uint8_t)RTC_CR3_COSEL;
+ ld a, 0x514a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1799: if (RTC_CalibOutput != RTC_CalibOutput_512Hz)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1802: RTC->CR3 |= (uint8_t)RTC_CR3_COSEL;
+ or a, #0x08
+ ld 0x514a, a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1807: RTC->CR3 &= (uint8_t)~RTC_CR3_COSEL;
+ and a, #0xf7
+ ld 0x514a, a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1811: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1812: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1820: void RTC_CalibOutputCmd(FunctionalState NewState)
+; -----------------------------------------
+; function RTC_CalibOutputCmd
+; -----------------------------------------
+_RTC_CalibOutputCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1826: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1827: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1832: RTC->CR3 |= (uint8_t)RTC_CR3_COE;
+ ld a, 0x514a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1829: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1832: RTC->CR3 |= (uint8_t)RTC_CR3_COE;
+ or a, #0x80
+ ld 0x514a, a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1837: RTC->CR3 &= (uint8_t)~RTC_CR3_COE;
+ and a, #0x7f
+ ld 0x514a, a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1841: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1842: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1871: void RTC_TamperLevelConfig(RTC_Tamper_TypeDef RTC_Tamper,
+; -----------------------------------------
+; function RTC_TamperLevelConfig
+; -----------------------------------------
+_RTC_TamperLevelConfig:
+ push a
+ ld xl, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1879: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1880: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1885: RTC->TCR1 |= (uint8_t)(RTC_Tamper << 1);
+ ld a, 0x516c
+ ld (0x01, sp), a
+ ld a, xl
+ sll a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1882: if (RTC_TamperLevel != RTC_TamperLevel_Low)
+ tnz (0x04, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1885: RTC->TCR1 |= (uint8_t)(RTC_Tamper << 1);
+ or a, (0x01, sp)
+ ld 0x516c, a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1890: RTC->TCR1 &= (uint8_t)~(uint8_t)(RTC_Tamper << 1);
+ cpl a
+ and a, (0x01, sp)
+ ld 0x516c, a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1894: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1895: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1903: void RTC_TamperFilterConfig(RTC_TamperFilter_TypeDef RTC_TamperFilter)
+; -----------------------------------------
+; function RTC_TamperFilterConfig
+; -----------------------------------------
+_RTC_TamperFilterConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1910: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1911: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1914: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPFLT);
+ ld a, 0x516d
+ and a, #0xe7
+ ld 0x516d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1917: RTC->TCR2 |= (uint8_t)RTC_TamperFilter;
+ ld a, 0x516d
+ or a, (0x01, sp)
+ ld 0x516d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1920: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1922: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1931: void RTC_TamperSamplingFreqConfig(RTC_TamperSamplingFreq_TypeDef RTC_TamperSamplingFreq)
+; -----------------------------------------
+; function RTC_TamperSamplingFreqConfig
+; -----------------------------------------
+_RTC_TamperSamplingFreqConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1937: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1938: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1941: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPFREQ);
+ ld a, 0x516d
+ and a, #0xf8
+ ld 0x516d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1944: RTC->TCR2 |= (uint8_t)RTC_TamperSamplingFreq;
+ ld a, 0x516d
+ or a, (0x01, sp)
+ ld 0x516d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1947: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1948: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1958: void RTC_TamperPinsPrechargeDuration(RTC_TamperPrechargeDuration_TypeDef RTC_TamperPrechargeDuration)
+; -----------------------------------------
+; function RTC_TamperPinsPrechargeDuration
+; -----------------------------------------
+_RTC_TamperPinsPrechargeDuration:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1964: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1965: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1968: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPPUDIS | RTC_TCR2_TAMPPRCH);
+ ld a, 0x516d
+ and a, #0x1f
+ ld 0x516d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1971: RTC->TCR2 |= (uint8_t)RTC_TamperPrechargeDuration;
+ ld a, 0x516d
+ or a, (0x01, sp)
+ ld 0x516d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1974: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1975: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1987: void RTC_TamperCmd(RTC_Tamper_TypeDef RTC_Tamper,
+; -----------------------------------------
+; function RTC_TamperCmd
+; -----------------------------------------
+_RTC_TamperCmd:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1996: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1997: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2003: RTC->TCR1 |= (uint8_t)RTC_Tamper;
+ ldw x, #0x516c
+ push a
+ ld a, (x)
+ ld (0x02, sp), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2000: if (NewState != DISABLE)
+ tnz (0x04, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2003: RTC->TCR1 |= (uint8_t)RTC_Tamper;
+ or a, (0x01, sp)
+ ld 0x516c, a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2008: RTC->TCR1 &= (uint8_t)~RTC_Tamper;
+ cpl a
+ and a, (0x01, sp)
+ ld 0x516c, a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2013: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2014: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2058: void RTC_ITConfig(RTC_IT_TypeDef RTC_IT, FunctionalState NewState)
+; -----------------------------------------
+; function RTC_ITConfig
+; -----------------------------------------
+_RTC_ITConfig:
+ sub sp, #3
+ ld (0x03, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2065: RTC->WPR = 0xCA;
+ mov 0x5159+0, #0xca
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2066: RTC->WPR = 0x53;
+ mov 0x5159+0, #0x53
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2071: RTC->CR2 |= (uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ ld a, 0x5149
+ ld (0x02, sp), a
+ ld a, xl
+ and a, #0xf0
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2072: RTC->TCR1 |= (uint8_t)((uint16_t)RTC_IT & RTC_TCR1_TAMPIE);
+ push a
+ ld a, xl
+ and a, #0x01
+ ld (0x02, sp), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2068: if (NewState != DISABLE)
+ tnz (0x03, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2071: RTC->CR2 |= (uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ or a, (0x02, sp)
+ ld 0x5149, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2072: RTC->TCR1 |= (uint8_t)((uint16_t)RTC_IT & RTC_TCR1_TAMPIE);
+ ld a, 0x516c
+ or a, (0x01, sp)
+ ld 0x516c, a
+ jra 00103$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2077: RTC->CR2 &= (uint8_t)~(uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ cpl a
+ and a, (0x02, sp)
+ ld 0x5149, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2078: RTC->TCR1 &= (uint8_t)~(uint8_t)((uint16_t)RTC_IT & (uint16_t)RTC_TCR1_TAMPIE);
+ ld a, 0x516c
+ ld (0x02, sp), a
+ ld a, (0x01, sp)
+ cpl a
+ and a, (0x02, sp)
+ ld 0x516c, a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2082: RTC->WPR = 0xFF;
+ mov 0x5159+0, #0xff
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2083: }
+ addw sp, #3
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2090: FlagStatus RTC_GetFlagStatus(RTC_Flag_TypeDef RTC_FLAG)
+; -----------------------------------------
+; function RTC_GetFlagStatus
+; -----------------------------------------
+_RTC_GetFlagStatus:
+ sub sp, #6
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2100: tmpreg2 = (uint16_t)((uint16_t)RTC->ISR1 << 8);
+ ld a, 0x514c
+ ld yl, a
+ clr (0x02, sp)
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2101: tmpreg1 = (uint16_t)((uint16_t)((uint16_t)(RTC->ISR2)) | tmpreg2);
+ ld a, 0x514d
+ clr (0x03, sp)
+ ld (0x06, sp), a
+ exg a, yl
+ ld (0x05, sp), a
+ exg a, yl
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2104: if ((tmpreg1 & (uint16_t)RTC_FLAG) != RESET)
+ ld a, xl
+ and a, (0x06, sp)
+ rlwa x
+ and a, (0x05, sp)
+ ld xh, a
+ tnzw x
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2106: flagstatus = SET;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2110: flagstatus = RESET;
+ .byte 0x21
+00102$:
+ clr a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2112: return (FlagStatus)flagstatus;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2113: }
+ addw sp, #6
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2122: void RTC_ClearFlag(RTC_Flag_TypeDef RTC_FLAG)
+; -----------------------------------------
+; function RTC_ClearFlag
+; -----------------------------------------
+_RTC_ClearFlag:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2128: RTC->ISR2 = (uint8_t)~((uint8_t)RTC_FLAG) ;
+ ld a, xl
+ cpl a
+ ld 0x514d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2129: RTC->ISR1 = (uint8_t)(((uint8_t)~(uint8_t)((uint16_t)RTC_FLAG >> (uint8_t)8)) & ((uint8_t)~(uint8_t)(RTC_ISR1_INIT)));
+ ld a, xh
+ cpl a
+ and a, #0x7f
+ ld 0x514c, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2130: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2138: ITStatus RTC_GetITStatus(RTC_IT_TypeDef RTC_IT)
+; -----------------------------------------
+; function RTC_GetITStatus
+; -----------------------------------------
+_RTC_GetITStatus:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2147: enablestatus = (uint8_t)(RTC->CR2 & (uint16_t)RTC_IT);
+ ld a, 0x5149
+ ld (0x01, sp), a
+ ld a, xl
+ and a, (0x01, sp)
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2150: tmpreg = (uint8_t)(RTC->ISR2 & (uint8_t)((uint16_t)RTC_IT >> 4));
+ ld a, 0x514d
+ srlw x
+ srlw x
+ srlw x
+ srlw x
+ pushw x
+ and a, (2, sp)
+ popw x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2153: if ((enablestatus != (uint8_t)RESET) && (tmpreg != (uint8_t)RESET))
+ tnz (0x01, sp)
+ jreq 00102$
+ tnz a
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2155: itstatus = SET;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2159: itstatus = RESET;
+ .byte 0x21
+00102$:
+ clr a
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2162: return (ITStatus)itstatus;
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2163: }
+ addw sp, #1
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2172: void RTC_ClearITPendingBit(RTC_IT_TypeDef RTC_IT)
+; -----------------------------------------
+; function RTC_ClearITPendingBit
+; -----------------------------------------
+_RTC_ClearITPendingBit:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2178: RTC->ISR2 = (uint8_t)~(uint8_t)((uint16_t)RTC_IT >> 4);
+ ld a, #0x10
+ div x, a
+ ld a, xl
+ cpl a
+ ld 0x514d, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2179: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2202: static uint8_t ByteToBcd2(uint8_t Value)
+; -----------------------------------------
+; function ByteToBcd2
+; -----------------------------------------
+_ByteToBcd2:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2206: while (Value >= 10)
+ clrw x
+00101$:
+ cp a, #0x0a
+ jrc 00103$
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2208: bcdhigh++;
+ incw x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2209: Value -= 10;
+ sub a, #0x0a
+ jra 00101$
+00103$:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2212: return (uint8_t)((uint8_t)(bcdhigh << 4) | Value);
+ sllw x
+ sllw x
+ sllw x
+ sllw x
+ pushw x
+ or a, (2, sp)
+ popw x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2213: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2220: static uint8_t Bcd2ToByte(uint8_t Value)
+; -----------------------------------------
+; function Bcd2ToByte
+; -----------------------------------------
+_Bcd2ToByte:
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2224: tmp = (uint8_t)((uint8_t)((uint8_t)(Value & (uint8_t)0xF0) >> 4) * (uint8_t)10);
+ ld yl, a
+ and a, #0xf0
+ swap a
+ and a, #0x0f
+ ld xl, a
+ ld a, #0x0a
+ mul x, a
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2226: return (uint8_t)(tmp + (Value & (uint8_t)0x0F));
+ ld a, yl
+ and a, #0x0f
+ pushw x
+ add a, (2, sp)
+ popw x
+; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2227: }
+ ret
+ .area CODE
+ .area CONST
+ .area INITIALIZER
+ .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_rtc.lst b/firmware/STM8L15X_LD/stm8l15x_rtc.lst
new file mode 100644
index 0000000..f4ca554
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_rtc.lst
@@ -0,0 +1,1969 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_rtc
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _RTC_DeInit
+ 11 .globl _RTC_Init
+ 12 .globl _RTC_StructInit
+ 13 .globl _RTC_WriteProtectionCmd
+ 14 .globl _RTC_EnterInitMode
+ 15 .globl _RTC_ExitInitMode
+ 16 .globl _RTC_WaitForSynchro
+ 17 .globl _RTC_RatioCmd
+ 18 .globl _RTC_BypassShadowCmd
+ 19 .globl _RTC_SetTime
+ 20 .globl _RTC_TimeStructInit
+ 21 .globl _RTC_GetTime
+ 22 .globl _RTC_GetSubSecond
+ 23 .globl _RTC_SetDate
+ 24 .globl _RTC_DateStructInit
+ 25 .globl _RTC_GetDate
+ 26 .globl _RTC_SetAlarm
+ 27 .globl _RTC_AlarmStructInit
+ 28 .globl _RTC_GetAlarm
+ 29 .globl _RTC_AlarmCmd
+ 30 .globl _RTC_AlarmSubSecondConfig
+ 31 .globl _RTC_WakeUpClockConfig
+ 32 .globl _RTC_SetWakeUpCounter
+ 33 .globl _RTC_GetWakeUpCounter
+ 34 .globl _RTC_WakeUpCmd
+ 35 .globl _RTC_DayLightSavingConfig
+ 36 .globl _RTC_GetStoreOperation
+ 37 .globl _RTC_OutputConfig
+ 38 .globl _RTC_SynchroShiftConfig
+ 39 .globl _RTC_SmoothCalibConfig
+ 40 .globl _RTC_CalibOutputConfig
+ 41 .globl _RTC_CalibOutputCmd
+ 42 .globl _RTC_TamperLevelConfig
+ 43 .globl _RTC_TamperFilterConfig
+ 44 .globl _RTC_TamperSamplingFreqConfig
+ 45 .globl _RTC_TamperPinsPrechargeDuration
+ 46 .globl _RTC_TamperCmd
+ 47 .globl _RTC_ITConfig
+ 48 .globl _RTC_GetFlagStatus
+ 49 .globl _RTC_ClearFlag
+ 50 .globl _RTC_GetITStatus
+ 51 .globl _RTC_ClearITPendingBit
+ 52 ;--------------------------------------------------------
+ 53 ; ram data
+ 54 ;--------------------------------------------------------
+ 55 .area DATA
+ 56 ;--------------------------------------------------------
+ 57 ; ram data
+ 58 ;--------------------------------------------------------
+ 59 .area INITIALIZED
+ 60 ;--------------------------------------------------------
+ 61 ; absolute external ram data
+ 62 ;--------------------------------------------------------
+ 63 .area DABS (ABS)
+ 64
+ 65 ; default segment ordering for linker
+ 66 .area HOME
+ 67 .area GSINIT
+ 68 .area GSFINAL
+ 69 .area CONST
+ 70 .area INITIALIZER
+ 71 .area CODE
+ 72
+ 73 ;--------------------------------------------------------
+ 74 ; global & static initialisations
+ 75 ;--------------------------------------------------------
+ 76 .area HOME
+ 77 .area GSINIT
+ 78 .area GSFINAL
+ 79 .area GSINIT
+ 80 ;--------------------------------------------------------
+ 81 ; Home
+ 82 ;--------------------------------------------------------
+ 83 .area HOME
+ 84 .area HOME
+ 85 ;--------------------------------------------------------
+ 86 ; code
+ 87 ;--------------------------------------------------------
+ 88 .area CODE
+ 89 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 232: ErrorStatus RTC_DeInit(void)
+ 90 ; -----------------------------------------
+ 91 ; function RTC_DeInit
+ 92 ; -----------------------------------------
+ 000000 93 _RTC_DeInit:
+ 94 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 239: RTC->WPR = 0xCA;
+ 000000 35 CA 51 59 [ 1] 95 mov 0x5159+0, #0xca
+ 96 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 240: RTC->WPR = 0x53;
+ 000004 35 53 51 59 [ 1] 97 mov 0x5159+0, #0x53
+ 98 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 243: if (RTC_EnterInitMode() == ERROR)
+ 000008 CDr01r35 [ 4] 99 call _RTC_EnterInitMode
+ 00000B 4D [ 1] 100 tnz a
+ 00000C 26 06 [ 1] 101 jrne 00121$
+ 102 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 245: status = ERROR;
+ 00000E 4F [ 1] 103 clr a
+ 104 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 247: RTC->WPR = 0xFF;
+ 00000F 35 FF 51 59 [ 1] 105 mov 0x5159+0, #0xff
+ 000013 81 [ 4] 106 ret
+ 000014 107 00121$:
+ 108 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 252: RTC->TR1 = RTC_TR1_RESET_VALUE;
+ 000014 35 00 51 40 [ 1] 109 mov 0x5140+0, #0x00
+ 110 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 253: RTC->TR2 = RTC_TR2_RESET_VALUE;
+ 000018 35 00 51 41 [ 1] 111 mov 0x5141+0, #0x00
+ 112 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 254: RTC->TR3 = RTC_TR3_RESET_VALUE;
+ 00001C 35 00 51 42 [ 1] 113 mov 0x5142+0, #0x00
+ 114 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 257: RTC->DR1 = RTC_DR1_RESET_VALUE;
+ 000020 35 01 51 44 [ 1] 115 mov 0x5144+0, #0x01
+ 116 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 258: RTC->DR2 = RTC_DR2_RESET_VALUE;
+ 000024 35 21 51 45 [ 1] 117 mov 0x5145+0, #0x21
+ 118 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 259: RTC->DR3 = RTC_DR3_RESET_VALUE;
+ 000028 35 00 51 46 [ 1] 119 mov 0x5146+0, #0x00
+ 120 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 262: RTC->SPRERH = RTC_SPRERH_RESET_VALUE;
+ 00002C 35 00 51 50 [ 1] 121 mov 0x5150+0, #0x00
+ 122 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 263: RTC->SPRERL = RTC_SPRERL_RESET_VALUE;
+ 000030 35 FF 51 51 [ 1] 123 mov 0x5151+0, #0xff
+ 124 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 264: RTC->APRER = RTC_APRER_RESET_VALUE;
+ 000034 35 7F 51 52 [ 1] 125 mov 0x5152+0, #0x7f
+ 126 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 266: RTC->TCR1 = RTC_TCR1_RESET_VALUE;
+ 000038 35 00 51 6C [ 1] 127 mov 0x516c+0, #0x00
+ 128 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 267: RTC->TCR2 = RTC_TCR2_RESET_VALUE;
+ 00003C 35 00 51 6D [ 1] 129 mov 0x516d+0, #0x00
+ 130 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 271: RTC->CR1 = RTC_CR1_RESET_VALUE;
+ 000040 35 00 51 48 [ 1] 131 mov 0x5148+0, #0x00
+ 132 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 272: RTC->CR2 = RTC_CR2_RESET_VALUE;
+ 000044 35 00 51 49 [ 1] 133 mov 0x5149+0, #0x00
+ 134 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 273: RTC->CR3 = RTC_CR3_RESET_VALUE;
+ 000048 35 00 51 4A [ 1] 135 mov 0x514a+0, #0x00
+ 136 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 276: while (((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET) && ( wutwfcount != WUTWF_TIMEOUT))
+ 00004C 5F [ 1] 137 clrw x
+ 00004D 138 00102$:
+ 00004D 72 04 51 4C 0C [ 2] 139 btjt 0x514c, #2, 00104$
+ 000052 A3 FF FF [ 2] 140 cpw x, #0xffff
+ 000055 27 07 [ 1] 141 jreq 00104$
+ 142 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 278: wutwfcount++;
+ 000057 5C [ 1] 143 incw x
+ 144 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 279: RTC->ISR1 = 0;
+ 000058 35 00 51 4C [ 1] 145 mov 0x514c+0, #0x00
+ 00005C 20 EF [ 2] 146 jra 00102$
+ 00005E 147 00104$:
+ 148 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 282: if ((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET)
+ 00005E 72 04 51 4C 06 [ 2] 149 btjt 0x514c, #2, 00118$
+ 150 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 284: status = ERROR;
+ 000063 4F [ 1] 151 clr a
+ 152 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 286: RTC->WPR = 0xFF;
+ 000064 35 FF 51 59 [ 1] 153 mov 0x5159+0, #0xff
+ 000068 81 [ 4] 154 ret
+ 000069 155 00118$:
+ 156 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 291: RTC->CR1 = RTC_CR1_RESET_VALUE;
+ 000069 35 00 51 48 [ 1] 157 mov 0x5148+0, #0x00
+ 158 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 294: RTC->WUTRH = RTC_WUTRH_RESET_VALUE;
+ 00006D 35 FF 51 54 [ 1] 159 mov 0x5154+0, #0xff
+ 160 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 295: RTC->WUTRL = RTC_WUTRL_RESET_VALUE;
+ 000071 35 FF 51 55 [ 1] 161 mov 0x5155+0, #0xff
+ 162 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 298: RTC->ALRMAR1 = RTC_ALRMAR1_RESET_VALUE;
+ 000075 35 00 51 5C [ 1] 163 mov 0x515c+0, #0x00
+ 164 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 299: RTC->ALRMAR2 = RTC_ALRMAR2_RESET_VALUE;
+ 000079 35 00 51 5D [ 1] 165 mov 0x515d+0, #0x00
+ 166 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 300: RTC->ALRMAR3 = RTC_ALRMAR3_RESET_VALUE;
+ 00007D 35 00 51 5E [ 1] 167 mov 0x515e+0, #0x00
+ 168 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 301: RTC->ALRMAR4 = RTC_ALRMAR4_RESET_VALUE;
+ 000081 35 00 51 5F [ 1] 169 mov 0x515f+0, #0x00
+ 170 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 303: RTC->ALRMASSRH = RTC_ALRMASSRH_RESET_VALUE;
+ 000085 35 00 51 64 [ 1] 171 mov 0x5164+0, #0x00
+ 172 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 304: RTC->ALRMASSRL = RTC_ALRMASSRL_RESET_VALUE;
+ 000089 35 00 51 65 [ 1] 173 mov 0x5165+0, #0x00
+ 174 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 305: RTC->ALRMASSMSKR = RTC_ALRMASSMSKR_RESET_VALUE;
+ 00008D 35 00 51 66 [ 1] 175 mov 0x5166+0, #0x00
+ 176 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 308: RTC->ISR1 = (uint8_t)0x00;
+ 000091 35 00 51 4C [ 1] 177 mov 0x514c+0, #0x00
+ 178 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 309: RTC->ISR2 = RTC_ISR2_RESET_VALUE;
+ 000095 35 00 51 4D [ 1] 179 mov 0x514d+0, #0x00
+ 180 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 311: if ((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET)
+ 000099 72 03 51 4C 0E [ 2] 181 btjf 0x514c, #1, 00110$
+ 182 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 313: while (((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET) && (recalpfcount != RECALPF_TIMEOUT))
+ 00009E 5F [ 1] 183 clrw x
+ 00009F 184 00106$:
+ 00009F 72 03 51 4C 08 [ 2] 185 btjf 0x514c, #1, 00110$
+ 0000A4 A3 FF FF [ 2] 186 cpw x, #0xffff
+ 0000A7 27 03 [ 1] 187 jreq 00110$
+ 188 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 315: recalpfcount++;
+ 0000A9 5C [ 1] 189 incw x
+ 0000AA 20 F3 [ 2] 190 jra 00106$
+ 0000AC 191 00110$:
+ 192 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 318: if ((RTC->ISR1 & RTC_ISR1_RECALPF) == RESET)
+ 0000AC 72 02 51 4C 14 [ 2] 193 btjt 0x514c, #1, 00115$
+ 194 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 320: RTC->CALRH = RTC_CALRH_RESET_VALUE;
+ 0000B1 35 00 51 6A [ 1] 195 mov 0x516a+0, #0x00
+ 196 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 321: RTC->CALRL = RTC_CALRL_RESET_VALUE;
+ 0000B5 35 00 51 6B [ 1] 197 mov 0x516b+0, #0x00
+ 198 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 323: if (RTC_WaitForSynchro() == ERROR)
+ 0000B9 CDr01r5B [ 4] 199 call _RTC_WaitForSynchro
+ 0000BC 4D [ 1] 200 tnz a
+ 0000BD 26 03 [ 1] 201 jrne 00112$
+ 202 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 325: status = ERROR;
+ 0000BF 4F [ 1] 203 clr a
+ 0000C0 20 04 [ 2] 204 jra 00116$
+ 0000C2 205 00112$:
+ 206 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 329: status = SUCCESS;
+ 0000C2 A6 01 [ 1] 207 ld a, #0x01
+ 208 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 334: status = ERROR;
+ 0000C4 21 209 .byte 0x21
+ 0000C5 210 00115$:
+ 0000C5 4F [ 1] 211 clr a
+ 0000C6 212 00116$:
+ 213 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 338: RTC->WPR = 0xFF;
+ 0000C6 35 FF 51 59 [ 1] 214 mov 0x5159+0, #0xff
+ 215 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 343: return (ErrorStatus)status;
+ 216 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 344: }
+ 0000CA 81 [ 4] 217 ret
+ 218 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 359: ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct)
+ 219 ; -----------------------------------------
+ 220 ; function RTC_Init
+ 221 ; -----------------------------------------
+ 0000CB 222 _RTC_Init:
+ 0000CB 52 03 [ 2] 223 sub sp, #3
+ 0000CD 1F 02 [ 2] 224 ldw (0x02, sp), x
+ 225 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 369: RTC->WPR = 0xCA;
+ 0000CF 35 CA 51 59 [ 1] 226 mov 0x5159+0, #0xca
+ 227 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 370: RTC->WPR = 0x53;
+ 0000D3 35 53 51 59 [ 1] 228 mov 0x5159+0, #0x53
+ 229 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 373: if (RTC_EnterInitMode() == ERROR)
+ 0000D7 CDr01r35 [ 4] 230 call _RTC_EnterInitMode
+ 0000DA 4D [ 1] 231 tnz a
+ 0000DB 26 03 [ 1] 232 jrne 00102$
+ 233 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 375: status = ERROR;
+ 0000DD 4F [ 1] 234 clr a
+ 0000DE 20 2D [ 2] 235 jra 00103$
+ 0000E0 236 00102$:
+ 237 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 380: RTC->CR1 &= ((uint8_t)~( RTC_CR1_FMT ));
+ 0000E0 72 1D 51 48 [ 1] 238 bres 0x5148, #6
+ 239 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 383: RTC->CR1 |= ((uint8_t)(RTC_InitStruct->RTC_HourFormat));
+ 0000E4 C6 51 48 [ 1] 240 ld a, 0x5148
+ 0000E7 6B 01 [ 1] 241 ld (0x01, sp), a
+ 0000E9 1E 02 [ 2] 242 ldw x, (0x02, sp)
+ 0000EB F6 [ 1] 243 ld a, (x)
+ 0000EC 1A 01 [ 1] 244 or a, (0x01, sp)
+ 0000EE C7 51 48 [ 1] 245 ld 0x5148, a
+ 246 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 386: RTC->SPRERH = (uint8_t)(RTC_InitStruct->RTC_SynchPrediv >> 8);
+ 0000F1 1E 02 [ 2] 247 ldw x, (0x02, sp)
+ 0000F3 5C [ 1] 248 incw x
+ 0000F4 5C [ 1] 249 incw x
+ 0000F5 E6 01 [ 1] 250 ld a, (0x1, x)
+ 0000F7 F6 [ 1] 251 ld a, (x)
+ 0000F8 C7 51 50 [ 1] 252 ld 0x5150, a
+ 253 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 387: RTC->SPRERL = (uint8_t)(RTC_InitStruct->RTC_SynchPrediv);
+ 0000FB E6 01 [ 1] 254 ld a, (0x1, x)
+ 0000FD C7 51 51 [ 1] 255 ld 0x5151, a
+ 256 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 388: RTC->APRER = (uint8_t)(RTC_InitStruct->RTC_AsynchPrediv);
+ 000100 1E 02 [ 2] 257 ldw x, (0x02, sp)
+ 000102 E6 01 [ 1] 258 ld a, (0x1, x)
+ 000104 C7 51 52 [ 1] 259 ld 0x5152, a
+ 260 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 391: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 000107 72 1F 51 4C [ 1] 261 bres 0x514c, #7
+ 262 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 393: status = SUCCESS;
+ 00010B A6 01 [ 1] 263 ld a, #0x01
+ 00010D 264 00103$:
+ 265 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 397: RTC->WPR = 0xFF;
+ 00010D 35 FF 51 59 [ 1] 266 mov 0x5159+0, #0xff
+ 267 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 400: return (ErrorStatus)(status);
+ 268 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 401: }
+ 000111 5B 03 [ 2] 269 addw sp, #3
+ 000113 81 [ 4] 270 ret
+ 271 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 410: void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct)
+ 272 ; -----------------------------------------
+ 273 ; function RTC_StructInit
+ 274 ; -----------------------------------------
+ 000114 275 _RTC_StructInit:
+ 000114 51 [ 1] 276 exgw x, y
+ 277 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 413: RTC_InitStruct->RTC_HourFormat = RTC_HourFormat_24;
+ 000115 90 7F [ 1] 278 clr (y)
+ 279 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 416: RTC_InitStruct->RTC_AsynchPrediv = RTC_APRER_RESET_VALUE;
+ 000117 93 [ 1] 280 ldw x, y
+ 000118 5C [ 1] 281 incw x
+ 000119 A6 7F [ 1] 282 ld a, #0x7f
+ 00011B F7 [ 1] 283 ld (x), a
+ 284 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 419: RTC_InitStruct->RTC_SynchPrediv = RTC_SPRERL_RESET_VALUE;
+ 00011C 93 [ 1] 285 ldw x, y
+ 00011D 90 AE 00 FF [ 2] 286 ldw y, #0x00ff
+ 000121 EF 02 [ 2] 287 ldw (0x02, x), y
+ 288 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 420: }
+ 000123 81 [ 4] 289 ret
+ 290 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 430: void RTC_WriteProtectionCmd(FunctionalState NewState)
+ 291 ; -----------------------------------------
+ 292 ; function RTC_WriteProtectionCmd
+ 293 ; -----------------------------------------
+ 000124 294 _RTC_WriteProtectionCmd:
+ 295 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 435: if (NewState != DISABLE)
+ 000124 4D [ 1] 296 tnz a
+ 000125 27 05 [ 1] 297 jreq 00102$
+ 298 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 438: RTC->WPR = RTC_WPR_EnableKey;
+ 000127 35 FF 51 59 [ 1] 299 mov 0x5159+0, #0xff
+ 00012B 81 [ 4] 300 ret
+ 00012C 301 00102$:
+ 302 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 443: RTC->WPR = RTC_WPR_DisableKey1;
+ 00012C 35 CA 51 59 [ 1] 303 mov 0x5159+0, #0xca
+ 304 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 444: RTC->WPR = RTC_WPR_DisableKey2;
+ 000130 35 53 51 59 [ 1] 305 mov 0x5159+0, #0x53
+ 306 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 446: }
+ 000134 81 [ 4] 307 ret
+ 308 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 458: ErrorStatus RTC_EnterInitMode(void)
+ 309 ; -----------------------------------------
+ 310 ; function RTC_EnterInitMode
+ 311 ; -----------------------------------------
+ 000135 312 _RTC_EnterInitMode:
+ 313 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 464: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ 000135 72 0C 51 4C 12 [ 2] 314 btjt 0x514c, #6, 00106$
+ 315 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 467: RTC->ISR1 = (uint8_t)RTC_ISR1_INIT;
+ 00013A 35 80 51 4C [ 1] 316 mov 0x514c+0, #0x80
+ 317 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 470: while (((RTC->ISR1 & RTC_ISR1_INITF) == RESET) && ( initfcount != INITF_TIMEOUT))
+ 00013E 5F [ 1] 318 clrw x
+ 00013F 319 00102$:
+ 00013F 72 0C 51 4C 08 [ 2] 320 btjt 0x514c, #6, 00106$
+ 000144 A3 FF FF [ 2] 321 cpw x, #0xffff
+ 000147 27 03 [ 1] 322 jreq 00106$
+ 323 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 472: initfcount++;
+ 000149 5C [ 1] 324 incw x
+ 00014A 20 F3 [ 2] 325 jra 00102$
+ 00014C 326 00106$:
+ 327 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 476: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ 00014C 72 0C 51 4C 02 [ 2] 328 btjt 0x514c, #6, 00108$
+ 329 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 478: status = ERROR;
+ 000151 4F [ 1] 330 clr a
+ 000152 81 [ 4] 331 ret
+ 000153 332 00108$:
+ 333 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 482: status = SUCCESS;
+ 000153 A6 01 [ 1] 334 ld a, #0x01
+ 335 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 485: return (ErrorStatus)status;
+ 336 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 486: }
+ 000155 81 [ 4] 337 ret
+ 338 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 498: void RTC_ExitInitMode(void)
+ 339 ; -----------------------------------------
+ 340 ; function RTC_ExitInitMode
+ 341 ; -----------------------------------------
+ 000156 342 _RTC_ExitInitMode:
+ 343 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 501: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 000156 72 1F 51 4C [ 1] 344 bres 0x514c, #7
+ 345 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 502: }
+ 00015A 81 [ 4] 346 ret
+ 347 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 527: ErrorStatus RTC_WaitForSynchro(void)
+ 348 ; -----------------------------------------
+ 349 ; function RTC_WaitForSynchro
+ 350 ; -----------------------------------------
+ 00015B 351 _RTC_WaitForSynchro:
+ 352 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 533: RTC->WPR = 0xCA;
+ 00015B 35 CA 51 59 [ 1] 353 mov 0x5159+0, #0xca
+ 354 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 534: RTC->WPR = 0x53;
+ 00015F 35 53 51 59 [ 1] 355 mov 0x5159+0, #0x53
+ 356 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 537: RTC->ISR1 &= (uint8_t)~(RTC_ISR1_RSF | RTC_ISR1_INIT);
+ 000163 C6 51 4C [ 1] 357 ld a, 0x514c
+ 000166 A4 5F [ 1] 358 and a, #0x5f
+ 000168 C7 51 4C [ 1] 359 ld 0x514c, a
+ 360 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 540: while (((RTC->ISR1 & RTC_ISR1_RSF) == RESET) && ( rsfcount != RSF_TIMEOUT))
+ 00016B 5F [ 1] 361 clrw x
+ 00016C 362 00102$:
+ 00016C 72 0A 51 4C 08 [ 2] 363 btjt 0x514c, #5, 00104$
+ 000171 A3 FF FF [ 2] 364 cpw x, #0xffff
+ 000174 27 03 [ 1] 365 jreq 00104$
+ 366 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 542: rsfcount++;
+ 000176 5C [ 1] 367 incw x
+ 000177 20 F3 [ 2] 368 jra 00102$
+ 000179 369 00104$:
+ 370 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 546: if ((RTC->ISR1 & RTC_ISR1_RSF) != RESET)
+ 000179 72 0B 51 4C 03 [ 2] 371 btjf 0x514c, #5, 00106$
+ 372 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 548: status = SUCCESS;
+ 00017E A6 01 [ 1] 373 ld a, #0x01
+ 374 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 552: status = ERROR;
+ 000180 21 375 .byte 0x21
+ 000181 376 00106$:
+ 000181 4F [ 1] 377 clr a
+ 000182 378 00107$:
+ 379 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 556: RTC->WPR = 0xFF;
+ 000182 35 FF 51 59 [ 1] 380 mov 0x5159+0, #0xff
+ 381 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 558: return (ErrorStatus)status;
+ 382 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 559: }
+ 000186 81 [ 4] 383 ret
+ 384 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 568: void RTC_RatioCmd(FunctionalState NewState)
+ 385 ; -----------------------------------------
+ 386 ; function RTC_RatioCmd
+ 387 ; -----------------------------------------
+ 000187 388 _RTC_RatioCmd:
+ 000187 88 [ 1] 389 push a
+ 000188 6B 01 [ 1] 390 ld (0x01, sp), a
+ 391 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 574: RTC->WPR = 0xCA;
+ 00018A 35 CA 51 59 [ 1] 392 mov 0x5159+0, #0xca
+ 393 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 575: RTC->WPR = 0x53;
+ 00018E 35 53 51 59 [ 1] 394 mov 0x5159+0, #0x53
+ 395 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 580: RTC->CR1 |= (uint8_t)RTC_CR1_RATIO;
+ 000192 C6 51 48 [ 1] 396 ld a, 0x5148
+ 397 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 577: if (NewState != DISABLE)
+ 000195 0D 01 [ 1] 398 tnz (0x01, sp)
+ 000197 27 07 [ 1] 399 jreq 00102$
+ 400 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 580: RTC->CR1 |= (uint8_t)RTC_CR1_RATIO;
+ 000199 AA 20 [ 1] 401 or a, #0x20
+ 00019B C7 51 48 [ 1] 402 ld 0x5148, a
+ 00019E 20 05 [ 2] 403 jra 00103$
+ 0001A0 404 00102$:
+ 405 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 585: RTC->CR1 &= (uint8_t)~RTC_CR1_RATIO;
+ 0001A0 A4 DF [ 1] 406 and a, #0xdf
+ 0001A2 C7 51 48 [ 1] 407 ld 0x5148, a
+ 0001A5 408 00103$:
+ 409 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 589: RTC->WPR = 0xFF;
+ 0001A5 35 FF 51 59 [ 1] 410 mov 0x5159+0, #0xff
+ 411 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 590: }
+ 0001A9 84 [ 1] 412 pop a
+ 0001AA 81 [ 4] 413 ret
+ 414 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 598: void RTC_BypassShadowCmd(FunctionalState NewState)
+ 415 ; -----------------------------------------
+ 416 ; function RTC_BypassShadowCmd
+ 417 ; -----------------------------------------
+ 0001AB 418 _RTC_BypassShadowCmd:
+ 0001AB 88 [ 1] 419 push a
+ 0001AC 6B 01 [ 1] 420 ld (0x01, sp), a
+ 421 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 604: RTC->WPR = 0xCA;
+ 0001AE 35 CA 51 59 [ 1] 422 mov 0x5159+0, #0xca
+ 423 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 605: RTC->WPR = 0x53;
+ 0001B2 35 53 51 59 [ 1] 424 mov 0x5159+0, #0x53
+ 425 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 610: RTC->CR1 |= (uint8_t)RTC_CR1_BYPSHAD;
+ 0001B6 C6 51 48 [ 1] 426 ld a, 0x5148
+ 427 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 607: if (NewState != DISABLE)
+ 0001B9 0D 01 [ 1] 428 tnz (0x01, sp)
+ 0001BB 27 07 [ 1] 429 jreq 00102$
+ 430 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 610: RTC->CR1 |= (uint8_t)RTC_CR1_BYPSHAD;
+ 0001BD AA 10 [ 1] 431 or a, #0x10
+ 0001BF C7 51 48 [ 1] 432 ld 0x5148, a
+ 0001C2 20 05 [ 2] 433 jra 00103$
+ 0001C4 434 00102$:
+ 435 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 615: RTC->CR1 &= (uint8_t)~RTC_CR1_BYPSHAD;
+ 0001C4 A4 EF [ 1] 436 and a, #0xef
+ 0001C6 C7 51 48 [ 1] 437 ld 0x5148, a
+ 0001C9 438 00103$:
+ 439 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 619: RTC->WPR = 0xFF;
+ 0001C9 35 FF 51 59 [ 1] 440 mov 0x5159+0, #0xff
+ 441 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 620: }
+ 0001CD 84 [ 1] 442 pop a
+ 0001CE 81 [ 4] 443 ret
+ 444 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 659: ErrorStatus RTC_SetTime(RTC_Format_TypeDef RTC_Format,
+ 445 ; -----------------------------------------
+ 446 ; function RTC_SetTime
+ 447 ; -----------------------------------------
+ 0001CF 448 _RTC_SetTime:
+ 0001CF 52 06 [ 2] 449 sub sp, #6
+ 0001D1 6B 06 [ 1] 450 ld (0x06, sp), a
+ 0001D3 1F 04 [ 2] 451 ldw (0x04, sp), x
+ 452 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 671: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ 0001D5 C6 51 48 [ 1] 453 ld a, 0x5148
+ 454 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 701: RTC->WPR = 0xCA;
+ 0001D8 35 CA 51 59 [ 1] 455 mov 0x5159+0, #0xca
+ 456 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 702: RTC->WPR = 0x53;
+ 0001DC 35 53 51 59 [ 1] 457 mov 0x5159+0, #0x53
+ 458 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 705: if (RTC_EnterInitMode() == ERROR)
+ 0001E0 CDr01r35 [ 4] 459 call _RTC_EnterInitMode
+ 0001E3 4D [ 1] 460 tnz a
+ 0001E4 26 07 [ 1] 461 jrne 00123$
+ 462 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 707: status = ERROR;
+ 0001E6 4F [ 1] 463 clr a
+ 464 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 709: RTC->WPR = 0xFF;
+ 0001E7 35 FF 51 59 [ 1] 465 mov 0x5159+0, #0xff
+ 0001EB 20 6B [ 2] 466 jra 00124$
+ 0001ED 467 00123$:
+ 468 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 714: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ 0001ED 72 0D 51 48 07 [ 2] 469 btjf 0x5148, #6, 00111$
+ 470 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 717: temp = RTC_TimeStruct->RTC_H12;
+ 0001F2 1E 04 [ 2] 471 ldw x, (0x04, sp)
+ 0001F4 E6 03 [ 1] 472 ld a, (0x3, x)
+ 0001F6 6B 01 [ 1] 473 ld (0x01, sp), a
+ 474 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 721: temp = 0;
+ 0001F8 C5 475 .byte 0xc5
+ 0001F9 476 00111$:
+ 0001F9 0F 01 [ 1] 477 clr (0x01, sp)
+ 0001FB 478 00112$:
+ 479 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ 0001FB 16 04 [ 2] 480 ldw y, (0x04, sp)
+ 481 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 727: RTC->TR2 = (uint8_t)(RTC_TimeStruct->RTC_Minutes) ;
+ 0001FD 1E 04 [ 2] 482 ldw x, (0x04, sp)
+ 0001FF 5C [ 1] 483 incw x
+ 000200 1F 02 [ 2] 484 ldw (0x02, sp), x
+ 485 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 728: RTC->TR3 = (uint8_t)( temp | RTC_TimeStruct->RTC_Hours) ;
+ 000202 1E 04 [ 2] 486 ldw x, (0x04, sp)
+ 487 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ 000204 90 E6 02 [ 1] 488 ld a, (0x2, y)
+ 489 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 724: if (RTC_Format != RTC_Format_BIN)
+ 000207 0D 06 [ 1] 490 tnz (0x06, sp)
+ 000209 27 12 [ 1] 491 jreq 00114$
+ 492 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ 00020B C7 51 40 [ 1] 493 ld 0x5140, a
+ 494 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 727: RTC->TR2 = (uint8_t)(RTC_TimeStruct->RTC_Minutes) ;
+ 00020E 16 02 [ 2] 495 ldw y, (0x02, sp)
+ 000210 90 F6 [ 1] 496 ld a, (y)
+ 000212 C7 51 41 [ 1] 497 ld 0x5141, a
+ 498 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 728: RTC->TR3 = (uint8_t)( temp | RTC_TimeStruct->RTC_Hours) ;
+ 000215 F6 [ 1] 499 ld a, (x)
+ 000216 1A 01 [ 1] 500 or a, (0x01, sp)
+ 000218 C7 51 42 [ 1] 501 ld 0x5142, a
+ 00021B 20 1D [ 2] 502 jra 00115$
+ 00021D 503 00114$:
+ 504 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 732: RTC->TR1 = (uint8_t)(ByteToBcd2(RTC_TimeStruct->RTC_Seconds));
+ 00021D 89 [ 2] 505 pushw x
+ 00021E CDr09r23 [ 4] 506 call _ByteToBcd2
+ 000221 85 [ 2] 507 popw x
+ 000222 C7 51 40 [ 1] 508 ld 0x5140, a
+ 509 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 733: RTC->TR2 = (uint8_t)(ByteToBcd2(RTC_TimeStruct->RTC_Minutes)) ;
+ 000225 16 02 [ 2] 510 ldw y, (0x02, sp)
+ 000227 90 F6 [ 1] 511 ld a, (y)
+ 000229 89 [ 2] 512 pushw x
+ 00022A CDr09r23 [ 4] 513 call _ByteToBcd2
+ 00022D 85 [ 2] 514 popw x
+ 00022E C7 51 41 [ 1] 515 ld 0x5141, a
+ 516 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 734: RTC->TR3 = (uint8_t)( temp | ByteToBcd2(RTC_TimeStruct->RTC_Hours));
+ 000231 F6 [ 1] 517 ld a, (x)
+ 000232 CDr09r23 [ 4] 518 call _ByteToBcd2
+ 000235 1A 01 [ 1] 519 or a, (0x01, sp)
+ 000237 C7 51 42 [ 1] 520 ld 0x5142, a
+ 00023A 521 00115$:
+ 522 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 737: (void)(RTC->DR3);
+ 00023A C6 51 46 [ 1] 523 ld a, 0x5146
+ 524 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 740: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 00023D 72 1F 51 4C [ 1] 525 bres 0x514c, #7
+ 526 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 743: RTC->WPR = 0xFF;
+ 000241 35 FF 51 59 [ 1] 527 mov 0x5159+0, #0xff
+ 528 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 746: if ((RTC->CR1 & RTC_CR1_BYPSHAD) == RESET)
+ 000245 72 08 51 48 0C [ 2] 529 btjt 0x5148, #4, 00120$
+ 530 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 748: if (RTC_WaitForSynchro() == ERROR)
+ 00024A CDr01r5B [ 4] 531 call _RTC_WaitForSynchro
+ 00024D 4D [ 1] 532 tnz a
+ 00024E 26 03 [ 1] 533 jrne 00117$
+ 534 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 750: status = ERROR;
+ 000250 4F [ 1] 535 clr a
+ 000251 20 05 [ 2] 536 jra 00124$
+ 000253 537 00117$:
+ 538 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 754: status = SUCCESS;
+ 000253 A6 01 [ 1] 539 ld a, #0x01
+ 540 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 759: status = SUCCESS;
+ 000255 C5 541 .byte 0xc5
+ 000256 542 00120$:
+ 000256 A6 01 [ 1] 543 ld a, #0x01
+ 000258 544 00124$:
+ 545 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 763: return (ErrorStatus)status;
+ 546 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 764: }
+ 000258 5B 06 [ 2] 547 addw sp, #6
+ 00025A 81 [ 4] 548 ret
+ 549 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 775: void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct)
+ 550 ; -----------------------------------------
+ 551 ; function RTC_TimeStructInit
+ 552 ; -----------------------------------------
+ 00025B 553 _RTC_TimeStructInit:
+ 554 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 778: RTC_TimeStruct->RTC_H12 = RTC_H12_AM;
+ 00025B 90 93 [ 1] 555 ldw y, x
+ 00025D 6F 03 [ 1] 556 clr (0x0003, x)
+ 557 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 779: RTC_TimeStruct->RTC_Hours = 0;
+ 00025F 90 7F [ 1] 558 clr (y)
+ 559 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 780: RTC_TimeStruct->RTC_Minutes = 0;
+ 000261 93 [ 1] 560 ldw x, y
+ 000262 6F 01 [ 1] 561 clr (0x01, x)
+ 562 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 781: RTC_TimeStruct->RTC_Seconds = 0;
+ 000264 93 [ 1] 563 ldw x, y
+ 000265 6F 02 [ 1] 564 clr (0x02, x)
+ 565 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 782: }
+ 000267 81 [ 4] 566 ret
+ 567 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 798: void RTC_GetTime(RTC_Format_TypeDef RTC_Format,
+ 568 ; -----------------------------------------
+ 569 ; function RTC_GetTime
+ 570 ; -----------------------------------------
+ 000268 571 _RTC_GetTime:
+ 000268 52 06 [ 2] 572 sub sp, #6
+ 00026A 6B 06 [ 1] 573 ld (0x06, sp), a
+ 574 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 808: RTC_TimeStruct->RTC_Seconds = RTC->TR1;
+ 00026C 90 93 [ 1] 575 ldw y, x
+ 00026E 5C [ 1] 576 incw x
+ 00026F 5C [ 1] 577 incw x
+ 000270 1F 01 [ 2] 578 ldw (0x01, sp), x
+ 000272 C6 51 40 [ 1] 579 ld a, 0x5140
+ 000275 1E 01 [ 2] 580 ldw x, (0x01, sp)
+ 000277 F7 [ 1] 581 ld (x), a
+ 582 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 811: RTC_TimeStruct->RTC_Minutes = RTC->TR2;
+ 000278 93 [ 1] 583 ldw x, y
+ 000279 5C [ 1] 584 incw x
+ 00027A 1F 03 [ 2] 585 ldw (0x03, sp), x
+ 00027C C6 51 41 [ 1] 586 ld a, 0x5141
+ 00027F 1E 03 [ 2] 587 ldw x, (0x03, sp)
+ 000281 F7 [ 1] 588 ld (x), a
+ 589 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 814: tmpreg = (uint8_t)RTC->TR3;
+ 000282 C6 51 42 [ 1] 590 ld a, 0x5142
+ 000285 6B 05 [ 1] 591 ld (0x05, sp), a
+ 592 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 817: (void) (RTC->DR3) ;
+ 000287 C6 51 46 [ 1] 593 ld a, 0x5146
+ 594 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 821: RTC_TimeStruct->RTC_Hours = (uint8_t)(tmpreg & (uint8_t)~(RTC_TR3_PM));
+ 00028A 93 [ 1] 595 ldw x, y
+ 00028B 7B 05 [ 1] 596 ld a, (0x05, sp)
+ 00028D A4 BF [ 1] 597 and a, #0xbf
+ 00028F F7 [ 1] 598 ld (x), a
+ 599 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 824: RTC_TimeStruct->RTC_H12 = (RTC_H12_TypeDef)(tmpreg & RTC_TR3_PM);
+ 000290 72 A9 00 03 [ 2] 600 addw y, #0x0003
+ 000294 7B 05 [ 1] 601 ld a, (0x05, sp)
+ 000296 A4 40 [ 1] 602 and a, #0x40
+ 000298 90 F7 [ 1] 603 ld (y), a
+ 604 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 827: if (RTC_Format == RTC_Format_BIN)
+ 00029A 0D 06 [ 1] 605 tnz (0x06, sp)
+ 00029C 26 19 [ 1] 606 jrne 00103$
+ 607 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 830: RTC_TimeStruct->RTC_Hours = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Hours);
+ 00029E F6 [ 1] 608 ld a, (x)
+ 00029F 89 [ 2] 609 pushw x
+ 0002A0 CDr09r36 [ 4] 610 call _Bcd2ToByte
+ 0002A3 85 [ 2] 611 popw x
+ 0002A4 F7 [ 1] 612 ld (x), a
+ 613 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 831: RTC_TimeStruct->RTC_Minutes = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Minutes);
+ 0002A5 1E 03 [ 2] 614 ldw x, (0x03, sp)
+ 0002A7 F6 [ 1] 615 ld a, (x)
+ 0002A8 CDr09r36 [ 4] 616 call _Bcd2ToByte
+ 0002AB 1E 03 [ 2] 617 ldw x, (0x03, sp)
+ 0002AD F7 [ 1] 618 ld (x), a
+ 619 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 832: RTC_TimeStruct->RTC_Seconds = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Seconds);
+ 0002AE 1E 01 [ 2] 620 ldw x, (0x01, sp)
+ 0002B0 F6 [ 1] 621 ld a, (x)
+ 0002B1 CDr09r36 [ 4] 622 call _Bcd2ToByte
+ 0002B4 1E 01 [ 2] 623 ldw x, (0x01, sp)
+ 0002B6 F7 [ 1] 624 ld (x), a
+ 0002B7 625 00103$:
+ 626 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 834: }
+ 0002B7 5B 06 [ 2] 627 addw sp, #6
+ 0002B9 81 [ 4] 628 ret
+ 629 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 845: uint16_t RTC_GetSubSecond(void)
+ 630 ; -----------------------------------------
+ 631 ; function RTC_GetSubSecond
+ 632 ; -----------------------------------------
+ 0002BA 633 _RTC_GetSubSecond:
+ 0002BA 89 [ 2] 634 pushw x
+ 635 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 851: ssrhreg = RTC->SSRH;
+ 0002BB C6 51 57 [ 1] 636 ld a, 0x5157
+ 0002BE 95 [ 1] 637 ld xh, a
+ 638 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 852: ssrlreg = RTC->SSRL;
+ 0002BF C6 51 58 [ 1] 639 ld a, 0x5158
+ 0002C2 97 [ 1] 640 ld xl, a
+ 641 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 855: (void) (RTC->DR3);
+ 0002C3 C6 51 46 [ 1] 642 ld a, 0x5146
+ 643 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 858: ssrreg = (uint16_t)((uint16_t)((uint16_t)ssrhreg << 8) | (uint16_t)(ssrlreg));
+ 0002C6 0F 02 [ 1] 644 clr (0x02, sp)
+ 645 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 859: return (uint16_t)(ssrreg);
+ 646 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 860: }
+ 0002C8 5B 02 [ 2] 647 addw sp, #2
+ 0002CA 81 [ 4] 648 ret
+ 649 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 876: ErrorStatus RTC_SetDate(RTC_Format_TypeDef RTC_Format,
+ 650 ; -----------------------------------------
+ 651 ; function RTC_SetDate
+ 652 ; -----------------------------------------
+ 0002CB 653 _RTC_SetDate:
+ 0002CB 52 0A [ 2] 654 sub sp, #10
+ 0002CD 6B 0A [ 1] 655 ld (0x0a, sp), a
+ 656 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 881: if ((RTC_Format == RTC_Format_BIN) && ((RTC_DateStruct->RTC_Month & TEN_VALUE_BCD) == TEN_VALUE_BCD))
+ 0002CF 1F 08 [ 2] 657 ldw (0x08, sp), x
+ 0002D1 5C [ 1] 658 incw x
+ 0002D2 1F 01 [ 2] 659 ldw (0x01, sp), x
+ 0002D4 0D 0A [ 1] 660 tnz (0x0a, sp)
+ 0002D6 26 11 [ 1] 661 jrne 00106$
+ 0002D8 1E 01 [ 2] 662 ldw x, (0x01, sp)
+ 0002DA F6 [ 1] 663 ld a, (x)
+ 0002DB 97 [ 1] 664 ld xl, a
+ 0002DC 43 [ 1] 665 cpl a
+ 0002DD A5 10 [ 1] 666 bcp a, #0x10
+ 0002DF 26 08 [ 1] 667 jrne 00106$
+ 668 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 883: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)((RTC_DateStruct->RTC_Month & (uint8_t)~(TEN_VALUE_BCD)) + TEN_VALUE_BIN);
+ 0002E1 9F [ 1] 669 ld a, xl
+ 0002E2 A4 EF [ 1] 670 and a, #0xef
+ 0002E4 AB 0A [ 1] 671 add a, #0x0a
+ 0002E6 1E 01 [ 2] 672 ldw x, (0x01, sp)
+ 0002E8 F7 [ 1] 673 ld (x), a
+ 674 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 902: assert_param(IS_RTC_DATE_MAX(Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Date)));
+ 0002E9 675 00106$:
+ 676 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 907: RTC->WPR = 0xCA;
+ 0002E9 35 CA 51 59 [ 1] 677 mov 0x5159+0, #0xca
+ 678 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 908: RTC->WPR = 0x53;
+ 0002ED 35 53 51 59 [ 1] 679 mov 0x5159+0, #0x53
+ 680 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 911: if (RTC_EnterInitMode() == ERROR)
+ 0002F1 CDr01r35 [ 4] 681 call _RTC_EnterInitMode
+ 0002F4 4D [ 1] 682 tnz a
+ 0002F5 26 07 [ 1] 683 jrne 00117$
+ 684 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 913: status = ERROR;
+ 0002F7 4F [ 1] 685 clr a
+ 686 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 915: RTC->WPR = 0xFF;
+ 0002F8 35 FF 51 59 [ 1] 687 mov 0x5159+0, #0xff
+ 0002FC 20 71 [ 2] 688 jra 00118$
+ 0002FE 689 00117$:
+ 690 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 919: (void)(RTC->TR1);
+ 0002FE C6 51 40 [ 1] 691 ld a, 0x5140
+ 692 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ 000301 1E 08 [ 2] 693 ldw x, (0x08, sp)
+ 694 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 925: RTC->DR2 = (uint8_t)((RTC_DateStruct->RTC_Month) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ 000303 16 08 [ 2] 695 ldw y, (0x08, sp)
+ 000305 17 03 [ 2] 696 ldw (0x03, sp), y
+ 697 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 926: RTC->DR3 = (uint8_t)((RTC_DateStruct->RTC_Year));
+ 000307 16 08 [ 2] 698 ldw y, (0x08, sp)
+ 000309 72 A9 00 03 [ 2] 699 addw y, #0x0003
+ 00030D 17 05 [ 2] 700 ldw (0x05, sp), y
+ 701 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ 00030F E6 02 [ 1] 702 ld a, (0x2, x)
+ 703 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 922: if (RTC_Format != RTC_Format_BIN)
+ 000311 0D 0A [ 1] 704 tnz (0x0a, sp)
+ 000313 27 1C [ 1] 705 jreq 00108$
+ 706 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ 000315 C7 51 44 [ 1] 707 ld 0x5144, a
+ 708 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 925: RTC->DR2 = (uint8_t)((RTC_DateStruct->RTC_Month) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ 000318 1E 01 [ 2] 709 ldw x, (0x01, sp)
+ 00031A F6 [ 1] 710 ld a, (x)
+ 00031B 6B 07 [ 1] 711 ld (0x07, sp), a
+ 00031D 1E 03 [ 2] 712 ldw x, (0x03, sp)
+ 00031F F6 [ 1] 713 ld a, (x)
+ 000320 4E [ 1] 714 swap a
+ 000321 A4 F0 [ 1] 715 and a, #0xf0
+ 000323 48 [ 1] 716 sll a
+ 000324 1A 07 [ 1] 717 or a, (0x07, sp)
+ 000326 C7 51 45 [ 1] 718 ld 0x5145, a
+ 719 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 926: RTC->DR3 = (uint8_t)((RTC_DateStruct->RTC_Year));
+ 000329 1E 05 [ 2] 720 ldw x, (0x05, sp)
+ 00032B F6 [ 1] 721 ld a, (x)
+ 00032C C7 51 46 [ 1] 722 ld 0x5146, a
+ 00032F 20 23 [ 2] 723 jra 00109$
+ 000331 724 00108$:
+ 725 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 930: RTC->DR1 = (uint8_t)(ByteToBcd2 ((uint8_t)RTC_DateStruct->RTC_Date));
+ 000331 CDr09r23 [ 4] 726 call _ByteToBcd2
+ 000334 C7 51 44 [ 1] 727 ld 0x5144, a
+ 728 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 931: RTC->DR2 = (uint8_t)((ByteToBcd2((uint8_t)RTC_DateStruct->RTC_Month)) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ 000337 1E 01 [ 2] 729 ldw x, (0x01, sp)
+ 000339 F6 [ 1] 730 ld a, (x)
+ 00033A CDr09r23 [ 4] 731 call _ByteToBcd2
+ 00033D 6B 07 [ 1] 732 ld (0x07, sp), a
+ 00033F 1E 03 [ 2] 733 ldw x, (0x03, sp)
+ 000341 F6 [ 1] 734 ld a, (x)
+ 000342 4E [ 1] 735 swap a
+ 000343 A4 F0 [ 1] 736 and a, #0xf0
+ 000345 48 [ 1] 737 sll a
+ 000346 1A 07 [ 1] 738 or a, (0x07, sp)
+ 000348 C7 51 45 [ 1] 739 ld 0x5145, a
+ 740 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 932: RTC->DR3 = (uint8_t)(ByteToBcd2((uint8_t)RTC_DateStruct->RTC_Year));
+ 00034B 1E 05 [ 2] 741 ldw x, (0x05, sp)
+ 00034D F6 [ 1] 742 ld a, (x)
+ 00034E CDr09r23 [ 4] 743 call _ByteToBcd2
+ 000351 C7 51 46 [ 1] 744 ld 0x5146, a
+ 000354 745 00109$:
+ 746 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 936: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 000354 72 1F 51 4C [ 1] 747 bres 0x514c, #7
+ 748 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 939: RTC->WPR = 0xFF;
+ 000358 35 FF 51 59 [ 1] 749 mov 0x5159+0, #0xff
+ 750 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 942: if ((RTC->CR1 & RTC_CR1_BYPSHAD) == RESET)
+ 00035C 72 08 51 48 0C [ 2] 751 btjt 0x5148, #4, 00114$
+ 752 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 944: if (RTC_WaitForSynchro() == ERROR)
+ 000361 CDr01r5B [ 4] 753 call _RTC_WaitForSynchro
+ 000364 4D [ 1] 754 tnz a
+ 000365 26 03 [ 1] 755 jrne 00111$
+ 756 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 946: status = ERROR;
+ 000367 4F [ 1] 757 clr a
+ 000368 20 05 [ 2] 758 jra 00118$
+ 00036A 759 00111$:
+ 760 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 950: status = SUCCESS;
+ 00036A A6 01 [ 1] 761 ld a, #0x01
+ 762 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 955: status = SUCCESS;
+ 00036C C5 763 .byte 0xc5
+ 00036D 764 00114$:
+ 00036D A6 01 [ 1] 765 ld a, #0x01
+ 00036F 766 00118$:
+ 767 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 959: return (ErrorStatus)status;
+ 768 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 960: }
+ 00036F 5B 0A [ 2] 769 addw sp, #10
+ 000371 81 [ 4] 770 ret
+ 771 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 968: void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct)
+ 772 ; -----------------------------------------
+ 773 ; function RTC_DateStructInit
+ 774 ; -----------------------------------------
+ 000372 775 _RTC_DateStructInit:
+ 000372 51 [ 1] 776 exgw x, y
+ 777 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 971: RTC_DateStruct->RTC_WeekDay = RTC_Weekday_Monday;
+ 000373 A6 01 [ 1] 778 ld a, #0x01
+ 000375 90 F7 [ 1] 779 ld (y), a
+ 780 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 972: RTC_DateStruct->RTC_Date = 1;
+ 000377 93 [ 1] 781 ldw x, y
+ 000378 5C [ 1] 782 incw x
+ 000379 5C [ 1] 783 incw x
+ 00037A A6 01 [ 1] 784 ld a, #0x01
+ 00037C F7 [ 1] 785 ld (x), a
+ 786 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 973: RTC_DateStruct->RTC_Month = RTC_Month_January;
+ 00037D 93 [ 1] 787 ldw x, y
+ 00037E 5C [ 1] 788 incw x
+ 00037F A6 01 [ 1] 789 ld a, #0x01
+ 000381 F7 [ 1] 790 ld (x), a
+ 791 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 974: RTC_DateStruct->RTC_Year = 0;
+ 000382 93 [ 1] 792 ldw x, y
+ 000383 6F 03 [ 1] 793 clr (0x0003, x)
+ 794 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 975: }
+ 000385 81 [ 4] 795 ret
+ 796 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 988: void RTC_GetDate(RTC_Format_TypeDef RTC_Format,
+ 797 ; -----------------------------------------
+ 798 ; function RTC_GetDate
+ 799 ; -----------------------------------------
+ 000386 800 _RTC_GetDate:
+ 000386 52 06 [ 2] 801 sub sp, #6
+ 000388 6B 06 [ 1] 802 ld (0x06, sp), a
+ 00038A 51 [ 1] 803 exgw x, y
+ 804 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 997: (void) (RTC->TR1) ;
+ 00038B C6 51 40 [ 1] 805 ld a, 0x5140
+ 806 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 998: RTC_DateStruct->RTC_Date = (uint8_t)(RTC->DR1);
+ 00038E 93 [ 1] 807 ldw x, y
+ 00038F 5C [ 1] 808 incw x
+ 000390 5C [ 1] 809 incw x
+ 000391 1F 01 [ 2] 810 ldw (0x01, sp), x
+ 000393 C6 51 44 [ 1] 811 ld a, 0x5144
+ 000396 1E 01 [ 2] 812 ldw x, (0x01, sp)
+ 000398 F7 [ 1] 813 ld (x), a
+ 814 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 999: tmpreg = (uint8_t)RTC->DR2;
+ 000399 C6 51 45 [ 1] 815 ld a, 0x5145
+ 00039C 6B 03 [ 1] 816 ld (0x03, sp), a
+ 817 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1000: RTC_DateStruct->RTC_Year = (uint8_t)(RTC->DR3);
+ 00039E 93 [ 1] 818 ldw x, y
+ 00039F 1C 00 03 [ 2] 819 addw x, #0x0003
+ 0003A2 1F 04 [ 2] 820 ldw (0x04, sp), x
+ 0003A4 C6 51 46 [ 1] 821 ld a, 0x5146
+ 0003A7 1E 04 [ 2] 822 ldw x, (0x04, sp)
+ 0003A9 F7 [ 1] 823 ld (x), a
+ 824 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1003: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)(tmpreg & (uint8_t)(RTC_DR2_MT | RTC_DR2_MU));
+ 0003AA 93 [ 1] 825 ldw x, y
+ 0003AB 5C [ 1] 826 incw x
+ 0003AC 7B 03 [ 1] 827 ld a, (0x03, sp)
+ 0003AE A4 1F [ 1] 828 and a, #0x1f
+ 0003B0 F7 [ 1] 829 ld (x), a
+ 830 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1004: RTC_DateStruct->RTC_WeekDay = (RTC_Weekday_TypeDef)((uint8_t)((uint8_t)tmpreg & (uint8_t)(RTC_DR2_WDU)) >> (uint8_t)5);
+ 0003B1 7B 03 [ 1] 831 ld a, (0x03, sp)
+ 0003B3 A4 E0 [ 1] 832 and a, #0xe0
+ 0003B5 4E [ 1] 833 swap a
+ 0003B6 A4 0F [ 1] 834 and a, #0x0f
+ 0003B8 44 [ 1] 835 srl a
+ 0003B9 90 F7 [ 1] 836 ld (y), a
+ 837 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1007: if (RTC_Format == RTC_Format_BIN)
+ 0003BB 0D 06 [ 1] 838 tnz (0x06, sp)
+ 0003BD 26 1D [ 1] 839 jrne 00103$
+ 840 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1010: RTC_DateStruct->RTC_Year = (uint8_t)Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Year);
+ 0003BF 16 04 [ 2] 841 ldw y, (0x04, sp)
+ 0003C1 90 F6 [ 1] 842 ld a, (y)
+ 0003C3 89 [ 2] 843 pushw x
+ 0003C4 CDr09r36 [ 4] 844 call _Bcd2ToByte
+ 0003C7 85 [ 2] 845 popw x
+ 0003C8 16 04 [ 2] 846 ldw y, (0x04, sp)
+ 0003CA 90 F7 [ 1] 847 ld (y), a
+ 848 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1011: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Month);
+ 0003CC F6 [ 1] 849 ld a, (x)
+ 0003CD 89 [ 2] 850 pushw x
+ 0003CE CDr09r36 [ 4] 851 call _Bcd2ToByte
+ 0003D1 85 [ 2] 852 popw x
+ 0003D2 F7 [ 1] 853 ld (x), a
+ 854 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1012: RTC_DateStruct->RTC_Date = (uint8_t)(Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Date));
+ 0003D3 1E 01 [ 2] 855 ldw x, (0x01, sp)
+ 0003D5 F6 [ 1] 856 ld a, (x)
+ 0003D6 CDr09r36 [ 4] 857 call _Bcd2ToByte
+ 0003D9 1E 01 [ 2] 858 ldw x, (0x01, sp)
+ 0003DB F7 [ 1] 859 ld (x), a
+ 0003DC 860 00103$:
+ 861 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1014: }
+ 0003DC 5B 06 [ 2] 862 addw sp, #6
+ 0003DE 81 [ 4] 863 ret
+ 864 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1044: void RTC_SetAlarm(RTC_Format_TypeDef RTC_Format,
+ 865 ; -----------------------------------------
+ 866 ; function RTC_SetAlarm
+ 867 ; -----------------------------------------
+ 0003DF 868 _RTC_SetAlarm:
+ 0003DF 52 11 [ 2] 869 sub sp, #17
+ 0003E1 6B 11 [ 1] 870 ld (0x11, sp), a
+ 0003E3 51 [ 1] 871 exgw x, y
+ 872 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1062: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ 0003E4 C6 51 48 [ 1] 873 ld a, 0x5148
+ 874 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1094: if ((RTC_AlarmStruct->RTC_AlarmMask & RTC_AlarmMask_DateWeekDay) == RESET )
+ 0003E7 93 [ 1] 875 ldw x, y
+ 0003E8 1C 00 04 [ 2] 876 addw x, #0x0004
+ 0003EB 1F 05 [ 2] 877 ldw (0x05, sp), x
+ 878 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1108: RTC->WPR = 0xCA;
+ 0003ED 35 CA 51 59 [ 1] 879 mov 0x5159+0, #0xca
+ 880 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1109: RTC->WPR = 0x53;
+ 0003F1 35 53 51 59 [ 1] 881 mov 0x5159+0, #0x53
+ 882 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ 0003F5 17 01 [ 2] 883 ldw (0x01, sp), y
+ 884 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1118: tmpreg2 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) | \
+ 0003F7 93 [ 1] 885 ldw x, y
+ 0003F8 5C [ 1] 886 incw x
+ 0003F9 1F 03 [ 2] 887 ldw (0x03, sp), x
+ 888 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1121: tmpreg3 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) | \
+ 0003FB 17 07 [ 2] 889 ldw (0x07, sp), y
+ 0003FD 93 [ 1] 890 ldw x, y
+ 0003FE 1C 00 03 [ 2] 891 addw x, #0x0003
+ 000401 1F 09 [ 2] 892 ldw (0x09, sp), x
+ 893 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1125: tmpreg4 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmDateWeekDay) | \
+ 000403 93 [ 1] 894 ldw x, y
+ 000404 1C 00 06 [ 2] 895 addw x, #0x0006
+ 000407 1F 0B [ 2] 896 ldw (0x0b, sp), x
+ 000409 93 [ 1] 897 ldw x, y
+ 00040A 1C 00 05 [ 2] 898 addw x, #0x0005
+ 00040D 1F 0D [ 2] 899 ldw (0x0d, sp), x
+ 900 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ 00040F 1E 01 [ 2] 901 ldw x, (0x01, sp)
+ 000411 E6 02 [ 1] 902 ld a, (0x2, x)
+ 000413 6B 10 [ 1] 903 ld (0x10, sp), a
+ 904 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1113: if (RTC_Format != RTC_Format_BIN)
+ 000415 0D 11 [ 1] 905 tnz (0x11, sp)
+ 000417 27 47 [ 1] 906 jreq 00116$
+ 907 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ 000419 1E 05 [ 2] 908 ldw x, (0x05, sp)
+ 00041B F6 [ 1] 909 ld a, (x)
+ 00041C 97 [ 1] 910 ld xl, a
+ 00041D A4 80 [ 1] 911 and a, #0x80
+ 00041F 1A 10 [ 1] 912 or a, (0x10, sp)
+ 000421 6B 0F [ 1] 913 ld (0x0f, sp), a
+ 914 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1118: tmpreg2 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) | \
+ 000423 16 03 [ 2] 915 ldw y, (0x03, sp)
+ 000425 90 F6 [ 1] 916 ld a, (y)
+ 000427 6B 10 [ 1] 917 ld (0x10, sp), a
+ 000429 9F [ 1] 918 ld a, xl
+ 00042A 48 [ 1] 919 sll a
+ 00042B A4 80 [ 1] 920 and a, #0x80
+ 00042D 1A 10 [ 1] 921 or a, (0x10, sp)
+ 00042F 6B 10 [ 1] 922 ld (0x10, sp), a
+ 923 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1121: tmpreg3 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) | \
+ 000431 16 07 [ 2] 924 ldw y, (0x07, sp)
+ 000433 90 F6 [ 1] 925 ld a, (y)
+ 000435 6B 06 [ 1] 926 ld (0x06, sp), a
+ 000437 16 09 [ 2] 927 ldw y, (0x09, sp)
+ 000439 90 F6 [ 1] 928 ld a, (y)
+ 00043B 1A 06 [ 1] 929 or a, (0x06, sp)
+ 00043D 6B 0A [ 1] 930 ld (0x0a, sp), a
+ 00043F 9F [ 1] 931 ld a, xl
+ 000440 48 [ 1] 932 sll a
+ 000441 48 [ 1] 933 sll a
+ 000442 A4 80 [ 1] 934 and a, #0x80
+ 000444 1A 0A [ 1] 935 or a, (0x0a, sp)
+ 000446 6B 0A [ 1] 936 ld (0x0a, sp), a
+ 937 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1125: tmpreg4 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmDateWeekDay) | \
+ 000448 16 0B [ 2] 938 ldw y, (0x0b, sp)
+ 00044A 90 F6 [ 1] 939 ld a, (y)
+ 00044C 6B 09 [ 1] 940 ld (0x09, sp), a
+ 00044E 16 0D [ 2] 941 ldw y, (0x0d, sp)
+ 000450 90 F6 [ 1] 942 ld a, (y)
+ 000452 1A 09 [ 1] 943 or a, (0x09, sp)
+ 000454 6B 0E [ 1] 944 ld (0x0e, sp), a
+ 000456 9F [ 1] 945 ld a, xl
+ 000457 48 [ 1] 946 sll a
+ 000458 48 [ 1] 947 sll a
+ 000459 48 [ 1] 948 sll a
+ 00045A A4 80 [ 1] 949 and a, #0x80
+ 00045C 1A 0E [ 1] 950 or a, (0x0e, sp)
+ 00045E 20 55 [ 2] 951 jra 00117$
+ 000460 952 00116$:
+ 953 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1132: tmpreg1 = (uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds)) | \
+ 000460 7B 10 [ 1] 954 ld a, (0x10, sp)
+ 000462 CDr09r23 [ 4] 955 call _ByteToBcd2
+ 000465 6B 10 [ 1] 956 ld (0x10, sp), a
+ 000467 1E 05 [ 2] 957 ldw x, (0x05, sp)
+ 000469 F6 [ 1] 958 ld a, (x)
+ 00046A A4 80 [ 1] 959 and a, #0x80
+ 00046C 1A 10 [ 1] 960 or a, (0x10, sp)
+ 00046E 6B 0F [ 1] 961 ld (0x0f, sp), a
+ 962 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1135: tmpreg2 = (uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes)) | \
+ 000470 1E 03 [ 2] 963 ldw x, (0x03, sp)
+ 000472 F6 [ 1] 964 ld a, (x)
+ 000473 CDr09r23 [ 4] 965 call _ByteToBcd2
+ 000476 6B 10 [ 1] 966 ld (0x10, sp), a
+ 000478 1E 05 [ 2] 967 ldw x, (0x05, sp)
+ 00047A F6 [ 1] 968 ld a, (x)
+ 00047B 48 [ 1] 969 sll a
+ 00047C A4 80 [ 1] 970 and a, #0x80
+ 00047E 1A 10 [ 1] 971 or a, (0x10, sp)
+ 000480 6B 10 [ 1] 972 ld (0x10, sp), a
+ 973 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1138: tmpreg3 = (uint8_t)((uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours)) | \
+ 000482 1E 07 [ 2] 974 ldw x, (0x07, sp)
+ 000484 F6 [ 1] 975 ld a, (x)
+ 000485 CDr09r23 [ 4] 976 call _ByteToBcd2
+ 000488 6B 08 [ 1] 977 ld (0x08, sp), a
+ 00048A 1E 09 [ 2] 978 ldw x, (0x09, sp)
+ 00048C F6 [ 1] 979 ld a, (x)
+ 00048D 1A 08 [ 1] 980 or a, (0x08, sp)
+ 00048F 6B 0A [ 1] 981 ld (0x0a, sp), a
+ 000491 1E 05 [ 2] 982 ldw x, (0x05, sp)
+ 000493 F6 [ 1] 983 ld a, (x)
+ 000494 48 [ 1] 984 sll a
+ 000495 48 [ 1] 985 sll a
+ 000496 A4 80 [ 1] 986 and a, #0x80
+ 000498 1A 0A [ 1] 987 or a, (0x0a, sp)
+ 00049A 6B 0A [ 1] 988 ld (0x0a, sp), a
+ 989 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1142: tmpreg4 = (uint8_t)((uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmDateWeekDay)) | \
+ 00049C 1E 0B [ 2] 990 ldw x, (0x0b, sp)
+ 00049E F6 [ 1] 991 ld a, (x)
+ 00049F CDr09r23 [ 4] 992 call _ByteToBcd2
+ 0004A2 6B 0C [ 1] 993 ld (0x0c, sp), a
+ 0004A4 1E 0D [ 2] 994 ldw x, (0x0d, sp)
+ 0004A6 F6 [ 1] 995 ld a, (x)
+ 0004A7 1A 0C [ 1] 996 or a, (0x0c, sp)
+ 0004A9 6B 0E [ 1] 997 ld (0x0e, sp), a
+ 0004AB 1E 05 [ 2] 998 ldw x, (0x05, sp)
+ 0004AD F6 [ 1] 999 ld a, (x)
+ 0004AE 48 [ 1] 1000 sll a
+ 0004AF 48 [ 1] 1001 sll a
+ 0004B0 48 [ 1] 1002 sll a
+ 0004B1 A4 80 [ 1] 1003 and a, #0x80
+ 0004B3 1A 0E [ 1] 1004 or a, (0x0e, sp)
+ 0004B5 1005 00117$:
+ 1006 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1148: RTC->ALRMAR1 = tmpreg1;
+ 0004B5 AE 51 5C [ 2] 1007 ldw x, #0x515c
+ 0004B8 88 [ 1] 1008 push a
+ 0004B9 7B 10 [ 1] 1009 ld a, (0x10, sp)
+ 0004BB F7 [ 1] 1010 ld (x), a
+ 0004BC 84 [ 1] 1011 pop a
+ 1012 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1149: RTC->ALRMAR2 = tmpreg2;
+ 0004BD AE 51 5D [ 2] 1013 ldw x, #0x515d
+ 0004C0 88 [ 1] 1014 push a
+ 0004C1 7B 11 [ 1] 1015 ld a, (0x11, sp)
+ 0004C3 F7 [ 1] 1016 ld (x), a
+ 0004C4 84 [ 1] 1017 pop a
+ 1018 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1150: RTC->ALRMAR3 = tmpreg3;
+ 0004C5 AE 51 5E [ 2] 1019 ldw x, #0x515e
+ 0004C8 88 [ 1] 1020 push a
+ 0004C9 7B 0B [ 1] 1021 ld a, (0x0b, sp)
+ 0004CB F7 [ 1] 1022 ld (x), a
+ 0004CC 84 [ 1] 1023 pop a
+ 1024 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1151: RTC->ALRMAR4 = tmpreg4;
+ 0004CD C7 51 5F [ 1] 1025 ld 0x515f, a
+ 1026 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1154: RTC->WPR = 0xFF;
+ 0004D0 35 FF 51 59 [ 1] 1027 mov 0x5159+0, #0xff
+ 1028 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1155: }
+ 0004D4 5B 11 [ 2] 1029 addw sp, #17
+ 0004D6 81 [ 4] 1030 ret
+ 1031 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1165: void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct)
+ 1032 ; -----------------------------------------
+ 1033 ; function RTC_AlarmStructInit
+ 1034 ; -----------------------------------------
+ 0004D7 1035 _RTC_AlarmStructInit:
+ 1036 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1168: RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = RTC_H12_AM;
+ 0004D7 90 93 [ 1] 1037 ldw y, x
+ 0004D9 6F 03 [ 1] 1038 clr (0x0003, x)
+ 1039 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1169: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = 0;
+ 0004DB 90 7F [ 1] 1040 clr (y)
+ 1041 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1170: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = 0;
+ 0004DD 93 [ 1] 1042 ldw x, y
+ 0004DE 6F 01 [ 1] 1043 clr (0x01, x)
+ 1044 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1171: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = 0;
+ 0004E0 93 [ 1] 1045 ldw x, y
+ 0004E1 6F 02 [ 1] 1046 clr (0x02, x)
+ 1047 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1174: RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = RTC_AlarmDateWeekDaySel_Date;
+ 0004E3 93 [ 1] 1048 ldw x, y
+ 0004E4 6F 05 [ 1] 1049 clr (0x0005, x)
+ 1050 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1175: RTC_AlarmStruct->RTC_AlarmDateWeekDay = 1;
+ 0004E6 A6 01 [ 1] 1051 ld a, #0x01
+ 0004E8 90 E7 06 [ 1] 1052 ld (0x0006, y), a
+ 1053 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1178: RTC_AlarmStruct->RTC_AlarmMask = RTC_AlarmMask_All;
+ 0004EB A6 F0 [ 1] 1054 ld a, #0xf0
+ 0004ED 90 E7 04 [ 1] 1055 ld (0x0004, y), a
+ 1056 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1179: }
+ 0004F0 81 [ 4] 1057 ret
+ 1058 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1188: void RTC_GetAlarm(RTC_Format_TypeDef RTC_Format,
+ 1059 ; -----------------------------------------
+ 1060 ; function RTC_GetAlarm
+ 1061 ; -----------------------------------------
+ 0004F1 1062 _RTC_GetAlarm:
+ 0004F1 52 0B [ 2] 1063 sub sp, #11
+ 0004F3 6B 0B [ 1] 1064 ld (0x0b, sp), a
+ 0004F5 1F 09 [ 2] 1065 ldw (0x09, sp), x
+ 1066 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1201: tmpreg1 = (uint8_t)RTC->ALRMAR1;
+ 0004F7 C6 51 5C [ 1] 1067 ld a, 0x515c
+ 0004FA 6B 08 [ 1] 1068 ld (0x08, sp), a
+ 1069 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1202: tmpreg2 = (uint8_t)RTC->ALRMAR2;
+ 0004FC C6 51 5D [ 1] 1070 ld a, 0x515d
+ 0004FF 6B 01 [ 1] 1071 ld (0x01, sp), a
+ 1072 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1203: tmpreg3 = (uint8_t)RTC->ALRMAR3;
+ 000501 C6 51 5E [ 1] 1073 ld a, 0x515e
+ 000504 6B 02 [ 1] 1074 ld (0x02, sp), a
+ 1075 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1204: tmpreg4 = (uint8_t)RTC->ALRMAR4;
+ 000506 C6 51 5F [ 1] 1076 ld a, 0x515f
+ 000509 6B 03 [ 1] 1077 ld (0x03, sp), a
+ 1078 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1207: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = (uint8_t)((uint8_t)tmpreg1 & (uint8_t)((uint8_t)RTC_ALRMAR1_ST | (uint8_t)RTC_ALRMAR1_SU));
+ 00050B 1E 09 [ 2] 1079 ldw x, (0x09, sp)
+ 00050D 5C [ 1] 1080 incw x
+ 00050E 5C [ 1] 1081 incw x
+ 00050F 1F 04 [ 2] 1082 ldw (0x04, sp), x
+ 000511 7B 08 [ 1] 1083 ld a, (0x08, sp)
+ 000513 A4 7F [ 1] 1084 and a, #0x7f
+ 000515 1E 04 [ 2] 1085 ldw x, (0x04, sp)
+ 000517 F7 [ 1] 1086 ld (x), a
+ 1087 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1208: alarmmask = (uint8_t)(tmpreg1 & RTC_ALRMAR1_MSK1);
+ 000518 7B 08 [ 1] 1088 ld a, (0x08, sp)
+ 00051A A4 80 [ 1] 1089 and a, #0x80
+ 00051C 6B 08 [ 1] 1090 ld (0x08, sp), a
+ 1091 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1211: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = (uint8_t)((uint8_t)tmpreg2 & (uint8_t)((uint8_t)RTC_ALRMAR2_MNT | (uint8_t)RTC_ALRMAR2_MNU));
+ 00051E 1E 09 [ 2] 1092 ldw x, (0x09, sp)
+ 000520 5C [ 1] 1093 incw x
+ 000521 1F 06 [ 2] 1094 ldw (0x06, sp), x
+ 000523 7B 01 [ 1] 1095 ld a, (0x01, sp)
+ 000525 A4 7F [ 1] 1096 and a, #0x7f
+ 000527 1E 06 [ 2] 1097 ldw x, (0x06, sp)
+ 000529 F7 [ 1] 1098 ld (x), a
+ 1099 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1212: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)(tmpreg2 & RTC_ALRMAR2_MSK2) >> 1));
+ 00052A 7B 01 [ 1] 1100 ld a, (0x01, sp)
+ 00052C A4 80 [ 1] 1101 and a, #0x80
+ 00052E 44 [ 1] 1102 srl a
+ 00052F 1A 08 [ 1] 1103 or a, (0x08, sp)
+ 000531 6B 08 [ 1] 1104 ld (0x08, sp), a
+ 1105 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1215: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = (uint8_t)((uint8_t)tmpreg3 & (uint8_t)((uint8_t)RTC_ALRMAR3_HT | (uint8_t)RTC_ALRMAR3_HU));
+ 000533 16 09 [ 2] 1106 ldw y, (0x09, sp)
+ 000535 7B 02 [ 1] 1107 ld a, (0x02, sp)
+ 000537 A4 3F [ 1] 1108 and a, #0x3f
+ 000539 90 F7 [ 1] 1109 ld (y), a
+ 1110 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1216: RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = (RTC_H12_TypeDef)((uint8_t)tmpreg3 & (uint8_t)RTC_ALRMAR3_PM);
+ 00053B 1E 09 [ 2] 1111 ldw x, (0x09, sp)
+ 00053D 1C 00 03 [ 2] 1112 addw x, #0x0003
+ 000540 7B 02 [ 1] 1113 ld a, (0x02, sp)
+ 000542 A4 40 [ 1] 1114 and a, #0x40
+ 000544 F7 [ 1] 1115 ld (x), a
+ 1116 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1217: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)((uint8_t)tmpreg3 & (uint8_t)RTC_ALRMAR3_MSK3) >> 2));
+ 000545 7B 02 [ 1] 1117 ld a, (0x02, sp)
+ 000547 A4 80 [ 1] 1118 and a, #0x80
+ 000549 44 [ 1] 1119 srl a
+ 00054A 44 [ 1] 1120 srl a
+ 00054B 1A 08 [ 1] 1121 or a, (0x08, sp)
+ 00054D 6B 08 [ 1] 1122 ld (0x08, sp), a
+ 1123 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1220: RTC_AlarmStruct->RTC_AlarmDateWeekDay = (uint8_t)((uint8_t)tmpreg4 & (uint8_t)((uint8_t)RTC_ALRMAR4_DT | (uint8_t)RTC_ALRMAR4_DU));
+ 00054F 1E 09 [ 2] 1124 ldw x, (0x09, sp)
+ 000551 1C 00 06 [ 2] 1125 addw x, #0x0006
+ 000554 1F 01 [ 2] 1126 ldw (0x01, sp), x
+ 000556 7B 03 [ 1] 1127 ld a, (0x03, sp)
+ 000558 A4 3F [ 1] 1128 and a, #0x3f
+ 00055A 1E 01 [ 2] 1129 ldw x, (0x01, sp)
+ 00055C F7 [ 1] 1130 ld (x), a
+ 1131 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1221: RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = (RTC_AlarmDateWeekDaySel_TypeDef)((uint8_t)tmpreg4 & (uint8_t)RTC_ALRMAR4_WDSEL);
+ 00055D 1E 09 [ 2] 1132 ldw x, (0x09, sp)
+ 00055F 1C 00 05 [ 2] 1133 addw x, #0x0005
+ 000562 7B 03 [ 1] 1134 ld a, (0x03, sp)
+ 000564 A4 40 [ 1] 1135 and a, #0x40
+ 000566 F7 [ 1] 1136 ld (x), a
+ 1137 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1222: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)((uint8_t)tmpreg4 & RTC_ALRMAR4_MSK4) >> 3));
+ 000567 7B 03 [ 1] 1138 ld a, (0x03, sp)
+ 000569 A4 80 [ 1] 1139 and a, #0x80
+ 00056B 44 [ 1] 1140 srl a
+ 00056C 44 [ 1] 1141 srl a
+ 00056D 44 [ 1] 1142 srl a
+ 00056E 1A 08 [ 1] 1143 or a, (0x08, sp)
+ 1144 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1224: RTC_AlarmStruct->RTC_AlarmMask = alarmmask;
+ 000570 1E 09 [ 2] 1145 ldw x, (0x09, sp)
+ 000572 1C 00 04 [ 2] 1146 addw x, #0x0004
+ 000575 F7 [ 1] 1147 ld (x), a
+ 1148 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1226: if (RTC_Format == RTC_Format_BIN)
+ 000576 0D 0B [ 1] 1149 tnz (0x0b, sp)
+ 000578 26 26 [ 1] 1150 jrne 00103$
+ 1151 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1228: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours);
+ 00057A 90 F6 [ 1] 1152 ld a, (y)
+ 00057C 90 89 [ 2] 1153 pushw y
+ 00057E CDr09r36 [ 4] 1154 call _Bcd2ToByte
+ 000581 90 85 [ 2] 1155 popw y
+ 000583 90 F7 [ 1] 1156 ld (y), a
+ 1157 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1229: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes);
+ 000585 1E 06 [ 2] 1158 ldw x, (0x06, sp)
+ 000587 F6 [ 1] 1159 ld a, (x)
+ 000588 CDr09r36 [ 4] 1160 call _Bcd2ToByte
+ 00058B 1E 06 [ 2] 1161 ldw x, (0x06, sp)
+ 00058D F7 [ 1] 1162 ld (x), a
+ 1163 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1230: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds);
+ 00058E 1E 04 [ 2] 1164 ldw x, (0x04, sp)
+ 000590 F6 [ 1] 1165 ld a, (x)
+ 000591 CDr09r36 [ 4] 1166 call _Bcd2ToByte
+ 000594 1E 04 [ 2] 1167 ldw x, (0x04, sp)
+ 000596 F7 [ 1] 1168 ld (x), a
+ 1169 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1231: RTC_AlarmStruct->RTC_AlarmDateWeekDay = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmDateWeekDay);
+ 000597 1E 01 [ 2] 1170 ldw x, (0x01, sp)
+ 000599 F6 [ 1] 1171 ld a, (x)
+ 00059A CDr09r36 [ 4] 1172 call _Bcd2ToByte
+ 00059D 1E 01 [ 2] 1173 ldw x, (0x01, sp)
+ 00059F F7 [ 1] 1174 ld (x), a
+ 0005A0 1175 00103$:
+ 1176 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1233: }
+ 0005A0 5B 0B [ 2] 1177 addw sp, #11
+ 0005A2 81 [ 4] 1178 ret
+ 1179 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1242: ErrorStatus RTC_AlarmCmd(FunctionalState NewState)
+ 1180 ; -----------------------------------------
+ 1181 ; function RTC_AlarmCmd
+ 1182 ; -----------------------------------------
+ 0005A3 1183 _RTC_AlarmCmd:
+ 0005A3 52 03 [ 2] 1184 sub sp, #3
+ 0005A5 6B 03 [ 1] 1185 ld (0x03, sp), a
+ 1186 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1244: __IO uint16_t alrawfcount = 0;
+ 0005A7 5F [ 1] 1187 clrw x
+ 0005A8 1F 01 [ 2] 1188 ldw (0x01, sp), x
+ 1189 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1252: RTC->WPR = 0xCA;
+ 0005AA 35 CA 51 59 [ 1] 1190 mov 0x5159+0, #0xca
+ 1191 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1253: RTC->WPR = 0x53;
+ 0005AE 35 53 51 59 [ 1] 1192 mov 0x5159+0, #0x53
+ 1193 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1258: RTC->CR2 |= (uint8_t)(RTC_CR2_ALRAE);
+ 0005B2 C6 51 49 [ 1] 1194 ld a, 0x5149
+ 1195 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1256: if (NewState != DISABLE)
+ 0005B5 0D 03 [ 1] 1196 tnz (0x03, sp)
+ 0005B7 27 09 [ 1] 1197 jreq 00109$
+ 1198 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1258: RTC->CR2 |= (uint8_t)(RTC_CR2_ALRAE);
+ 0005B9 AA 01 [ 1] 1199 or a, #0x01
+ 0005BB C7 51 49 [ 1] 1200 ld 0x5149, a
+ 1201 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1259: status = SUCCESS;
+ 0005BE A6 01 [ 1] 1202 ld a, #0x01
+ 0005C0 20 22 [ 2] 1203 jra 00110$
+ 0005C2 1204 00109$:
+ 1205 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1263: RTC->CR2 &= (uint8_t)~(RTC_CR2_ALRAE) ;
+ 0005C2 A4 FE [ 1] 1206 and a, #0xfe
+ 0005C4 C7 51 49 [ 1] 1207 ld 0x5149, a
+ 1208 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1266: temp1 = (uint8_t)(RTC->ISR1 & RTC_ISR1_ALRAWF);
+ 0005C7 C6 51 4C [ 1] 1209 ld a, 0x514c
+ 0005CA A4 01 [ 1] 1210 and a, #0x01
+ 1211 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1267: while ((alrawfcount != ALRAWF_TIMEOUT) && (temp1 == RESET))
+ 0005CC 1212 00102$:
+ 0005CC 1E 01 [ 2] 1213 ldw x, (0x01, sp)
+ 0005CE 5C [ 1] 1214 incw x
+ 0005CF 27 0A [ 1] 1215 jreq 00104$
+ 0005D1 4D [ 1] 1216 tnz a
+ 0005D2 26 07 [ 1] 1217 jrne 00104$
+ 1218 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1269: alrawfcount++;
+ 0005D4 1E 01 [ 2] 1219 ldw x, (0x01, sp)
+ 0005D6 5C [ 1] 1220 incw x
+ 0005D7 1F 01 [ 2] 1221 ldw (0x01, sp), x
+ 0005D9 20 F1 [ 2] 1222 jra 00102$
+ 0005DB 1223 00104$:
+ 1224 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1272: if ((RTC->ISR1 & RTC_ISR1_ALRAWF) == RESET)
+ 0005DB 72 00 51 4C 02 [ 2] 1225 btjt 0x514c, #0, 00106$
+ 1226 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1274: status = ERROR;
+ 0005E0 4F [ 1] 1227 clr a
+ 1228 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1278: status = SUCCESS;
+ 0005E1 C5 1229 .byte 0xc5
+ 0005E2 1230 00106$:
+ 0005E2 A6 01 [ 1] 1231 ld a, #0x01
+ 0005E4 1232 00110$:
+ 1233 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1283: RTC->WPR = 0xFF;
+ 0005E4 35 FF 51 59 [ 1] 1234 mov 0x5159+0, #0xff
+ 1235 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1286: return (ErrorStatus)status;
+ 1236 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1287: }
+ 0005E8 5B 03 [ 2] 1237 addw sp, #3
+ 0005EA 81 [ 4] 1238 ret
+ 1239 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1298: ErrorStatus RTC_AlarmSubSecondConfig(uint16_t RTC_AlarmSubSecondValue,
+ 1240 ; -----------------------------------------
+ 1241 ; function RTC_AlarmSubSecondConfig
+ 1242 ; -----------------------------------------
+ 0005EB 1243 _RTC_AlarmSubSecondConfig:
+ 0005EB 89 [ 2] 1244 pushw x
+ 0005EC 6B 02 [ 1] 1245 ld (0x02, sp), a
+ 1246 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1309: RTC->WPR = 0xCA;
+ 0005EE 35 CA 51 59 [ 1] 1247 mov 0x5159+0, #0xca
+ 1248 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1310: RTC->WPR = 0x53;
+ 0005F2 35 53 51 59 [ 1] 1249 mov 0x5159+0, #0x53
+ 1250 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1313: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ 0005F6 72 0C 51 4C 24 [ 2] 1251 btjt 0x514c, #6, 00102$
+ 1252 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1316: alarmstatus = (uint8_t)(RTC->CR2 | RTC_CR2_ALRAE);
+ 0005FB C6 51 49 [ 1] 1253 ld a, 0x5149
+ 0005FE AA 01 [ 1] 1254 or a, #0x01
+ 000600 6B 01 [ 1] 1255 ld (0x01, sp), a
+ 1256 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1319: RTC->CR2 &= (uint8_t)~(RTC_CR2_ALRAE);
+ 000602 72 11 51 49 [ 1] 1257 bres 0x5149, #0
+ 1258 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1322: RTC->ALRMASSRH = (uint8_t)(RTC_AlarmSubSecondValue >> 8);
+ 000606 9E [ 1] 1259 ld a, xh
+ 000607 C7 51 64 [ 1] 1260 ld 0x5164, a
+ 1261 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1323: RTC->ALRMASSRL = (uint8_t)(RTC_AlarmSubSecondValue);
+ 00060A 9F [ 1] 1262 ld a, xl
+ 00060B C7 51 65 [ 1] 1263 ld 0x5165, a
+ 1264 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1324: RTC->ALRMASSMSKR = (uint8_t)RTC_AlarmSubSecondMask;
+ 00060E AE 51 66 [ 2] 1265 ldw x, #0x5166
+ 000611 7B 02 [ 1] 1266 ld a, (0x02, sp)
+ 000613 F7 [ 1] 1267 ld (x), a
+ 1268 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1327: RTC->CR2 |= alarmstatus;
+ 000614 C6 51 49 [ 1] 1269 ld a, 0x5149
+ 000617 1A 01 [ 1] 1270 or a, (0x01, sp)
+ 000619 C7 51 49 [ 1] 1271 ld 0x5149, a
+ 1272 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1329: status = SUCCESS;
+ 00061C A6 01 [ 1] 1273 ld a, #0x01
+ 1274 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1333: status = ERROR;
+ 00061E 21 1275 .byte 0x21
+ 00061F 1276 00102$:
+ 00061F 4F [ 1] 1277 clr a
+ 000620 1278 00103$:
+ 1279 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1337: RTC->WPR = 0xFF;
+ 000620 35 FF 51 59 [ 1] 1280 mov 0x5159+0, #0xff
+ 1281 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1339: return (ErrorStatus)status;
+ 1282 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1340: }
+ 000624 85 [ 2] 1283 popw x
+ 000625 81 [ 4] 1284 ret
+ 1285 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1369: void RTC_WakeUpClockConfig(RTC_WakeUpClock_TypeDef RTC_WakeUpClock)
+ 1286 ; -----------------------------------------
+ 1287 ; function RTC_WakeUpClockConfig
+ 1288 ; -----------------------------------------
+ 000626 1289 _RTC_WakeUpClockConfig:
+ 000626 88 [ 1] 1290 push a
+ 000627 6B 01 [ 1] 1291 ld (0x01, sp), a
+ 1292 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1376: RTC->WPR = 0xCA;
+ 000629 35 CA 51 59 [ 1] 1293 mov 0x5159+0, #0xca
+ 1294 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1377: RTC->WPR = 0x53;
+ 00062D 35 53 51 59 [ 1] 1295 mov 0x5159+0, #0x53
+ 1296 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1380: RTC->CR2 &= (uint8_t)~RTC_CR2_WUTE;
+ 000631 72 15 51 49 [ 1] 1297 bres 0x5149, #2
+ 1298 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1383: RTC->CR1 &= (uint8_t)~RTC_CR1_WUCKSEL;
+ 000635 C6 51 48 [ 1] 1299 ld a, 0x5148
+ 000638 A4 F8 [ 1] 1300 and a, #0xf8
+ 00063A C7 51 48 [ 1] 1301 ld 0x5148, a
+ 1302 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1386: RTC->CR1 |= (uint8_t)RTC_WakeUpClock;
+ 00063D C6 51 48 [ 1] 1303 ld a, 0x5148
+ 000640 1A 01 [ 1] 1304 or a, (0x01, sp)
+ 000642 C7 51 48 [ 1] 1305 ld 0x5148, a
+ 1306 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1389: RTC->WPR = 0xFF;
+ 000645 35 FF 51 59 [ 1] 1307 mov 0x5159+0, #0xff
+ 1308 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1390: }
+ 000649 84 [ 1] 1309 pop a
+ 00064A 81 [ 4] 1310 ret
+ 1311 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1400: void RTC_SetWakeUpCounter(uint16_t RTC_WakeupCounter)
+ 1312 ; -----------------------------------------
+ 1313 ; function RTC_SetWakeUpCounter
+ 1314 ; -----------------------------------------
+ 00064B 1315 _RTC_SetWakeUpCounter:
+ 1316 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1403: RTC->WPR = 0xCA;
+ 00064B 35 CA 51 59 [ 1] 1317 mov 0x5159+0, #0xca
+ 1318 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1404: RTC->WPR = 0x53;
+ 00064F 35 53 51 59 [ 1] 1319 mov 0x5159+0, #0x53
+ 1320 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1408: RTC->WUTRH = (uint8_t)(RTC_WakeupCounter >> 8);
+ 000653 9E [ 1] 1321 ld a, xh
+ 000654 C7 51 54 [ 1] 1322 ld 0x5154, a
+ 1323 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1409: RTC->WUTRL = (uint8_t)(RTC_WakeupCounter);
+ 000657 9F [ 1] 1324 ld a, xl
+ 000658 C7 51 55 [ 1] 1325 ld 0x5155, a
+ 1326 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1412: RTC->WPR = 0xFF;
+ 00065B 35 FF 51 59 [ 1] 1327 mov 0x5159+0, #0xff
+ 1328 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1413: }
+ 00065F 81 [ 4] 1329 ret
+ 1330 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1420: uint16_t RTC_GetWakeUpCounter(void)
+ 1331 ; -----------------------------------------
+ 1332 ; function RTC_GetWakeUpCounter
+ 1333 ; -----------------------------------------
+ 000660 1334 _RTC_GetWakeUpCounter:
+ 000660 89 [ 2] 1335 pushw x
+ 1336 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1425: tmpreg = ((uint16_t)RTC->WUTRH) << 8;
+ 000661 C6 51 54 [ 1] 1337 ld a, 0x5154
+ 000664 95 [ 1] 1338 ld xh, a
+ 000665 0F 02 [ 1] 1339 clr (0x02, sp)
+ 1340 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1426: tmpreg |= RTC->WUTRL;
+ 000667 C6 51 55 [ 1] 1341 ld a, 0x5155
+ 1342 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1429: return (uint16_t)tmpreg;
+ 00066A 97 [ 1] 1343 ld xl, a
+ 1344 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1430: }
+ 00066B 5B 02 [ 2] 1345 addw sp, #2
+ 00066D 81 [ 4] 1346 ret
+ 1347 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1440: ErrorStatus RTC_WakeUpCmd(FunctionalState NewState)
+ 1348 ; -----------------------------------------
+ 1349 ; function RTC_WakeUpCmd
+ 1350 ; -----------------------------------------
+ 00066E 1351 _RTC_WakeUpCmd:
+ 00066E 88 [ 1] 1352 push a
+ 00066F 6B 01 [ 1] 1353 ld (0x01, sp), a
+ 1354 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1449: RTC->WPR = 0xCA;
+ 000671 35 CA 51 59 [ 1] 1355 mov 0x5159+0, #0xca
+ 1356 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1450: RTC->WPR = 0x53;
+ 000675 35 53 51 59 [ 1] 1357 mov 0x5159+0, #0x53
+ 1358 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1455: RTC->CR2 |= (uint8_t)RTC_CR2_WUTE;
+ 000679 C6 51 49 [ 1] 1359 ld a, 0x5149
+ 1360 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1452: if (NewState != DISABLE)
+ 00067C 0D 01 [ 1] 1361 tnz (0x01, sp)
+ 00067E 27 09 [ 1] 1362 jreq 00109$
+ 1363 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1455: RTC->CR2 |= (uint8_t)RTC_CR2_WUTE;
+ 000680 AA 04 [ 1] 1364 or a, #0x04
+ 000682 C7 51 49 [ 1] 1365 ld 0x5149, a
+ 1366 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1457: status = SUCCESS;
+ 000685 A6 01 [ 1] 1367 ld a, #0x01
+ 000687 20 1C [ 2] 1368 jra 00110$
+ 000689 1369 00109$:
+ 1370 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1462: RTC->CR2 &= (uint8_t)~RTC_CR2_WUTE;
+ 000689 A4 FB [ 1] 1371 and a, #0xfb
+ 00068B C7 51 49 [ 1] 1372 ld 0x5149, a
+ 1373 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1465: while (((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET) && ( wutwfcount != WUTWF_TIMEOUT))
+ 00068E 5F [ 1] 1374 clrw x
+ 00068F 1375 00102$:
+ 00068F 72 04 51 4C 08 [ 2] 1376 btjt 0x514c, #2, 00104$
+ 000694 A3 FF FF [ 2] 1377 cpw x, #0xffff
+ 000697 27 03 [ 1] 1378 jreq 00104$
+ 1379 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1467: wutwfcount++;
+ 000699 5C [ 1] 1380 incw x
+ 00069A 20 F3 [ 2] 1381 jra 00102$
+ 00069C 1382 00104$:
+ 1383 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1471: if ((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET)
+ 00069C 72 04 51 4C 02 [ 2] 1384 btjt 0x514c, #2, 00106$
+ 1385 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1473: status = ERROR;
+ 0006A1 4F [ 1] 1386 clr a
+ 1387 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1477: status = SUCCESS;
+ 0006A2 C5 1388 .byte 0xc5
+ 0006A3 1389 00106$:
+ 0006A3 A6 01 [ 1] 1390 ld a, #0x01
+ 0006A5 1391 00110$:
+ 1392 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1482: RTC->WPR = 0xFF;
+ 0006A5 35 FF 51 59 [ 1] 1393 mov 0x5159+0, #0xff
+ 1394 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1485: return (ErrorStatus)status;
+ 1395 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1486: }
+ 0006A9 5B 01 [ 2] 1396 addw sp, #1
+ 0006AB 81 [ 4] 1397 ret
+ 1398 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1522: void RTC_DayLightSavingConfig(RTC_DayLightSaving_TypeDef RTC_DayLightSaving,
+ 1399 ; -----------------------------------------
+ 1400 ; function RTC_DayLightSavingConfig
+ 1401 ; -----------------------------------------
+ 0006AC 1402 _RTC_DayLightSavingConfig:
+ 0006AC 88 [ 1] 1403 push a
+ 0006AD 97 [ 1] 1404 ld xl, a
+ 1405 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1530: RTC->WPR = 0xCA;
+ 0006AE 35 CA 51 59 [ 1] 1406 mov 0x5159+0, #0xca
+ 1407 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1531: RTC->WPR = 0x53;
+ 0006B2 35 53 51 59 [ 1] 1408 mov 0x5159+0, #0x53
+ 1409 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1534: RTC->CR3 &= (uint8_t)~(RTC_CR3_BCK);
+ 0006B6 C6 51 4A [ 1] 1410 ld a, 0x514a
+ 0006B9 A4 FB [ 1] 1411 and a, #0xfb
+ 0006BB C7 51 4A [ 1] 1412 ld 0x514a, a
+ 1413 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1537: RTC->CR3 |= (uint8_t)((uint8_t)RTC_DayLightSaving | (uint8_t)RTC_StoreOperation);
+ 0006BE C6 51 4A [ 1] 1414 ld a, 0x514a
+ 0006C1 6B 01 [ 1] 1415 ld (0x01, sp), a
+ 0006C3 9F [ 1] 1416 ld a, xl
+ 0006C4 1A 04 [ 1] 1417 or a, (0x04, sp)
+ 0006C6 1A 01 [ 1] 1418 or a, (0x01, sp)
+ 0006C8 C7 51 4A [ 1] 1419 ld 0x514a, a
+ 1420 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1540: RTC->WPR = 0xFF;
+ 0006CB 35 FF 51 59 [ 1] 1421 mov 0x5159+0, #0xff
+ 1422 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1541: }
+ 0006CF 84 [ 1] 1423 pop a
+ 0006D0 85 [ 2] 1424 popw x
+ 0006D1 84 [ 1] 1425 pop a
+ 0006D2 FC [ 2] 1426 jp (x)
+ 1427 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1549: RTC_StoreOperation_TypeDef RTC_GetStoreOperation(void)
+ 1428 ; -----------------------------------------
+ 1429 ; function RTC_GetStoreOperation
+ 1430 ; -----------------------------------------
+ 0006D3 1431 _RTC_GetStoreOperation:
+ 1432 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1552: return (RTC_StoreOperation_TypeDef)(RTC->CR3 & RTC_CR3_BCK);
+ 0006D3 C6 51 4A [ 1] 1433 ld a, 0x514a
+ 0006D6 A4 04 [ 1] 1434 and a, #0x04
+ 1435 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1553: }
+ 0006D8 81 [ 4] 1436 ret
+ 1437 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1587: void RTC_OutputConfig(RTC_Output_TypeDef RTC_Output,
+ 1438 ; -----------------------------------------
+ 1439 ; function RTC_OutputConfig
+ 1440 ; -----------------------------------------
+ 0006D9 1441 _RTC_OutputConfig:
+ 0006D9 88 [ 1] 1442 push a
+ 0006DA 97 [ 1] 1443 ld xl, a
+ 1444 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1595: RTC->WPR = 0xCA;
+ 0006DB 35 CA 51 59 [ 1] 1445 mov 0x5159+0, #0xca
+ 1446 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1596: RTC->WPR = 0x53;
+ 0006DF 35 53 51 59 [ 1] 1447 mov 0x5159+0, #0x53
+ 1448 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1599: RTC->CR3 &= (uint8_t)~(RTC_CR3_OSEL | RTC_CR3_POL);
+ 0006E3 C6 51 4A [ 1] 1449 ld a, 0x514a
+ 0006E6 A4 8F [ 1] 1450 and a, #0x8f
+ 0006E8 C7 51 4A [ 1] 1451 ld 0x514a, a
+ 1452 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1602: RTC->CR3 |= (uint8_t)((uint8_t)RTC_Output | (uint8_t)RTC_OutputPolarity);
+ 0006EB C6 51 4A [ 1] 1453 ld a, 0x514a
+ 0006EE 6B 01 [ 1] 1454 ld (0x01, sp), a
+ 0006F0 9F [ 1] 1455 ld a, xl
+ 0006F1 1A 04 [ 1] 1456 or a, (0x04, sp)
+ 0006F3 1A 01 [ 1] 1457 or a, (0x01, sp)
+ 0006F5 C7 51 4A [ 1] 1458 ld 0x514a, a
+ 1459 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1605: RTC->WPR = 0xFF;
+ 0006F8 35 FF 51 59 [ 1] 1460 mov 0x5159+0, #0xff
+ 1461 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1606: }
+ 0006FC 84 [ 1] 1462 pop a
+ 0006FD 85 [ 2] 1463 popw x
+ 0006FE 84 [ 1] 1464 pop a
+ 0006FF FC [ 2] 1465 jp (x)
+ 1466 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1639: ErrorStatus RTC_SynchroShiftConfig(RTC_ShiftAdd1S_TypeDef RTC_ShiftAdd1S,
+ 1467 ; -----------------------------------------
+ 1468 ; function RTC_SynchroShiftConfig
+ 1469 ; -----------------------------------------
+ 000700 1470 _RTC_SynchroShiftConfig:
+ 000700 88 [ 1] 1471 push a
+ 000701 6B 01 [ 1] 1472 ld (0x01, sp), a
+ 000703 51 [ 1] 1473 exgw x, y
+ 1474 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1651: RTC->WPR = 0xCA;
+ 000704 35 CA 51 59 [ 1] 1475 mov 0x5159+0, #0xca
+ 1476 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1652: RTC->WPR = 0x53;
+ 000708 35 53 51 59 [ 1] 1477 mov 0x5159+0, #0x53
+ 1478 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1655: if ((RTC->ISR1 & RTC_ISR1_SHPF) != RESET)
+ 00070C 72 07 51 4C 0E [ 2] 1479 btjf 0x514c, #3, 00106$
+ 1480 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1658: while (((RTC->ISR1 & RTC_ISR1_SHPF) != RESET) && (shpfcount != SHPF_TIMEOUT))
+ 000711 5F [ 1] 1481 clrw x
+ 000712 1482 00102$:
+ 000712 72 07 51 4C 08 [ 2] 1483 btjf 0x514c, #3, 00106$
+ 000717 A3 FF FF [ 2] 1484 cpw x, #0xffff
+ 00071A 27 03 [ 1] 1485 jreq 00106$
+ 1486 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1660: shpfcount++;
+ 00071C 5C [ 1] 1487 incw x
+ 00071D 20 F3 [ 2] 1488 jra 00102$
+ 00071F 1489 00106$:
+ 1490 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1665: if ((RTC->ISR1 & RTC_ISR1_SHPF) == RESET)
+ 00071F 72 06 51 4C 0F [ 2] 1491 btjt 0x514c, #3, 00108$
+ 1492 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1668: shiftrhreg = (uint8_t)((uint8_t)(RTC_ShiftSubFS >> 8) | (uint8_t)(RTC_ShiftAdd1S));
+ 000724 90 9E [ 1] 1493 ld a, yh
+ 000726 1A 01 [ 1] 1494 or a, (0x01, sp)
+ 1495 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1669: RTC->SHIFTRH = (uint8_t)(shiftrhreg);
+ 000728 C7 51 5A [ 1] 1496 ld 0x515a, a
+ 1497 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1670: RTC->SHIFTRL = (uint8_t)(RTC_ShiftSubFS);
+ 00072B 90 9F [ 1] 1498 ld a, yl
+ 00072D C7 51 5B [ 1] 1499 ld 0x515b, a
+ 1500 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1672: status = SUCCESS;
+ 000730 A6 01 [ 1] 1501 ld a, #0x01
+ 1502 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1676: status = ERROR;
+ 000732 21 1503 .byte 0x21
+ 000733 1504 00108$:
+ 000733 4F [ 1] 1505 clr a
+ 000734 1506 00109$:
+ 1507 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1680: RTC->WPR = 0xFF;
+ 000734 35 FF 51 59 [ 1] 1508 mov 0x5159+0, #0xff
+ 1509 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1682: return (ErrorStatus)(status);
+ 1510 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1683: }
+ 000738 5B 01 [ 2] 1511 addw sp, #1
+ 00073A 81 [ 4] 1512 ret
+ 1513 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1718: ErrorStatus RTC_SmoothCalibConfig(RTC_SmoothCalibPeriod_TypeDef RTC_SmoothCalibPeriod,
+ 1514 ; -----------------------------------------
+ 1515 ; function RTC_SmoothCalibConfig
+ 1516 ; -----------------------------------------
+ 00073B 1517 _RTC_SmoothCalibConfig:
+ 00073B 88 [ 1] 1518 push a
+ 00073C 90 97 [ 1] 1519 ld yl, a
+ 1520 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1731: RTC->WPR = 0xCA;
+ 00073E 35 CA 51 59 [ 1] 1521 mov 0x5159+0, #0xca
+ 1522 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1732: RTC->WPR = 0x53;
+ 000742 35 53 51 59 [ 1] 1523 mov 0x5159+0, #0x53
+ 1524 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1735: if ((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET)
+ 000746 72 03 51 4C 0E [ 2] 1525 btjf 0x514c, #1, 00106$
+ 1526 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1738: while (((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET) && (recalpfcount != RECALPF_TIMEOUT))
+ 00074B 5F [ 1] 1527 clrw x
+ 00074C 1528 00102$:
+ 00074C 72 03 51 4C 08 [ 2] 1529 btjf 0x514c, #1, 00106$
+ 000751 A3 FF FF [ 2] 1530 cpw x, #0xffff
+ 000754 27 03 [ 1] 1531 jreq 00106$
+ 1532 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1740: recalpfcount++;
+ 000756 5C [ 1] 1533 incw x
+ 000757 20 F3 [ 2] 1534 jra 00102$
+ 000759 1535 00106$:
+ 1536 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1746: if ((RTC->ISR1 & RTC_ISR1_RECALPF) == RESET)
+ 000759 72 02 51 4C 15 [ 2] 1537 btjt 0x514c, #1, 00108$
+ 1538 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1749: RTC->CALRH = (uint8_t)((uint8_t)((uint8_t)RTC_SmoothCalibPeriod | \
+ 00075E 90 9F [ 1] 1539 ld a, yl
+ 000760 1A 04 [ 1] 1540 or a, (0x04, sp)
+ 000762 6B 01 [ 1] 1541 ld (0x01, sp), a
+ 000764 7B 05 [ 1] 1542 ld a, (0x05, sp)
+ 000766 1A 01 [ 1] 1543 or a, (0x01, sp)
+ 000768 C7 51 6A [ 1] 1544 ld 0x516a, a
+ 1545 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1752: RTC->CALRL = (uint8_t)(RTC_SmouthCalibMinusPulsesValue);
+ 00076B 7B 06 [ 1] 1546 ld a, (0x06, sp)
+ 00076D C7 51 6B [ 1] 1547 ld 0x516b, a
+ 1548 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1754: status = SUCCESS;
+ 000770 A6 01 [ 1] 1549 ld a, #0x01
+ 1550 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1758: status = ERROR;
+ 000772 21 1551 .byte 0x21
+ 000773 1552 00108$:
+ 000773 4F [ 1] 1553 clr a
+ 000774 1554 00109$:
+ 1555 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1762: RTC->WPR = 0xFF;
+ 000774 35 FF 51 59 [ 1] 1556 mov 0x5159+0, #0xff
+ 1557 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1764: return (ErrorStatus)(status);
+ 1558 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1765: }
+ 000778 1E 02 [ 2] 1559 ldw x, (2, sp)
+ 00077A 5B 06 [ 2] 1560 addw sp, #6
+ 00077C FC [ 2] 1561 jp (x)
+ 1562 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1790: void RTC_CalibOutputConfig(RTC_CalibOutput_TypeDef RTC_CalibOutput)
+ 1563 ; -----------------------------------------
+ 1564 ; function RTC_CalibOutputConfig
+ 1565 ; -----------------------------------------
+ 00077D 1566 _RTC_CalibOutputConfig:
+ 00077D 88 [ 1] 1567 push a
+ 00077E 6B 01 [ 1] 1568 ld (0x01, sp), a
+ 1569 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1796: RTC->WPR = 0xCA;
+ 000780 35 CA 51 59 [ 1] 1570 mov 0x5159+0, #0xca
+ 1571 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1797: RTC->WPR = 0x53;
+ 000784 35 53 51 59 [ 1] 1572 mov 0x5159+0, #0x53
+ 1573 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1802: RTC->CR3 |= (uint8_t)RTC_CR3_COSEL;
+ 000788 C6 51 4A [ 1] 1574 ld a, 0x514a
+ 1575 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1799: if (RTC_CalibOutput != RTC_CalibOutput_512Hz)
+ 00078B 0D 01 [ 1] 1576 tnz (0x01, sp)
+ 00078D 27 07 [ 1] 1577 jreq 00102$
+ 1578 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1802: RTC->CR3 |= (uint8_t)RTC_CR3_COSEL;
+ 00078F AA 08 [ 1] 1579 or a, #0x08
+ 000791 C7 51 4A [ 1] 1580 ld 0x514a, a
+ 000794 20 05 [ 2] 1581 jra 00103$
+ 000796 1582 00102$:
+ 1583 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1807: RTC->CR3 &= (uint8_t)~RTC_CR3_COSEL;
+ 000796 A4 F7 [ 1] 1584 and a, #0xf7
+ 000798 C7 51 4A [ 1] 1585 ld 0x514a, a
+ 00079B 1586 00103$:
+ 1587 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1811: RTC->WPR = 0xFF;
+ 00079B 35 FF 51 59 [ 1] 1588 mov 0x5159+0, #0xff
+ 1589 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1812: }
+ 00079F 84 [ 1] 1590 pop a
+ 0007A0 81 [ 4] 1591 ret
+ 1592 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1820: void RTC_CalibOutputCmd(FunctionalState NewState)
+ 1593 ; -----------------------------------------
+ 1594 ; function RTC_CalibOutputCmd
+ 1595 ; -----------------------------------------
+ 0007A1 1596 _RTC_CalibOutputCmd:
+ 0007A1 88 [ 1] 1597 push a
+ 0007A2 6B 01 [ 1] 1598 ld (0x01, sp), a
+ 1599 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1826: RTC->WPR = 0xCA;
+ 0007A4 35 CA 51 59 [ 1] 1600 mov 0x5159+0, #0xca
+ 1601 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1827: RTC->WPR = 0x53;
+ 0007A8 35 53 51 59 [ 1] 1602 mov 0x5159+0, #0x53
+ 1603 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1832: RTC->CR3 |= (uint8_t)RTC_CR3_COE;
+ 0007AC C6 51 4A [ 1] 1604 ld a, 0x514a
+ 1605 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1829: if (NewState != DISABLE)
+ 0007AF 0D 01 [ 1] 1606 tnz (0x01, sp)
+ 0007B1 27 07 [ 1] 1607 jreq 00102$
+ 1608 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1832: RTC->CR3 |= (uint8_t)RTC_CR3_COE;
+ 0007B3 AA 80 [ 1] 1609 or a, #0x80
+ 0007B5 C7 51 4A [ 1] 1610 ld 0x514a, a
+ 0007B8 20 05 [ 2] 1611 jra 00103$
+ 0007BA 1612 00102$:
+ 1613 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1837: RTC->CR3 &= (uint8_t)~RTC_CR3_COE;
+ 0007BA A4 7F [ 1] 1614 and a, #0x7f
+ 0007BC C7 51 4A [ 1] 1615 ld 0x514a, a
+ 0007BF 1616 00103$:
+ 1617 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1841: RTC->WPR = 0xFF;
+ 0007BF 35 FF 51 59 [ 1] 1618 mov 0x5159+0, #0xff
+ 1619 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1842: }
+ 0007C3 84 [ 1] 1620 pop a
+ 0007C4 81 [ 4] 1621 ret
+ 1622 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1871: void RTC_TamperLevelConfig(RTC_Tamper_TypeDef RTC_Tamper,
+ 1623 ; -----------------------------------------
+ 1624 ; function RTC_TamperLevelConfig
+ 1625 ; -----------------------------------------
+ 0007C5 1626 _RTC_TamperLevelConfig:
+ 0007C5 88 [ 1] 1627 push a
+ 0007C6 97 [ 1] 1628 ld xl, a
+ 1629 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1879: RTC->WPR = 0xCA;
+ 0007C7 35 CA 51 59 [ 1] 1630 mov 0x5159+0, #0xca
+ 1631 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1880: RTC->WPR = 0x53;
+ 0007CB 35 53 51 59 [ 1] 1632 mov 0x5159+0, #0x53
+ 1633 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1885: RTC->TCR1 |= (uint8_t)(RTC_Tamper << 1);
+ 0007CF C6 51 6C [ 1] 1634 ld a, 0x516c
+ 0007D2 6B 01 [ 1] 1635 ld (0x01, sp), a
+ 0007D4 9F [ 1] 1636 ld a, xl
+ 0007D5 48 [ 1] 1637 sll a
+ 1638 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1882: if (RTC_TamperLevel != RTC_TamperLevel_Low)
+ 0007D6 0D 04 [ 1] 1639 tnz (0x04, sp)
+ 0007D8 27 07 [ 1] 1640 jreq 00102$
+ 1641 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1885: RTC->TCR1 |= (uint8_t)(RTC_Tamper << 1);
+ 0007DA 1A 01 [ 1] 1642 or a, (0x01, sp)
+ 0007DC C7 51 6C [ 1] 1643 ld 0x516c, a
+ 0007DF 20 06 [ 2] 1644 jra 00103$
+ 0007E1 1645 00102$:
+ 1646 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1890: RTC->TCR1 &= (uint8_t)~(uint8_t)(RTC_Tamper << 1);
+ 0007E1 43 [ 1] 1647 cpl a
+ 0007E2 14 01 [ 1] 1648 and a, (0x01, sp)
+ 0007E4 C7 51 6C [ 1] 1649 ld 0x516c, a
+ 0007E7 1650 00103$:
+ 1651 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1894: RTC->WPR = 0xFF;
+ 0007E7 35 FF 51 59 [ 1] 1652 mov 0x5159+0, #0xff
+ 1653 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1895: }
+ 0007EB 84 [ 1] 1654 pop a
+ 0007EC 85 [ 2] 1655 popw x
+ 0007ED 84 [ 1] 1656 pop a
+ 0007EE FC [ 2] 1657 jp (x)
+ 1658 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1903: void RTC_TamperFilterConfig(RTC_TamperFilter_TypeDef RTC_TamperFilter)
+ 1659 ; -----------------------------------------
+ 1660 ; function RTC_TamperFilterConfig
+ 1661 ; -----------------------------------------
+ 0007EF 1662 _RTC_TamperFilterConfig:
+ 0007EF 88 [ 1] 1663 push a
+ 0007F0 6B 01 [ 1] 1664 ld (0x01, sp), a
+ 1665 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1910: RTC->WPR = 0xCA;
+ 0007F2 35 CA 51 59 [ 1] 1666 mov 0x5159+0, #0xca
+ 1667 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1911: RTC->WPR = 0x53;
+ 0007F6 35 53 51 59 [ 1] 1668 mov 0x5159+0, #0x53
+ 1669 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1914: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPFLT);
+ 0007FA C6 51 6D [ 1] 1670 ld a, 0x516d
+ 0007FD A4 E7 [ 1] 1671 and a, #0xe7
+ 0007FF C7 51 6D [ 1] 1672 ld 0x516d, a
+ 1673 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1917: RTC->TCR2 |= (uint8_t)RTC_TamperFilter;
+ 000802 C6 51 6D [ 1] 1674 ld a, 0x516d
+ 000805 1A 01 [ 1] 1675 or a, (0x01, sp)
+ 000807 C7 51 6D [ 1] 1676 ld 0x516d, a
+ 1677 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1920: RTC->WPR = 0xFF;
+ 00080A 35 FF 51 59 [ 1] 1678 mov 0x5159+0, #0xff
+ 1679 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1922: }
+ 00080E 84 [ 1] 1680 pop a
+ 00080F 81 [ 4] 1681 ret
+ 1682 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1931: void RTC_TamperSamplingFreqConfig(RTC_TamperSamplingFreq_TypeDef RTC_TamperSamplingFreq)
+ 1683 ; -----------------------------------------
+ 1684 ; function RTC_TamperSamplingFreqConfig
+ 1685 ; -----------------------------------------
+ 000810 1686 _RTC_TamperSamplingFreqConfig:
+ 000810 88 [ 1] 1687 push a
+ 000811 6B 01 [ 1] 1688 ld (0x01, sp), a
+ 1689 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1937: RTC->WPR = 0xCA;
+ 000813 35 CA 51 59 [ 1] 1690 mov 0x5159+0, #0xca
+ 1691 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1938: RTC->WPR = 0x53;
+ 000817 35 53 51 59 [ 1] 1692 mov 0x5159+0, #0x53
+ 1693 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1941: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPFREQ);
+ 00081B C6 51 6D [ 1] 1694 ld a, 0x516d
+ 00081E A4 F8 [ 1] 1695 and a, #0xf8
+ 000820 C7 51 6D [ 1] 1696 ld 0x516d, a
+ 1697 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1944: RTC->TCR2 |= (uint8_t)RTC_TamperSamplingFreq;
+ 000823 C6 51 6D [ 1] 1698 ld a, 0x516d
+ 000826 1A 01 [ 1] 1699 or a, (0x01, sp)
+ 000828 C7 51 6D [ 1] 1700 ld 0x516d, a
+ 1701 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1947: RTC->WPR = 0xFF;
+ 00082B 35 FF 51 59 [ 1] 1702 mov 0x5159+0, #0xff
+ 1703 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1948: }
+ 00082F 84 [ 1] 1704 pop a
+ 000830 81 [ 4] 1705 ret
+ 1706 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1958: void RTC_TamperPinsPrechargeDuration(RTC_TamperPrechargeDuration_TypeDef RTC_TamperPrechargeDuration)
+ 1707 ; -----------------------------------------
+ 1708 ; function RTC_TamperPinsPrechargeDuration
+ 1709 ; -----------------------------------------
+ 000831 1710 _RTC_TamperPinsPrechargeDuration:
+ 000831 88 [ 1] 1711 push a
+ 000832 6B 01 [ 1] 1712 ld (0x01, sp), a
+ 1713 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1964: RTC->WPR = 0xCA;
+ 000834 35 CA 51 59 [ 1] 1714 mov 0x5159+0, #0xca
+ 1715 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1965: RTC->WPR = 0x53;
+ 000838 35 53 51 59 [ 1] 1716 mov 0x5159+0, #0x53
+ 1717 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1968: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPPUDIS | RTC_TCR2_TAMPPRCH);
+ 00083C C6 51 6D [ 1] 1718 ld a, 0x516d
+ 00083F A4 1F [ 1] 1719 and a, #0x1f
+ 000841 C7 51 6D [ 1] 1720 ld 0x516d, a
+ 1721 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1971: RTC->TCR2 |= (uint8_t)RTC_TamperPrechargeDuration;
+ 000844 C6 51 6D [ 1] 1722 ld a, 0x516d
+ 000847 1A 01 [ 1] 1723 or a, (0x01, sp)
+ 000849 C7 51 6D [ 1] 1724 ld 0x516d, a
+ 1725 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1974: RTC->WPR = 0xFF;
+ 00084C 35 FF 51 59 [ 1] 1726 mov 0x5159+0, #0xff
+ 1727 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1975: }
+ 000850 84 [ 1] 1728 pop a
+ 000851 81 [ 4] 1729 ret
+ 1730 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1987: void RTC_TamperCmd(RTC_Tamper_TypeDef RTC_Tamper,
+ 1731 ; -----------------------------------------
+ 1732 ; function RTC_TamperCmd
+ 1733 ; -----------------------------------------
+ 000852 1734 _RTC_TamperCmd:
+ 000852 88 [ 1] 1735 push a
+ 1736 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1996: RTC->WPR = 0xCA;
+ 000853 35 CA 51 59 [ 1] 1737 mov 0x5159+0, #0xca
+ 1738 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1997: RTC->WPR = 0x53;
+ 000857 35 53 51 59 [ 1] 1739 mov 0x5159+0, #0x53
+ 1740 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2003: RTC->TCR1 |= (uint8_t)RTC_Tamper;
+ 00085B AE 51 6C [ 2] 1741 ldw x, #0x516c
+ 00085E 88 [ 1] 1742 push a
+ 00085F F6 [ 1] 1743 ld a, (x)
+ 000860 6B 02 [ 1] 1744 ld (0x02, sp), a
+ 000862 84 [ 1] 1745 pop a
+ 1746 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2000: if (NewState != DISABLE)
+ 000863 0D 04 [ 1] 1747 tnz (0x04, sp)
+ 000865 27 07 [ 1] 1748 jreq 00102$
+ 1749 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2003: RTC->TCR1 |= (uint8_t)RTC_Tamper;
+ 000867 1A 01 [ 1] 1750 or a, (0x01, sp)
+ 000869 C7 51 6C [ 1] 1751 ld 0x516c, a
+ 00086C 20 06 [ 2] 1752 jra 00103$
+ 00086E 1753 00102$:
+ 1754 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2008: RTC->TCR1 &= (uint8_t)~RTC_Tamper;
+ 00086E 43 [ 1] 1755 cpl a
+ 00086F 14 01 [ 1] 1756 and a, (0x01, sp)
+ 000871 C7 51 6C [ 1] 1757 ld 0x516c, a
+ 000874 1758 00103$:
+ 1759 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2013: RTC->WPR = 0xFF;
+ 000874 35 FF 51 59 [ 1] 1760 mov 0x5159+0, #0xff
+ 1761 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2014: }
+ 000878 84 [ 1] 1762 pop a
+ 000879 85 [ 2] 1763 popw x
+ 00087A 84 [ 1] 1764 pop a
+ 00087B FC [ 2] 1765 jp (x)
+ 1766 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2058: void RTC_ITConfig(RTC_IT_TypeDef RTC_IT, FunctionalState NewState)
+ 1767 ; -----------------------------------------
+ 1768 ; function RTC_ITConfig
+ 1769 ; -----------------------------------------
+ 00087C 1770 _RTC_ITConfig:
+ 00087C 52 03 [ 2] 1771 sub sp, #3
+ 00087E 6B 03 [ 1] 1772 ld (0x03, sp), a
+ 1773 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2065: RTC->WPR = 0xCA;
+ 000880 35 CA 51 59 [ 1] 1774 mov 0x5159+0, #0xca
+ 1775 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2066: RTC->WPR = 0x53;
+ 000884 35 53 51 59 [ 1] 1776 mov 0x5159+0, #0x53
+ 1777 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2071: RTC->CR2 |= (uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ 000888 C6 51 49 [ 1] 1778 ld a, 0x5149
+ 00088B 6B 02 [ 1] 1779 ld (0x02, sp), a
+ 00088D 9F [ 1] 1780 ld a, xl
+ 00088E A4 F0 [ 1] 1781 and a, #0xf0
+ 1782 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2072: RTC->TCR1 |= (uint8_t)((uint16_t)RTC_IT & RTC_TCR1_TAMPIE);
+ 000890 88 [ 1] 1783 push a
+ 000891 9F [ 1] 1784 ld a, xl
+ 000892 A4 01 [ 1] 1785 and a, #0x01
+ 000894 6B 02 [ 1] 1786 ld (0x02, sp), a
+ 000896 84 [ 1] 1787 pop a
+ 1788 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2068: if (NewState != DISABLE)
+ 000897 0D 03 [ 1] 1789 tnz (0x03, sp)
+ 000899 27 0F [ 1] 1790 jreq 00102$
+ 1791 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2071: RTC->CR2 |= (uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ 00089B 1A 02 [ 1] 1792 or a, (0x02, sp)
+ 00089D C7 51 49 [ 1] 1793 ld 0x5149, a
+ 1794 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2072: RTC->TCR1 |= (uint8_t)((uint16_t)RTC_IT & RTC_TCR1_TAMPIE);
+ 0008A0 C6 51 6C [ 1] 1795 ld a, 0x516c
+ 0008A3 1A 01 [ 1] 1796 or a, (0x01, sp)
+ 0008A5 C7 51 6C [ 1] 1797 ld 0x516c, a
+ 0008A8 20 13 [ 2] 1798 jra 00103$
+ 0008AA 1799 00102$:
+ 1800 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2077: RTC->CR2 &= (uint8_t)~(uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ 0008AA 43 [ 1] 1801 cpl a
+ 0008AB 14 02 [ 1] 1802 and a, (0x02, sp)
+ 0008AD C7 51 49 [ 1] 1803 ld 0x5149, a
+ 1804 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2078: RTC->TCR1 &= (uint8_t)~(uint8_t)((uint16_t)RTC_IT & (uint16_t)RTC_TCR1_TAMPIE);
+ 0008B0 C6 51 6C [ 1] 1805 ld a, 0x516c
+ 0008B3 6B 02 [ 1] 1806 ld (0x02, sp), a
+ 0008B5 7B 01 [ 1] 1807 ld a, (0x01, sp)
+ 0008B7 43 [ 1] 1808 cpl a
+ 0008B8 14 02 [ 1] 1809 and a, (0x02, sp)
+ 0008BA C7 51 6C [ 1] 1810 ld 0x516c, a
+ 0008BD 1811 00103$:
+ 1812 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2082: RTC->WPR = 0xFF;
+ 0008BD 35 FF 51 59 [ 1] 1813 mov 0x5159+0, #0xff
+ 1814 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2083: }
+ 0008C1 5B 03 [ 2] 1815 addw sp, #3
+ 0008C3 81 [ 4] 1816 ret
+ 1817 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2090: FlagStatus RTC_GetFlagStatus(RTC_Flag_TypeDef RTC_FLAG)
+ 1818 ; -----------------------------------------
+ 1819 ; function RTC_GetFlagStatus
+ 1820 ; -----------------------------------------
+ 0008C4 1821 _RTC_GetFlagStatus:
+ 0008C4 52 06 [ 2] 1822 sub sp, #6
+ 1823 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2100: tmpreg2 = (uint16_t)((uint16_t)RTC->ISR1 << 8);
+ 0008C6 C6 51 4C [ 1] 1824 ld a, 0x514c
+ 0008C9 90 97 [ 1] 1825 ld yl, a
+ 0008CB 0F 02 [ 1] 1826 clr (0x02, sp)
+ 1827 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2101: tmpreg1 = (uint16_t)((uint16_t)((uint16_t)(RTC->ISR2)) | tmpreg2);
+ 0008CD C6 51 4D [ 1] 1828 ld a, 0x514d
+ 0008D0 0F 03 [ 1] 1829 clr (0x03, sp)
+ 0008D2 6B 06 [ 1] 1830 ld (0x06, sp), a
+ 0008D4 61 [ 1] 1831 exg a, yl
+ 0008D5 6B 05 [ 1] 1832 ld (0x05, sp), a
+ 0008D7 61 [ 1] 1833 exg a, yl
+ 1834 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2104: if ((tmpreg1 & (uint16_t)RTC_FLAG) != RESET)
+ 0008D8 9F [ 1] 1835 ld a, xl
+ 0008D9 14 06 [ 1] 1836 and a, (0x06, sp)
+ 0008DB 02 [ 1] 1837 rlwa x
+ 0008DC 14 05 [ 1] 1838 and a, (0x05, sp)
+ 0008DE 95 [ 1] 1839 ld xh, a
+ 0008DF 5D [ 2] 1840 tnzw x
+ 0008E0 27 03 [ 1] 1841 jreq 00102$
+ 1842 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2106: flagstatus = SET;
+ 0008E2 A6 01 [ 1] 1843 ld a, #0x01
+ 1844 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2110: flagstatus = RESET;
+ 0008E4 21 1845 .byte 0x21
+ 0008E5 1846 00102$:
+ 0008E5 4F [ 1] 1847 clr a
+ 0008E6 1848 00103$:
+ 1849 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2112: return (FlagStatus)flagstatus;
+ 1850 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2113: }
+ 0008E6 5B 06 [ 2] 1851 addw sp, #6
+ 0008E8 81 [ 4] 1852 ret
+ 1853 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2122: void RTC_ClearFlag(RTC_Flag_TypeDef RTC_FLAG)
+ 1854 ; -----------------------------------------
+ 1855 ; function RTC_ClearFlag
+ 1856 ; -----------------------------------------
+ 0008E9 1857 _RTC_ClearFlag:
+ 1858 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2128: RTC->ISR2 = (uint8_t)~((uint8_t)RTC_FLAG) ;
+ 0008E9 9F [ 1] 1859 ld a, xl
+ 0008EA 43 [ 1] 1860 cpl a
+ 0008EB C7 51 4D [ 1] 1861 ld 0x514d, a
+ 1862 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2129: RTC->ISR1 = (uint8_t)(((uint8_t)~(uint8_t)((uint16_t)RTC_FLAG >> (uint8_t)8)) & ((uint8_t)~(uint8_t)(RTC_ISR1_INIT)));
+ 0008EE 9E [ 1] 1863 ld a, xh
+ 0008EF 43 [ 1] 1864 cpl a
+ 0008F0 A4 7F [ 1] 1865 and a, #0x7f
+ 0008F2 C7 51 4C [ 1] 1866 ld 0x514c, a
+ 1867 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2130: }
+ 0008F5 81 [ 4] 1868 ret
+ 1869 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2138: ITStatus RTC_GetITStatus(RTC_IT_TypeDef RTC_IT)
+ 1870 ; -----------------------------------------
+ 1871 ; function RTC_GetITStatus
+ 1872 ; -----------------------------------------
+ 0008F6 1873 _RTC_GetITStatus:
+ 0008F6 88 [ 1] 1874 push a
+ 1875 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2147: enablestatus = (uint8_t)(RTC->CR2 & (uint16_t)RTC_IT);
+ 0008F7 C6 51 49 [ 1] 1876 ld a, 0x5149
+ 0008FA 6B 01 [ 1] 1877 ld (0x01, sp), a
+ 0008FC 9F [ 1] 1878 ld a, xl
+ 0008FD 14 01 [ 1] 1879 and a, (0x01, sp)
+ 0008FF 6B 01 [ 1] 1880 ld (0x01, sp), a
+ 1881 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2150: tmpreg = (uint8_t)(RTC->ISR2 & (uint8_t)((uint16_t)RTC_IT >> 4));
+ 000901 C6 51 4D [ 1] 1882 ld a, 0x514d
+ 000904 54 [ 2] 1883 srlw x
+ 000905 54 [ 2] 1884 srlw x
+ 000906 54 [ 2] 1885 srlw x
+ 000907 54 [ 2] 1886 srlw x
+ 000908 89 [ 2] 1887 pushw x
+ 000909 14 02 [ 1] 1888 and a, (2, sp)
+ 00090B 85 [ 2] 1889 popw x
+ 1890 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2153: if ((enablestatus != (uint8_t)RESET) && (tmpreg != (uint8_t)RESET))
+ 00090C 0D 01 [ 1] 1891 tnz (0x01, sp)
+ 00090E 27 06 [ 1] 1892 jreq 00102$
+ 000910 4D [ 1] 1893 tnz a
+ 000911 27 03 [ 1] 1894 jreq 00102$
+ 1895 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2155: itstatus = SET;
+ 000913 A6 01 [ 1] 1896 ld a, #0x01
+ 1897 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2159: itstatus = RESET;
+ 000915 21 1898 .byte 0x21
+ 000916 1899 00102$:
+ 000916 4F [ 1] 1900 clr a
+ 000917 1901 00103$:
+ 1902 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2162: return (ITStatus)itstatus;
+ 1903 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2163: }
+ 000917 5B 01 [ 2] 1904 addw sp, #1
+ 000919 81 [ 4] 1905 ret
+ 1906 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2172: void RTC_ClearITPendingBit(RTC_IT_TypeDef RTC_IT)
+ 1907 ; -----------------------------------------
+ 1908 ; function RTC_ClearITPendingBit
+ 1909 ; -----------------------------------------
+ 00091A 1910 _RTC_ClearITPendingBit:
+ 1911 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2178: RTC->ISR2 = (uint8_t)~(uint8_t)((uint16_t)RTC_IT >> 4);
+ 00091A A6 10 [ 1] 1912 ld a, #0x10
+ 00091C 62 [ 2] 1913 div x, a
+ 00091D 9F [ 1] 1914 ld a, xl
+ 00091E 43 [ 1] 1915 cpl a
+ 00091F C7 51 4D [ 1] 1916 ld 0x514d, a
+ 1917 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2179: }
+ 000922 81 [ 4] 1918 ret
+ 1919 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2202: static uint8_t ByteToBcd2(uint8_t Value)
+ 1920 ; -----------------------------------------
+ 1921 ; function ByteToBcd2
+ 1922 ; -----------------------------------------
+ 000923 1923 _ByteToBcd2:
+ 1924 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2206: while (Value >= 10)
+ 000923 5F [ 1] 1925 clrw x
+ 000924 1926 00101$:
+ 000924 A1 0A [ 1] 1927 cp a, #0x0a
+ 000926 25 05 [ 1] 1928 jrc 00103$
+ 1929 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2208: bcdhigh++;
+ 000928 5C [ 1] 1930 incw x
+ 1931 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2209: Value -= 10;
+ 000929 A0 0A [ 1] 1932 sub a, #0x0a
+ 00092B 20 F7 [ 2] 1933 jra 00101$
+ 00092D 1934 00103$:
+ 1935 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2212: return (uint8_t)((uint8_t)(bcdhigh << 4) | Value);
+ 00092D 58 [ 2] 1936 sllw x
+ 00092E 58 [ 2] 1937 sllw x
+ 00092F 58 [ 2] 1938 sllw x
+ 000930 58 [ 2] 1939 sllw x
+ 000931 89 [ 2] 1940 pushw x
+ 000932 1A 02 [ 1] 1941 or a, (2, sp)
+ 000934 85 [ 2] 1942 popw x
+ 1943 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2213: }
+ 000935 81 [ 4] 1944 ret
+ 1945 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2220: static uint8_t Bcd2ToByte(uint8_t Value)
+ 1946 ; -----------------------------------------
+ 1947 ; function Bcd2ToByte
+ 1948 ; -----------------------------------------
+ 000936 1949 _Bcd2ToByte:
+ 1950 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2224: tmp = (uint8_t)((uint8_t)((uint8_t)(Value & (uint8_t)0xF0) >> 4) * (uint8_t)10);
+ 000936 90 97 [ 1] 1951 ld yl, a
+ 000938 A4 F0 [ 1] 1952 and a, #0xf0
+ 00093A 4E [ 1] 1953 swap a
+ 00093B A4 0F [ 1] 1954 and a, #0x0f
+ 00093D 97 [ 1] 1955 ld xl, a
+ 00093E A6 0A [ 1] 1956 ld a, #0x0a
+ 000940 42 [ 4] 1957 mul x, a
+ 1958 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2226: return (uint8_t)(tmp + (Value & (uint8_t)0x0F));
+ 000941 90 9F [ 1] 1959 ld a, yl
+ 000943 A4 0F [ 1] 1960 and a, #0x0f
+ 000945 89 [ 2] 1961 pushw x
+ 000946 1B 02 [ 1] 1962 add a, (2, sp)
+ 000948 85 [ 2] 1963 popw x
+ 1964 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2227: }
+ 000949 81 [ 4] 1965 ret
+ 1966 .area CODE
+ 1967 .area CONST
+ 1968 .area INITIALIZER
+ 1969 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_rtc.rel b/firmware/STM8L15X_LD/stm8l15x_rtc.rel
new file mode 100644
index 0000000..e8ae572
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_rtc.rel
@@ -0,0 +1,793 @@
+XH3
+H B areas 2B global symbols
+M stm8l15x_rtc
+S .__.ABS. Def000000
+A _CODE size 0 flags 0 addr 0
+A DATA size 0 flags 0 addr 0
+A INITIALIZED size 0 flags 0 addr 0
+A DABS size 0 flags 8 addr 0
+A HOME size 0 flags 0 addr 0
+A GSINIT size 0 flags 0 addr 0
+A GSFINAL size 0 flags 0 addr 0
+A CONST size 0 flags 0 addr 0
+A INITIALIZER size 0 flags 0 addr 0
+A CODE size 94A flags 0 addr 0
+S _RTC_SetWakeUpCounter Def00064B
+S _RTC_SetAlarm Def0003DF
+S _RTC_StructInit Def000114
+S _RTC_TamperPinsPrechargeDuration Def000831
+S _RTC_GetFlagStatus Def0008C4
+S _RTC_GetStoreOperation Def0006D3
+S _RTC_GetDate Def000386
+S _RTC_ClearFlag Def0008E9
+S _RTC_WakeUpCmd Def00066E
+S _RTC_WaitForSynchro Def00015B
+S _RTC_TamperFilterConfig Def0007EF
+S _RTC_GetSubSecond Def0002BA
+S _RTC_OutputConfig Def0006D9
+S _RTC_ClearITPendingBit Def00091A
+S _RTC_TimeStructInit Def00025B
+S _RTC_SetDate Def0002CB
+S _RTC_SmoothCalibConfig Def00073B
+S _RTC_BypassShadowCmd Def0001AB
+S _RTC_GetTime Def000268
+S _RTC_ITConfig Def00087C
+S _RTC_ExitInitMode Def000156
+S _RTC_TamperLevelConfig Def0007C5
+S _RTC_SynchroShiftConfig Def000700
+S _RTC_SetTime Def0001CF
+S _RTC_TamperCmd Def000852
+S _RTC_DeInit Def000000
+S _RTC_CalibOutputCmd Def0007A1
+S _RTC_GetITStatus Def0008F6
+S _RTC_AlarmCmd Def0005A3
+S _RTC_CalibOutputConfig Def00077D
+S _RTC_AlarmStructInit Def0004D7
+S _RTC_WriteProtectionCmd Def000124
+S _RTC_TamperSamplingFreqConfig Def000810
+S _RTC_AlarmSubSecondConfig Def0005EB
+S _RTC_GetWakeUpCounter Def000660
+S _RTC_GetAlarm Def0004F1
+S _RTC_WakeUpClockConfig Def000626
+S _RTC_RatioCmd Def000187
+S _RTC_DayLightSavingConfig Def0006AC
+S _RTC_Init Def0000CB
+S _RTC_DateStructInit Def000372
+S _RTC_EnterInitMode Def000135
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diff --git a/firmware/STM8L15X_LD/stm8l15x_rtc.rst b/firmware/STM8L15X_LD/stm8l15x_rtc.rst
new file mode 100644
index 0000000..9188982
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_rtc.rst
@@ -0,0 +1,1969 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_rtc
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _RTC_DeInit
+ 11 .globl _RTC_Init
+ 12 .globl _RTC_StructInit
+ 13 .globl _RTC_WriteProtectionCmd
+ 14 .globl _RTC_EnterInitMode
+ 15 .globl _RTC_ExitInitMode
+ 16 .globl _RTC_WaitForSynchro
+ 17 .globl _RTC_RatioCmd
+ 18 .globl _RTC_BypassShadowCmd
+ 19 .globl _RTC_SetTime
+ 20 .globl _RTC_TimeStructInit
+ 21 .globl _RTC_GetTime
+ 22 .globl _RTC_GetSubSecond
+ 23 .globl _RTC_SetDate
+ 24 .globl _RTC_DateStructInit
+ 25 .globl _RTC_GetDate
+ 26 .globl _RTC_SetAlarm
+ 27 .globl _RTC_AlarmStructInit
+ 28 .globl _RTC_GetAlarm
+ 29 .globl _RTC_AlarmCmd
+ 30 .globl _RTC_AlarmSubSecondConfig
+ 31 .globl _RTC_WakeUpClockConfig
+ 32 .globl _RTC_SetWakeUpCounter
+ 33 .globl _RTC_GetWakeUpCounter
+ 34 .globl _RTC_WakeUpCmd
+ 35 .globl _RTC_DayLightSavingConfig
+ 36 .globl _RTC_GetStoreOperation
+ 37 .globl _RTC_OutputConfig
+ 38 .globl _RTC_SynchroShiftConfig
+ 39 .globl _RTC_SmoothCalibConfig
+ 40 .globl _RTC_CalibOutputConfig
+ 41 .globl _RTC_CalibOutputCmd
+ 42 .globl _RTC_TamperLevelConfig
+ 43 .globl _RTC_TamperFilterConfig
+ 44 .globl _RTC_TamperSamplingFreqConfig
+ 45 .globl _RTC_TamperPinsPrechargeDuration
+ 46 .globl _RTC_TamperCmd
+ 47 .globl _RTC_ITConfig
+ 48 .globl _RTC_GetFlagStatus
+ 49 .globl _RTC_ClearFlag
+ 50 .globl _RTC_GetITStatus
+ 51 .globl _RTC_ClearITPendingBit
+ 52 ;--------------------------------------------------------
+ 53 ; ram data
+ 54 ;--------------------------------------------------------
+ 55 .area DATA
+ 56 ;--------------------------------------------------------
+ 57 ; ram data
+ 58 ;--------------------------------------------------------
+ 59 .area INITIALIZED
+ 60 ;--------------------------------------------------------
+ 61 ; absolute external ram data
+ 62 ;--------------------------------------------------------
+ 63 .area DABS (ABS)
+ 64
+ 65 ; default segment ordering for linker
+ 66 .area HOME
+ 67 .area GSINIT
+ 68 .area GSFINAL
+ 69 .area CONST
+ 70 .area INITIALIZER
+ 71 .area CODE
+ 72
+ 73 ;--------------------------------------------------------
+ 74 ; global & static initialisations
+ 75 ;--------------------------------------------------------
+ 76 .area HOME
+ 77 .area GSINIT
+ 78 .area GSFINAL
+ 79 .area GSINIT
+ 80 ;--------------------------------------------------------
+ 81 ; Home
+ 82 ;--------------------------------------------------------
+ 83 .area HOME
+ 84 .area HOME
+ 85 ;--------------------------------------------------------
+ 86 ; code
+ 87 ;--------------------------------------------------------
+ 88 .area CODE
+ 89 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 232: ErrorStatus RTC_DeInit(void)
+ 90 ; -----------------------------------------
+ 91 ; function RTC_DeInit
+ 92 ; -----------------------------------------
+ 008912 93 _RTC_DeInit:
+ 94 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 239: RTC->WPR = 0xCA;
+ 008912 35 CA 51 59 [ 1] 95 mov 0x5159+0, #0xca
+ 96 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 240: RTC->WPR = 0x53;
+ 008916 35 53 51 59 [ 1] 97 mov 0x5159+0, #0x53
+ 98 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 243: if (RTC_EnterInitMode() == ERROR)
+ 00891A CD 8A 47 [ 4] 99 call _RTC_EnterInitMode
+ 00891D 4D [ 1] 100 tnz a
+ 00891E 26 06 [ 1] 101 jrne 00121$
+ 102 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 245: status = ERROR;
+ 008920 4F [ 1] 103 clr a
+ 104 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 247: RTC->WPR = 0xFF;
+ 008921 35 FF 51 59 [ 1] 105 mov 0x5159+0, #0xff
+ 008925 81 [ 4] 106 ret
+ 008926 107 00121$:
+ 108 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 252: RTC->TR1 = RTC_TR1_RESET_VALUE;
+ 008926 35 00 51 40 [ 1] 109 mov 0x5140+0, #0x00
+ 110 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 253: RTC->TR2 = RTC_TR2_RESET_VALUE;
+ 00892A 35 00 51 41 [ 1] 111 mov 0x5141+0, #0x00
+ 112 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 254: RTC->TR3 = RTC_TR3_RESET_VALUE;
+ 00892E 35 00 51 42 [ 1] 113 mov 0x5142+0, #0x00
+ 114 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 257: RTC->DR1 = RTC_DR1_RESET_VALUE;
+ 008932 35 01 51 44 [ 1] 115 mov 0x5144+0, #0x01
+ 116 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 258: RTC->DR2 = RTC_DR2_RESET_VALUE;
+ 008936 35 21 51 45 [ 1] 117 mov 0x5145+0, #0x21
+ 118 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 259: RTC->DR3 = RTC_DR3_RESET_VALUE;
+ 00893A 35 00 51 46 [ 1] 119 mov 0x5146+0, #0x00
+ 120 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 262: RTC->SPRERH = RTC_SPRERH_RESET_VALUE;
+ 00893E 35 00 51 50 [ 1] 121 mov 0x5150+0, #0x00
+ 122 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 263: RTC->SPRERL = RTC_SPRERL_RESET_VALUE;
+ 008942 35 FF 51 51 [ 1] 123 mov 0x5151+0, #0xff
+ 124 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 264: RTC->APRER = RTC_APRER_RESET_VALUE;
+ 008946 35 7F 51 52 [ 1] 125 mov 0x5152+0, #0x7f
+ 126 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 266: RTC->TCR1 = RTC_TCR1_RESET_VALUE;
+ 00894A 35 00 51 6C [ 1] 127 mov 0x516c+0, #0x00
+ 128 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 267: RTC->TCR2 = RTC_TCR2_RESET_VALUE;
+ 00894E 35 00 51 6D [ 1] 129 mov 0x516d+0, #0x00
+ 130 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 271: RTC->CR1 = RTC_CR1_RESET_VALUE;
+ 008952 35 00 51 48 [ 1] 131 mov 0x5148+0, #0x00
+ 132 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 272: RTC->CR2 = RTC_CR2_RESET_VALUE;
+ 008956 35 00 51 49 [ 1] 133 mov 0x5149+0, #0x00
+ 134 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 273: RTC->CR3 = RTC_CR3_RESET_VALUE;
+ 00895A 35 00 51 4A [ 1] 135 mov 0x514a+0, #0x00
+ 136 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 276: while (((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET) && ( wutwfcount != WUTWF_TIMEOUT))
+ 00895E 5F [ 1] 137 clrw x
+ 00895F 138 00102$:
+ 00895F 72 04 51 4C 0C [ 2] 139 btjt 0x514c, #2, 00104$
+ 008964 A3 FF FF [ 2] 140 cpw x, #0xffff
+ 008967 27 07 [ 1] 141 jreq 00104$
+ 142 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 278: wutwfcount++;
+ 008969 5C [ 1] 143 incw x
+ 144 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 279: RTC->ISR1 = 0;
+ 00896A 35 00 51 4C [ 1] 145 mov 0x514c+0, #0x00
+ 00896E 20 EF [ 2] 146 jra 00102$
+ 008970 147 00104$:
+ 148 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 282: if ((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET)
+ 008970 72 04 51 4C 06 [ 2] 149 btjt 0x514c, #2, 00118$
+ 150 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 284: status = ERROR;
+ 008975 4F [ 1] 151 clr a
+ 152 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 286: RTC->WPR = 0xFF;
+ 008976 35 FF 51 59 [ 1] 153 mov 0x5159+0, #0xff
+ 00897A 81 [ 4] 154 ret
+ 00897B 155 00118$:
+ 156 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 291: RTC->CR1 = RTC_CR1_RESET_VALUE;
+ 00897B 35 00 51 48 [ 1] 157 mov 0x5148+0, #0x00
+ 158 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 294: RTC->WUTRH = RTC_WUTRH_RESET_VALUE;
+ 00897F 35 FF 51 54 [ 1] 159 mov 0x5154+0, #0xff
+ 160 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 295: RTC->WUTRL = RTC_WUTRL_RESET_VALUE;
+ 008983 35 FF 51 55 [ 1] 161 mov 0x5155+0, #0xff
+ 162 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 298: RTC->ALRMAR1 = RTC_ALRMAR1_RESET_VALUE;
+ 008987 35 00 51 5C [ 1] 163 mov 0x515c+0, #0x00
+ 164 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 299: RTC->ALRMAR2 = RTC_ALRMAR2_RESET_VALUE;
+ 00898B 35 00 51 5D [ 1] 165 mov 0x515d+0, #0x00
+ 166 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 300: RTC->ALRMAR3 = RTC_ALRMAR3_RESET_VALUE;
+ 00898F 35 00 51 5E [ 1] 167 mov 0x515e+0, #0x00
+ 168 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 301: RTC->ALRMAR4 = RTC_ALRMAR4_RESET_VALUE;
+ 008993 35 00 51 5F [ 1] 169 mov 0x515f+0, #0x00
+ 170 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 303: RTC->ALRMASSRH = RTC_ALRMASSRH_RESET_VALUE;
+ 008997 35 00 51 64 [ 1] 171 mov 0x5164+0, #0x00
+ 172 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 304: RTC->ALRMASSRL = RTC_ALRMASSRL_RESET_VALUE;
+ 00899B 35 00 51 65 [ 1] 173 mov 0x5165+0, #0x00
+ 174 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 305: RTC->ALRMASSMSKR = RTC_ALRMASSMSKR_RESET_VALUE;
+ 00899F 35 00 51 66 [ 1] 175 mov 0x5166+0, #0x00
+ 176 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 308: RTC->ISR1 = (uint8_t)0x00;
+ 0089A3 35 00 51 4C [ 1] 177 mov 0x514c+0, #0x00
+ 178 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 309: RTC->ISR2 = RTC_ISR2_RESET_VALUE;
+ 0089A7 35 00 51 4D [ 1] 179 mov 0x514d+0, #0x00
+ 180 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 311: if ((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET)
+ 0089AB 72 03 51 4C 0E [ 2] 181 btjf 0x514c, #1, 00110$
+ 182 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 313: while (((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET) && (recalpfcount != RECALPF_TIMEOUT))
+ 0089B0 5F [ 1] 183 clrw x
+ 0089B1 184 00106$:
+ 0089B1 72 03 51 4C 08 [ 2] 185 btjf 0x514c, #1, 00110$
+ 0089B6 A3 FF FF [ 2] 186 cpw x, #0xffff
+ 0089B9 27 03 [ 1] 187 jreq 00110$
+ 188 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 315: recalpfcount++;
+ 0089BB 5C [ 1] 189 incw x
+ 0089BC 20 F3 [ 2] 190 jra 00106$
+ 0089BE 191 00110$:
+ 192 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 318: if ((RTC->ISR1 & RTC_ISR1_RECALPF) == RESET)
+ 0089BE 72 02 51 4C 14 [ 2] 193 btjt 0x514c, #1, 00115$
+ 194 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 320: RTC->CALRH = RTC_CALRH_RESET_VALUE;
+ 0089C3 35 00 51 6A [ 1] 195 mov 0x516a+0, #0x00
+ 196 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 321: RTC->CALRL = RTC_CALRL_RESET_VALUE;
+ 0089C7 35 00 51 6B [ 1] 197 mov 0x516b+0, #0x00
+ 198 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 323: if (RTC_WaitForSynchro() == ERROR)
+ 0089CB CD 8A 6D [ 4] 199 call _RTC_WaitForSynchro
+ 0089CE 4D [ 1] 200 tnz a
+ 0089CF 26 03 [ 1] 201 jrne 00112$
+ 202 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 325: status = ERROR;
+ 0089D1 4F [ 1] 203 clr a
+ 0089D2 20 04 [ 2] 204 jra 00116$
+ 0089D4 205 00112$:
+ 206 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 329: status = SUCCESS;
+ 0089D4 A6 01 [ 1] 207 ld a, #0x01
+ 208 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 334: status = ERROR;
+ 0089D6 21 209 .byte 0x21
+ 0089D7 210 00115$:
+ 0089D7 4F [ 1] 211 clr a
+ 0089D8 212 00116$:
+ 213 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 338: RTC->WPR = 0xFF;
+ 0089D8 35 FF 51 59 [ 1] 214 mov 0x5159+0, #0xff
+ 215 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 343: return (ErrorStatus)status;
+ 216 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 344: }
+ 0089DC 81 [ 4] 217 ret
+ 218 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 359: ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct)
+ 219 ; -----------------------------------------
+ 220 ; function RTC_Init
+ 221 ; -----------------------------------------
+ 0089DD 222 _RTC_Init:
+ 0089DD 52 03 [ 2] 223 sub sp, #3
+ 0089DF 1F 02 [ 2] 224 ldw (0x02, sp), x
+ 225 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 369: RTC->WPR = 0xCA;
+ 0089E1 35 CA 51 59 [ 1] 226 mov 0x5159+0, #0xca
+ 227 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 370: RTC->WPR = 0x53;
+ 0089E5 35 53 51 59 [ 1] 228 mov 0x5159+0, #0x53
+ 229 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 373: if (RTC_EnterInitMode() == ERROR)
+ 0089E9 CD 8A 47 [ 4] 230 call _RTC_EnterInitMode
+ 0089EC 4D [ 1] 231 tnz a
+ 0089ED 26 03 [ 1] 232 jrne 00102$
+ 233 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 375: status = ERROR;
+ 0089EF 4F [ 1] 234 clr a
+ 0089F0 20 2D [ 2] 235 jra 00103$
+ 0089F2 236 00102$:
+ 237 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 380: RTC->CR1 &= ((uint8_t)~( RTC_CR1_FMT ));
+ 0089F2 72 1D 51 48 [ 1] 238 bres 0x5148, #6
+ 239 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 383: RTC->CR1 |= ((uint8_t)(RTC_InitStruct->RTC_HourFormat));
+ 0089F6 C6 51 48 [ 1] 240 ld a, 0x5148
+ 0089F9 6B 01 [ 1] 241 ld (0x01, sp), a
+ 0089FB 1E 02 [ 2] 242 ldw x, (0x02, sp)
+ 0089FD F6 [ 1] 243 ld a, (x)
+ 0089FE 1A 01 [ 1] 244 or a, (0x01, sp)
+ 008A00 C7 51 48 [ 1] 245 ld 0x5148, a
+ 246 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 386: RTC->SPRERH = (uint8_t)(RTC_InitStruct->RTC_SynchPrediv >> 8);
+ 008A03 1E 02 [ 2] 247 ldw x, (0x02, sp)
+ 008A05 5C [ 1] 248 incw x
+ 008A06 5C [ 1] 249 incw x
+ 008A07 E6 01 [ 1] 250 ld a, (0x1, x)
+ 008A09 F6 [ 1] 251 ld a, (x)
+ 008A0A C7 51 50 [ 1] 252 ld 0x5150, a
+ 253 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 387: RTC->SPRERL = (uint8_t)(RTC_InitStruct->RTC_SynchPrediv);
+ 008A0D E6 01 [ 1] 254 ld a, (0x1, x)
+ 008A0F C7 51 51 [ 1] 255 ld 0x5151, a
+ 256 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 388: RTC->APRER = (uint8_t)(RTC_InitStruct->RTC_AsynchPrediv);
+ 008A12 1E 02 [ 2] 257 ldw x, (0x02, sp)
+ 008A14 E6 01 [ 1] 258 ld a, (0x1, x)
+ 008A16 C7 51 52 [ 1] 259 ld 0x5152, a
+ 260 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 391: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 008A19 72 1F 51 4C [ 1] 261 bres 0x514c, #7
+ 262 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 393: status = SUCCESS;
+ 008A1D A6 01 [ 1] 263 ld a, #0x01
+ 008A1F 264 00103$:
+ 265 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 397: RTC->WPR = 0xFF;
+ 008A1F 35 FF 51 59 [ 1] 266 mov 0x5159+0, #0xff
+ 267 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 400: return (ErrorStatus)(status);
+ 268 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 401: }
+ 008A23 5B 03 [ 2] 269 addw sp, #3
+ 008A25 81 [ 4] 270 ret
+ 271 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 410: void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct)
+ 272 ; -----------------------------------------
+ 273 ; function RTC_StructInit
+ 274 ; -----------------------------------------
+ 008A26 275 _RTC_StructInit:
+ 008A26 51 [ 1] 276 exgw x, y
+ 277 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 413: RTC_InitStruct->RTC_HourFormat = RTC_HourFormat_24;
+ 008A27 90 7F [ 1] 278 clr (y)
+ 279 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 416: RTC_InitStruct->RTC_AsynchPrediv = RTC_APRER_RESET_VALUE;
+ 008A29 93 [ 1] 280 ldw x, y
+ 008A2A 5C [ 1] 281 incw x
+ 008A2B A6 7F [ 1] 282 ld a, #0x7f
+ 008A2D F7 [ 1] 283 ld (x), a
+ 284 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 419: RTC_InitStruct->RTC_SynchPrediv = RTC_SPRERL_RESET_VALUE;
+ 008A2E 93 [ 1] 285 ldw x, y
+ 008A2F 90 AE 00 FF [ 2] 286 ldw y, #0x00ff
+ 008A33 EF 02 [ 2] 287 ldw (0x02, x), y
+ 288 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 420: }
+ 008A35 81 [ 4] 289 ret
+ 290 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 430: void RTC_WriteProtectionCmd(FunctionalState NewState)
+ 291 ; -----------------------------------------
+ 292 ; function RTC_WriteProtectionCmd
+ 293 ; -----------------------------------------
+ 008A36 294 _RTC_WriteProtectionCmd:
+ 295 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 435: if (NewState != DISABLE)
+ 008A36 4D [ 1] 296 tnz a
+ 008A37 27 05 [ 1] 297 jreq 00102$
+ 298 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 438: RTC->WPR = RTC_WPR_EnableKey;
+ 008A39 35 FF 51 59 [ 1] 299 mov 0x5159+0, #0xff
+ 008A3D 81 [ 4] 300 ret
+ 008A3E 301 00102$:
+ 302 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 443: RTC->WPR = RTC_WPR_DisableKey1;
+ 008A3E 35 CA 51 59 [ 1] 303 mov 0x5159+0, #0xca
+ 304 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 444: RTC->WPR = RTC_WPR_DisableKey2;
+ 008A42 35 53 51 59 [ 1] 305 mov 0x5159+0, #0x53
+ 306 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 446: }
+ 008A46 81 [ 4] 307 ret
+ 308 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 458: ErrorStatus RTC_EnterInitMode(void)
+ 309 ; -----------------------------------------
+ 310 ; function RTC_EnterInitMode
+ 311 ; -----------------------------------------
+ 008A47 312 _RTC_EnterInitMode:
+ 313 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 464: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ 008A47 72 0C 51 4C 12 [ 2] 314 btjt 0x514c, #6, 00106$
+ 315 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 467: RTC->ISR1 = (uint8_t)RTC_ISR1_INIT;
+ 008A4C 35 80 51 4C [ 1] 316 mov 0x514c+0, #0x80
+ 317 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 470: while (((RTC->ISR1 & RTC_ISR1_INITF) == RESET) && ( initfcount != INITF_TIMEOUT))
+ 008A50 5F [ 1] 318 clrw x
+ 008A51 319 00102$:
+ 008A51 72 0C 51 4C 08 [ 2] 320 btjt 0x514c, #6, 00106$
+ 008A56 A3 FF FF [ 2] 321 cpw x, #0xffff
+ 008A59 27 03 [ 1] 322 jreq 00106$
+ 323 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 472: initfcount++;
+ 008A5B 5C [ 1] 324 incw x
+ 008A5C 20 F3 [ 2] 325 jra 00102$
+ 008A5E 326 00106$:
+ 327 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 476: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ 008A5E 72 0C 51 4C 02 [ 2] 328 btjt 0x514c, #6, 00108$
+ 329 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 478: status = ERROR;
+ 008A63 4F [ 1] 330 clr a
+ 008A64 81 [ 4] 331 ret
+ 008A65 332 00108$:
+ 333 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 482: status = SUCCESS;
+ 008A65 A6 01 [ 1] 334 ld a, #0x01
+ 335 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 485: return (ErrorStatus)status;
+ 336 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 486: }
+ 008A67 81 [ 4] 337 ret
+ 338 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 498: void RTC_ExitInitMode(void)
+ 339 ; -----------------------------------------
+ 340 ; function RTC_ExitInitMode
+ 341 ; -----------------------------------------
+ 008A68 342 _RTC_ExitInitMode:
+ 343 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 501: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 008A68 72 1F 51 4C [ 1] 344 bres 0x514c, #7
+ 345 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 502: }
+ 008A6C 81 [ 4] 346 ret
+ 347 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 527: ErrorStatus RTC_WaitForSynchro(void)
+ 348 ; -----------------------------------------
+ 349 ; function RTC_WaitForSynchro
+ 350 ; -----------------------------------------
+ 008A6D 351 _RTC_WaitForSynchro:
+ 352 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 533: RTC->WPR = 0xCA;
+ 008A6D 35 CA 51 59 [ 1] 353 mov 0x5159+0, #0xca
+ 354 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 534: RTC->WPR = 0x53;
+ 008A71 35 53 51 59 [ 1] 355 mov 0x5159+0, #0x53
+ 356 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 537: RTC->ISR1 &= (uint8_t)~(RTC_ISR1_RSF | RTC_ISR1_INIT);
+ 008A75 C6 51 4C [ 1] 357 ld a, 0x514c
+ 008A78 A4 5F [ 1] 358 and a, #0x5f
+ 008A7A C7 51 4C [ 1] 359 ld 0x514c, a
+ 360 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 540: while (((RTC->ISR1 & RTC_ISR1_RSF) == RESET) && ( rsfcount != RSF_TIMEOUT))
+ 008A7D 5F [ 1] 361 clrw x
+ 008A7E 362 00102$:
+ 008A7E 72 0A 51 4C 08 [ 2] 363 btjt 0x514c, #5, 00104$
+ 008A83 A3 FF FF [ 2] 364 cpw x, #0xffff
+ 008A86 27 03 [ 1] 365 jreq 00104$
+ 366 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 542: rsfcount++;
+ 008A88 5C [ 1] 367 incw x
+ 008A89 20 F3 [ 2] 368 jra 00102$
+ 008A8B 369 00104$:
+ 370 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 546: if ((RTC->ISR1 & RTC_ISR1_RSF) != RESET)
+ 008A8B 72 0B 51 4C 03 [ 2] 371 btjf 0x514c, #5, 00106$
+ 372 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 548: status = SUCCESS;
+ 008A90 A6 01 [ 1] 373 ld a, #0x01
+ 374 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 552: status = ERROR;
+ 008A92 21 375 .byte 0x21
+ 008A93 376 00106$:
+ 008A93 4F [ 1] 377 clr a
+ 008A94 378 00107$:
+ 379 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 556: RTC->WPR = 0xFF;
+ 008A94 35 FF 51 59 [ 1] 380 mov 0x5159+0, #0xff
+ 381 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 558: return (ErrorStatus)status;
+ 382 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 559: }
+ 008A98 81 [ 4] 383 ret
+ 384 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 568: void RTC_RatioCmd(FunctionalState NewState)
+ 385 ; -----------------------------------------
+ 386 ; function RTC_RatioCmd
+ 387 ; -----------------------------------------
+ 008A99 388 _RTC_RatioCmd:
+ 008A99 88 [ 1] 389 push a
+ 008A9A 6B 01 [ 1] 390 ld (0x01, sp), a
+ 391 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 574: RTC->WPR = 0xCA;
+ 008A9C 35 CA 51 59 [ 1] 392 mov 0x5159+0, #0xca
+ 393 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 575: RTC->WPR = 0x53;
+ 008AA0 35 53 51 59 [ 1] 394 mov 0x5159+0, #0x53
+ 395 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 580: RTC->CR1 |= (uint8_t)RTC_CR1_RATIO;
+ 008AA4 C6 51 48 [ 1] 396 ld a, 0x5148
+ 397 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 577: if (NewState != DISABLE)
+ 008AA7 0D 01 [ 1] 398 tnz (0x01, sp)
+ 008AA9 27 07 [ 1] 399 jreq 00102$
+ 400 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 580: RTC->CR1 |= (uint8_t)RTC_CR1_RATIO;
+ 008AAB AA 20 [ 1] 401 or a, #0x20
+ 008AAD C7 51 48 [ 1] 402 ld 0x5148, a
+ 008AB0 20 05 [ 2] 403 jra 00103$
+ 008AB2 404 00102$:
+ 405 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 585: RTC->CR1 &= (uint8_t)~RTC_CR1_RATIO;
+ 008AB2 A4 DF [ 1] 406 and a, #0xdf
+ 008AB4 C7 51 48 [ 1] 407 ld 0x5148, a
+ 008AB7 408 00103$:
+ 409 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 589: RTC->WPR = 0xFF;
+ 008AB7 35 FF 51 59 [ 1] 410 mov 0x5159+0, #0xff
+ 411 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 590: }
+ 008ABB 84 [ 1] 412 pop a
+ 008ABC 81 [ 4] 413 ret
+ 414 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 598: void RTC_BypassShadowCmd(FunctionalState NewState)
+ 415 ; -----------------------------------------
+ 416 ; function RTC_BypassShadowCmd
+ 417 ; -----------------------------------------
+ 008ABD 418 _RTC_BypassShadowCmd:
+ 008ABD 88 [ 1] 419 push a
+ 008ABE 6B 01 [ 1] 420 ld (0x01, sp), a
+ 421 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 604: RTC->WPR = 0xCA;
+ 008AC0 35 CA 51 59 [ 1] 422 mov 0x5159+0, #0xca
+ 423 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 605: RTC->WPR = 0x53;
+ 008AC4 35 53 51 59 [ 1] 424 mov 0x5159+0, #0x53
+ 425 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 610: RTC->CR1 |= (uint8_t)RTC_CR1_BYPSHAD;
+ 008AC8 C6 51 48 [ 1] 426 ld a, 0x5148
+ 427 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 607: if (NewState != DISABLE)
+ 008ACB 0D 01 [ 1] 428 tnz (0x01, sp)
+ 008ACD 27 07 [ 1] 429 jreq 00102$
+ 430 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 610: RTC->CR1 |= (uint8_t)RTC_CR1_BYPSHAD;
+ 008ACF AA 10 [ 1] 431 or a, #0x10
+ 008AD1 C7 51 48 [ 1] 432 ld 0x5148, a
+ 008AD4 20 05 [ 2] 433 jra 00103$
+ 008AD6 434 00102$:
+ 435 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 615: RTC->CR1 &= (uint8_t)~RTC_CR1_BYPSHAD;
+ 008AD6 A4 EF [ 1] 436 and a, #0xef
+ 008AD8 C7 51 48 [ 1] 437 ld 0x5148, a
+ 008ADB 438 00103$:
+ 439 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 619: RTC->WPR = 0xFF;
+ 008ADB 35 FF 51 59 [ 1] 440 mov 0x5159+0, #0xff
+ 441 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 620: }
+ 008ADF 84 [ 1] 442 pop a
+ 008AE0 81 [ 4] 443 ret
+ 444 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 659: ErrorStatus RTC_SetTime(RTC_Format_TypeDef RTC_Format,
+ 445 ; -----------------------------------------
+ 446 ; function RTC_SetTime
+ 447 ; -----------------------------------------
+ 008AE1 448 _RTC_SetTime:
+ 008AE1 52 06 [ 2] 449 sub sp, #6
+ 008AE3 6B 06 [ 1] 450 ld (0x06, sp), a
+ 008AE5 1F 04 [ 2] 451 ldw (0x04, sp), x
+ 452 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 671: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ 008AE7 C6 51 48 [ 1] 453 ld a, 0x5148
+ 454 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 701: RTC->WPR = 0xCA;
+ 008AEA 35 CA 51 59 [ 1] 455 mov 0x5159+0, #0xca
+ 456 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 702: RTC->WPR = 0x53;
+ 008AEE 35 53 51 59 [ 1] 457 mov 0x5159+0, #0x53
+ 458 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 705: if (RTC_EnterInitMode() == ERROR)
+ 008AF2 CD 8A 47 [ 4] 459 call _RTC_EnterInitMode
+ 008AF5 4D [ 1] 460 tnz a
+ 008AF6 26 07 [ 1] 461 jrne 00123$
+ 462 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 707: status = ERROR;
+ 008AF8 4F [ 1] 463 clr a
+ 464 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 709: RTC->WPR = 0xFF;
+ 008AF9 35 FF 51 59 [ 1] 465 mov 0x5159+0, #0xff
+ 008AFD 20 6B [ 2] 466 jra 00124$
+ 008AFF 467 00123$:
+ 468 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 714: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ 008AFF 72 0D 51 48 07 [ 2] 469 btjf 0x5148, #6, 00111$
+ 470 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 717: temp = RTC_TimeStruct->RTC_H12;
+ 008B04 1E 04 [ 2] 471 ldw x, (0x04, sp)
+ 008B06 E6 03 [ 1] 472 ld a, (0x3, x)
+ 008B08 6B 01 [ 1] 473 ld (0x01, sp), a
+ 474 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 721: temp = 0;
+ 008B0A C5 475 .byte 0xc5
+ 008B0B 476 00111$:
+ 008B0B 0F 01 [ 1] 477 clr (0x01, sp)
+ 008B0D 478 00112$:
+ 479 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ 008B0D 16 04 [ 2] 480 ldw y, (0x04, sp)
+ 481 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 727: RTC->TR2 = (uint8_t)(RTC_TimeStruct->RTC_Minutes) ;
+ 008B0F 1E 04 [ 2] 482 ldw x, (0x04, sp)
+ 008B11 5C [ 1] 483 incw x
+ 008B12 1F 02 [ 2] 484 ldw (0x02, sp), x
+ 485 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 728: RTC->TR3 = (uint8_t)( temp | RTC_TimeStruct->RTC_Hours) ;
+ 008B14 1E 04 [ 2] 486 ldw x, (0x04, sp)
+ 487 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ 008B16 90 E6 02 [ 1] 488 ld a, (0x2, y)
+ 489 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 724: if (RTC_Format != RTC_Format_BIN)
+ 008B19 0D 06 [ 1] 490 tnz (0x06, sp)
+ 008B1B 27 12 [ 1] 491 jreq 00114$
+ 492 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 726: RTC->TR1 = (uint8_t)(RTC_TimeStruct->RTC_Seconds);
+ 008B1D C7 51 40 [ 1] 493 ld 0x5140, a
+ 494 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 727: RTC->TR2 = (uint8_t)(RTC_TimeStruct->RTC_Minutes) ;
+ 008B20 16 02 [ 2] 495 ldw y, (0x02, sp)
+ 008B22 90 F6 [ 1] 496 ld a, (y)
+ 008B24 C7 51 41 [ 1] 497 ld 0x5141, a
+ 498 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 728: RTC->TR3 = (uint8_t)( temp | RTC_TimeStruct->RTC_Hours) ;
+ 008B27 F6 [ 1] 499 ld a, (x)
+ 008B28 1A 01 [ 1] 500 or a, (0x01, sp)
+ 008B2A C7 51 42 [ 1] 501 ld 0x5142, a
+ 008B2D 20 1D [ 2] 502 jra 00115$
+ 008B2F 503 00114$:
+ 504 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 732: RTC->TR1 = (uint8_t)(ByteToBcd2(RTC_TimeStruct->RTC_Seconds));
+ 008B2F 89 [ 2] 505 pushw x
+ 008B30 CD 92 35 [ 4] 506 call _ByteToBcd2
+ 008B33 85 [ 2] 507 popw x
+ 008B34 C7 51 40 [ 1] 508 ld 0x5140, a
+ 509 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 733: RTC->TR2 = (uint8_t)(ByteToBcd2(RTC_TimeStruct->RTC_Minutes)) ;
+ 008B37 16 02 [ 2] 510 ldw y, (0x02, sp)
+ 008B39 90 F6 [ 1] 511 ld a, (y)
+ 008B3B 89 [ 2] 512 pushw x
+ 008B3C CD 92 35 [ 4] 513 call _ByteToBcd2
+ 008B3F 85 [ 2] 514 popw x
+ 008B40 C7 51 41 [ 1] 515 ld 0x5141, a
+ 516 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 734: RTC->TR3 = (uint8_t)( temp | ByteToBcd2(RTC_TimeStruct->RTC_Hours));
+ 008B43 F6 [ 1] 517 ld a, (x)
+ 008B44 CD 92 35 [ 4] 518 call _ByteToBcd2
+ 008B47 1A 01 [ 1] 519 or a, (0x01, sp)
+ 008B49 C7 51 42 [ 1] 520 ld 0x5142, a
+ 008B4C 521 00115$:
+ 522 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 737: (void)(RTC->DR3);
+ 008B4C C6 51 46 [ 1] 523 ld a, 0x5146
+ 524 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 740: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 008B4F 72 1F 51 4C [ 1] 525 bres 0x514c, #7
+ 526 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 743: RTC->WPR = 0xFF;
+ 008B53 35 FF 51 59 [ 1] 527 mov 0x5159+0, #0xff
+ 528 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 746: if ((RTC->CR1 & RTC_CR1_BYPSHAD) == RESET)
+ 008B57 72 08 51 48 0C [ 2] 529 btjt 0x5148, #4, 00120$
+ 530 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 748: if (RTC_WaitForSynchro() == ERROR)
+ 008B5C CD 8A 6D [ 4] 531 call _RTC_WaitForSynchro
+ 008B5F 4D [ 1] 532 tnz a
+ 008B60 26 03 [ 1] 533 jrne 00117$
+ 534 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 750: status = ERROR;
+ 008B62 4F [ 1] 535 clr a
+ 008B63 20 05 [ 2] 536 jra 00124$
+ 008B65 537 00117$:
+ 538 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 754: status = SUCCESS;
+ 008B65 A6 01 [ 1] 539 ld a, #0x01
+ 540 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 759: status = SUCCESS;
+ 008B67 C5 541 .byte 0xc5
+ 008B68 542 00120$:
+ 008B68 A6 01 [ 1] 543 ld a, #0x01
+ 008B6A 544 00124$:
+ 545 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 763: return (ErrorStatus)status;
+ 546 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 764: }
+ 008B6A 5B 06 [ 2] 547 addw sp, #6
+ 008B6C 81 [ 4] 548 ret
+ 549 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 775: void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct)
+ 550 ; -----------------------------------------
+ 551 ; function RTC_TimeStructInit
+ 552 ; -----------------------------------------
+ 008B6D 553 _RTC_TimeStructInit:
+ 554 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 778: RTC_TimeStruct->RTC_H12 = RTC_H12_AM;
+ 008B6D 90 93 [ 1] 555 ldw y, x
+ 008B6F 6F 03 [ 1] 556 clr (0x0003, x)
+ 557 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 779: RTC_TimeStruct->RTC_Hours = 0;
+ 008B71 90 7F [ 1] 558 clr (y)
+ 559 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 780: RTC_TimeStruct->RTC_Minutes = 0;
+ 008B73 93 [ 1] 560 ldw x, y
+ 008B74 6F 01 [ 1] 561 clr (0x01, x)
+ 562 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 781: RTC_TimeStruct->RTC_Seconds = 0;
+ 008B76 93 [ 1] 563 ldw x, y
+ 008B77 6F 02 [ 1] 564 clr (0x02, x)
+ 565 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 782: }
+ 008B79 81 [ 4] 566 ret
+ 567 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 798: void RTC_GetTime(RTC_Format_TypeDef RTC_Format,
+ 568 ; -----------------------------------------
+ 569 ; function RTC_GetTime
+ 570 ; -----------------------------------------
+ 008B7A 571 _RTC_GetTime:
+ 008B7A 52 06 [ 2] 572 sub sp, #6
+ 008B7C 6B 06 [ 1] 573 ld (0x06, sp), a
+ 574 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 808: RTC_TimeStruct->RTC_Seconds = RTC->TR1;
+ 008B7E 90 93 [ 1] 575 ldw y, x
+ 008B80 5C [ 1] 576 incw x
+ 008B81 5C [ 1] 577 incw x
+ 008B82 1F 01 [ 2] 578 ldw (0x01, sp), x
+ 008B84 C6 51 40 [ 1] 579 ld a, 0x5140
+ 008B87 1E 01 [ 2] 580 ldw x, (0x01, sp)
+ 008B89 F7 [ 1] 581 ld (x), a
+ 582 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 811: RTC_TimeStruct->RTC_Minutes = RTC->TR2;
+ 008B8A 93 [ 1] 583 ldw x, y
+ 008B8B 5C [ 1] 584 incw x
+ 008B8C 1F 03 [ 2] 585 ldw (0x03, sp), x
+ 008B8E C6 51 41 [ 1] 586 ld a, 0x5141
+ 008B91 1E 03 [ 2] 587 ldw x, (0x03, sp)
+ 008B93 F7 [ 1] 588 ld (x), a
+ 589 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 814: tmpreg = (uint8_t)RTC->TR3;
+ 008B94 C6 51 42 [ 1] 590 ld a, 0x5142
+ 008B97 6B 05 [ 1] 591 ld (0x05, sp), a
+ 592 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 817: (void) (RTC->DR3) ;
+ 008B99 C6 51 46 [ 1] 593 ld a, 0x5146
+ 594 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 821: RTC_TimeStruct->RTC_Hours = (uint8_t)(tmpreg & (uint8_t)~(RTC_TR3_PM));
+ 008B9C 93 [ 1] 595 ldw x, y
+ 008B9D 7B 05 [ 1] 596 ld a, (0x05, sp)
+ 008B9F A4 BF [ 1] 597 and a, #0xbf
+ 008BA1 F7 [ 1] 598 ld (x), a
+ 599 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 824: RTC_TimeStruct->RTC_H12 = (RTC_H12_TypeDef)(tmpreg & RTC_TR3_PM);
+ 008BA2 72 A9 00 03 [ 2] 600 addw y, #0x0003
+ 008BA6 7B 05 [ 1] 601 ld a, (0x05, sp)
+ 008BA8 A4 40 [ 1] 602 and a, #0x40
+ 008BAA 90 F7 [ 1] 603 ld (y), a
+ 604 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 827: if (RTC_Format == RTC_Format_BIN)
+ 008BAC 0D 06 [ 1] 605 tnz (0x06, sp)
+ 008BAE 26 19 [ 1] 606 jrne 00103$
+ 607 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 830: RTC_TimeStruct->RTC_Hours = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Hours);
+ 008BB0 F6 [ 1] 608 ld a, (x)
+ 008BB1 89 [ 2] 609 pushw x
+ 008BB2 CD 92 48 [ 4] 610 call _Bcd2ToByte
+ 008BB5 85 [ 2] 611 popw x
+ 008BB6 F7 [ 1] 612 ld (x), a
+ 613 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 831: RTC_TimeStruct->RTC_Minutes = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Minutes);
+ 008BB7 1E 03 [ 2] 614 ldw x, (0x03, sp)
+ 008BB9 F6 [ 1] 615 ld a, (x)
+ 008BBA CD 92 48 [ 4] 616 call _Bcd2ToByte
+ 008BBD 1E 03 [ 2] 617 ldw x, (0x03, sp)
+ 008BBF F7 [ 1] 618 ld (x), a
+ 619 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 832: RTC_TimeStruct->RTC_Seconds = (uint8_t)Bcd2ToByte(RTC_TimeStruct->RTC_Seconds);
+ 008BC0 1E 01 [ 2] 620 ldw x, (0x01, sp)
+ 008BC2 F6 [ 1] 621 ld a, (x)
+ 008BC3 CD 92 48 [ 4] 622 call _Bcd2ToByte
+ 008BC6 1E 01 [ 2] 623 ldw x, (0x01, sp)
+ 008BC8 F7 [ 1] 624 ld (x), a
+ 008BC9 625 00103$:
+ 626 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 834: }
+ 008BC9 5B 06 [ 2] 627 addw sp, #6
+ 008BCB 81 [ 4] 628 ret
+ 629 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 845: uint16_t RTC_GetSubSecond(void)
+ 630 ; -----------------------------------------
+ 631 ; function RTC_GetSubSecond
+ 632 ; -----------------------------------------
+ 008BCC 633 _RTC_GetSubSecond:
+ 008BCC 89 [ 2] 634 pushw x
+ 635 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 851: ssrhreg = RTC->SSRH;
+ 008BCD C6 51 57 [ 1] 636 ld a, 0x5157
+ 008BD0 95 [ 1] 637 ld xh, a
+ 638 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 852: ssrlreg = RTC->SSRL;
+ 008BD1 C6 51 58 [ 1] 639 ld a, 0x5158
+ 008BD4 97 [ 1] 640 ld xl, a
+ 641 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 855: (void) (RTC->DR3);
+ 008BD5 C6 51 46 [ 1] 642 ld a, 0x5146
+ 643 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 858: ssrreg = (uint16_t)((uint16_t)((uint16_t)ssrhreg << 8) | (uint16_t)(ssrlreg));
+ 008BD8 0F 02 [ 1] 644 clr (0x02, sp)
+ 645 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 859: return (uint16_t)(ssrreg);
+ 646 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 860: }
+ 008BDA 5B 02 [ 2] 647 addw sp, #2
+ 008BDC 81 [ 4] 648 ret
+ 649 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 876: ErrorStatus RTC_SetDate(RTC_Format_TypeDef RTC_Format,
+ 650 ; -----------------------------------------
+ 651 ; function RTC_SetDate
+ 652 ; -----------------------------------------
+ 008BDD 653 _RTC_SetDate:
+ 008BDD 52 0A [ 2] 654 sub sp, #10
+ 008BDF 6B 0A [ 1] 655 ld (0x0a, sp), a
+ 656 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 881: if ((RTC_Format == RTC_Format_BIN) && ((RTC_DateStruct->RTC_Month & TEN_VALUE_BCD) == TEN_VALUE_BCD))
+ 008BE1 1F 08 [ 2] 657 ldw (0x08, sp), x
+ 008BE3 5C [ 1] 658 incw x
+ 008BE4 1F 01 [ 2] 659 ldw (0x01, sp), x
+ 008BE6 0D 0A [ 1] 660 tnz (0x0a, sp)
+ 008BE8 26 11 [ 1] 661 jrne 00106$
+ 008BEA 1E 01 [ 2] 662 ldw x, (0x01, sp)
+ 008BEC F6 [ 1] 663 ld a, (x)
+ 008BED 97 [ 1] 664 ld xl, a
+ 008BEE 43 [ 1] 665 cpl a
+ 008BEF A5 10 [ 1] 666 bcp a, #0x10
+ 008BF1 26 08 [ 1] 667 jrne 00106$
+ 668 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 883: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)((RTC_DateStruct->RTC_Month & (uint8_t)~(TEN_VALUE_BCD)) + TEN_VALUE_BIN);
+ 008BF3 9F [ 1] 669 ld a, xl
+ 008BF4 A4 EF [ 1] 670 and a, #0xef
+ 008BF6 AB 0A [ 1] 671 add a, #0x0a
+ 008BF8 1E 01 [ 2] 672 ldw x, (0x01, sp)
+ 008BFA F7 [ 1] 673 ld (x), a
+ 674 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 902: assert_param(IS_RTC_DATE_MAX(Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Date)));
+ 008BFB 675 00106$:
+ 676 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 907: RTC->WPR = 0xCA;
+ 008BFB 35 CA 51 59 [ 1] 677 mov 0x5159+0, #0xca
+ 678 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 908: RTC->WPR = 0x53;
+ 008BFF 35 53 51 59 [ 1] 679 mov 0x5159+0, #0x53
+ 680 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 911: if (RTC_EnterInitMode() == ERROR)
+ 008C03 CD 8A 47 [ 4] 681 call _RTC_EnterInitMode
+ 008C06 4D [ 1] 682 tnz a
+ 008C07 26 07 [ 1] 683 jrne 00117$
+ 684 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 913: status = ERROR;
+ 008C09 4F [ 1] 685 clr a
+ 686 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 915: RTC->WPR = 0xFF;
+ 008C0A 35 FF 51 59 [ 1] 687 mov 0x5159+0, #0xff
+ 008C0E 20 71 [ 2] 688 jra 00118$
+ 008C10 689 00117$:
+ 690 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 919: (void)(RTC->TR1);
+ 008C10 C6 51 40 [ 1] 691 ld a, 0x5140
+ 692 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ 008C13 1E 08 [ 2] 693 ldw x, (0x08, sp)
+ 694 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 925: RTC->DR2 = (uint8_t)((RTC_DateStruct->RTC_Month) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ 008C15 16 08 [ 2] 695 ldw y, (0x08, sp)
+ 008C17 17 03 [ 2] 696 ldw (0x03, sp), y
+ 697 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 926: RTC->DR3 = (uint8_t)((RTC_DateStruct->RTC_Year));
+ 008C19 16 08 [ 2] 698 ldw y, (0x08, sp)
+ 008C1B 72 A9 00 03 [ 2] 699 addw y, #0x0003
+ 008C1F 17 05 [ 2] 700 ldw (0x05, sp), y
+ 701 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ 008C21 E6 02 [ 1] 702 ld a, (0x2, x)
+ 703 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 922: if (RTC_Format != RTC_Format_BIN)
+ 008C23 0D 0A [ 1] 704 tnz (0x0a, sp)
+ 008C25 27 1C [ 1] 705 jreq 00108$
+ 706 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 924: RTC->DR1 = (uint8_t)(RTC_DateStruct->RTC_Date);
+ 008C27 C7 51 44 [ 1] 707 ld 0x5144, a
+ 708 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 925: RTC->DR2 = (uint8_t)((RTC_DateStruct->RTC_Month) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ 008C2A 1E 01 [ 2] 709 ldw x, (0x01, sp)
+ 008C2C F6 [ 1] 710 ld a, (x)
+ 008C2D 6B 07 [ 1] 711 ld (0x07, sp), a
+ 008C2F 1E 03 [ 2] 712 ldw x, (0x03, sp)
+ 008C31 F6 [ 1] 713 ld a, (x)
+ 008C32 4E [ 1] 714 swap a
+ 008C33 A4 F0 [ 1] 715 and a, #0xf0
+ 008C35 48 [ 1] 716 sll a
+ 008C36 1A 07 [ 1] 717 or a, (0x07, sp)
+ 008C38 C7 51 45 [ 1] 718 ld 0x5145, a
+ 719 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 926: RTC->DR3 = (uint8_t)((RTC_DateStruct->RTC_Year));
+ 008C3B 1E 05 [ 2] 720 ldw x, (0x05, sp)
+ 008C3D F6 [ 1] 721 ld a, (x)
+ 008C3E C7 51 46 [ 1] 722 ld 0x5146, a
+ 008C41 20 23 [ 2] 723 jra 00109$
+ 008C43 724 00108$:
+ 725 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 930: RTC->DR1 = (uint8_t)(ByteToBcd2 ((uint8_t)RTC_DateStruct->RTC_Date));
+ 008C43 CD 92 35 [ 4] 726 call _ByteToBcd2
+ 008C46 C7 51 44 [ 1] 727 ld 0x5144, a
+ 728 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 931: RTC->DR2 = (uint8_t)((ByteToBcd2((uint8_t)RTC_DateStruct->RTC_Month)) | (uint8_t)((RTC_DateStruct->RTC_WeekDay) << 5));
+ 008C49 1E 01 [ 2] 729 ldw x, (0x01, sp)
+ 008C4B F6 [ 1] 730 ld a, (x)
+ 008C4C CD 92 35 [ 4] 731 call _ByteToBcd2
+ 008C4F 6B 07 [ 1] 732 ld (0x07, sp), a
+ 008C51 1E 03 [ 2] 733 ldw x, (0x03, sp)
+ 008C53 F6 [ 1] 734 ld a, (x)
+ 008C54 4E [ 1] 735 swap a
+ 008C55 A4 F0 [ 1] 736 and a, #0xf0
+ 008C57 48 [ 1] 737 sll a
+ 008C58 1A 07 [ 1] 738 or a, (0x07, sp)
+ 008C5A C7 51 45 [ 1] 739 ld 0x5145, a
+ 740 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 932: RTC->DR3 = (uint8_t)(ByteToBcd2((uint8_t)RTC_DateStruct->RTC_Year));
+ 008C5D 1E 05 [ 2] 741 ldw x, (0x05, sp)
+ 008C5F F6 [ 1] 742 ld a, (x)
+ 008C60 CD 92 35 [ 4] 743 call _ByteToBcd2
+ 008C63 C7 51 46 [ 1] 744 ld 0x5146, a
+ 008C66 745 00109$:
+ 746 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 936: RTC->ISR1 &= (uint8_t)~RTC_ISR1_INIT;
+ 008C66 72 1F 51 4C [ 1] 747 bres 0x514c, #7
+ 748 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 939: RTC->WPR = 0xFF;
+ 008C6A 35 FF 51 59 [ 1] 749 mov 0x5159+0, #0xff
+ 750 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 942: if ((RTC->CR1 & RTC_CR1_BYPSHAD) == RESET)
+ 008C6E 72 08 51 48 0C [ 2] 751 btjt 0x5148, #4, 00114$
+ 752 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 944: if (RTC_WaitForSynchro() == ERROR)
+ 008C73 CD 8A 6D [ 4] 753 call _RTC_WaitForSynchro
+ 008C76 4D [ 1] 754 tnz a
+ 008C77 26 03 [ 1] 755 jrne 00111$
+ 756 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 946: status = ERROR;
+ 008C79 4F [ 1] 757 clr a
+ 008C7A 20 05 [ 2] 758 jra 00118$
+ 008C7C 759 00111$:
+ 760 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 950: status = SUCCESS;
+ 008C7C A6 01 [ 1] 761 ld a, #0x01
+ 762 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 955: status = SUCCESS;
+ 008C7E C5 763 .byte 0xc5
+ 008C7F 764 00114$:
+ 008C7F A6 01 [ 1] 765 ld a, #0x01
+ 008C81 766 00118$:
+ 767 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 959: return (ErrorStatus)status;
+ 768 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 960: }
+ 008C81 5B 0A [ 2] 769 addw sp, #10
+ 008C83 81 [ 4] 770 ret
+ 771 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 968: void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct)
+ 772 ; -----------------------------------------
+ 773 ; function RTC_DateStructInit
+ 774 ; -----------------------------------------
+ 008C84 775 _RTC_DateStructInit:
+ 008C84 51 [ 1] 776 exgw x, y
+ 777 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 971: RTC_DateStruct->RTC_WeekDay = RTC_Weekday_Monday;
+ 008C85 A6 01 [ 1] 778 ld a, #0x01
+ 008C87 90 F7 [ 1] 779 ld (y), a
+ 780 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 972: RTC_DateStruct->RTC_Date = 1;
+ 008C89 93 [ 1] 781 ldw x, y
+ 008C8A 5C [ 1] 782 incw x
+ 008C8B 5C [ 1] 783 incw x
+ 008C8C A6 01 [ 1] 784 ld a, #0x01
+ 008C8E F7 [ 1] 785 ld (x), a
+ 786 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 973: RTC_DateStruct->RTC_Month = RTC_Month_January;
+ 008C8F 93 [ 1] 787 ldw x, y
+ 008C90 5C [ 1] 788 incw x
+ 008C91 A6 01 [ 1] 789 ld a, #0x01
+ 008C93 F7 [ 1] 790 ld (x), a
+ 791 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 974: RTC_DateStruct->RTC_Year = 0;
+ 008C94 93 [ 1] 792 ldw x, y
+ 008C95 6F 03 [ 1] 793 clr (0x0003, x)
+ 794 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 975: }
+ 008C97 81 [ 4] 795 ret
+ 796 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 988: void RTC_GetDate(RTC_Format_TypeDef RTC_Format,
+ 797 ; -----------------------------------------
+ 798 ; function RTC_GetDate
+ 799 ; -----------------------------------------
+ 008C98 800 _RTC_GetDate:
+ 008C98 52 06 [ 2] 801 sub sp, #6
+ 008C9A 6B 06 [ 1] 802 ld (0x06, sp), a
+ 008C9C 51 [ 1] 803 exgw x, y
+ 804 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 997: (void) (RTC->TR1) ;
+ 008C9D C6 51 40 [ 1] 805 ld a, 0x5140
+ 806 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 998: RTC_DateStruct->RTC_Date = (uint8_t)(RTC->DR1);
+ 008CA0 93 [ 1] 807 ldw x, y
+ 008CA1 5C [ 1] 808 incw x
+ 008CA2 5C [ 1] 809 incw x
+ 008CA3 1F 01 [ 2] 810 ldw (0x01, sp), x
+ 008CA5 C6 51 44 [ 1] 811 ld a, 0x5144
+ 008CA8 1E 01 [ 2] 812 ldw x, (0x01, sp)
+ 008CAA F7 [ 1] 813 ld (x), a
+ 814 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 999: tmpreg = (uint8_t)RTC->DR2;
+ 008CAB C6 51 45 [ 1] 815 ld a, 0x5145
+ 008CAE 6B 03 [ 1] 816 ld (0x03, sp), a
+ 817 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1000: RTC_DateStruct->RTC_Year = (uint8_t)(RTC->DR3);
+ 008CB0 93 [ 1] 818 ldw x, y
+ 008CB1 1C 00 03 [ 2] 819 addw x, #0x0003
+ 008CB4 1F 04 [ 2] 820 ldw (0x04, sp), x
+ 008CB6 C6 51 46 [ 1] 821 ld a, 0x5146
+ 008CB9 1E 04 [ 2] 822 ldw x, (0x04, sp)
+ 008CBB F7 [ 1] 823 ld (x), a
+ 824 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1003: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)(tmpreg & (uint8_t)(RTC_DR2_MT | RTC_DR2_MU));
+ 008CBC 93 [ 1] 825 ldw x, y
+ 008CBD 5C [ 1] 826 incw x
+ 008CBE 7B 03 [ 1] 827 ld a, (0x03, sp)
+ 008CC0 A4 1F [ 1] 828 and a, #0x1f
+ 008CC2 F7 [ 1] 829 ld (x), a
+ 830 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1004: RTC_DateStruct->RTC_WeekDay = (RTC_Weekday_TypeDef)((uint8_t)((uint8_t)tmpreg & (uint8_t)(RTC_DR2_WDU)) >> (uint8_t)5);
+ 008CC3 7B 03 [ 1] 831 ld a, (0x03, sp)
+ 008CC5 A4 E0 [ 1] 832 and a, #0xe0
+ 008CC7 4E [ 1] 833 swap a
+ 008CC8 A4 0F [ 1] 834 and a, #0x0f
+ 008CCA 44 [ 1] 835 srl a
+ 008CCB 90 F7 [ 1] 836 ld (y), a
+ 837 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1007: if (RTC_Format == RTC_Format_BIN)
+ 008CCD 0D 06 [ 1] 838 tnz (0x06, sp)
+ 008CCF 26 1D [ 1] 839 jrne 00103$
+ 840 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1010: RTC_DateStruct->RTC_Year = (uint8_t)Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Year);
+ 008CD1 16 04 [ 2] 841 ldw y, (0x04, sp)
+ 008CD3 90 F6 [ 1] 842 ld a, (y)
+ 008CD5 89 [ 2] 843 pushw x
+ 008CD6 CD 92 48 [ 4] 844 call _Bcd2ToByte
+ 008CD9 85 [ 2] 845 popw x
+ 008CDA 16 04 [ 2] 846 ldw y, (0x04, sp)
+ 008CDC 90 F7 [ 1] 847 ld (y), a
+ 848 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1011: RTC_DateStruct->RTC_Month = (RTC_Month_TypeDef)Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Month);
+ 008CDE F6 [ 1] 849 ld a, (x)
+ 008CDF 89 [ 2] 850 pushw x
+ 008CE0 CD 92 48 [ 4] 851 call _Bcd2ToByte
+ 008CE3 85 [ 2] 852 popw x
+ 008CE4 F7 [ 1] 853 ld (x), a
+ 854 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1012: RTC_DateStruct->RTC_Date = (uint8_t)(Bcd2ToByte((uint8_t)RTC_DateStruct->RTC_Date));
+ 008CE5 1E 01 [ 2] 855 ldw x, (0x01, sp)
+ 008CE7 F6 [ 1] 856 ld a, (x)
+ 008CE8 CD 92 48 [ 4] 857 call _Bcd2ToByte
+ 008CEB 1E 01 [ 2] 858 ldw x, (0x01, sp)
+ 008CED F7 [ 1] 859 ld (x), a
+ 008CEE 860 00103$:
+ 861 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1014: }
+ 008CEE 5B 06 [ 2] 862 addw sp, #6
+ 008CF0 81 [ 4] 863 ret
+ 864 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1044: void RTC_SetAlarm(RTC_Format_TypeDef RTC_Format,
+ 865 ; -----------------------------------------
+ 866 ; function RTC_SetAlarm
+ 867 ; -----------------------------------------
+ 008CF1 868 _RTC_SetAlarm:
+ 008CF1 52 11 [ 2] 869 sub sp, #17
+ 008CF3 6B 11 [ 1] 870 ld (0x11, sp), a
+ 008CF5 51 [ 1] 871 exgw x, y
+ 872 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1062: if ((RTC->CR1 & RTC_CR1_FMT) != RESET)
+ 008CF6 C6 51 48 [ 1] 873 ld a, 0x5148
+ 874 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1094: if ((RTC_AlarmStruct->RTC_AlarmMask & RTC_AlarmMask_DateWeekDay) == RESET )
+ 008CF9 93 [ 1] 875 ldw x, y
+ 008CFA 1C 00 04 [ 2] 876 addw x, #0x0004
+ 008CFD 1F 05 [ 2] 877 ldw (0x05, sp), x
+ 878 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1108: RTC->WPR = 0xCA;
+ 008CFF 35 CA 51 59 [ 1] 879 mov 0x5159+0, #0xca
+ 880 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1109: RTC->WPR = 0x53;
+ 008D03 35 53 51 59 [ 1] 881 mov 0x5159+0, #0x53
+ 882 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ 008D07 17 01 [ 2] 883 ldw (0x01, sp), y
+ 884 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1118: tmpreg2 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) | \
+ 008D09 93 [ 1] 885 ldw x, y
+ 008D0A 5C [ 1] 886 incw x
+ 008D0B 1F 03 [ 2] 887 ldw (0x03, sp), x
+ 888 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1121: tmpreg3 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) | \
+ 008D0D 17 07 [ 2] 889 ldw (0x07, sp), y
+ 008D0F 93 [ 1] 890 ldw x, y
+ 008D10 1C 00 03 [ 2] 891 addw x, #0x0003
+ 008D13 1F 09 [ 2] 892 ldw (0x09, sp), x
+ 893 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1125: tmpreg4 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmDateWeekDay) | \
+ 008D15 93 [ 1] 894 ldw x, y
+ 008D16 1C 00 06 [ 2] 895 addw x, #0x0006
+ 008D19 1F 0B [ 2] 896 ldw (0x0b, sp), x
+ 008D1B 93 [ 1] 897 ldw x, y
+ 008D1C 1C 00 05 [ 2] 898 addw x, #0x0005
+ 008D1F 1F 0D [ 2] 899 ldw (0x0d, sp), x
+ 900 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ 008D21 1E 01 [ 2] 901 ldw x, (0x01, sp)
+ 008D23 E6 02 [ 1] 902 ld a, (0x2, x)
+ 008D25 6B 10 [ 1] 903 ld (0x10, sp), a
+ 904 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1113: if (RTC_Format != RTC_Format_BIN)
+ 008D27 0D 11 [ 1] 905 tnz (0x11, sp)
+ 008D29 27 47 [ 1] 906 jreq 00116$
+ 907 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1115: tmpreg1 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ 008D2B 1E 05 [ 2] 908 ldw x, (0x05, sp)
+ 008D2D F6 [ 1] 909 ld a, (x)
+ 008D2E 97 [ 1] 910 ld xl, a
+ 008D2F A4 80 [ 1] 911 and a, #0x80
+ 008D31 1A 10 [ 1] 912 or a, (0x10, sp)
+ 008D33 6B 0F [ 1] 913 ld (0x0f, sp), a
+ 914 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1118: tmpreg2 = (uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) | \
+ 008D35 16 03 [ 2] 915 ldw y, (0x03, sp)
+ 008D37 90 F6 [ 1] 916 ld a, (y)
+ 008D39 6B 10 [ 1] 917 ld (0x10, sp), a
+ 008D3B 9F [ 1] 918 ld a, xl
+ 008D3C 48 [ 1] 919 sll a
+ 008D3D A4 80 [ 1] 920 and a, #0x80
+ 008D3F 1A 10 [ 1] 921 or a, (0x10, sp)
+ 008D41 6B 10 [ 1] 922 ld (0x10, sp), a
+ 923 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1121: tmpreg3 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) | \
+ 008D43 16 07 [ 2] 924 ldw y, (0x07, sp)
+ 008D45 90 F6 [ 1] 925 ld a, (y)
+ 008D47 6B 06 [ 1] 926 ld (0x06, sp), a
+ 008D49 16 09 [ 2] 927 ldw y, (0x09, sp)
+ 008D4B 90 F6 [ 1] 928 ld a, (y)
+ 008D4D 1A 06 [ 1] 929 or a, (0x06, sp)
+ 008D4F 6B 0A [ 1] 930 ld (0x0a, sp), a
+ 008D51 9F [ 1] 931 ld a, xl
+ 008D52 48 [ 1] 932 sll a
+ 008D53 48 [ 1] 933 sll a
+ 008D54 A4 80 [ 1] 934 and a, #0x80
+ 008D56 1A 0A [ 1] 935 or a, (0x0a, sp)
+ 008D58 6B 0A [ 1] 936 ld (0x0a, sp), a
+ 937 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1125: tmpreg4 = (uint8_t)((uint8_t)((uint8_t)(RTC_AlarmStruct->RTC_AlarmDateWeekDay) | \
+ 008D5A 16 0B [ 2] 938 ldw y, (0x0b, sp)
+ 008D5C 90 F6 [ 1] 939 ld a, (y)
+ 008D5E 6B 09 [ 1] 940 ld (0x09, sp), a
+ 008D60 16 0D [ 2] 941 ldw y, (0x0d, sp)
+ 008D62 90 F6 [ 1] 942 ld a, (y)
+ 008D64 1A 09 [ 1] 943 or a, (0x09, sp)
+ 008D66 6B 0E [ 1] 944 ld (0x0e, sp), a
+ 008D68 9F [ 1] 945 ld a, xl
+ 008D69 48 [ 1] 946 sll a
+ 008D6A 48 [ 1] 947 sll a
+ 008D6B 48 [ 1] 948 sll a
+ 008D6C A4 80 [ 1] 949 and a, #0x80
+ 008D6E 1A 0E [ 1] 950 or a, (0x0e, sp)
+ 008D70 20 55 [ 2] 951 jra 00117$
+ 008D72 952 00116$:
+ 953 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1132: tmpreg1 = (uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds)) | \
+ 008D72 7B 10 [ 1] 954 ld a, (0x10, sp)
+ 008D74 CD 92 35 [ 4] 955 call _ByteToBcd2
+ 008D77 6B 10 [ 1] 956 ld (0x10, sp), a
+ 008D79 1E 05 [ 2] 957 ldw x, (0x05, sp)
+ 008D7B F6 [ 1] 958 ld a, (x)
+ 008D7C A4 80 [ 1] 959 and a, #0x80
+ 008D7E 1A 10 [ 1] 960 or a, (0x10, sp)
+ 008D80 6B 0F [ 1] 961 ld (0x0f, sp), a
+ 962 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1135: tmpreg2 = (uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes)) | \
+ 008D82 1E 03 [ 2] 963 ldw x, (0x03, sp)
+ 008D84 F6 [ 1] 964 ld a, (x)
+ 008D85 CD 92 35 [ 4] 965 call _ByteToBcd2
+ 008D88 6B 10 [ 1] 966 ld (0x10, sp), a
+ 008D8A 1E 05 [ 2] 967 ldw x, (0x05, sp)
+ 008D8C F6 [ 1] 968 ld a, (x)
+ 008D8D 48 [ 1] 969 sll a
+ 008D8E A4 80 [ 1] 970 and a, #0x80
+ 008D90 1A 10 [ 1] 971 or a, (0x10, sp)
+ 008D92 6B 10 [ 1] 972 ld (0x10, sp), a
+ 973 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1138: tmpreg3 = (uint8_t)((uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours)) | \
+ 008D94 1E 07 [ 2] 974 ldw x, (0x07, sp)
+ 008D96 F6 [ 1] 975 ld a, (x)
+ 008D97 CD 92 35 [ 4] 976 call _ByteToBcd2
+ 008D9A 6B 08 [ 1] 977 ld (0x08, sp), a
+ 008D9C 1E 09 [ 2] 978 ldw x, (0x09, sp)
+ 008D9E F6 [ 1] 979 ld a, (x)
+ 008D9F 1A 08 [ 1] 980 or a, (0x08, sp)
+ 008DA1 6B 0A [ 1] 981 ld (0x0a, sp), a
+ 008DA3 1E 05 [ 2] 982 ldw x, (0x05, sp)
+ 008DA5 F6 [ 1] 983 ld a, (x)
+ 008DA6 48 [ 1] 984 sll a
+ 008DA7 48 [ 1] 985 sll a
+ 008DA8 A4 80 [ 1] 986 and a, #0x80
+ 008DAA 1A 0A [ 1] 987 or a, (0x0a, sp)
+ 008DAC 6B 0A [ 1] 988 ld (0x0a, sp), a
+ 989 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1142: tmpreg4 = (uint8_t)((uint8_t)((ByteToBcd2(RTC_AlarmStruct->RTC_AlarmDateWeekDay)) | \
+ 008DAE 1E 0B [ 2] 990 ldw x, (0x0b, sp)
+ 008DB0 F6 [ 1] 991 ld a, (x)
+ 008DB1 CD 92 35 [ 4] 992 call _ByteToBcd2
+ 008DB4 6B 0C [ 1] 993 ld (0x0c, sp), a
+ 008DB6 1E 0D [ 2] 994 ldw x, (0x0d, sp)
+ 008DB8 F6 [ 1] 995 ld a, (x)
+ 008DB9 1A 0C [ 1] 996 or a, (0x0c, sp)
+ 008DBB 6B 0E [ 1] 997 ld (0x0e, sp), a
+ 008DBD 1E 05 [ 2] 998 ldw x, (0x05, sp)
+ 008DBF F6 [ 1] 999 ld a, (x)
+ 008DC0 48 [ 1] 1000 sll a
+ 008DC1 48 [ 1] 1001 sll a
+ 008DC2 48 [ 1] 1002 sll a
+ 008DC3 A4 80 [ 1] 1003 and a, #0x80
+ 008DC5 1A 0E [ 1] 1004 or a, (0x0e, sp)
+ 008DC7 1005 00117$:
+ 1006 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1148: RTC->ALRMAR1 = tmpreg1;
+ 008DC7 AE 51 5C [ 2] 1007 ldw x, #0x515c
+ 008DCA 88 [ 1] 1008 push a
+ 008DCB 7B 10 [ 1] 1009 ld a, (0x10, sp)
+ 008DCD F7 [ 1] 1010 ld (x), a
+ 008DCE 84 [ 1] 1011 pop a
+ 1012 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1149: RTC->ALRMAR2 = tmpreg2;
+ 008DCF AE 51 5D [ 2] 1013 ldw x, #0x515d
+ 008DD2 88 [ 1] 1014 push a
+ 008DD3 7B 11 [ 1] 1015 ld a, (0x11, sp)
+ 008DD5 F7 [ 1] 1016 ld (x), a
+ 008DD6 84 [ 1] 1017 pop a
+ 1018 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1150: RTC->ALRMAR3 = tmpreg3;
+ 008DD7 AE 51 5E [ 2] 1019 ldw x, #0x515e
+ 008DDA 88 [ 1] 1020 push a
+ 008DDB 7B 0B [ 1] 1021 ld a, (0x0b, sp)
+ 008DDD F7 [ 1] 1022 ld (x), a
+ 008DDE 84 [ 1] 1023 pop a
+ 1024 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1151: RTC->ALRMAR4 = tmpreg4;
+ 008DDF C7 51 5F [ 1] 1025 ld 0x515f, a
+ 1026 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1154: RTC->WPR = 0xFF;
+ 008DE2 35 FF 51 59 [ 1] 1027 mov 0x5159+0, #0xff
+ 1028 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1155: }
+ 008DE6 5B 11 [ 2] 1029 addw sp, #17
+ 008DE8 81 [ 4] 1030 ret
+ 1031 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1165: void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct)
+ 1032 ; -----------------------------------------
+ 1033 ; function RTC_AlarmStructInit
+ 1034 ; -----------------------------------------
+ 008DE9 1035 _RTC_AlarmStructInit:
+ 1036 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1168: RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = RTC_H12_AM;
+ 008DE9 90 93 [ 1] 1037 ldw y, x
+ 008DEB 6F 03 [ 1] 1038 clr (0x0003, x)
+ 1039 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1169: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = 0;
+ 008DED 90 7F [ 1] 1040 clr (y)
+ 1041 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1170: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = 0;
+ 008DEF 93 [ 1] 1042 ldw x, y
+ 008DF0 6F 01 [ 1] 1043 clr (0x01, x)
+ 1044 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1171: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = 0;
+ 008DF2 93 [ 1] 1045 ldw x, y
+ 008DF3 6F 02 [ 1] 1046 clr (0x02, x)
+ 1047 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1174: RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = RTC_AlarmDateWeekDaySel_Date;
+ 008DF5 93 [ 1] 1048 ldw x, y
+ 008DF6 6F 05 [ 1] 1049 clr (0x0005, x)
+ 1050 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1175: RTC_AlarmStruct->RTC_AlarmDateWeekDay = 1;
+ 008DF8 A6 01 [ 1] 1051 ld a, #0x01
+ 008DFA 90 E7 06 [ 1] 1052 ld (0x0006, y), a
+ 1053 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1178: RTC_AlarmStruct->RTC_AlarmMask = RTC_AlarmMask_All;
+ 008DFD A6 F0 [ 1] 1054 ld a, #0xf0
+ 008DFF 90 E7 04 [ 1] 1055 ld (0x0004, y), a
+ 1056 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1179: }
+ 008E02 81 [ 4] 1057 ret
+ 1058 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1188: void RTC_GetAlarm(RTC_Format_TypeDef RTC_Format,
+ 1059 ; -----------------------------------------
+ 1060 ; function RTC_GetAlarm
+ 1061 ; -----------------------------------------
+ 008E03 1062 _RTC_GetAlarm:
+ 008E03 52 0B [ 2] 1063 sub sp, #11
+ 008E05 6B 0B [ 1] 1064 ld (0x0b, sp), a
+ 008E07 1F 09 [ 2] 1065 ldw (0x09, sp), x
+ 1066 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1201: tmpreg1 = (uint8_t)RTC->ALRMAR1;
+ 008E09 C6 51 5C [ 1] 1067 ld a, 0x515c
+ 008E0C 6B 08 [ 1] 1068 ld (0x08, sp), a
+ 1069 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1202: tmpreg2 = (uint8_t)RTC->ALRMAR2;
+ 008E0E C6 51 5D [ 1] 1070 ld a, 0x515d
+ 008E11 6B 01 [ 1] 1071 ld (0x01, sp), a
+ 1072 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1203: tmpreg3 = (uint8_t)RTC->ALRMAR3;
+ 008E13 C6 51 5E [ 1] 1073 ld a, 0x515e
+ 008E16 6B 02 [ 1] 1074 ld (0x02, sp), a
+ 1075 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1204: tmpreg4 = (uint8_t)RTC->ALRMAR4;
+ 008E18 C6 51 5F [ 1] 1076 ld a, 0x515f
+ 008E1B 6B 03 [ 1] 1077 ld (0x03, sp), a
+ 1078 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1207: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = (uint8_t)((uint8_t)tmpreg1 & (uint8_t)((uint8_t)RTC_ALRMAR1_ST | (uint8_t)RTC_ALRMAR1_SU));
+ 008E1D 1E 09 [ 2] 1079 ldw x, (0x09, sp)
+ 008E1F 5C [ 1] 1080 incw x
+ 008E20 5C [ 1] 1081 incw x
+ 008E21 1F 04 [ 2] 1082 ldw (0x04, sp), x
+ 008E23 7B 08 [ 1] 1083 ld a, (0x08, sp)
+ 008E25 A4 7F [ 1] 1084 and a, #0x7f
+ 008E27 1E 04 [ 2] 1085 ldw x, (0x04, sp)
+ 008E29 F7 [ 1] 1086 ld (x), a
+ 1087 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1208: alarmmask = (uint8_t)(tmpreg1 & RTC_ALRMAR1_MSK1);
+ 008E2A 7B 08 [ 1] 1088 ld a, (0x08, sp)
+ 008E2C A4 80 [ 1] 1089 and a, #0x80
+ 008E2E 6B 08 [ 1] 1090 ld (0x08, sp), a
+ 1091 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1211: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = (uint8_t)((uint8_t)tmpreg2 & (uint8_t)((uint8_t)RTC_ALRMAR2_MNT | (uint8_t)RTC_ALRMAR2_MNU));
+ 008E30 1E 09 [ 2] 1092 ldw x, (0x09, sp)
+ 008E32 5C [ 1] 1093 incw x
+ 008E33 1F 06 [ 2] 1094 ldw (0x06, sp), x
+ 008E35 7B 01 [ 1] 1095 ld a, (0x01, sp)
+ 008E37 A4 7F [ 1] 1096 and a, #0x7f
+ 008E39 1E 06 [ 2] 1097 ldw x, (0x06, sp)
+ 008E3B F7 [ 1] 1098 ld (x), a
+ 1099 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1212: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)(tmpreg2 & RTC_ALRMAR2_MSK2) >> 1));
+ 008E3C 7B 01 [ 1] 1100 ld a, (0x01, sp)
+ 008E3E A4 80 [ 1] 1101 and a, #0x80
+ 008E40 44 [ 1] 1102 srl a
+ 008E41 1A 08 [ 1] 1103 or a, (0x08, sp)
+ 008E43 6B 08 [ 1] 1104 ld (0x08, sp), a
+ 1105 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1215: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = (uint8_t)((uint8_t)tmpreg3 & (uint8_t)((uint8_t)RTC_ALRMAR3_HT | (uint8_t)RTC_ALRMAR3_HU));
+ 008E45 16 09 [ 2] 1106 ldw y, (0x09, sp)
+ 008E47 7B 02 [ 1] 1107 ld a, (0x02, sp)
+ 008E49 A4 3F [ 1] 1108 and a, #0x3f
+ 008E4B 90 F7 [ 1] 1109 ld (y), a
+ 1110 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1216: RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = (RTC_H12_TypeDef)((uint8_t)tmpreg3 & (uint8_t)RTC_ALRMAR3_PM);
+ 008E4D 1E 09 [ 2] 1111 ldw x, (0x09, sp)
+ 008E4F 1C 00 03 [ 2] 1112 addw x, #0x0003
+ 008E52 7B 02 [ 1] 1113 ld a, (0x02, sp)
+ 008E54 A4 40 [ 1] 1114 and a, #0x40
+ 008E56 F7 [ 1] 1115 ld (x), a
+ 1116 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1217: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)((uint8_t)tmpreg3 & (uint8_t)RTC_ALRMAR3_MSK3) >> 2));
+ 008E57 7B 02 [ 1] 1117 ld a, (0x02, sp)
+ 008E59 A4 80 [ 1] 1118 and a, #0x80
+ 008E5B 44 [ 1] 1119 srl a
+ 008E5C 44 [ 1] 1120 srl a
+ 008E5D 1A 08 [ 1] 1121 or a, (0x08, sp)
+ 008E5F 6B 08 [ 1] 1122 ld (0x08, sp), a
+ 1123 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1220: RTC_AlarmStruct->RTC_AlarmDateWeekDay = (uint8_t)((uint8_t)tmpreg4 & (uint8_t)((uint8_t)RTC_ALRMAR4_DT | (uint8_t)RTC_ALRMAR4_DU));
+ 008E61 1E 09 [ 2] 1124 ldw x, (0x09, sp)
+ 008E63 1C 00 06 [ 2] 1125 addw x, #0x0006
+ 008E66 1F 01 [ 2] 1126 ldw (0x01, sp), x
+ 008E68 7B 03 [ 1] 1127 ld a, (0x03, sp)
+ 008E6A A4 3F [ 1] 1128 and a, #0x3f
+ 008E6C 1E 01 [ 2] 1129 ldw x, (0x01, sp)
+ 008E6E F7 [ 1] 1130 ld (x), a
+ 1131 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1221: RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = (RTC_AlarmDateWeekDaySel_TypeDef)((uint8_t)tmpreg4 & (uint8_t)RTC_ALRMAR4_WDSEL);
+ 008E6F 1E 09 [ 2] 1132 ldw x, (0x09, sp)
+ 008E71 1C 00 05 [ 2] 1133 addw x, #0x0005
+ 008E74 7B 03 [ 1] 1134 ld a, (0x03, sp)
+ 008E76 A4 40 [ 1] 1135 and a, #0x40
+ 008E78 F7 [ 1] 1136 ld (x), a
+ 1137 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1222: alarmmask = (uint8_t)((alarmmask) | (uint8_t)((uint8_t)((uint8_t)tmpreg4 & RTC_ALRMAR4_MSK4) >> 3));
+ 008E79 7B 03 [ 1] 1138 ld a, (0x03, sp)
+ 008E7B A4 80 [ 1] 1139 and a, #0x80
+ 008E7D 44 [ 1] 1140 srl a
+ 008E7E 44 [ 1] 1141 srl a
+ 008E7F 44 [ 1] 1142 srl a
+ 008E80 1A 08 [ 1] 1143 or a, (0x08, sp)
+ 1144 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1224: RTC_AlarmStruct->RTC_AlarmMask = alarmmask;
+ 008E82 1E 09 [ 2] 1145 ldw x, (0x09, sp)
+ 008E84 1C 00 04 [ 2] 1146 addw x, #0x0004
+ 008E87 F7 [ 1] 1147 ld (x), a
+ 1148 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1226: if (RTC_Format == RTC_Format_BIN)
+ 008E88 0D 0B [ 1] 1149 tnz (0x0b, sp)
+ 008E8A 26 26 [ 1] 1150 jrne 00103$
+ 1151 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1228: RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours);
+ 008E8C 90 F6 [ 1] 1152 ld a, (y)
+ 008E8E 90 89 [ 2] 1153 pushw y
+ 008E90 CD 92 48 [ 4] 1154 call _Bcd2ToByte
+ 008E93 90 85 [ 2] 1155 popw y
+ 008E95 90 F7 [ 1] 1156 ld (y), a
+ 1157 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1229: RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes);
+ 008E97 1E 06 [ 2] 1158 ldw x, (0x06, sp)
+ 008E99 F6 [ 1] 1159 ld a, (x)
+ 008E9A CD 92 48 [ 4] 1160 call _Bcd2ToByte
+ 008E9D 1E 06 [ 2] 1161 ldw x, (0x06, sp)
+ 008E9F F7 [ 1] 1162 ld (x), a
+ 1163 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1230: RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds);
+ 008EA0 1E 04 [ 2] 1164 ldw x, (0x04, sp)
+ 008EA2 F6 [ 1] 1165 ld a, (x)
+ 008EA3 CD 92 48 [ 4] 1166 call _Bcd2ToByte
+ 008EA6 1E 04 [ 2] 1167 ldw x, (0x04, sp)
+ 008EA8 F7 [ 1] 1168 ld (x), a
+ 1169 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1231: RTC_AlarmStruct->RTC_AlarmDateWeekDay = Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmDateWeekDay);
+ 008EA9 1E 01 [ 2] 1170 ldw x, (0x01, sp)
+ 008EAB F6 [ 1] 1171 ld a, (x)
+ 008EAC CD 92 48 [ 4] 1172 call _Bcd2ToByte
+ 008EAF 1E 01 [ 2] 1173 ldw x, (0x01, sp)
+ 008EB1 F7 [ 1] 1174 ld (x), a
+ 008EB2 1175 00103$:
+ 1176 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1233: }
+ 008EB2 5B 0B [ 2] 1177 addw sp, #11
+ 008EB4 81 [ 4] 1178 ret
+ 1179 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1242: ErrorStatus RTC_AlarmCmd(FunctionalState NewState)
+ 1180 ; -----------------------------------------
+ 1181 ; function RTC_AlarmCmd
+ 1182 ; -----------------------------------------
+ 008EB5 1183 _RTC_AlarmCmd:
+ 008EB5 52 03 [ 2] 1184 sub sp, #3
+ 008EB7 6B 03 [ 1] 1185 ld (0x03, sp), a
+ 1186 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1244: __IO uint16_t alrawfcount = 0;
+ 008EB9 5F [ 1] 1187 clrw x
+ 008EBA 1F 01 [ 2] 1188 ldw (0x01, sp), x
+ 1189 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1252: RTC->WPR = 0xCA;
+ 008EBC 35 CA 51 59 [ 1] 1190 mov 0x5159+0, #0xca
+ 1191 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1253: RTC->WPR = 0x53;
+ 008EC0 35 53 51 59 [ 1] 1192 mov 0x5159+0, #0x53
+ 1193 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1258: RTC->CR2 |= (uint8_t)(RTC_CR2_ALRAE);
+ 008EC4 C6 51 49 [ 1] 1194 ld a, 0x5149
+ 1195 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1256: if (NewState != DISABLE)
+ 008EC7 0D 03 [ 1] 1196 tnz (0x03, sp)
+ 008EC9 27 09 [ 1] 1197 jreq 00109$
+ 1198 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1258: RTC->CR2 |= (uint8_t)(RTC_CR2_ALRAE);
+ 008ECB AA 01 [ 1] 1199 or a, #0x01
+ 008ECD C7 51 49 [ 1] 1200 ld 0x5149, a
+ 1201 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1259: status = SUCCESS;
+ 008ED0 A6 01 [ 1] 1202 ld a, #0x01
+ 008ED2 20 22 [ 2] 1203 jra 00110$
+ 008ED4 1204 00109$:
+ 1205 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1263: RTC->CR2 &= (uint8_t)~(RTC_CR2_ALRAE) ;
+ 008ED4 A4 FE [ 1] 1206 and a, #0xfe
+ 008ED6 C7 51 49 [ 1] 1207 ld 0x5149, a
+ 1208 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1266: temp1 = (uint8_t)(RTC->ISR1 & RTC_ISR1_ALRAWF);
+ 008ED9 C6 51 4C [ 1] 1209 ld a, 0x514c
+ 008EDC A4 01 [ 1] 1210 and a, #0x01
+ 1211 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1267: while ((alrawfcount != ALRAWF_TIMEOUT) && (temp1 == RESET))
+ 008EDE 1212 00102$:
+ 008EDE 1E 01 [ 2] 1213 ldw x, (0x01, sp)
+ 008EE0 5C [ 1] 1214 incw x
+ 008EE1 27 0A [ 1] 1215 jreq 00104$
+ 008EE3 4D [ 1] 1216 tnz a
+ 008EE4 26 07 [ 1] 1217 jrne 00104$
+ 1218 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1269: alrawfcount++;
+ 008EE6 1E 01 [ 2] 1219 ldw x, (0x01, sp)
+ 008EE8 5C [ 1] 1220 incw x
+ 008EE9 1F 01 [ 2] 1221 ldw (0x01, sp), x
+ 008EEB 20 F1 [ 2] 1222 jra 00102$
+ 008EED 1223 00104$:
+ 1224 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1272: if ((RTC->ISR1 & RTC_ISR1_ALRAWF) == RESET)
+ 008EED 72 00 51 4C 02 [ 2] 1225 btjt 0x514c, #0, 00106$
+ 1226 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1274: status = ERROR;
+ 008EF2 4F [ 1] 1227 clr a
+ 1228 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1278: status = SUCCESS;
+ 008EF3 C5 1229 .byte 0xc5
+ 008EF4 1230 00106$:
+ 008EF4 A6 01 [ 1] 1231 ld a, #0x01
+ 008EF6 1232 00110$:
+ 1233 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1283: RTC->WPR = 0xFF;
+ 008EF6 35 FF 51 59 [ 1] 1234 mov 0x5159+0, #0xff
+ 1235 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1286: return (ErrorStatus)status;
+ 1236 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1287: }
+ 008EFA 5B 03 [ 2] 1237 addw sp, #3
+ 008EFC 81 [ 4] 1238 ret
+ 1239 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1298: ErrorStatus RTC_AlarmSubSecondConfig(uint16_t RTC_AlarmSubSecondValue,
+ 1240 ; -----------------------------------------
+ 1241 ; function RTC_AlarmSubSecondConfig
+ 1242 ; -----------------------------------------
+ 008EFD 1243 _RTC_AlarmSubSecondConfig:
+ 008EFD 89 [ 2] 1244 pushw x
+ 008EFE 6B 02 [ 1] 1245 ld (0x02, sp), a
+ 1246 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1309: RTC->WPR = 0xCA;
+ 008F00 35 CA 51 59 [ 1] 1247 mov 0x5159+0, #0xca
+ 1248 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1310: RTC->WPR = 0x53;
+ 008F04 35 53 51 59 [ 1] 1249 mov 0x5159+0, #0x53
+ 1250 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1313: if ((RTC->ISR1 & RTC_ISR1_INITF) == RESET)
+ 008F08 72 0C 51 4C 24 [ 2] 1251 btjt 0x514c, #6, 00102$
+ 1252 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1316: alarmstatus = (uint8_t)(RTC->CR2 | RTC_CR2_ALRAE);
+ 008F0D C6 51 49 [ 1] 1253 ld a, 0x5149
+ 008F10 AA 01 [ 1] 1254 or a, #0x01
+ 008F12 6B 01 [ 1] 1255 ld (0x01, sp), a
+ 1256 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1319: RTC->CR2 &= (uint8_t)~(RTC_CR2_ALRAE);
+ 008F14 72 11 51 49 [ 1] 1257 bres 0x5149, #0
+ 1258 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1322: RTC->ALRMASSRH = (uint8_t)(RTC_AlarmSubSecondValue >> 8);
+ 008F18 9E [ 1] 1259 ld a, xh
+ 008F19 C7 51 64 [ 1] 1260 ld 0x5164, a
+ 1261 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1323: RTC->ALRMASSRL = (uint8_t)(RTC_AlarmSubSecondValue);
+ 008F1C 9F [ 1] 1262 ld a, xl
+ 008F1D C7 51 65 [ 1] 1263 ld 0x5165, a
+ 1264 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1324: RTC->ALRMASSMSKR = (uint8_t)RTC_AlarmSubSecondMask;
+ 008F20 AE 51 66 [ 2] 1265 ldw x, #0x5166
+ 008F23 7B 02 [ 1] 1266 ld a, (0x02, sp)
+ 008F25 F7 [ 1] 1267 ld (x), a
+ 1268 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1327: RTC->CR2 |= alarmstatus;
+ 008F26 C6 51 49 [ 1] 1269 ld a, 0x5149
+ 008F29 1A 01 [ 1] 1270 or a, (0x01, sp)
+ 008F2B C7 51 49 [ 1] 1271 ld 0x5149, a
+ 1272 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1329: status = SUCCESS;
+ 008F2E A6 01 [ 1] 1273 ld a, #0x01
+ 1274 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1333: status = ERROR;
+ 008F30 21 1275 .byte 0x21
+ 008F31 1276 00102$:
+ 008F31 4F [ 1] 1277 clr a
+ 008F32 1278 00103$:
+ 1279 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1337: RTC->WPR = 0xFF;
+ 008F32 35 FF 51 59 [ 1] 1280 mov 0x5159+0, #0xff
+ 1281 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1339: return (ErrorStatus)status;
+ 1282 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1340: }
+ 008F36 85 [ 2] 1283 popw x
+ 008F37 81 [ 4] 1284 ret
+ 1285 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1369: void RTC_WakeUpClockConfig(RTC_WakeUpClock_TypeDef RTC_WakeUpClock)
+ 1286 ; -----------------------------------------
+ 1287 ; function RTC_WakeUpClockConfig
+ 1288 ; -----------------------------------------
+ 008F38 1289 _RTC_WakeUpClockConfig:
+ 008F38 88 [ 1] 1290 push a
+ 008F39 6B 01 [ 1] 1291 ld (0x01, sp), a
+ 1292 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1376: RTC->WPR = 0xCA;
+ 008F3B 35 CA 51 59 [ 1] 1293 mov 0x5159+0, #0xca
+ 1294 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1377: RTC->WPR = 0x53;
+ 008F3F 35 53 51 59 [ 1] 1295 mov 0x5159+0, #0x53
+ 1296 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1380: RTC->CR2 &= (uint8_t)~RTC_CR2_WUTE;
+ 008F43 72 15 51 49 [ 1] 1297 bres 0x5149, #2
+ 1298 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1383: RTC->CR1 &= (uint8_t)~RTC_CR1_WUCKSEL;
+ 008F47 C6 51 48 [ 1] 1299 ld a, 0x5148
+ 008F4A A4 F8 [ 1] 1300 and a, #0xf8
+ 008F4C C7 51 48 [ 1] 1301 ld 0x5148, a
+ 1302 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1386: RTC->CR1 |= (uint8_t)RTC_WakeUpClock;
+ 008F4F C6 51 48 [ 1] 1303 ld a, 0x5148
+ 008F52 1A 01 [ 1] 1304 or a, (0x01, sp)
+ 008F54 C7 51 48 [ 1] 1305 ld 0x5148, a
+ 1306 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1389: RTC->WPR = 0xFF;
+ 008F57 35 FF 51 59 [ 1] 1307 mov 0x5159+0, #0xff
+ 1308 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1390: }
+ 008F5B 84 [ 1] 1309 pop a
+ 008F5C 81 [ 4] 1310 ret
+ 1311 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1400: void RTC_SetWakeUpCounter(uint16_t RTC_WakeupCounter)
+ 1312 ; -----------------------------------------
+ 1313 ; function RTC_SetWakeUpCounter
+ 1314 ; -----------------------------------------
+ 008F5D 1315 _RTC_SetWakeUpCounter:
+ 1316 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1403: RTC->WPR = 0xCA;
+ 008F5D 35 CA 51 59 [ 1] 1317 mov 0x5159+0, #0xca
+ 1318 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1404: RTC->WPR = 0x53;
+ 008F61 35 53 51 59 [ 1] 1319 mov 0x5159+0, #0x53
+ 1320 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1408: RTC->WUTRH = (uint8_t)(RTC_WakeupCounter >> 8);
+ 008F65 9E [ 1] 1321 ld a, xh
+ 008F66 C7 51 54 [ 1] 1322 ld 0x5154, a
+ 1323 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1409: RTC->WUTRL = (uint8_t)(RTC_WakeupCounter);
+ 008F69 9F [ 1] 1324 ld a, xl
+ 008F6A C7 51 55 [ 1] 1325 ld 0x5155, a
+ 1326 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1412: RTC->WPR = 0xFF;
+ 008F6D 35 FF 51 59 [ 1] 1327 mov 0x5159+0, #0xff
+ 1328 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1413: }
+ 008F71 81 [ 4] 1329 ret
+ 1330 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1420: uint16_t RTC_GetWakeUpCounter(void)
+ 1331 ; -----------------------------------------
+ 1332 ; function RTC_GetWakeUpCounter
+ 1333 ; -----------------------------------------
+ 008F72 1334 _RTC_GetWakeUpCounter:
+ 008F72 89 [ 2] 1335 pushw x
+ 1336 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1425: tmpreg = ((uint16_t)RTC->WUTRH) << 8;
+ 008F73 C6 51 54 [ 1] 1337 ld a, 0x5154
+ 008F76 95 [ 1] 1338 ld xh, a
+ 008F77 0F 02 [ 1] 1339 clr (0x02, sp)
+ 1340 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1426: tmpreg |= RTC->WUTRL;
+ 008F79 C6 51 55 [ 1] 1341 ld a, 0x5155
+ 1342 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1429: return (uint16_t)tmpreg;
+ 008F7C 97 [ 1] 1343 ld xl, a
+ 1344 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1430: }
+ 008F7D 5B 02 [ 2] 1345 addw sp, #2
+ 008F7F 81 [ 4] 1346 ret
+ 1347 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1440: ErrorStatus RTC_WakeUpCmd(FunctionalState NewState)
+ 1348 ; -----------------------------------------
+ 1349 ; function RTC_WakeUpCmd
+ 1350 ; -----------------------------------------
+ 008F80 1351 _RTC_WakeUpCmd:
+ 008F80 88 [ 1] 1352 push a
+ 008F81 6B 01 [ 1] 1353 ld (0x01, sp), a
+ 1354 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1449: RTC->WPR = 0xCA;
+ 008F83 35 CA 51 59 [ 1] 1355 mov 0x5159+0, #0xca
+ 1356 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1450: RTC->WPR = 0x53;
+ 008F87 35 53 51 59 [ 1] 1357 mov 0x5159+0, #0x53
+ 1358 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1455: RTC->CR2 |= (uint8_t)RTC_CR2_WUTE;
+ 008F8B C6 51 49 [ 1] 1359 ld a, 0x5149
+ 1360 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1452: if (NewState != DISABLE)
+ 008F8E 0D 01 [ 1] 1361 tnz (0x01, sp)
+ 008F90 27 09 [ 1] 1362 jreq 00109$
+ 1363 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1455: RTC->CR2 |= (uint8_t)RTC_CR2_WUTE;
+ 008F92 AA 04 [ 1] 1364 or a, #0x04
+ 008F94 C7 51 49 [ 1] 1365 ld 0x5149, a
+ 1366 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1457: status = SUCCESS;
+ 008F97 A6 01 [ 1] 1367 ld a, #0x01
+ 008F99 20 1C [ 2] 1368 jra 00110$
+ 008F9B 1369 00109$:
+ 1370 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1462: RTC->CR2 &= (uint8_t)~RTC_CR2_WUTE;
+ 008F9B A4 FB [ 1] 1371 and a, #0xfb
+ 008F9D C7 51 49 [ 1] 1372 ld 0x5149, a
+ 1373 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1465: while (((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET) && ( wutwfcount != WUTWF_TIMEOUT))
+ 008FA0 5F [ 1] 1374 clrw x
+ 008FA1 1375 00102$:
+ 008FA1 72 04 51 4C 08 [ 2] 1376 btjt 0x514c, #2, 00104$
+ 008FA6 A3 FF FF [ 2] 1377 cpw x, #0xffff
+ 008FA9 27 03 [ 1] 1378 jreq 00104$
+ 1379 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1467: wutwfcount++;
+ 008FAB 5C [ 1] 1380 incw x
+ 008FAC 20 F3 [ 2] 1381 jra 00102$
+ 008FAE 1382 00104$:
+ 1383 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1471: if ((RTC->ISR1 & RTC_ISR1_WUTWF) == RESET)
+ 008FAE 72 04 51 4C 02 [ 2] 1384 btjt 0x514c, #2, 00106$
+ 1385 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1473: status = ERROR;
+ 008FB3 4F [ 1] 1386 clr a
+ 1387 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1477: status = SUCCESS;
+ 008FB4 C5 1388 .byte 0xc5
+ 008FB5 1389 00106$:
+ 008FB5 A6 01 [ 1] 1390 ld a, #0x01
+ 008FB7 1391 00110$:
+ 1392 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1482: RTC->WPR = 0xFF;
+ 008FB7 35 FF 51 59 [ 1] 1393 mov 0x5159+0, #0xff
+ 1394 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1485: return (ErrorStatus)status;
+ 1395 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1486: }
+ 008FBB 5B 01 [ 2] 1396 addw sp, #1
+ 008FBD 81 [ 4] 1397 ret
+ 1398 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1522: void RTC_DayLightSavingConfig(RTC_DayLightSaving_TypeDef RTC_DayLightSaving,
+ 1399 ; -----------------------------------------
+ 1400 ; function RTC_DayLightSavingConfig
+ 1401 ; -----------------------------------------
+ 008FBE 1402 _RTC_DayLightSavingConfig:
+ 008FBE 88 [ 1] 1403 push a
+ 008FBF 97 [ 1] 1404 ld xl, a
+ 1405 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1530: RTC->WPR = 0xCA;
+ 008FC0 35 CA 51 59 [ 1] 1406 mov 0x5159+0, #0xca
+ 1407 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1531: RTC->WPR = 0x53;
+ 008FC4 35 53 51 59 [ 1] 1408 mov 0x5159+0, #0x53
+ 1409 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1534: RTC->CR3 &= (uint8_t)~(RTC_CR3_BCK);
+ 008FC8 C6 51 4A [ 1] 1410 ld a, 0x514a
+ 008FCB A4 FB [ 1] 1411 and a, #0xfb
+ 008FCD C7 51 4A [ 1] 1412 ld 0x514a, a
+ 1413 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1537: RTC->CR3 |= (uint8_t)((uint8_t)RTC_DayLightSaving | (uint8_t)RTC_StoreOperation);
+ 008FD0 C6 51 4A [ 1] 1414 ld a, 0x514a
+ 008FD3 6B 01 [ 1] 1415 ld (0x01, sp), a
+ 008FD5 9F [ 1] 1416 ld a, xl
+ 008FD6 1A 04 [ 1] 1417 or a, (0x04, sp)
+ 008FD8 1A 01 [ 1] 1418 or a, (0x01, sp)
+ 008FDA C7 51 4A [ 1] 1419 ld 0x514a, a
+ 1420 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1540: RTC->WPR = 0xFF;
+ 008FDD 35 FF 51 59 [ 1] 1421 mov 0x5159+0, #0xff
+ 1422 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1541: }
+ 008FE1 84 [ 1] 1423 pop a
+ 008FE2 85 [ 2] 1424 popw x
+ 008FE3 84 [ 1] 1425 pop a
+ 008FE4 FC [ 2] 1426 jp (x)
+ 1427 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1549: RTC_StoreOperation_TypeDef RTC_GetStoreOperation(void)
+ 1428 ; -----------------------------------------
+ 1429 ; function RTC_GetStoreOperation
+ 1430 ; -----------------------------------------
+ 008FE5 1431 _RTC_GetStoreOperation:
+ 1432 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1552: return (RTC_StoreOperation_TypeDef)(RTC->CR3 & RTC_CR3_BCK);
+ 008FE5 C6 51 4A [ 1] 1433 ld a, 0x514a
+ 008FE8 A4 04 [ 1] 1434 and a, #0x04
+ 1435 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1553: }
+ 008FEA 81 [ 4] 1436 ret
+ 1437 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1587: void RTC_OutputConfig(RTC_Output_TypeDef RTC_Output,
+ 1438 ; -----------------------------------------
+ 1439 ; function RTC_OutputConfig
+ 1440 ; -----------------------------------------
+ 008FEB 1441 _RTC_OutputConfig:
+ 008FEB 88 [ 1] 1442 push a
+ 008FEC 97 [ 1] 1443 ld xl, a
+ 1444 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1595: RTC->WPR = 0xCA;
+ 008FED 35 CA 51 59 [ 1] 1445 mov 0x5159+0, #0xca
+ 1446 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1596: RTC->WPR = 0x53;
+ 008FF1 35 53 51 59 [ 1] 1447 mov 0x5159+0, #0x53
+ 1448 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1599: RTC->CR3 &= (uint8_t)~(RTC_CR3_OSEL | RTC_CR3_POL);
+ 008FF5 C6 51 4A [ 1] 1449 ld a, 0x514a
+ 008FF8 A4 8F [ 1] 1450 and a, #0x8f
+ 008FFA C7 51 4A [ 1] 1451 ld 0x514a, a
+ 1452 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1602: RTC->CR3 |= (uint8_t)((uint8_t)RTC_Output | (uint8_t)RTC_OutputPolarity);
+ 008FFD C6 51 4A [ 1] 1453 ld a, 0x514a
+ 009000 6B 01 [ 1] 1454 ld (0x01, sp), a
+ 009002 9F [ 1] 1455 ld a, xl
+ 009003 1A 04 [ 1] 1456 or a, (0x04, sp)
+ 009005 1A 01 [ 1] 1457 or a, (0x01, sp)
+ 009007 C7 51 4A [ 1] 1458 ld 0x514a, a
+ 1459 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1605: RTC->WPR = 0xFF;
+ 00900A 35 FF 51 59 [ 1] 1460 mov 0x5159+0, #0xff
+ 1461 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1606: }
+ 00900E 84 [ 1] 1462 pop a
+ 00900F 85 [ 2] 1463 popw x
+ 009010 84 [ 1] 1464 pop a
+ 009011 FC [ 2] 1465 jp (x)
+ 1466 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1639: ErrorStatus RTC_SynchroShiftConfig(RTC_ShiftAdd1S_TypeDef RTC_ShiftAdd1S,
+ 1467 ; -----------------------------------------
+ 1468 ; function RTC_SynchroShiftConfig
+ 1469 ; -----------------------------------------
+ 009012 1470 _RTC_SynchroShiftConfig:
+ 009012 88 [ 1] 1471 push a
+ 009013 6B 01 [ 1] 1472 ld (0x01, sp), a
+ 009015 51 [ 1] 1473 exgw x, y
+ 1474 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1651: RTC->WPR = 0xCA;
+ 009016 35 CA 51 59 [ 1] 1475 mov 0x5159+0, #0xca
+ 1476 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1652: RTC->WPR = 0x53;
+ 00901A 35 53 51 59 [ 1] 1477 mov 0x5159+0, #0x53
+ 1478 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1655: if ((RTC->ISR1 & RTC_ISR1_SHPF) != RESET)
+ 00901E 72 07 51 4C 0E [ 2] 1479 btjf 0x514c, #3, 00106$
+ 1480 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1658: while (((RTC->ISR1 & RTC_ISR1_SHPF) != RESET) && (shpfcount != SHPF_TIMEOUT))
+ 009023 5F [ 1] 1481 clrw x
+ 009024 1482 00102$:
+ 009024 72 07 51 4C 08 [ 2] 1483 btjf 0x514c, #3, 00106$
+ 009029 A3 FF FF [ 2] 1484 cpw x, #0xffff
+ 00902C 27 03 [ 1] 1485 jreq 00106$
+ 1486 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1660: shpfcount++;
+ 00902E 5C [ 1] 1487 incw x
+ 00902F 20 F3 [ 2] 1488 jra 00102$
+ 009031 1489 00106$:
+ 1490 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1665: if ((RTC->ISR1 & RTC_ISR1_SHPF) == RESET)
+ 009031 72 06 51 4C 0F [ 2] 1491 btjt 0x514c, #3, 00108$
+ 1492 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1668: shiftrhreg = (uint8_t)((uint8_t)(RTC_ShiftSubFS >> 8) | (uint8_t)(RTC_ShiftAdd1S));
+ 009036 90 9E [ 1] 1493 ld a, yh
+ 009038 1A 01 [ 1] 1494 or a, (0x01, sp)
+ 1495 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1669: RTC->SHIFTRH = (uint8_t)(shiftrhreg);
+ 00903A C7 51 5A [ 1] 1496 ld 0x515a, a
+ 1497 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1670: RTC->SHIFTRL = (uint8_t)(RTC_ShiftSubFS);
+ 00903D 90 9F [ 1] 1498 ld a, yl
+ 00903F C7 51 5B [ 1] 1499 ld 0x515b, a
+ 1500 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1672: status = SUCCESS;
+ 009042 A6 01 [ 1] 1501 ld a, #0x01
+ 1502 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1676: status = ERROR;
+ 009044 21 1503 .byte 0x21
+ 009045 1504 00108$:
+ 009045 4F [ 1] 1505 clr a
+ 009046 1506 00109$:
+ 1507 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1680: RTC->WPR = 0xFF;
+ 009046 35 FF 51 59 [ 1] 1508 mov 0x5159+0, #0xff
+ 1509 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1682: return (ErrorStatus)(status);
+ 1510 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1683: }
+ 00904A 5B 01 [ 2] 1511 addw sp, #1
+ 00904C 81 [ 4] 1512 ret
+ 1513 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1718: ErrorStatus RTC_SmoothCalibConfig(RTC_SmoothCalibPeriod_TypeDef RTC_SmoothCalibPeriod,
+ 1514 ; -----------------------------------------
+ 1515 ; function RTC_SmoothCalibConfig
+ 1516 ; -----------------------------------------
+ 00904D 1517 _RTC_SmoothCalibConfig:
+ 00904D 88 [ 1] 1518 push a
+ 00904E 90 97 [ 1] 1519 ld yl, a
+ 1520 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1731: RTC->WPR = 0xCA;
+ 009050 35 CA 51 59 [ 1] 1521 mov 0x5159+0, #0xca
+ 1522 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1732: RTC->WPR = 0x53;
+ 009054 35 53 51 59 [ 1] 1523 mov 0x5159+0, #0x53
+ 1524 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1735: if ((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET)
+ 009058 72 03 51 4C 0E [ 2] 1525 btjf 0x514c, #1, 00106$
+ 1526 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1738: while (((RTC->ISR1 & RTC_ISR1_RECALPF) != RESET) && (recalpfcount != RECALPF_TIMEOUT))
+ 00905D 5F [ 1] 1527 clrw x
+ 00905E 1528 00102$:
+ 00905E 72 03 51 4C 08 [ 2] 1529 btjf 0x514c, #1, 00106$
+ 009063 A3 FF FF [ 2] 1530 cpw x, #0xffff
+ 009066 27 03 [ 1] 1531 jreq 00106$
+ 1532 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1740: recalpfcount++;
+ 009068 5C [ 1] 1533 incw x
+ 009069 20 F3 [ 2] 1534 jra 00102$
+ 00906B 1535 00106$:
+ 1536 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1746: if ((RTC->ISR1 & RTC_ISR1_RECALPF) == RESET)
+ 00906B 72 02 51 4C 15 [ 2] 1537 btjt 0x514c, #1, 00108$
+ 1538 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1749: RTC->CALRH = (uint8_t)((uint8_t)((uint8_t)RTC_SmoothCalibPeriod | \
+ 009070 90 9F [ 1] 1539 ld a, yl
+ 009072 1A 04 [ 1] 1540 or a, (0x04, sp)
+ 009074 6B 01 [ 1] 1541 ld (0x01, sp), a
+ 009076 7B 05 [ 1] 1542 ld a, (0x05, sp)
+ 009078 1A 01 [ 1] 1543 or a, (0x01, sp)
+ 00907A C7 51 6A [ 1] 1544 ld 0x516a, a
+ 1545 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1752: RTC->CALRL = (uint8_t)(RTC_SmouthCalibMinusPulsesValue);
+ 00907D 7B 06 [ 1] 1546 ld a, (0x06, sp)
+ 00907F C7 51 6B [ 1] 1547 ld 0x516b, a
+ 1548 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1754: status = SUCCESS;
+ 009082 A6 01 [ 1] 1549 ld a, #0x01
+ 1550 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1758: status = ERROR;
+ 009084 21 1551 .byte 0x21
+ 009085 1552 00108$:
+ 009085 4F [ 1] 1553 clr a
+ 009086 1554 00109$:
+ 1555 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1762: RTC->WPR = 0xFF;
+ 009086 35 FF 51 59 [ 1] 1556 mov 0x5159+0, #0xff
+ 1557 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1764: return (ErrorStatus)(status);
+ 1558 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1765: }
+ 00908A 1E 02 [ 2] 1559 ldw x, (2, sp)
+ 00908C 5B 06 [ 2] 1560 addw sp, #6
+ 00908E FC [ 2] 1561 jp (x)
+ 1562 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1790: void RTC_CalibOutputConfig(RTC_CalibOutput_TypeDef RTC_CalibOutput)
+ 1563 ; -----------------------------------------
+ 1564 ; function RTC_CalibOutputConfig
+ 1565 ; -----------------------------------------
+ 00908F 1566 _RTC_CalibOutputConfig:
+ 00908F 88 [ 1] 1567 push a
+ 009090 6B 01 [ 1] 1568 ld (0x01, sp), a
+ 1569 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1796: RTC->WPR = 0xCA;
+ 009092 35 CA 51 59 [ 1] 1570 mov 0x5159+0, #0xca
+ 1571 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1797: RTC->WPR = 0x53;
+ 009096 35 53 51 59 [ 1] 1572 mov 0x5159+0, #0x53
+ 1573 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1802: RTC->CR3 |= (uint8_t)RTC_CR3_COSEL;
+ 00909A C6 51 4A [ 1] 1574 ld a, 0x514a
+ 1575 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1799: if (RTC_CalibOutput != RTC_CalibOutput_512Hz)
+ 00909D 0D 01 [ 1] 1576 tnz (0x01, sp)
+ 00909F 27 07 [ 1] 1577 jreq 00102$
+ 1578 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1802: RTC->CR3 |= (uint8_t)RTC_CR3_COSEL;
+ 0090A1 AA 08 [ 1] 1579 or a, #0x08
+ 0090A3 C7 51 4A [ 1] 1580 ld 0x514a, a
+ 0090A6 20 05 [ 2] 1581 jra 00103$
+ 0090A8 1582 00102$:
+ 1583 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1807: RTC->CR3 &= (uint8_t)~RTC_CR3_COSEL;
+ 0090A8 A4 F7 [ 1] 1584 and a, #0xf7
+ 0090AA C7 51 4A [ 1] 1585 ld 0x514a, a
+ 0090AD 1586 00103$:
+ 1587 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1811: RTC->WPR = 0xFF;
+ 0090AD 35 FF 51 59 [ 1] 1588 mov 0x5159+0, #0xff
+ 1589 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1812: }
+ 0090B1 84 [ 1] 1590 pop a
+ 0090B2 81 [ 4] 1591 ret
+ 1592 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1820: void RTC_CalibOutputCmd(FunctionalState NewState)
+ 1593 ; -----------------------------------------
+ 1594 ; function RTC_CalibOutputCmd
+ 1595 ; -----------------------------------------
+ 0090B3 1596 _RTC_CalibOutputCmd:
+ 0090B3 88 [ 1] 1597 push a
+ 0090B4 6B 01 [ 1] 1598 ld (0x01, sp), a
+ 1599 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1826: RTC->WPR = 0xCA;
+ 0090B6 35 CA 51 59 [ 1] 1600 mov 0x5159+0, #0xca
+ 1601 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1827: RTC->WPR = 0x53;
+ 0090BA 35 53 51 59 [ 1] 1602 mov 0x5159+0, #0x53
+ 1603 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1832: RTC->CR3 |= (uint8_t)RTC_CR3_COE;
+ 0090BE C6 51 4A [ 1] 1604 ld a, 0x514a
+ 1605 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1829: if (NewState != DISABLE)
+ 0090C1 0D 01 [ 1] 1606 tnz (0x01, sp)
+ 0090C3 27 07 [ 1] 1607 jreq 00102$
+ 1608 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1832: RTC->CR3 |= (uint8_t)RTC_CR3_COE;
+ 0090C5 AA 80 [ 1] 1609 or a, #0x80
+ 0090C7 C7 51 4A [ 1] 1610 ld 0x514a, a
+ 0090CA 20 05 [ 2] 1611 jra 00103$
+ 0090CC 1612 00102$:
+ 1613 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1837: RTC->CR3 &= (uint8_t)~RTC_CR3_COE;
+ 0090CC A4 7F [ 1] 1614 and a, #0x7f
+ 0090CE C7 51 4A [ 1] 1615 ld 0x514a, a
+ 0090D1 1616 00103$:
+ 1617 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1841: RTC->WPR = 0xFF;
+ 0090D1 35 FF 51 59 [ 1] 1618 mov 0x5159+0, #0xff
+ 1619 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1842: }
+ 0090D5 84 [ 1] 1620 pop a
+ 0090D6 81 [ 4] 1621 ret
+ 1622 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1871: void RTC_TamperLevelConfig(RTC_Tamper_TypeDef RTC_Tamper,
+ 1623 ; -----------------------------------------
+ 1624 ; function RTC_TamperLevelConfig
+ 1625 ; -----------------------------------------
+ 0090D7 1626 _RTC_TamperLevelConfig:
+ 0090D7 88 [ 1] 1627 push a
+ 0090D8 97 [ 1] 1628 ld xl, a
+ 1629 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1879: RTC->WPR = 0xCA;
+ 0090D9 35 CA 51 59 [ 1] 1630 mov 0x5159+0, #0xca
+ 1631 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1880: RTC->WPR = 0x53;
+ 0090DD 35 53 51 59 [ 1] 1632 mov 0x5159+0, #0x53
+ 1633 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1885: RTC->TCR1 |= (uint8_t)(RTC_Tamper << 1);
+ 0090E1 C6 51 6C [ 1] 1634 ld a, 0x516c
+ 0090E4 6B 01 [ 1] 1635 ld (0x01, sp), a
+ 0090E6 9F [ 1] 1636 ld a, xl
+ 0090E7 48 [ 1] 1637 sll a
+ 1638 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1882: if (RTC_TamperLevel != RTC_TamperLevel_Low)
+ 0090E8 0D 04 [ 1] 1639 tnz (0x04, sp)
+ 0090EA 27 07 [ 1] 1640 jreq 00102$
+ 1641 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1885: RTC->TCR1 |= (uint8_t)(RTC_Tamper << 1);
+ 0090EC 1A 01 [ 1] 1642 or a, (0x01, sp)
+ 0090EE C7 51 6C [ 1] 1643 ld 0x516c, a
+ 0090F1 20 06 [ 2] 1644 jra 00103$
+ 0090F3 1645 00102$:
+ 1646 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1890: RTC->TCR1 &= (uint8_t)~(uint8_t)(RTC_Tamper << 1);
+ 0090F3 43 [ 1] 1647 cpl a
+ 0090F4 14 01 [ 1] 1648 and a, (0x01, sp)
+ 0090F6 C7 51 6C [ 1] 1649 ld 0x516c, a
+ 0090F9 1650 00103$:
+ 1651 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1894: RTC->WPR = 0xFF;
+ 0090F9 35 FF 51 59 [ 1] 1652 mov 0x5159+0, #0xff
+ 1653 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1895: }
+ 0090FD 84 [ 1] 1654 pop a
+ 0090FE 85 [ 2] 1655 popw x
+ 0090FF 84 [ 1] 1656 pop a
+ 009100 FC [ 2] 1657 jp (x)
+ 1658 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1903: void RTC_TamperFilterConfig(RTC_TamperFilter_TypeDef RTC_TamperFilter)
+ 1659 ; -----------------------------------------
+ 1660 ; function RTC_TamperFilterConfig
+ 1661 ; -----------------------------------------
+ 009101 1662 _RTC_TamperFilterConfig:
+ 009101 88 [ 1] 1663 push a
+ 009102 6B 01 [ 1] 1664 ld (0x01, sp), a
+ 1665 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1910: RTC->WPR = 0xCA;
+ 009104 35 CA 51 59 [ 1] 1666 mov 0x5159+0, #0xca
+ 1667 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1911: RTC->WPR = 0x53;
+ 009108 35 53 51 59 [ 1] 1668 mov 0x5159+0, #0x53
+ 1669 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1914: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPFLT);
+ 00910C C6 51 6D [ 1] 1670 ld a, 0x516d
+ 00910F A4 E7 [ 1] 1671 and a, #0xe7
+ 009111 C7 51 6D [ 1] 1672 ld 0x516d, a
+ 1673 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1917: RTC->TCR2 |= (uint8_t)RTC_TamperFilter;
+ 009114 C6 51 6D [ 1] 1674 ld a, 0x516d
+ 009117 1A 01 [ 1] 1675 or a, (0x01, sp)
+ 009119 C7 51 6D [ 1] 1676 ld 0x516d, a
+ 1677 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1920: RTC->WPR = 0xFF;
+ 00911C 35 FF 51 59 [ 1] 1678 mov 0x5159+0, #0xff
+ 1679 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1922: }
+ 009120 84 [ 1] 1680 pop a
+ 009121 81 [ 4] 1681 ret
+ 1682 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1931: void RTC_TamperSamplingFreqConfig(RTC_TamperSamplingFreq_TypeDef RTC_TamperSamplingFreq)
+ 1683 ; -----------------------------------------
+ 1684 ; function RTC_TamperSamplingFreqConfig
+ 1685 ; -----------------------------------------
+ 009122 1686 _RTC_TamperSamplingFreqConfig:
+ 009122 88 [ 1] 1687 push a
+ 009123 6B 01 [ 1] 1688 ld (0x01, sp), a
+ 1689 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1937: RTC->WPR = 0xCA;
+ 009125 35 CA 51 59 [ 1] 1690 mov 0x5159+0, #0xca
+ 1691 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1938: RTC->WPR = 0x53;
+ 009129 35 53 51 59 [ 1] 1692 mov 0x5159+0, #0x53
+ 1693 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1941: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPFREQ);
+ 00912D C6 51 6D [ 1] 1694 ld a, 0x516d
+ 009130 A4 F8 [ 1] 1695 and a, #0xf8
+ 009132 C7 51 6D [ 1] 1696 ld 0x516d, a
+ 1697 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1944: RTC->TCR2 |= (uint8_t)RTC_TamperSamplingFreq;
+ 009135 C6 51 6D [ 1] 1698 ld a, 0x516d
+ 009138 1A 01 [ 1] 1699 or a, (0x01, sp)
+ 00913A C7 51 6D [ 1] 1700 ld 0x516d, a
+ 1701 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1947: RTC->WPR = 0xFF;
+ 00913D 35 FF 51 59 [ 1] 1702 mov 0x5159+0, #0xff
+ 1703 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1948: }
+ 009141 84 [ 1] 1704 pop a
+ 009142 81 [ 4] 1705 ret
+ 1706 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1958: void RTC_TamperPinsPrechargeDuration(RTC_TamperPrechargeDuration_TypeDef RTC_TamperPrechargeDuration)
+ 1707 ; -----------------------------------------
+ 1708 ; function RTC_TamperPinsPrechargeDuration
+ 1709 ; -----------------------------------------
+ 009143 1710 _RTC_TamperPinsPrechargeDuration:
+ 009143 88 [ 1] 1711 push a
+ 009144 6B 01 [ 1] 1712 ld (0x01, sp), a
+ 1713 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1964: RTC->WPR = 0xCA;
+ 009146 35 CA 51 59 [ 1] 1714 mov 0x5159+0, #0xca
+ 1715 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1965: RTC->WPR = 0x53;
+ 00914A 35 53 51 59 [ 1] 1716 mov 0x5159+0, #0x53
+ 1717 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1968: RTC->TCR2 &= (uint8_t)~(RTC_TCR2_TAMPPUDIS | RTC_TCR2_TAMPPRCH);
+ 00914E C6 51 6D [ 1] 1718 ld a, 0x516d
+ 009151 A4 1F [ 1] 1719 and a, #0x1f
+ 009153 C7 51 6D [ 1] 1720 ld 0x516d, a
+ 1721 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1971: RTC->TCR2 |= (uint8_t)RTC_TamperPrechargeDuration;
+ 009156 C6 51 6D [ 1] 1722 ld a, 0x516d
+ 009159 1A 01 [ 1] 1723 or a, (0x01, sp)
+ 00915B C7 51 6D [ 1] 1724 ld 0x516d, a
+ 1725 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1974: RTC->WPR = 0xFF;
+ 00915E 35 FF 51 59 [ 1] 1726 mov 0x5159+0, #0xff
+ 1727 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1975: }
+ 009162 84 [ 1] 1728 pop a
+ 009163 81 [ 4] 1729 ret
+ 1730 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1987: void RTC_TamperCmd(RTC_Tamper_TypeDef RTC_Tamper,
+ 1731 ; -----------------------------------------
+ 1732 ; function RTC_TamperCmd
+ 1733 ; -----------------------------------------
+ 009164 1734 _RTC_TamperCmd:
+ 009164 88 [ 1] 1735 push a
+ 1736 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1996: RTC->WPR = 0xCA;
+ 009165 35 CA 51 59 [ 1] 1737 mov 0x5159+0, #0xca
+ 1738 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 1997: RTC->WPR = 0x53;
+ 009169 35 53 51 59 [ 1] 1739 mov 0x5159+0, #0x53
+ 1740 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2003: RTC->TCR1 |= (uint8_t)RTC_Tamper;
+ 00916D AE 51 6C [ 2] 1741 ldw x, #0x516c
+ 009170 88 [ 1] 1742 push a
+ 009171 F6 [ 1] 1743 ld a, (x)
+ 009172 6B 02 [ 1] 1744 ld (0x02, sp), a
+ 009174 84 [ 1] 1745 pop a
+ 1746 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2000: if (NewState != DISABLE)
+ 009175 0D 04 [ 1] 1747 tnz (0x04, sp)
+ 009177 27 07 [ 1] 1748 jreq 00102$
+ 1749 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2003: RTC->TCR1 |= (uint8_t)RTC_Tamper;
+ 009179 1A 01 [ 1] 1750 or a, (0x01, sp)
+ 00917B C7 51 6C [ 1] 1751 ld 0x516c, a
+ 00917E 20 06 [ 2] 1752 jra 00103$
+ 009180 1753 00102$:
+ 1754 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2008: RTC->TCR1 &= (uint8_t)~RTC_Tamper;
+ 009180 43 [ 1] 1755 cpl a
+ 009181 14 01 [ 1] 1756 and a, (0x01, sp)
+ 009183 C7 51 6C [ 1] 1757 ld 0x516c, a
+ 009186 1758 00103$:
+ 1759 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2013: RTC->WPR = 0xFF;
+ 009186 35 FF 51 59 [ 1] 1760 mov 0x5159+0, #0xff
+ 1761 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2014: }
+ 00918A 84 [ 1] 1762 pop a
+ 00918B 85 [ 2] 1763 popw x
+ 00918C 84 [ 1] 1764 pop a
+ 00918D FC [ 2] 1765 jp (x)
+ 1766 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2058: void RTC_ITConfig(RTC_IT_TypeDef RTC_IT, FunctionalState NewState)
+ 1767 ; -----------------------------------------
+ 1768 ; function RTC_ITConfig
+ 1769 ; -----------------------------------------
+ 00918E 1770 _RTC_ITConfig:
+ 00918E 52 03 [ 2] 1771 sub sp, #3
+ 009190 6B 03 [ 1] 1772 ld (0x03, sp), a
+ 1773 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2065: RTC->WPR = 0xCA;
+ 009192 35 CA 51 59 [ 1] 1774 mov 0x5159+0, #0xca
+ 1775 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2066: RTC->WPR = 0x53;
+ 009196 35 53 51 59 [ 1] 1776 mov 0x5159+0, #0x53
+ 1777 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2071: RTC->CR2 |= (uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ 00919A C6 51 49 [ 1] 1778 ld a, 0x5149
+ 00919D 6B 02 [ 1] 1779 ld (0x02, sp), a
+ 00919F 9F [ 1] 1780 ld a, xl
+ 0091A0 A4 F0 [ 1] 1781 and a, #0xf0
+ 1782 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2072: RTC->TCR1 |= (uint8_t)((uint16_t)RTC_IT & RTC_TCR1_TAMPIE);
+ 0091A2 88 [ 1] 1783 push a
+ 0091A3 9F [ 1] 1784 ld a, xl
+ 0091A4 A4 01 [ 1] 1785 and a, #0x01
+ 0091A6 6B 02 [ 1] 1786 ld (0x02, sp), a
+ 0091A8 84 [ 1] 1787 pop a
+ 1788 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2068: if (NewState != DISABLE)
+ 0091A9 0D 03 [ 1] 1789 tnz (0x03, sp)
+ 0091AB 27 0F [ 1] 1790 jreq 00102$
+ 1791 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2071: RTC->CR2 |= (uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ 0091AD 1A 02 [ 1] 1792 or a, (0x02, sp)
+ 0091AF C7 51 49 [ 1] 1793 ld 0x5149, a
+ 1794 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2072: RTC->TCR1 |= (uint8_t)((uint16_t)RTC_IT & RTC_TCR1_TAMPIE);
+ 0091B2 C6 51 6C [ 1] 1795 ld a, 0x516c
+ 0091B5 1A 01 [ 1] 1796 or a, (0x01, sp)
+ 0091B7 C7 51 6C [ 1] 1797 ld 0x516c, a
+ 0091BA 20 13 [ 2] 1798 jra 00103$
+ 0091BC 1799 00102$:
+ 1800 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2077: RTC->CR2 &= (uint8_t)~(uint8_t)((uint16_t)RTC_IT & (uint16_t)0x00F0);
+ 0091BC 43 [ 1] 1801 cpl a
+ 0091BD 14 02 [ 1] 1802 and a, (0x02, sp)
+ 0091BF C7 51 49 [ 1] 1803 ld 0x5149, a
+ 1804 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2078: RTC->TCR1 &= (uint8_t)~(uint8_t)((uint16_t)RTC_IT & (uint16_t)RTC_TCR1_TAMPIE);
+ 0091C2 C6 51 6C [ 1] 1805 ld a, 0x516c
+ 0091C5 6B 02 [ 1] 1806 ld (0x02, sp), a
+ 0091C7 7B 01 [ 1] 1807 ld a, (0x01, sp)
+ 0091C9 43 [ 1] 1808 cpl a
+ 0091CA 14 02 [ 1] 1809 and a, (0x02, sp)
+ 0091CC C7 51 6C [ 1] 1810 ld 0x516c, a
+ 0091CF 1811 00103$:
+ 1812 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2082: RTC->WPR = 0xFF;
+ 0091CF 35 FF 51 59 [ 1] 1813 mov 0x5159+0, #0xff
+ 1814 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2083: }
+ 0091D3 5B 03 [ 2] 1815 addw sp, #3
+ 0091D5 81 [ 4] 1816 ret
+ 1817 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2090: FlagStatus RTC_GetFlagStatus(RTC_Flag_TypeDef RTC_FLAG)
+ 1818 ; -----------------------------------------
+ 1819 ; function RTC_GetFlagStatus
+ 1820 ; -----------------------------------------
+ 0091D6 1821 _RTC_GetFlagStatus:
+ 0091D6 52 06 [ 2] 1822 sub sp, #6
+ 1823 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2100: tmpreg2 = (uint16_t)((uint16_t)RTC->ISR1 << 8);
+ 0091D8 C6 51 4C [ 1] 1824 ld a, 0x514c
+ 0091DB 90 97 [ 1] 1825 ld yl, a
+ 0091DD 0F 02 [ 1] 1826 clr (0x02, sp)
+ 1827 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2101: tmpreg1 = (uint16_t)((uint16_t)((uint16_t)(RTC->ISR2)) | tmpreg2);
+ 0091DF C6 51 4D [ 1] 1828 ld a, 0x514d
+ 0091E2 0F 03 [ 1] 1829 clr (0x03, sp)
+ 0091E4 6B 06 [ 1] 1830 ld (0x06, sp), a
+ 0091E6 61 [ 1] 1831 exg a, yl
+ 0091E7 6B 05 [ 1] 1832 ld (0x05, sp), a
+ 0091E9 61 [ 1] 1833 exg a, yl
+ 1834 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2104: if ((tmpreg1 & (uint16_t)RTC_FLAG) != RESET)
+ 0091EA 9F [ 1] 1835 ld a, xl
+ 0091EB 14 06 [ 1] 1836 and a, (0x06, sp)
+ 0091ED 02 [ 1] 1837 rlwa x
+ 0091EE 14 05 [ 1] 1838 and a, (0x05, sp)
+ 0091F0 95 [ 1] 1839 ld xh, a
+ 0091F1 5D [ 2] 1840 tnzw x
+ 0091F2 27 03 [ 1] 1841 jreq 00102$
+ 1842 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2106: flagstatus = SET;
+ 0091F4 A6 01 [ 1] 1843 ld a, #0x01
+ 1844 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2110: flagstatus = RESET;
+ 0091F6 21 1845 .byte 0x21
+ 0091F7 1846 00102$:
+ 0091F7 4F [ 1] 1847 clr a
+ 0091F8 1848 00103$:
+ 1849 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2112: return (FlagStatus)flagstatus;
+ 1850 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2113: }
+ 0091F8 5B 06 [ 2] 1851 addw sp, #6
+ 0091FA 81 [ 4] 1852 ret
+ 1853 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2122: void RTC_ClearFlag(RTC_Flag_TypeDef RTC_FLAG)
+ 1854 ; -----------------------------------------
+ 1855 ; function RTC_ClearFlag
+ 1856 ; -----------------------------------------
+ 0091FB 1857 _RTC_ClearFlag:
+ 1858 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2128: RTC->ISR2 = (uint8_t)~((uint8_t)RTC_FLAG) ;
+ 0091FB 9F [ 1] 1859 ld a, xl
+ 0091FC 43 [ 1] 1860 cpl a
+ 0091FD C7 51 4D [ 1] 1861 ld 0x514d, a
+ 1862 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2129: RTC->ISR1 = (uint8_t)(((uint8_t)~(uint8_t)((uint16_t)RTC_FLAG >> (uint8_t)8)) & ((uint8_t)~(uint8_t)(RTC_ISR1_INIT)));
+ 009200 9E [ 1] 1863 ld a, xh
+ 009201 43 [ 1] 1864 cpl a
+ 009202 A4 7F [ 1] 1865 and a, #0x7f
+ 009204 C7 51 4C [ 1] 1866 ld 0x514c, a
+ 1867 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2130: }
+ 009207 81 [ 4] 1868 ret
+ 1869 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2138: ITStatus RTC_GetITStatus(RTC_IT_TypeDef RTC_IT)
+ 1870 ; -----------------------------------------
+ 1871 ; function RTC_GetITStatus
+ 1872 ; -----------------------------------------
+ 009208 1873 _RTC_GetITStatus:
+ 009208 88 [ 1] 1874 push a
+ 1875 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2147: enablestatus = (uint8_t)(RTC->CR2 & (uint16_t)RTC_IT);
+ 009209 C6 51 49 [ 1] 1876 ld a, 0x5149
+ 00920C 6B 01 [ 1] 1877 ld (0x01, sp), a
+ 00920E 9F [ 1] 1878 ld a, xl
+ 00920F 14 01 [ 1] 1879 and a, (0x01, sp)
+ 009211 6B 01 [ 1] 1880 ld (0x01, sp), a
+ 1881 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2150: tmpreg = (uint8_t)(RTC->ISR2 & (uint8_t)((uint16_t)RTC_IT >> 4));
+ 009213 C6 51 4D [ 1] 1882 ld a, 0x514d
+ 009216 54 [ 2] 1883 srlw x
+ 009217 54 [ 2] 1884 srlw x
+ 009218 54 [ 2] 1885 srlw x
+ 009219 54 [ 2] 1886 srlw x
+ 00921A 89 [ 2] 1887 pushw x
+ 00921B 14 02 [ 1] 1888 and a, (2, sp)
+ 00921D 85 [ 2] 1889 popw x
+ 1890 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2153: if ((enablestatus != (uint8_t)RESET) && (tmpreg != (uint8_t)RESET))
+ 00921E 0D 01 [ 1] 1891 tnz (0x01, sp)
+ 009220 27 06 [ 1] 1892 jreq 00102$
+ 009222 4D [ 1] 1893 tnz a
+ 009223 27 03 [ 1] 1894 jreq 00102$
+ 1895 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2155: itstatus = SET;
+ 009225 A6 01 [ 1] 1896 ld a, #0x01
+ 1897 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2159: itstatus = RESET;
+ 009227 21 1898 .byte 0x21
+ 009228 1899 00102$:
+ 009228 4F [ 1] 1900 clr a
+ 009229 1901 00103$:
+ 1902 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2162: return (ITStatus)itstatus;
+ 1903 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2163: }
+ 009229 5B 01 [ 2] 1904 addw sp, #1
+ 00922B 81 [ 4] 1905 ret
+ 1906 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2172: void RTC_ClearITPendingBit(RTC_IT_TypeDef RTC_IT)
+ 1907 ; -----------------------------------------
+ 1908 ; function RTC_ClearITPendingBit
+ 1909 ; -----------------------------------------
+ 00922C 1910 _RTC_ClearITPendingBit:
+ 1911 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2178: RTC->ISR2 = (uint8_t)~(uint8_t)((uint16_t)RTC_IT >> 4);
+ 00922C A6 10 [ 1] 1912 ld a, #0x10
+ 00922E 62 [ 2] 1913 div x, a
+ 00922F 9F [ 1] 1914 ld a, xl
+ 009230 43 [ 1] 1915 cpl a
+ 009231 C7 51 4D [ 1] 1916 ld 0x514d, a
+ 1917 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2179: }
+ 009234 81 [ 4] 1918 ret
+ 1919 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2202: static uint8_t ByteToBcd2(uint8_t Value)
+ 1920 ; -----------------------------------------
+ 1921 ; function ByteToBcd2
+ 1922 ; -----------------------------------------
+ 009235 1923 _ByteToBcd2:
+ 1924 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2206: while (Value >= 10)
+ 009235 5F [ 1] 1925 clrw x
+ 009236 1926 00101$:
+ 009236 A1 0A [ 1] 1927 cp a, #0x0a
+ 009238 25 05 [ 1] 1928 jrc 00103$
+ 1929 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2208: bcdhigh++;
+ 00923A 5C [ 1] 1930 incw x
+ 1931 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2209: Value -= 10;
+ 00923B A0 0A [ 1] 1932 sub a, #0x0a
+ 00923D 20 F7 [ 2] 1933 jra 00101$
+ 00923F 1934 00103$:
+ 1935 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2212: return (uint8_t)((uint8_t)(bcdhigh << 4) | Value);
+ 00923F 58 [ 2] 1936 sllw x
+ 009240 58 [ 2] 1937 sllw x
+ 009241 58 [ 2] 1938 sllw x
+ 009242 58 [ 2] 1939 sllw x
+ 009243 89 [ 2] 1940 pushw x
+ 009244 1A 02 [ 1] 1941 or a, (2, sp)
+ 009246 85 [ 2] 1942 popw x
+ 1943 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2213: }
+ 009247 81 [ 4] 1944 ret
+ 1945 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2220: static uint8_t Bcd2ToByte(uint8_t Value)
+ 1946 ; -----------------------------------------
+ 1947 ; function Bcd2ToByte
+ 1948 ; -----------------------------------------
+ 009248 1949 _Bcd2ToByte:
+ 1950 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2224: tmp = (uint8_t)((uint8_t)((uint8_t)(Value & (uint8_t)0xF0) >> 4) * (uint8_t)10);
+ 009248 90 97 [ 1] 1951 ld yl, a
+ 00924A A4 F0 [ 1] 1952 and a, #0xf0
+ 00924C 4E [ 1] 1953 swap a
+ 00924D A4 0F [ 1] 1954 and a, #0x0f
+ 00924F 97 [ 1] 1955 ld xl, a
+ 009250 A6 0A [ 1] 1956 ld a, #0x0a
+ 009252 42 [ 4] 1957 mul x, a
+ 1958 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2226: return (uint8_t)(tmp + (Value & (uint8_t)0x0F));
+ 009253 90 9F [ 1] 1959 ld a, yl
+ 009255 A4 0F [ 1] 1960 and a, #0x0f
+ 009257 89 [ 2] 1961 pushw x
+ 009258 1B 02 [ 1] 1962 add a, (2, sp)
+ 00925A 85 [ 2] 1963 popw x
+ 1964 ; ../inc/stm8l151x/src/stm8l15x_rtc.c: 2227: }
+ 00925B 81 [ 4] 1965 ret
+ 1966 .area CODE
+ 1967 .area CONST
+ 1968 .area INITIALIZER
+ 1969 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_rtc.sym b/firmware/STM8L15X_LD/stm8l15x_rtc.sym
new file mode 100644
index 0000000..8b1144f
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_rtc.sym
@@ -0,0 +1,71 @@
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
+Hexadecimal [24-Bits]
+
+Symbol Table
+
+ .__.$$$. = 002710 L
+ .__.ABS. = 000000 G
+ .__.CPU. = 000000 L
+ .__.H$L. = 000001 L
+ 9 _Bcd2ToByte 000936 R
+ 9 _ByteToBcd2 000923 R
+ 9 _RTC_AlarmCmd 0005A3 GR
+ 9 _RTC_AlarmStructInit 0004D7 GR
+ 9 _RTC_AlarmSubSecondConfig 0005EB GR
+ 9 _RTC_BypassShadowCmd 0001AB GR
+ 9 _RTC_CalibOutputCmd 0007A1 GR
+ 9 _RTC_CalibOutputConfig 00077D GR
+ 9 _RTC_ClearFlag 0008E9 GR
+ 9 _RTC_ClearITPendingBit 00091A GR
+ 9 _RTC_DateStructInit 000372 GR
+ 9 _RTC_DayLightSavingConfig 0006AC GR
+ 9 _RTC_DeInit 000000 GR
+ 9 _RTC_EnterInitMode 000135 GR
+ 9 _RTC_ExitInitMode 000156 GR
+ 9 _RTC_GetAlarm 0004F1 GR
+ 9 _RTC_GetDate 000386 GR
+ 9 _RTC_GetFlagStatus 0008C4 GR
+ 9 _RTC_GetITStatus 0008F6 GR
+ 9 _RTC_GetStoreOperation 0006D3 GR
+ 9 _RTC_GetSubSecond 0002BA GR
+ 9 _RTC_GetTime 000268 GR
+ 9 _RTC_GetWakeUpCounter 000660 GR
+ 9 _RTC_ITConfig 00087C GR
+ 9 _RTC_Init 0000CB GR
+ 9 _RTC_OutputConfig 0006D9 GR
+ 9 _RTC_RatioCmd 000187 GR
+ 9 _RTC_SetAlarm 0003DF GR
+ 9 _RTC_SetDate 0002CB GR
+ 9 _RTC_SetTime 0001CF GR
+ 9 _RTC_SetWakeUpCounter 00064B GR
+ 9 _RTC_SmoothCalibConfig 00073B GR
+ 9 _RTC_StructInit 000114 GR
+ 9 _RTC_SynchroShiftConfig 000700 GR
+ 9 _RTC_TamperCmd 000852 GR
+ 9 _RTC_TamperFilterConfig 0007EF GR
+ 9 _RTC_TamperLevelConfig 0007C5 GR
+ 9 _RTC_TamperPinsPrechargeDuration 000831 GR
+ 9 _RTC_TamperSamplingFreqConfig 000810 GR
+ 9 _RTC_TimeStructInit 00025B GR
+ 9 _RTC_WaitForSynchro 00015B GR
+ 9 _RTC_WakeUpClockConfig 000626 GR
+ 9 _RTC_WakeUpCmd 00066E GR
+ 9 _RTC_WriteProtectionCmd 000124 GR
+
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
+Hexadecimal [24-Bits]
+
+Area Table
+
+ 0 _CODE size 0 flags 0
+ 1 DATA size 0 flags 0
+ 2 INITIALIZED size 0 flags 0
+ 3 DABS size 0 flags 8
+ 4 HOME size 0 flags 0
+ 5 GSINIT size 0 flags 0
+ 6 GSFINAL size 0 flags 0
+ 7 CONST size 0 flags 0
+ 8 INITIALIZER size 0 flags 0
+ 9 CODE size 94A flags 0
+ A CABS size 0 flags 8
+
diff --git a/firmware/STM8L15X_LD/stm8l15x_usart.asm b/firmware/STM8L15X_LD/stm8l15x_usart.asm
new file mode 100644
index 0000000..fa796b1
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_usart.asm
@@ -0,0 +1,899 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ISO C Compiler
+; Version 4.5.0 #15242 (Linux)
+;--------------------------------------------------------
+ .module stm8l15x_usart
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _CLK_GetClockFreq
+ .globl _USART_DeInit
+ .globl _USART_Init
+ .globl _USART_ClockInit
+ .globl _USART_Cmd
+ .globl _USART_SetPrescaler
+ .globl _USART_SendBreak
+ .globl _USART_ReceiveData8
+ .globl _USART_ReceiveData9
+ .globl _USART_SendData8
+ .globl _USART_SendData9
+ .globl _USART_ReceiverWakeUpCmd
+ .globl _USART_SetAddress
+ .globl _USART_WakeUpConfig
+ .globl _USART_HalfDuplexCmd
+ .globl _USART_SmartCardCmd
+ .globl _USART_SmartCardNACKCmd
+ .globl _USART_SetGuardTime
+ .globl _USART_IrDAConfig
+ .globl _USART_IrDACmd
+ .globl _USART_DMACmd
+ .globl _USART_ITConfig
+ .globl _USART_GetFlagStatus
+ .globl _USART_ClearFlag
+ .globl _USART_GetITStatus
+ .globl _USART_ClearITPendingBit
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area DATA
+;--------------------------------------------------------
+; ram data
+;--------------------------------------------------------
+ .area INITIALIZED
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area DABS (ABS)
+
+; default segment ordering for linker
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area CONST
+ .area INITIALIZER
+ .area CODE
+
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME
+ .area GSINIT
+ .area GSFINAL
+ .area GSINIT
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME
+ .area HOME
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CODE
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 148: void USART_DeInit(USART_TypeDef* USARTx)
+; -----------------------------------------
+; function USART_DeInit
+; -----------------------------------------
+_USART_DeInit:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 154: (void) USARTx->DR;
+ ldw y, x
+ ld a, (0x1, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 156: USARTx->BRR2 = USART_BRR2_RESET_VALUE; /* Set USART_BRR2 to reset value 0x00 */
+ ldw x, y
+ clr (0x0003, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 157: USARTx->BRR1 = USART_BRR1_RESET_VALUE; /* Set USART_BRR1 to reset value 0x00 */
+ ldw x, y
+ clr (0x02, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 159: USARTx->CR1 = USART_CR1_RESET_VALUE; /* Set USART_CR1 to reset value 0x00 */
+ ldw x, y
+ clr (0x0004, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 160: USARTx->CR2 = USART_CR2_RESET_VALUE; /* Set USART_CR2 to reset value 0x00 */
+ ldw x, y
+ clr (0x0005, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 161: USARTx->CR3 = USART_CR3_RESET_VALUE; /* Set USART_CR3 to reset value 0x00 */
+ ldw x, y
+ clr (0x0006, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 162: USARTx->CR4 = USART_CR4_RESET_VALUE; /* Set USART_CR4 to reset value 0x00 */
+ ldw x, y
+ clr (0x0007, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 163: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 192: void USART_Init(USART_TypeDef* USARTx, uint32_t BaudRate, USART_WordLength_TypeDef
+; -----------------------------------------
+; function USART_Init
+; -----------------------------------------
+_USART_Init:
+ sub sp, #11
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 210: USARTx->CR1 &= (uint8_t)(~(USART_CR1_PCEN | USART_CR1_PS | USART_CR1_M));
+ ldw (0x0a, sp), x
+ addw x, #0x0004
+ ld a, (x)
+ and a, #0xe9
+ ld (0x09, sp), a
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 213: USARTx->CR1 |= (uint8_t)((uint8_t)USART_WordLength | (uint8_t)USART_Parity);
+ ld a, (0x12, sp)
+ or a, (0x14, sp)
+ or a, (0x09, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 216: USARTx->CR3 &= (uint8_t)(~USART_CR3_STOP);
+ ldw x, (0x0a, sp)
+ addw x, #0x0006
+ ld a, (x)
+ and a, #0xcf
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 218: USARTx->CR3 |= (uint8_t)USART_StopBits;
+ or a, (0x13, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 221: USARTx->BRR1 &= (uint8_t)(~USART_BRR1_DIVM);
+ ldw x, (0x0a, sp)
+ incw x
+ incw x
+ ldw (0x01, sp), x
+ ld a, (x)
+ ldw x, (0x01, sp)
+ clr (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 223: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVM);
+ ldw x, (0x0a, sp)
+ addw x, #0x0003
+ ldw (0x03, sp), x
+ ld a, (x)
+ and a, #0x0f
+ ldw x, (0x03, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 225: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVF);
+ ldw x, (0x03, sp)
+ clr (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 227: BaudRate_Mantissa = (uint32_t)(CLK_GetClockFreq() / BaudRate );
+ call _CLK_GetClockFreq
+ ldw (0x08, sp), x
+ ldw x, (0x10, sp)
+ pushw x
+ ldw x, (0x10, sp)
+ pushw x
+ ldw x, (0x0c, sp)
+ pushw x
+ pushw y
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 229: USARTx->BRR2 = (uint8_t)((BaudRate_Mantissa >> (uint8_t)8) & (uint8_t)0xF0);
+ call __divulong
+ addw sp, #8
+ ldw (0x05, sp), y
+ ld a, xh
+ and a, #0xf0
+ ld (0x09, sp), a
+ ldw y, (0x03, sp)
+ ld a, (0x09, sp)
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 231: USARTx->BRR2 |= (uint8_t)(BaudRate_Mantissa & (uint8_t)0x0F);
+ ld a, xl
+ and a, #0x0f
+ or a, (0x09, sp)
+ ldw y, (0x03, sp)
+ ld (y), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 233: USARTx->BRR1 = (uint8_t)(BaudRate_Mantissa >> (uint8_t)4);
+ ld a, #0x10
+ div x, a
+ ld a, xl
+ ldw x, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 236: USARTx->CR2 &= (uint8_t)~(USART_CR2_TEN | USART_CR2_REN);
+ ldw x, (0x0a, sp)
+ addw x, #0x0005
+ ld a, (x)
+ and a, #0xf3
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 238: USARTx->CR2 |= (uint8_t)USART_Mode;
+ or a, (0x15, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 239: }
+ ldw x, (12, sp)
+ addw sp, #21
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 264: void USART_ClockInit(USART_TypeDef* USARTx, USART_Clock_TypeDef USART_Clock,
+; -----------------------------------------
+; function USART_ClockInit
+; -----------------------------------------
+_USART_ClockInit:
+ sub sp, #5
+ ld (0x05, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
+ addw x, #0x0006
+ ldw (0x01, sp), x
+ ld a, (x)
+ and a, #0xf8
+ ld (0x03, sp), a
+ ldw x, (0x01, sp)
+ ld a, (0x03, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 277: USARTx->CR3 |= (uint8_t)((uint8_t)((uint8_t)(USART_CPOL | (uint8_t)USART_CPHA ) | USART_LastBit));
+ ld a, (0x08, sp)
+ or a, (0x09, sp)
+ ld (0x04, sp), a
+ ld a, (0x0a, sp)
+ or a, (0x04, sp)
+ or a, (0x03, sp)
+ ldw x, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
+ ldw x, (0x01, sp)
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 279: if (USART_Clock != USART_Clock_Disable)
+ tnz (0x05, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 281: USARTx->CR3 |= (uint8_t)(USART_CR3_CLKEN); /* Set the Clock Enable bit */
+ or a, #0x08
+ ldw x, (0x01, sp)
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 285: USARTx->CR3 &= (uint8_t)(~USART_CR3_CLKEN); /* Clear the Clock Enable bit */
+ and a, #0xf7
+ ldw x, (0x01, sp)
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 287: }
+ ldw x, (6, sp)
+ addw sp, #10
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 296: void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
+; -----------------------------------------
+; function USART_Cmd
+; -----------------------------------------
+_USART_Cmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
+ addw x, #0x0004
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 298: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
+ and a, #0xdf
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 304: USARTx->CR1 |= USART_CR1_USARTD; /**< USART Disable (for low power consumption) */
+ or a, #0x20
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 306: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 329: void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
+; -----------------------------------------
+; function USART_SetPrescaler
+; -----------------------------------------
+_USART_SetPrescaler:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 332: USARTx->PSCR = USART_Prescaler;
+ addw x, #0x000a
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 333: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 340: void USART_SendBreak(USART_TypeDef* USARTx)
+; -----------------------------------------
+; function USART_SendBreak
+; -----------------------------------------
+_USART_SendBreak:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 342: USARTx->CR2 |= USART_CR2_SBK;
+ addw x, #0x0005
+ ld a, (x)
+ or a, #0x01
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 343: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 382: uint8_t USART_ReceiveData8(USART_TypeDef* USARTx)
+; -----------------------------------------
+; function USART_ReceiveData8
+; -----------------------------------------
+_USART_ReceiveData8:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 384: return USARTx->DR;
+ ld a, (0x1, x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 385: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 392: uint16_t USART_ReceiveData9(USART_TypeDef* USARTx)
+; -----------------------------------------
+; function USART_ReceiveData9
+; -----------------------------------------
+_USART_ReceiveData9:
+ pushw x
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 396: temp = ((uint16_t)(((uint16_t)((uint16_t)USARTx->CR1 & (uint16_t)USART_CR1_R8)) << 1));
+ ldw y, x
+ ld a, (0x4, x)
+ and a, #0x80
+ ld xl, a
+ clr a
+ ld xh, a
+ sllw x
+ ldw (0x01, sp), x
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 397: return (uint16_t)( ((uint16_t)((uint16_t)USARTx->DR) | temp) & ((uint16_t)0x01FF));
+ ld a, (0x1, y)
+ or a, (0x02, sp)
+ ld xl, a
+ ld a, (0x01, sp)
+ and a, #0x01
+ ld xh, a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 398: }
+ addw sp, #2
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 405: void USART_SendData8(USART_TypeDef* USARTx, uint8_t Data)
+; -----------------------------------------
+; function USART_SendData8
+; -----------------------------------------
+_USART_SendData8:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 408: USARTx->DR = Data;
+ incw x
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 409: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 418: void USART_SendData9(USART_TypeDef* USARTx, uint16_t Data)
+; -----------------------------------------
+; function USART_SendData9
+; -----------------------------------------
+_USART_SendData9:
+ sub sp, #3
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 423: USARTx->CR1 &= ((uint8_t)~USART_CR1_T8);
+ ldw (0x02, sp), x
+ addw x, #0x0004
+ ld a, (x)
+ and a, #0xbf
+ ld (0x01, sp), a
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 426: USARTx->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & USART_CR1_T8);
+ ldw y, (0x06, sp)
+ srlw y
+ srlw y
+ ld a, yl
+ and a, #0x40
+ or a, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 429: USARTx->DR = (uint8_t)(Data);
+ ldw x, (0x02, sp)
+ incw x
+ ld a, (0x07, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 430: }
+ ldw x, (4, sp)
+ addw sp, #7
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 473: void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+; -----------------------------------------
+; function USART_ReceiverWakeUpCmd
+; -----------------------------------------
+_USART_ReceiverWakeUpCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
+ addw x, #0x0005
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 477: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
+ or a, #0x02
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 485: USARTx->CR2 &= ((uint8_t)~USART_CR2_RWU);
+ and a, #0xfd
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 487: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 496: void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
+; -----------------------------------------
+; function USART_SetAddress
+; -----------------------------------------
+_USART_SetAddress:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 502: USARTx->CR4 &= ((uint8_t)~USART_CR4_ADD);
+ addw x, #0x0007
+ ld a, (x)
+ and a, #0xf0
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 504: USARTx->CR4 |= USART_Address;
+ or a, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 505: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 515: void USART_WakeUpConfig(USART_TypeDef* USARTx, USART_WakeUp_TypeDef USART_WakeUp)
+; -----------------------------------------
+; function USART_WakeUpConfig
+; -----------------------------------------
+_USART_WakeUpConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 519: USARTx->CR1 &= ((uint8_t)~USART_CR1_WAKE);
+ addw x, #0x0004
+ ld a, (x)
+ and a, #0xf7
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 520: USARTx->CR1 |= (uint8_t)USART_WakeUp;
+ or a, (0x01, sp)
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 521: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 566: void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+; -----------------------------------------
+; function USART_HalfDuplexCmd
+; -----------------------------------------
+_USART_HalfDuplexCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
+ addw x, #0x0008
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 570: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
+ or a, #0x08
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 576: USARTx->CR5 &= (uint8_t)~USART_CR5_HDSEL; /**< USART Half Duplex Disable */
+ and a, #0xf7
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 578: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 644: void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+; -----------------------------------------
+; function USART_SmartCardCmd
+; -----------------------------------------
+_USART_SmartCardCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
+ addw x, #0x0008
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 648: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
+ or a, #0x20
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 656: USARTx->CR5 &= ((uint8_t)(~USART_CR5_SCEN));
+ and a, #0xdf
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 658: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 667: void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+; -----------------------------------------
+; function USART_SmartCardNACKCmd
+; -----------------------------------------
+_USART_SmartCardNACKCmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
+ addw x, #0x0008
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 671: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
+ or a, #0x10
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 679: USARTx->CR5 &= ((uint8_t)~(USART_CR5_NACK));
+ and a, #0xef
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 681: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 690: void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
+; -----------------------------------------
+; function USART_SetGuardTime
+; -----------------------------------------
+_USART_SetGuardTime:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 693: USARTx->GTR = USART_GuardTime;
+ addw x, #0x0009
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 694: }
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 751: void USART_IrDAConfig(USART_TypeDef* USARTx, USART_IrDAMode_TypeDef USART_IrDAMode)
+; -----------------------------------------
+; function USART_IrDAConfig
+; -----------------------------------------
+_USART_IrDAConfig:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
+ addw x, #0x0008
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 755: if (USART_IrDAMode != USART_IrDAMode_Normal)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
+ or a, #0x04
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 761: USARTx->CR5 &= ((uint8_t)~USART_CR5_IRLP);
+ and a, #0xfb
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 763: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 772: void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
+; -----------------------------------------
+; function USART_IrDACmd
+; -----------------------------------------
+_USART_IrDACmd:
+ push a
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
+ addw x, #0x0008
+ ld a, (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 778: if (NewState != DISABLE)
+ tnz (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
+ or a, #0x02
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 786: USARTx->CR5 &= ((uint8_t)~USART_CR5_IREN);
+ and a, #0xfd
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 788: }
+ pop a
+ ret
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 818: void USART_DMACmd(USART_TypeDef* USARTx, USART_DMAReq_TypeDef USART_DMAReq,
+; -----------------------------------------
+; function USART_DMACmd
+; -----------------------------------------
+_USART_DMACmd:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
+ addw x, #0x0008
+ push a
+ ld a, (x)
+ ld (0x02, sp), a
+ pop a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 825: if (NewState != DISABLE)
+ tnz (0x04, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
+ or a, (0x01, sp)
+ ld (x), a
+ jra 00104$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 835: USARTx->CR5 &= (uint8_t)~USART_DMAReq;
+ cpl a
+ and a, (0x01, sp)
+ ld (x), a
+00104$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 837: }
+ pop a
+ popw x
+ pop a
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 939: void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState NewState)
+; -----------------------------------------
+; function USART_ITConfig
+; -----------------------------------------
+_USART_ITConfig:
+ sub sp, #9
+ ldw (0x08, sp), x
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 946: usartreg = (uint8_t)((uint16_t)USART_IT >> 0x08);
+ ldw x, (0x0c, sp)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 948: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
+ ld a, (0x0d, sp)
+ and a, #0x0f
+ push a
+ ld a, #0x01
+ ld (0x08, sp), a
+ pop a
+ tnz a
+ jreq 00154$
+00153$:
+ sll (0x07, sp)
+ dec a
+ jrne 00153$
+00154$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
+ ld a, xh
+ dec a
+ jrne 00156$
+ ld a, #0x01
+ ld (0x01, sp), a
+ .byte 0xc5
+00156$:
+ clr (0x01, sp)
+00157$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
+ ldw y, (0x08, sp)
+ addw y, #0x0004
+ ldw (0x02, sp), y
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
+ ld a, xh
+ sub a, #0x05
+ jrne 00159$
+ inc a
+ ld (0x04, sp), a
+ .byte 0xc5
+00159$:
+ clr (0x04, sp)
+00160$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
+ ldw x, (0x08, sp)
+ addw x, #0x0008
+ ldw (0x05, sp), x
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
+ ldw x, (0x08, sp)
+ addw x, #0x0005
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 950: if (NewState != DISABLE)
+ tnz (0x0e, sp)
+ jreq 00114$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
+ tnz (0x01, sp)
+ jreq 00105$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
+ ldw x, (0x02, sp)
+ ld a, (x)
+ or a, (0x07, sp)
+ ldw x, (0x02, sp)
+ ld (x), a
+ jra 00116$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
+ tnz (0x04, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
+ ldw x, (0x05, sp)
+ ld a, (x)
+ or a, (0x07, sp)
+ ldw x, (0x05, sp)
+ ld (x), a
+ jra 00116$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
+ ld a, (x)
+ or a, (0x07, sp)
+ ld (x), a
+ jra 00116$
+00114$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
+ cpl (0x07, sp)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 970: if (usartreg == 0x01)
+ tnz (0x01, sp)
+ jreq 00111$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
+ ldw x, (0x02, sp)
+ ld a, (x)
+ and a, (0x07, sp)
+ ldw x, (0x02, sp)
+ ld (x), a
+ jra 00116$
+00111$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 974: else if (usartreg == 0x05)
+ tnz (0x04, sp)
+ jreq 00108$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 976: USARTx->CR5 &= (uint8_t)(~itpos);
+ ldw x, (0x05, sp)
+ ld a, (x)
+ and a, (0x07, sp)
+ ldw x, (0x05, sp)
+ ld (x), a
+ jra 00116$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 981: USARTx->CR2 &= (uint8_t)(~itpos);
+ ld a, (x)
+ and a, (0x07, sp)
+ ld (x), a
+00116$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 984: }
+ ldw x, (10, sp)
+ addw sp, #14
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1002: FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
+; -----------------------------------------
+; function USART_GetFlagStatus
+; -----------------------------------------
+_USART_GetFlagStatus:
+ push a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
+ ldw y, (0x04, sp)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ ld a, (0x05, sp)
+ ld (0x01, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
+ cpw y, #0x0101
+ jrne 00108$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ ld a, (0x5, x)
+ and a, (0x01, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1014: status = SET;
+ ld a, #0x01
+ jra 00109$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1019: status = RESET;
+ clr a
+ jra 00109$
+00108$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1024: if ((USARTx->SR & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ ld a, (x)
+ and a, (0x01, sp)
+ jreq 00105$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1027: status = SET;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1032: status = RESET;
+ .byte 0x21
+00105$:
+ clr a
+00109$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1036: return status;
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1037: }
+ ldw x, (2, sp)
+ addw sp, #5
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1060: void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
+; -----------------------------------------
+; function USART_ClearFlag
+; -----------------------------------------
+_USART_ClearFlag:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1065: USARTx->SR = (uint8_t)((uint16_t)~((uint16_t)USART_FLAG));
+ ldw y, (0x03, sp)
+ cplw y
+ ld a, yl
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1066: }
+ ldw x, (1, sp)
+ addw sp, #4
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1083: ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
+; -----------------------------------------
+; function USART_GetITStatus
+; -----------------------------------------
+_USART_GetITStatus:
+ sub sp, #9
+ ldw (0x08, sp), x
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1096: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
+ ld a, (0x0d, sp)
+ ld xl, a
+ and a, #0x0f
+ push a
+ ld a, #0x01
+ ld (0x04, sp), a
+ pop a
+ tnz a
+ jreq 00179$
+00178$:
+ sll (0x03, sp)
+ dec a
+ jrne 00178$
+00179$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1098: itmask1 = (uint8_t)((uint8_t)USART_IT >> (uint8_t)4);
+ ld a, xl
+ swap a
+ and a, #0x0f
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1100: itmask2 = (uint8_t)((uint8_t)1 << itmask1);
+ push a
+ ld a, #0x01
+ ld (0x08, sp), a
+ pop a
+ tnz a
+ jreq 00181$
+00180$:
+ sll (0x07, sp)
+ dec a
+ jrne 00180$
+00181$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
+ ldw y, (0x0c, sp)
+ ldw (0x01, sp), y
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ ldw y, (0x08, sp)
+ ldw (0x04, sp), y
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
+ ldw x, (0x01, sp)
+ cpw x, #0x0100
+ jrne 00118$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1106: enablestatus = (uint8_t)((uint8_t)USARTx->CR1 & itmask2);
+ ldw y, (0x08, sp)
+ ldw (0x01, sp), y
+ ldw x, y
+ ld a, (0x4, x)
+ and a, (0x07, sp)
+ ld (0x07, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ ldw x, (0x04, sp)
+ ld a, (x)
+ and a, (0x03, sp)
+ jreq 00102$
+ tnz (0x07, sp)
+ jreq 00102$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1112: pendingbitstatus = SET;
+ ld a, #0x01
+ jra 00119$
+00102$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1117: pendingbitstatus = RESET;
+ clr a
+ jra 00119$
+00118$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ ldw x, (0x08, sp)
+ ld a, (0x5, x)
+ and a, (0x07, sp)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1121: else if (USART_IT == USART_IT_OR)
+ ldw x, (0x01, sp)
+ cpw x, #0x0235
+ jrne 00115$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ ld (0x06, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1127: temp = (uint8_t)(USARTx->CR5 & USART_CR5_EIE);
+ ldw x, (0x08, sp)
+ ld a, (0x8, x)
+ and a, #0x01
+ ld (0x07, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1129: if (( (USARTx->SR & itpos) != 0x00) && ((enablestatus || temp)))
+ ldw x, (0x04, sp)
+ ld a, (x)
+ and a, (0x03, sp)
+ jreq 00106$
+ tnz (0x06, sp)
+ jrne 00105$
+ tnz (0x07, sp)
+ jreq 00106$
+00105$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1132: pendingbitstatus = SET;
+ ld a, #0x01
+ jra 00119$
+00106$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1137: pendingbitstatus = RESET;
+ clr a
+ jra 00119$
+00115$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1144: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ ld (0x07, sp), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1146: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ ldw x, (0x04, sp)
+ ld a, (x)
+ and a, (0x03, sp)
+ jreq 00111$
+ tnz (0x07, sp)
+ jreq 00111$
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1149: pendingbitstatus = SET;
+ ld a, #0x01
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1154: pendingbitstatus = RESET;
+ .byte 0x21
+00111$:
+ clr a
+00119$:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1159: return pendingbitstatus;
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1160: }
+ ldw x, (10, sp)
+ addw sp, #13
+ jp (x)
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1183: void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
+; -----------------------------------------
+; function USART_ClearITPendingBit
+; -----------------------------------------
+_USART_ClearITPendingBit:
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1188: USARTx->SR &= (uint8_t)(~USART_SR_TC);
+ ld a, (x)
+ and a, #0xbf
+ ld (x), a
+; ../inc/stm8l151x/src/stm8l15x_usart.c: 1189: }
+ ldw x, (1, sp)
+ addw sp, #4
+ jp (x)
+ .area CODE
+ .area CONST
+ .area INITIALIZER
+ .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_usart.lst b/firmware/STM8L15X_LD/stm8l15x_usart.lst
new file mode 100644
index 0000000..4633b07
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_usart.lst
@@ -0,0 +1,899 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_usart
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _CLK_GetClockFreq
+ 11 .globl _USART_DeInit
+ 12 .globl _USART_Init
+ 13 .globl _USART_ClockInit
+ 14 .globl _USART_Cmd
+ 15 .globl _USART_SetPrescaler
+ 16 .globl _USART_SendBreak
+ 17 .globl _USART_ReceiveData8
+ 18 .globl _USART_ReceiveData9
+ 19 .globl _USART_SendData8
+ 20 .globl _USART_SendData9
+ 21 .globl _USART_ReceiverWakeUpCmd
+ 22 .globl _USART_SetAddress
+ 23 .globl _USART_WakeUpConfig
+ 24 .globl _USART_HalfDuplexCmd
+ 25 .globl _USART_SmartCardCmd
+ 26 .globl _USART_SmartCardNACKCmd
+ 27 .globl _USART_SetGuardTime
+ 28 .globl _USART_IrDAConfig
+ 29 .globl _USART_IrDACmd
+ 30 .globl _USART_DMACmd
+ 31 .globl _USART_ITConfig
+ 32 .globl _USART_GetFlagStatus
+ 33 .globl _USART_ClearFlag
+ 34 .globl _USART_GetITStatus
+ 35 .globl _USART_ClearITPendingBit
+ 36 ;--------------------------------------------------------
+ 37 ; ram data
+ 38 ;--------------------------------------------------------
+ 39 .area DATA
+ 40 ;--------------------------------------------------------
+ 41 ; ram data
+ 42 ;--------------------------------------------------------
+ 43 .area INITIALIZED
+ 44 ;--------------------------------------------------------
+ 45 ; absolute external ram data
+ 46 ;--------------------------------------------------------
+ 47 .area DABS (ABS)
+ 48
+ 49 ; default segment ordering for linker
+ 50 .area HOME
+ 51 .area GSINIT
+ 52 .area GSFINAL
+ 53 .area CONST
+ 54 .area INITIALIZER
+ 55 .area CODE
+ 56
+ 57 ;--------------------------------------------------------
+ 58 ; global & static initialisations
+ 59 ;--------------------------------------------------------
+ 60 .area HOME
+ 61 .area GSINIT
+ 62 .area GSFINAL
+ 63 .area GSINIT
+ 64 ;--------------------------------------------------------
+ 65 ; Home
+ 66 ;--------------------------------------------------------
+ 67 .area HOME
+ 68 .area HOME
+ 69 ;--------------------------------------------------------
+ 70 ; code
+ 71 ;--------------------------------------------------------
+ 72 .area CODE
+ 73 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 148: void USART_DeInit(USART_TypeDef* USARTx)
+ 74 ; -----------------------------------------
+ 75 ; function USART_DeInit
+ 76 ; -----------------------------------------
+ 000000 77 _USART_DeInit:
+ 78 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 154: (void) USARTx->DR;
+ 000000 90 93 [ 1] 79 ldw y, x
+ 000002 E6 01 [ 1] 80 ld a, (0x1, x)
+ 81 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 156: USARTx->BRR2 = USART_BRR2_RESET_VALUE; /* Set USART_BRR2 to reset value 0x00 */
+ 000004 93 [ 1] 82 ldw x, y
+ 000005 6F 03 [ 1] 83 clr (0x0003, x)
+ 84 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 157: USARTx->BRR1 = USART_BRR1_RESET_VALUE; /* Set USART_BRR1 to reset value 0x00 */
+ 000007 93 [ 1] 85 ldw x, y
+ 000008 6F 02 [ 1] 86 clr (0x02, x)
+ 87 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 159: USARTx->CR1 = USART_CR1_RESET_VALUE; /* Set USART_CR1 to reset value 0x00 */
+ 00000A 93 [ 1] 88 ldw x, y
+ 00000B 6F 04 [ 1] 89 clr (0x0004, x)
+ 90 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 160: USARTx->CR2 = USART_CR2_RESET_VALUE; /* Set USART_CR2 to reset value 0x00 */
+ 00000D 93 [ 1] 91 ldw x, y
+ 00000E 6F 05 [ 1] 92 clr (0x0005, x)
+ 93 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 161: USARTx->CR3 = USART_CR3_RESET_VALUE; /* Set USART_CR3 to reset value 0x00 */
+ 000010 93 [ 1] 94 ldw x, y
+ 000011 6F 06 [ 1] 95 clr (0x0006, x)
+ 96 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 162: USARTx->CR4 = USART_CR4_RESET_VALUE; /* Set USART_CR4 to reset value 0x00 */
+ 000013 93 [ 1] 97 ldw x, y
+ 000014 6F 07 [ 1] 98 clr (0x0007, x)
+ 99 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 163: }
+ 000016 81 [ 4] 100 ret
+ 101 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 192: void USART_Init(USART_TypeDef* USARTx, uint32_t BaudRate, USART_WordLength_TypeDef
+ 102 ; -----------------------------------------
+ 103 ; function USART_Init
+ 104 ; -----------------------------------------
+ 000017 105 _USART_Init:
+ 000017 52 0B [ 2] 106 sub sp, #11
+ 107 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 210: USARTx->CR1 &= (uint8_t)(~(USART_CR1_PCEN | USART_CR1_PS | USART_CR1_M));
+ 000019 1F 0A [ 2] 108 ldw (0x0a, sp), x
+ 00001B 1C 00 04 [ 2] 109 addw x, #0x0004
+ 00001E F6 [ 1] 110 ld a, (x)
+ 00001F A4 E9 [ 1] 111 and a, #0xe9
+ 000021 6B 09 [ 1] 112 ld (0x09, sp), a
+ 000023 F7 [ 1] 113 ld (x), a
+ 114 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 213: USARTx->CR1 |= (uint8_t)((uint8_t)USART_WordLength | (uint8_t)USART_Parity);
+ 000024 7B 12 [ 1] 115 ld a, (0x12, sp)
+ 000026 1A 14 [ 1] 116 or a, (0x14, sp)
+ 000028 1A 09 [ 1] 117 or a, (0x09, sp)
+ 00002A F7 [ 1] 118 ld (x), a
+ 119 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 216: USARTx->CR3 &= (uint8_t)(~USART_CR3_STOP);
+ 00002B 1E 0A [ 2] 120 ldw x, (0x0a, sp)
+ 00002D 1C 00 06 [ 2] 121 addw x, #0x0006
+ 000030 F6 [ 1] 122 ld a, (x)
+ 000031 A4 CF [ 1] 123 and a, #0xcf
+ 000033 F7 [ 1] 124 ld (x), a
+ 125 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 218: USARTx->CR3 |= (uint8_t)USART_StopBits;
+ 000034 1A 13 [ 1] 126 or a, (0x13, sp)
+ 000036 F7 [ 1] 127 ld (x), a
+ 128 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 221: USARTx->BRR1 &= (uint8_t)(~USART_BRR1_DIVM);
+ 000037 1E 0A [ 2] 129 ldw x, (0x0a, sp)
+ 000039 5C [ 1] 130 incw x
+ 00003A 5C [ 1] 131 incw x
+ 00003B 1F 01 [ 2] 132 ldw (0x01, sp), x
+ 00003D F6 [ 1] 133 ld a, (x)
+ 00003E 1E 01 [ 2] 134 ldw x, (0x01, sp)
+ 000040 7F [ 1] 135 clr (x)
+ 136 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 223: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVM);
+ 000041 1E 0A [ 2] 137 ldw x, (0x0a, sp)
+ 000043 1C 00 03 [ 2] 138 addw x, #0x0003
+ 000046 1F 03 [ 2] 139 ldw (0x03, sp), x
+ 000048 F6 [ 1] 140 ld a, (x)
+ 000049 A4 0F [ 1] 141 and a, #0x0f
+ 00004B 1E 03 [ 2] 142 ldw x, (0x03, sp)
+ 00004D F7 [ 1] 143 ld (x), a
+ 144 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 225: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVF);
+ 00004E 1E 03 [ 2] 145 ldw x, (0x03, sp)
+ 000050 7F [ 1] 146 clr (x)
+ 147 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 227: BaudRate_Mantissa = (uint32_t)(CLK_GetClockFreq() / BaudRate );
+ 000051 CDr00r00 [ 4] 148 call _CLK_GetClockFreq
+ 000054 1F 08 [ 2] 149 ldw (0x08, sp), x
+ 000056 1E 10 [ 2] 150 ldw x, (0x10, sp)
+ 000058 89 [ 2] 151 pushw x
+ 000059 1E 10 [ 2] 152 ldw x, (0x10, sp)
+ 00005B 89 [ 2] 153 pushw x
+ 00005C 1E 0C [ 2] 154 ldw x, (0x0c, sp)
+ 00005E 89 [ 2] 155 pushw x
+ 00005F 90 89 [ 2] 156 pushw y
+ 157 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 229: USARTx->BRR2 = (uint8_t)((BaudRate_Mantissa >> (uint8_t)8) & (uint8_t)0xF0);
+ 000061 CDr00r00 [ 4] 158 call __divulong
+ 000064 5B 08 [ 2] 159 addw sp, #8
+ 000066 17 05 [ 2] 160 ldw (0x05, sp), y
+ 000068 9E [ 1] 161 ld a, xh
+ 000069 A4 F0 [ 1] 162 and a, #0xf0
+ 00006B 6B 09 [ 1] 163 ld (0x09, sp), a
+ 00006D 16 03 [ 2] 164 ldw y, (0x03, sp)
+ 00006F 7B 09 [ 1] 165 ld a, (0x09, sp)
+ 000071 90 F7 [ 1] 166 ld (y), a
+ 167 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 231: USARTx->BRR2 |= (uint8_t)(BaudRate_Mantissa & (uint8_t)0x0F);
+ 000073 9F [ 1] 168 ld a, xl
+ 000074 A4 0F [ 1] 169 and a, #0x0f
+ 000076 1A 09 [ 1] 170 or a, (0x09, sp)
+ 000078 16 03 [ 2] 171 ldw y, (0x03, sp)
+ 00007A 90 F7 [ 1] 172 ld (y), a
+ 173 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 233: USARTx->BRR1 = (uint8_t)(BaudRate_Mantissa >> (uint8_t)4);
+ 00007C A6 10 [ 1] 174 ld a, #0x10
+ 00007E 62 [ 2] 175 div x, a
+ 00007F 9F [ 1] 176 ld a, xl
+ 000080 1E 01 [ 2] 177 ldw x, (0x01, sp)
+ 000082 F7 [ 1] 178 ld (x), a
+ 179 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 236: USARTx->CR2 &= (uint8_t)~(USART_CR2_TEN | USART_CR2_REN);
+ 000083 1E 0A [ 2] 180 ldw x, (0x0a, sp)
+ 000085 1C 00 05 [ 2] 181 addw x, #0x0005
+ 000088 F6 [ 1] 182 ld a, (x)
+ 000089 A4 F3 [ 1] 183 and a, #0xf3
+ 00008B F7 [ 1] 184 ld (x), a
+ 185 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 238: USARTx->CR2 |= (uint8_t)USART_Mode;
+ 00008C 1A 15 [ 1] 186 or a, (0x15, sp)
+ 00008E F7 [ 1] 187 ld (x), a
+ 188 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 239: }
+ 00008F 1E 0C [ 2] 189 ldw x, (12, sp)
+ 000091 5B 15 [ 2] 190 addw sp, #21
+ 000093 FC [ 2] 191 jp (x)
+ 192 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 264: void USART_ClockInit(USART_TypeDef* USARTx, USART_Clock_TypeDef USART_Clock,
+ 193 ; -----------------------------------------
+ 194 ; function USART_ClockInit
+ 195 ; -----------------------------------------
+ 000094 196 _USART_ClockInit:
+ 000094 52 05 [ 2] 197 sub sp, #5
+ 000096 6B 05 [ 1] 198 ld (0x05, sp), a
+ 199 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
+ 000098 1C 00 06 [ 2] 200 addw x, #0x0006
+ 00009B 1F 01 [ 2] 201 ldw (0x01, sp), x
+ 00009D F6 [ 1] 202 ld a, (x)
+ 00009E A4 F8 [ 1] 203 and a, #0xf8
+ 0000A0 6B 03 [ 1] 204 ld (0x03, sp), a
+ 0000A2 1E 01 [ 2] 205 ldw x, (0x01, sp)
+ 0000A4 7B 03 [ 1] 206 ld a, (0x03, sp)
+ 0000A6 F7 [ 1] 207 ld (x), a
+ 208 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 277: USARTx->CR3 |= (uint8_t)((uint8_t)((uint8_t)(USART_CPOL | (uint8_t)USART_CPHA ) | USART_LastBit));
+ 0000A7 7B 08 [ 1] 209 ld a, (0x08, sp)
+ 0000A9 1A 09 [ 1] 210 or a, (0x09, sp)
+ 0000AB 6B 04 [ 1] 211 ld (0x04, sp), a
+ 0000AD 7B 0A [ 1] 212 ld a, (0x0a, sp)
+ 0000AF 1A 04 [ 1] 213 or a, (0x04, sp)
+ 0000B1 1A 03 [ 1] 214 or a, (0x03, sp)
+ 0000B3 1E 01 [ 2] 215 ldw x, (0x01, sp)
+ 0000B5 F7 [ 1] 216 ld (x), a
+ 217 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
+ 0000B6 1E 01 [ 2] 218 ldw x, (0x01, sp)
+ 0000B8 F6 [ 1] 219 ld a, (x)
+ 220 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 279: if (USART_Clock != USART_Clock_Disable)
+ 0000B9 0D 05 [ 1] 221 tnz (0x05, sp)
+ 0000BB 27 07 [ 1] 222 jreq 00102$
+ 223 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 281: USARTx->CR3 |= (uint8_t)(USART_CR3_CLKEN); /* Set the Clock Enable bit */
+ 0000BD AA 08 [ 1] 224 or a, #0x08
+ 0000BF 1E 01 [ 2] 225 ldw x, (0x01, sp)
+ 0000C1 F7 [ 1] 226 ld (x), a
+ 0000C2 20 05 [ 2] 227 jra 00104$
+ 0000C4 228 00102$:
+ 229 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 285: USARTx->CR3 &= (uint8_t)(~USART_CR3_CLKEN); /* Clear the Clock Enable bit */
+ 0000C4 A4 F7 [ 1] 230 and a, #0xf7
+ 0000C6 1E 01 [ 2] 231 ldw x, (0x01, sp)
+ 0000C8 F7 [ 1] 232 ld (x), a
+ 0000C9 233 00104$:
+ 234 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 287: }
+ 0000C9 1E 06 [ 2] 235 ldw x, (6, sp)
+ 0000CB 5B 0A [ 2] 236 addw sp, #10
+ 0000CD FC [ 2] 237 jp (x)
+ 238 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 296: void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 239 ; -----------------------------------------
+ 240 ; function USART_Cmd
+ 241 ; -----------------------------------------
+ 0000CE 242 _USART_Cmd:
+ 0000CE 88 [ 1] 243 push a
+ 0000CF 6B 01 [ 1] 244 ld (0x01, sp), a
+ 245 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
+ 0000D1 1C 00 04 [ 2] 246 addw x, #0x0004
+ 0000D4 F6 [ 1] 247 ld a, (x)
+ 248 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 298: if (NewState != DISABLE)
+ 0000D5 0D 01 [ 1] 249 tnz (0x01, sp)
+ 0000D7 27 05 [ 1] 250 jreq 00102$
+ 251 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
+ 0000D9 A4 DF [ 1] 252 and a, #0xdf
+ 0000DB F7 [ 1] 253 ld (x), a
+ 0000DC 20 03 [ 2] 254 jra 00104$
+ 0000DE 255 00102$:
+ 256 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 304: USARTx->CR1 |= USART_CR1_USARTD; /**< USART Disable (for low power consumption) */
+ 0000DE AA 20 [ 1] 257 or a, #0x20
+ 0000E0 F7 [ 1] 258 ld (x), a
+ 0000E1 259 00104$:
+ 260 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 306: }
+ 0000E1 84 [ 1] 261 pop a
+ 0000E2 81 [ 4] 262 ret
+ 263 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 329: void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
+ 264 ; -----------------------------------------
+ 265 ; function USART_SetPrescaler
+ 266 ; -----------------------------------------
+ 0000E3 267 _USART_SetPrescaler:
+ 268 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 332: USARTx->PSCR = USART_Prescaler;
+ 0000E3 1C 00 0A [ 2] 269 addw x, #0x000a
+ 0000E6 F7 [ 1] 270 ld (x), a
+ 271 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 333: }
+ 0000E7 81 [ 4] 272 ret
+ 273 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 340: void USART_SendBreak(USART_TypeDef* USARTx)
+ 274 ; -----------------------------------------
+ 275 ; function USART_SendBreak
+ 276 ; -----------------------------------------
+ 0000E8 277 _USART_SendBreak:
+ 278 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 342: USARTx->CR2 |= USART_CR2_SBK;
+ 0000E8 1C 00 05 [ 2] 279 addw x, #0x0005
+ 0000EB F6 [ 1] 280 ld a, (x)
+ 0000EC AA 01 [ 1] 281 or a, #0x01
+ 0000EE F7 [ 1] 282 ld (x), a
+ 283 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 343: }
+ 0000EF 81 [ 4] 284 ret
+ 285 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 382: uint8_t USART_ReceiveData8(USART_TypeDef* USARTx)
+ 286 ; -----------------------------------------
+ 287 ; function USART_ReceiveData8
+ 288 ; -----------------------------------------
+ 0000F0 289 _USART_ReceiveData8:
+ 290 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 384: return USARTx->DR;
+ 0000F0 E6 01 [ 1] 291 ld a, (0x1, x)
+ 292 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 385: }
+ 0000F2 81 [ 4] 293 ret
+ 294 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 392: uint16_t USART_ReceiveData9(USART_TypeDef* USARTx)
+ 295 ; -----------------------------------------
+ 296 ; function USART_ReceiveData9
+ 297 ; -----------------------------------------
+ 0000F3 298 _USART_ReceiveData9:
+ 0000F3 89 [ 2] 299 pushw x
+ 300 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 396: temp = ((uint16_t)(((uint16_t)((uint16_t)USARTx->CR1 & (uint16_t)USART_CR1_R8)) << 1));
+ 0000F4 90 93 [ 1] 301 ldw y, x
+ 0000F6 E6 04 [ 1] 302 ld a, (0x4, x)
+ 0000F8 A4 80 [ 1] 303 and a, #0x80
+ 0000FA 97 [ 1] 304 ld xl, a
+ 0000FB 4F [ 1] 305 clr a
+ 0000FC 95 [ 1] 306 ld xh, a
+ 0000FD 58 [ 2] 307 sllw x
+ 0000FE 1F 01 [ 2] 308 ldw (0x01, sp), x
+ 309 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 397: return (uint16_t)( ((uint16_t)((uint16_t)USARTx->DR) | temp) & ((uint16_t)0x01FF));
+ 000100 90 E6 01 [ 1] 310 ld a, (0x1, y)
+ 000103 1A 02 [ 1] 311 or a, (0x02, sp)
+ 000105 97 [ 1] 312 ld xl, a
+ 000106 7B 01 [ 1] 313 ld a, (0x01, sp)
+ 000108 A4 01 [ 1] 314 and a, #0x01
+ 00010A 95 [ 1] 315 ld xh, a
+ 316 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 398: }
+ 00010B 5B 02 [ 2] 317 addw sp, #2
+ 00010D 81 [ 4] 318 ret
+ 319 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 405: void USART_SendData8(USART_TypeDef* USARTx, uint8_t Data)
+ 320 ; -----------------------------------------
+ 321 ; function USART_SendData8
+ 322 ; -----------------------------------------
+ 00010E 323 _USART_SendData8:
+ 324 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 408: USARTx->DR = Data;
+ 00010E 5C [ 1] 325 incw x
+ 00010F F7 [ 1] 326 ld (x), a
+ 327 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 409: }
+ 000110 81 [ 4] 328 ret
+ 329 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 418: void USART_SendData9(USART_TypeDef* USARTx, uint16_t Data)
+ 330 ; -----------------------------------------
+ 331 ; function USART_SendData9
+ 332 ; -----------------------------------------
+ 000111 333 _USART_SendData9:
+ 000111 52 03 [ 2] 334 sub sp, #3
+ 335 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 423: USARTx->CR1 &= ((uint8_t)~USART_CR1_T8);
+ 000113 1F 02 [ 2] 336 ldw (0x02, sp), x
+ 000115 1C 00 04 [ 2] 337 addw x, #0x0004
+ 000118 F6 [ 1] 338 ld a, (x)
+ 000119 A4 BF [ 1] 339 and a, #0xbf
+ 00011B 6B 01 [ 1] 340 ld (0x01, sp), a
+ 00011D F7 [ 1] 341 ld (x), a
+ 342 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 426: USARTx->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & USART_CR1_T8);
+ 00011E 16 06 [ 2] 343 ldw y, (0x06, sp)
+ 000120 90 54 [ 2] 344 srlw y
+ 000122 90 54 [ 2] 345 srlw y
+ 000124 90 9F [ 1] 346 ld a, yl
+ 000126 A4 40 [ 1] 347 and a, #0x40
+ 000128 1A 01 [ 1] 348 or a, (0x01, sp)
+ 00012A F7 [ 1] 349 ld (x), a
+ 350 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 429: USARTx->DR = (uint8_t)(Data);
+ 00012B 1E 02 [ 2] 351 ldw x, (0x02, sp)
+ 00012D 5C [ 1] 352 incw x
+ 00012E 7B 07 [ 1] 353 ld a, (0x07, sp)
+ 000130 F7 [ 1] 354 ld (x), a
+ 355 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 430: }
+ 000131 1E 04 [ 2] 356 ldw x, (4, sp)
+ 000133 5B 07 [ 2] 357 addw sp, #7
+ 000135 FC [ 2] 358 jp (x)
+ 359 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 473: void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 360 ; -----------------------------------------
+ 361 ; function USART_ReceiverWakeUpCmd
+ 362 ; -----------------------------------------
+ 000136 363 _USART_ReceiverWakeUpCmd:
+ 000136 88 [ 1] 364 push a
+ 000137 6B 01 [ 1] 365 ld (0x01, sp), a
+ 366 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
+ 000139 1C 00 05 [ 2] 367 addw x, #0x0005
+ 00013C F6 [ 1] 368 ld a, (x)
+ 369 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 477: if (NewState != DISABLE)
+ 00013D 0D 01 [ 1] 370 tnz (0x01, sp)
+ 00013F 27 05 [ 1] 371 jreq 00102$
+ 372 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
+ 000141 AA 02 [ 1] 373 or a, #0x02
+ 000143 F7 [ 1] 374 ld (x), a
+ 000144 20 03 [ 2] 375 jra 00104$
+ 000146 376 00102$:
+ 377 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 485: USARTx->CR2 &= ((uint8_t)~USART_CR2_RWU);
+ 000146 A4 FD [ 1] 378 and a, #0xfd
+ 000148 F7 [ 1] 379 ld (x), a
+ 000149 380 00104$:
+ 381 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 487: }
+ 000149 84 [ 1] 382 pop a
+ 00014A 81 [ 4] 383 ret
+ 384 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 496: void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
+ 385 ; -----------------------------------------
+ 386 ; function USART_SetAddress
+ 387 ; -----------------------------------------
+ 00014B 388 _USART_SetAddress:
+ 00014B 88 [ 1] 389 push a
+ 00014C 6B 01 [ 1] 390 ld (0x01, sp), a
+ 391 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 502: USARTx->CR4 &= ((uint8_t)~USART_CR4_ADD);
+ 00014E 1C 00 07 [ 2] 392 addw x, #0x0007
+ 000151 F6 [ 1] 393 ld a, (x)
+ 000152 A4 F0 [ 1] 394 and a, #0xf0
+ 000154 F7 [ 1] 395 ld (x), a
+ 396 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 504: USARTx->CR4 |= USART_Address;
+ 000155 1A 01 [ 1] 397 or a, (0x01, sp)
+ 000157 F7 [ 1] 398 ld (x), a
+ 399 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 505: }
+ 000158 84 [ 1] 400 pop a
+ 000159 81 [ 4] 401 ret
+ 402 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 515: void USART_WakeUpConfig(USART_TypeDef* USARTx, USART_WakeUp_TypeDef USART_WakeUp)
+ 403 ; -----------------------------------------
+ 404 ; function USART_WakeUpConfig
+ 405 ; -----------------------------------------
+ 00015A 406 _USART_WakeUpConfig:
+ 00015A 88 [ 1] 407 push a
+ 00015B 6B 01 [ 1] 408 ld (0x01, sp), a
+ 409 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 519: USARTx->CR1 &= ((uint8_t)~USART_CR1_WAKE);
+ 00015D 1C 00 04 [ 2] 410 addw x, #0x0004
+ 000160 F6 [ 1] 411 ld a, (x)
+ 000161 A4 F7 [ 1] 412 and a, #0xf7
+ 000163 F7 [ 1] 413 ld (x), a
+ 414 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 520: USARTx->CR1 |= (uint8_t)USART_WakeUp;
+ 000164 1A 01 [ 1] 415 or a, (0x01, sp)
+ 000166 F7 [ 1] 416 ld (x), a
+ 417 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 521: }
+ 000167 84 [ 1] 418 pop a
+ 000168 81 [ 4] 419 ret
+ 420 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 566: void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 421 ; -----------------------------------------
+ 422 ; function USART_HalfDuplexCmd
+ 423 ; -----------------------------------------
+ 000169 424 _USART_HalfDuplexCmd:
+ 000169 88 [ 1] 425 push a
+ 00016A 6B 01 [ 1] 426 ld (0x01, sp), a
+ 427 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
+ 00016C 1C 00 08 [ 2] 428 addw x, #0x0008
+ 00016F F6 [ 1] 429 ld a, (x)
+ 430 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 570: if (NewState != DISABLE)
+ 000170 0D 01 [ 1] 431 tnz (0x01, sp)
+ 000172 27 05 [ 1] 432 jreq 00102$
+ 433 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
+ 000174 AA 08 [ 1] 434 or a, #0x08
+ 000176 F7 [ 1] 435 ld (x), a
+ 000177 20 03 [ 2] 436 jra 00104$
+ 000179 437 00102$:
+ 438 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 576: USARTx->CR5 &= (uint8_t)~USART_CR5_HDSEL; /**< USART Half Duplex Disable */
+ 000179 A4 F7 [ 1] 439 and a, #0xf7
+ 00017B F7 [ 1] 440 ld (x), a
+ 00017C 441 00104$:
+ 442 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 578: }
+ 00017C 84 [ 1] 443 pop a
+ 00017D 81 [ 4] 444 ret
+ 445 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 644: void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 446 ; -----------------------------------------
+ 447 ; function USART_SmartCardCmd
+ 448 ; -----------------------------------------
+ 00017E 449 _USART_SmartCardCmd:
+ 00017E 88 [ 1] 450 push a
+ 00017F 6B 01 [ 1] 451 ld (0x01, sp), a
+ 452 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
+ 000181 1C 00 08 [ 2] 453 addw x, #0x0008
+ 000184 F6 [ 1] 454 ld a, (x)
+ 455 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 648: if (NewState != DISABLE)
+ 000185 0D 01 [ 1] 456 tnz (0x01, sp)
+ 000187 27 05 [ 1] 457 jreq 00102$
+ 458 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
+ 000189 AA 20 [ 1] 459 or a, #0x20
+ 00018B F7 [ 1] 460 ld (x), a
+ 00018C 20 03 [ 2] 461 jra 00104$
+ 00018E 462 00102$:
+ 463 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 656: USARTx->CR5 &= ((uint8_t)(~USART_CR5_SCEN));
+ 00018E A4 DF [ 1] 464 and a, #0xdf
+ 000190 F7 [ 1] 465 ld (x), a
+ 000191 466 00104$:
+ 467 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 658: }
+ 000191 84 [ 1] 468 pop a
+ 000192 81 [ 4] 469 ret
+ 470 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 667: void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 471 ; -----------------------------------------
+ 472 ; function USART_SmartCardNACKCmd
+ 473 ; -----------------------------------------
+ 000193 474 _USART_SmartCardNACKCmd:
+ 000193 88 [ 1] 475 push a
+ 000194 6B 01 [ 1] 476 ld (0x01, sp), a
+ 477 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
+ 000196 1C 00 08 [ 2] 478 addw x, #0x0008
+ 000199 F6 [ 1] 479 ld a, (x)
+ 480 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 671: if (NewState != DISABLE)
+ 00019A 0D 01 [ 1] 481 tnz (0x01, sp)
+ 00019C 27 05 [ 1] 482 jreq 00102$
+ 483 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
+ 00019E AA 10 [ 1] 484 or a, #0x10
+ 0001A0 F7 [ 1] 485 ld (x), a
+ 0001A1 20 03 [ 2] 486 jra 00104$
+ 0001A3 487 00102$:
+ 488 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 679: USARTx->CR5 &= ((uint8_t)~(USART_CR5_NACK));
+ 0001A3 A4 EF [ 1] 489 and a, #0xef
+ 0001A5 F7 [ 1] 490 ld (x), a
+ 0001A6 491 00104$:
+ 492 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 681: }
+ 0001A6 84 [ 1] 493 pop a
+ 0001A7 81 [ 4] 494 ret
+ 495 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 690: void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
+ 496 ; -----------------------------------------
+ 497 ; function USART_SetGuardTime
+ 498 ; -----------------------------------------
+ 0001A8 499 _USART_SetGuardTime:
+ 500 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 693: USARTx->GTR = USART_GuardTime;
+ 0001A8 1C 00 09 [ 2] 501 addw x, #0x0009
+ 0001AB F7 [ 1] 502 ld (x), a
+ 503 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 694: }
+ 0001AC 81 [ 4] 504 ret
+ 505 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 751: void USART_IrDAConfig(USART_TypeDef* USARTx, USART_IrDAMode_TypeDef USART_IrDAMode)
+ 506 ; -----------------------------------------
+ 507 ; function USART_IrDAConfig
+ 508 ; -----------------------------------------
+ 0001AD 509 _USART_IrDAConfig:
+ 0001AD 88 [ 1] 510 push a
+ 0001AE 6B 01 [ 1] 511 ld (0x01, sp), a
+ 512 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
+ 0001B0 1C 00 08 [ 2] 513 addw x, #0x0008
+ 0001B3 F6 [ 1] 514 ld a, (x)
+ 515 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 755: if (USART_IrDAMode != USART_IrDAMode_Normal)
+ 0001B4 0D 01 [ 1] 516 tnz (0x01, sp)
+ 0001B6 27 05 [ 1] 517 jreq 00102$
+ 518 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
+ 0001B8 AA 04 [ 1] 519 or a, #0x04
+ 0001BA F7 [ 1] 520 ld (x), a
+ 0001BB 20 03 [ 2] 521 jra 00104$
+ 0001BD 522 00102$:
+ 523 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 761: USARTx->CR5 &= ((uint8_t)~USART_CR5_IRLP);
+ 0001BD A4 FB [ 1] 524 and a, #0xfb
+ 0001BF F7 [ 1] 525 ld (x), a
+ 0001C0 526 00104$:
+ 527 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 763: }
+ 0001C0 84 [ 1] 528 pop a
+ 0001C1 81 [ 4] 529 ret
+ 530 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 772: void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 531 ; -----------------------------------------
+ 532 ; function USART_IrDACmd
+ 533 ; -----------------------------------------
+ 0001C2 534 _USART_IrDACmd:
+ 0001C2 88 [ 1] 535 push a
+ 0001C3 6B 01 [ 1] 536 ld (0x01, sp), a
+ 537 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
+ 0001C5 1C 00 08 [ 2] 538 addw x, #0x0008
+ 0001C8 F6 [ 1] 539 ld a, (x)
+ 540 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 778: if (NewState != DISABLE)
+ 0001C9 0D 01 [ 1] 541 tnz (0x01, sp)
+ 0001CB 27 05 [ 1] 542 jreq 00102$
+ 543 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
+ 0001CD AA 02 [ 1] 544 or a, #0x02
+ 0001CF F7 [ 1] 545 ld (x), a
+ 0001D0 20 03 [ 2] 546 jra 00104$
+ 0001D2 547 00102$:
+ 548 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 786: USARTx->CR5 &= ((uint8_t)~USART_CR5_IREN);
+ 0001D2 A4 FD [ 1] 549 and a, #0xfd
+ 0001D4 F7 [ 1] 550 ld (x), a
+ 0001D5 551 00104$:
+ 552 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 788: }
+ 0001D5 84 [ 1] 553 pop a
+ 0001D6 81 [ 4] 554 ret
+ 555 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 818: void USART_DMACmd(USART_TypeDef* USARTx, USART_DMAReq_TypeDef USART_DMAReq,
+ 556 ; -----------------------------------------
+ 557 ; function USART_DMACmd
+ 558 ; -----------------------------------------
+ 0001D7 559 _USART_DMACmd:
+ 0001D7 88 [ 1] 560 push a
+ 561 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
+ 0001D8 1C 00 08 [ 2] 562 addw x, #0x0008
+ 0001DB 88 [ 1] 563 push a
+ 0001DC F6 [ 1] 564 ld a, (x)
+ 0001DD 6B 02 [ 1] 565 ld (0x02, sp), a
+ 0001DF 84 [ 1] 566 pop a
+ 567 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 825: if (NewState != DISABLE)
+ 0001E0 0D 04 [ 1] 568 tnz (0x04, sp)
+ 0001E2 27 05 [ 1] 569 jreq 00102$
+ 570 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
+ 0001E4 1A 01 [ 1] 571 or a, (0x01, sp)
+ 0001E6 F7 [ 1] 572 ld (x), a
+ 0001E7 20 04 [ 2] 573 jra 00104$
+ 0001E9 574 00102$:
+ 575 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 835: USARTx->CR5 &= (uint8_t)~USART_DMAReq;
+ 0001E9 43 [ 1] 576 cpl a
+ 0001EA 14 01 [ 1] 577 and a, (0x01, sp)
+ 0001EC F7 [ 1] 578 ld (x), a
+ 0001ED 579 00104$:
+ 580 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 837: }
+ 0001ED 84 [ 1] 581 pop a
+ 0001EE 85 [ 2] 582 popw x
+ 0001EF 84 [ 1] 583 pop a
+ 0001F0 FC [ 2] 584 jp (x)
+ 585 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 939: void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState NewState)
+ 586 ; -----------------------------------------
+ 587 ; function USART_ITConfig
+ 588 ; -----------------------------------------
+ 0001F1 589 _USART_ITConfig:
+ 0001F1 52 09 [ 2] 590 sub sp, #9
+ 0001F3 1F 08 [ 2] 591 ldw (0x08, sp), x
+ 592 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 946: usartreg = (uint8_t)((uint16_t)USART_IT >> 0x08);
+ 0001F5 1E 0C [ 2] 593 ldw x, (0x0c, sp)
+ 594 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 948: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
+ 0001F7 7B 0D [ 1] 595 ld a, (0x0d, sp)
+ 0001F9 A4 0F [ 1] 596 and a, #0x0f
+ 0001FB 88 [ 1] 597 push a
+ 0001FC A6 01 [ 1] 598 ld a, #0x01
+ 0001FE 6B 08 [ 1] 599 ld (0x08, sp), a
+ 000200 84 [ 1] 600 pop a
+ 000201 4D [ 1] 601 tnz a
+ 000202 27 05 [ 1] 602 jreq 00154$
+ 000204 603 00153$:
+ 000204 08 07 [ 1] 604 sll (0x07, sp)
+ 000206 4A [ 1] 605 dec a
+ 000207 26 FB [ 1] 606 jrne 00153$
+ 000209 607 00154$:
+ 608 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
+ 000209 9E [ 1] 609 ld a, xh
+ 00020A 4A [ 1] 610 dec a
+ 00020B 26 05 [ 1] 611 jrne 00156$
+ 00020D A6 01 [ 1] 612 ld a, #0x01
+ 00020F 6B 01 [ 1] 613 ld (0x01, sp), a
+ 000211 C5 614 .byte 0xc5
+ 000212 615 00156$:
+ 000212 0F 01 [ 1] 616 clr (0x01, sp)
+ 000214 617 00157$:
+ 618 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
+ 000214 16 08 [ 2] 619 ldw y, (0x08, sp)
+ 000216 72 A9 00 04 [ 2] 620 addw y, #0x0004
+ 00021A 17 02 [ 2] 621 ldw (0x02, sp), y
+ 622 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
+ 00021C 9E [ 1] 623 ld a, xh
+ 00021D A0 05 [ 1] 624 sub a, #0x05
+ 00021F 26 04 [ 1] 625 jrne 00159$
+ 000221 4C [ 1] 626 inc a
+ 000222 6B 04 [ 1] 627 ld (0x04, sp), a
+ 000224 C5 628 .byte 0xc5
+ 000225 629 00159$:
+ 000225 0F 04 [ 1] 630 clr (0x04, sp)
+ 000227 631 00160$:
+ 632 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
+ 000227 1E 08 [ 2] 633 ldw x, (0x08, sp)
+ 000229 1C 00 08 [ 2] 634 addw x, #0x0008
+ 00022C 1F 05 [ 2] 635 ldw (0x05, sp), x
+ 636 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
+ 00022E 1E 08 [ 2] 637 ldw x, (0x08, sp)
+ 000230 1C 00 05 [ 2] 638 addw x, #0x0005
+ 639 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 950: if (NewState != DISABLE)
+ 000233 0D 0E [ 1] 640 tnz (0x0e, sp)
+ 000235 27 22 [ 1] 641 jreq 00114$
+ 642 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
+ 000237 0D 01 [ 1] 643 tnz (0x01, sp)
+ 000239 27 0A [ 1] 644 jreq 00105$
+ 645 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
+ 00023B 1E 02 [ 2] 646 ldw x, (0x02, sp)
+ 00023D F6 [ 1] 647 ld a, (x)
+ 00023E 1A 07 [ 1] 648 or a, (0x07, sp)
+ 000240 1E 02 [ 2] 649 ldw x, (0x02, sp)
+ 000242 F7 [ 1] 650 ld (x), a
+ 000243 20 36 [ 2] 651 jra 00116$
+ 000245 652 00105$:
+ 653 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
+ 000245 0D 04 [ 1] 654 tnz (0x04, sp)
+ 000247 27 0A [ 1] 655 jreq 00102$
+ 656 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
+ 000249 1E 05 [ 2] 657 ldw x, (0x05, sp)
+ 00024B F6 [ 1] 658 ld a, (x)
+ 00024C 1A 07 [ 1] 659 or a, (0x07, sp)
+ 00024E 1E 05 [ 2] 660 ldw x, (0x05, sp)
+ 000250 F7 [ 1] 661 ld (x), a
+ 000251 20 28 [ 2] 662 jra 00116$
+ 000253 663 00102$:
+ 664 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
+ 000253 F6 [ 1] 665 ld a, (x)
+ 000254 1A 07 [ 1] 666 or a, (0x07, sp)
+ 000256 F7 [ 1] 667 ld (x), a
+ 000257 20 22 [ 2] 668 jra 00116$
+ 000259 669 00114$:
+ 670 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
+ 000259 03 07 [ 1] 671 cpl (0x07, sp)
+ 672 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 970: if (usartreg == 0x01)
+ 00025B 0D 01 [ 1] 673 tnz (0x01, sp)
+ 00025D 27 0A [ 1] 674 jreq 00111$
+ 675 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
+ 00025F 1E 02 [ 2] 676 ldw x, (0x02, sp)
+ 000261 F6 [ 1] 677 ld a, (x)
+ 000262 14 07 [ 1] 678 and a, (0x07, sp)
+ 000264 1E 02 [ 2] 679 ldw x, (0x02, sp)
+ 000266 F7 [ 1] 680 ld (x), a
+ 000267 20 12 [ 2] 681 jra 00116$
+ 000269 682 00111$:
+ 683 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 974: else if (usartreg == 0x05)
+ 000269 0D 04 [ 1] 684 tnz (0x04, sp)
+ 00026B 27 0A [ 1] 685 jreq 00108$
+ 686 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 976: USARTx->CR5 &= (uint8_t)(~itpos);
+ 00026D 1E 05 [ 2] 687 ldw x, (0x05, sp)
+ 00026F F6 [ 1] 688 ld a, (x)
+ 000270 14 07 [ 1] 689 and a, (0x07, sp)
+ 000272 1E 05 [ 2] 690 ldw x, (0x05, sp)
+ 000274 F7 [ 1] 691 ld (x), a
+ 000275 20 04 [ 2] 692 jra 00116$
+ 000277 693 00108$:
+ 694 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 981: USARTx->CR2 &= (uint8_t)(~itpos);
+ 000277 F6 [ 1] 695 ld a, (x)
+ 000278 14 07 [ 1] 696 and a, (0x07, sp)
+ 00027A F7 [ 1] 697 ld (x), a
+ 00027B 698 00116$:
+ 699 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 984: }
+ 00027B 1E 0A [ 2] 700 ldw x, (10, sp)
+ 00027D 5B 0E [ 2] 701 addw sp, #14
+ 00027F FC [ 2] 702 jp (x)
+ 703 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1002: FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
+ 704 ; -----------------------------------------
+ 705 ; function USART_GetFlagStatus
+ 706 ; -----------------------------------------
+ 000280 707 _USART_GetFlagStatus:
+ 000280 88 [ 1] 708 push a
+ 709 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
+ 000281 16 04 [ 2] 710 ldw y, (0x04, sp)
+ 711 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ 000283 7B 05 [ 1] 712 ld a, (0x05, sp)
+ 000285 6B 01 [ 1] 713 ld (0x01, sp), a
+ 714 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
+ 000287 90 A3 01 01 [ 2] 715 cpw y, #0x0101
+ 00028B 26 0D [ 1] 716 jrne 00108$
+ 717 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ 00028D E6 05 [ 1] 718 ld a, (0x5, x)
+ 00028F 14 01 [ 1] 719 and a, (0x01, sp)
+ 000291 27 04 [ 1] 720 jreq 00102$
+ 721 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1014: status = SET;
+ 000293 A6 01 [ 1] 722 ld a, #0x01
+ 000295 20 0C [ 2] 723 jra 00109$
+ 000297 724 00102$:
+ 725 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1019: status = RESET;
+ 000297 4F [ 1] 726 clr a
+ 000298 20 09 [ 2] 727 jra 00109$
+ 00029A 728 00108$:
+ 729 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1024: if ((USARTx->SR & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ 00029A F6 [ 1] 730 ld a, (x)
+ 00029B 14 01 [ 1] 731 and a, (0x01, sp)
+ 00029D 27 03 [ 1] 732 jreq 00105$
+ 733 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1027: status = SET;
+ 00029F A6 01 [ 1] 734 ld a, #0x01
+ 735 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1032: status = RESET;
+ 0002A1 21 736 .byte 0x21
+ 0002A2 737 00105$:
+ 0002A2 4F [ 1] 738 clr a
+ 0002A3 739 00109$:
+ 740 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1036: return status;
+ 741 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1037: }
+ 0002A3 1E 02 [ 2] 742 ldw x, (2, sp)
+ 0002A5 5B 05 [ 2] 743 addw sp, #5
+ 0002A7 FC [ 2] 744 jp (x)
+ 745 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1060: void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
+ 746 ; -----------------------------------------
+ 747 ; function USART_ClearFlag
+ 748 ; -----------------------------------------
+ 0002A8 749 _USART_ClearFlag:
+ 750 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1065: USARTx->SR = (uint8_t)((uint16_t)~((uint16_t)USART_FLAG));
+ 0002A8 16 03 [ 2] 751 ldw y, (0x03, sp)
+ 0002AA 90 53 [ 2] 752 cplw y
+ 0002AC 90 9F [ 1] 753 ld a, yl
+ 0002AE F7 [ 1] 754 ld (x), a
+ 755 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1066: }
+ 0002AF 1E 01 [ 2] 756 ldw x, (1, sp)
+ 0002B1 5B 04 [ 2] 757 addw sp, #4
+ 0002B3 FC [ 2] 758 jp (x)
+ 759 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1083: ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
+ 760 ; -----------------------------------------
+ 761 ; function USART_GetITStatus
+ 762 ; -----------------------------------------
+ 0002B4 763 _USART_GetITStatus:
+ 0002B4 52 09 [ 2] 764 sub sp, #9
+ 0002B6 1F 08 [ 2] 765 ldw (0x08, sp), x
+ 766 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1096: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
+ 0002B8 7B 0D [ 1] 767 ld a, (0x0d, sp)
+ 0002BA 97 [ 1] 768 ld xl, a
+ 0002BB A4 0F [ 1] 769 and a, #0x0f
+ 0002BD 88 [ 1] 770 push a
+ 0002BE A6 01 [ 1] 771 ld a, #0x01
+ 0002C0 6B 04 [ 1] 772 ld (0x04, sp), a
+ 0002C2 84 [ 1] 773 pop a
+ 0002C3 4D [ 1] 774 tnz a
+ 0002C4 27 05 [ 1] 775 jreq 00179$
+ 0002C6 776 00178$:
+ 0002C6 08 03 [ 1] 777 sll (0x03, sp)
+ 0002C8 4A [ 1] 778 dec a
+ 0002C9 26 FB [ 1] 779 jrne 00178$
+ 0002CB 780 00179$:
+ 781 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1098: itmask1 = (uint8_t)((uint8_t)USART_IT >> (uint8_t)4);
+ 0002CB 9F [ 1] 782 ld a, xl
+ 0002CC 4E [ 1] 783 swap a
+ 0002CD A4 0F [ 1] 784 and a, #0x0f
+ 785 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1100: itmask2 = (uint8_t)((uint8_t)1 << itmask1);
+ 0002CF 88 [ 1] 786 push a
+ 0002D0 A6 01 [ 1] 787 ld a, #0x01
+ 0002D2 6B 08 [ 1] 788 ld (0x08, sp), a
+ 0002D4 84 [ 1] 789 pop a
+ 0002D5 4D [ 1] 790 tnz a
+ 0002D6 27 05 [ 1] 791 jreq 00181$
+ 0002D8 792 00180$:
+ 0002D8 08 07 [ 1] 793 sll (0x07, sp)
+ 0002DA 4A [ 1] 794 dec a
+ 0002DB 26 FB [ 1] 795 jrne 00180$
+ 0002DD 796 00181$:
+ 797 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
+ 0002DD 16 0C [ 2] 798 ldw y, (0x0c, sp)
+ 0002DF 17 01 [ 2] 799 ldw (0x01, sp), y
+ 800 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ 0002E1 16 08 [ 2] 801 ldw y, (0x08, sp)
+ 0002E3 17 04 [ 2] 802 ldw (0x04, sp), y
+ 803 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
+ 0002E5 1E 01 [ 2] 804 ldw x, (0x01, sp)
+ 0002E7 A3 01 00 [ 2] 805 cpw x, #0x0100
+ 0002EA 26 1D [ 1] 806 jrne 00118$
+ 807 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1106: enablestatus = (uint8_t)((uint8_t)USARTx->CR1 & itmask2);
+ 0002EC 16 08 [ 2] 808 ldw y, (0x08, sp)
+ 0002EE 17 01 [ 2] 809 ldw (0x01, sp), y
+ 0002F0 93 [ 1] 810 ldw x, y
+ 0002F1 E6 04 [ 1] 811 ld a, (0x4, x)
+ 0002F3 14 07 [ 1] 812 and a, (0x07, sp)
+ 0002F5 6B 07 [ 1] 813 ld (0x07, sp), a
+ 814 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ 0002F7 1E 04 [ 2] 815 ldw x, (0x04, sp)
+ 0002F9 F6 [ 1] 816 ld a, (x)
+ 0002FA 14 03 [ 1] 817 and a, (0x03, sp)
+ 0002FC 27 08 [ 1] 818 jreq 00102$
+ 0002FE 0D 07 [ 1] 819 tnz (0x07, sp)
+ 000300 27 04 [ 1] 820 jreq 00102$
+ 821 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1112: pendingbitstatus = SET;
+ 000302 A6 01 [ 1] 822 ld a, #0x01
+ 000304 20 41 [ 2] 823 jra 00119$
+ 000306 824 00102$:
+ 825 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1117: pendingbitstatus = RESET;
+ 000306 4F [ 1] 826 clr a
+ 000307 20 3E [ 2] 827 jra 00119$
+ 000309 828 00118$:
+ 829 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ 000309 1E 08 [ 2] 830 ldw x, (0x08, sp)
+ 00030B E6 05 [ 1] 831 ld a, (0x5, x)
+ 00030D 14 07 [ 1] 832 and a, (0x07, sp)
+ 833 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1121: else if (USART_IT == USART_IT_OR)
+ 00030F 1E 01 [ 2] 834 ldw x, (0x01, sp)
+ 000311 A3 02 35 [ 2] 835 cpw x, #0x0235
+ 000314 26 20 [ 1] 836 jrne 00115$
+ 837 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ 000316 6B 06 [ 1] 838 ld (0x06, sp), a
+ 839 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1127: temp = (uint8_t)(USARTx->CR5 & USART_CR5_EIE);
+ 000318 1E 08 [ 2] 840 ldw x, (0x08, sp)
+ 00031A E6 08 [ 1] 841 ld a, (0x8, x)
+ 00031C A4 01 [ 1] 842 and a, #0x01
+ 00031E 6B 07 [ 1] 843 ld (0x07, sp), a
+ 844 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1129: if (( (USARTx->SR & itpos) != 0x00) && ((enablestatus || temp)))
+ 000320 1E 04 [ 2] 845 ldw x, (0x04, sp)
+ 000322 F6 [ 1] 846 ld a, (x)
+ 000323 14 03 [ 1] 847 and a, (0x03, sp)
+ 000325 27 0C [ 1] 848 jreq 00106$
+ 000327 0D 06 [ 1] 849 tnz (0x06, sp)
+ 000329 26 04 [ 1] 850 jrne 00105$
+ 00032B 0D 07 [ 1] 851 tnz (0x07, sp)
+ 00032D 27 04 [ 1] 852 jreq 00106$
+ 00032F 853 00105$:
+ 854 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1132: pendingbitstatus = SET;
+ 00032F A6 01 [ 1] 855 ld a, #0x01
+ 000331 20 14 [ 2] 856 jra 00119$
+ 000333 857 00106$:
+ 858 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1137: pendingbitstatus = RESET;
+ 000333 4F [ 1] 859 clr a
+ 000334 20 11 [ 2] 860 jra 00119$
+ 000336 861 00115$:
+ 862 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1144: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ 000336 6B 07 [ 1] 863 ld (0x07, sp), a
+ 864 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1146: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ 000338 1E 04 [ 2] 865 ldw x, (0x04, sp)
+ 00033A F6 [ 1] 866 ld a, (x)
+ 00033B 14 03 [ 1] 867 and a, (0x03, sp)
+ 00033D 27 07 [ 1] 868 jreq 00111$
+ 00033F 0D 07 [ 1] 869 tnz (0x07, sp)
+ 000341 27 03 [ 1] 870 jreq 00111$
+ 871 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1149: pendingbitstatus = SET;
+ 000343 A6 01 [ 1] 872 ld a, #0x01
+ 873 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1154: pendingbitstatus = RESET;
+ 000345 21 874 .byte 0x21
+ 000346 875 00111$:
+ 000346 4F [ 1] 876 clr a
+ 000347 877 00119$:
+ 878 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1159: return pendingbitstatus;
+ 879 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1160: }
+ 000347 1E 0A [ 2] 880 ldw x, (10, sp)
+ 000349 5B 0D [ 2] 881 addw sp, #13
+ 00034B FC [ 2] 882 jp (x)
+ 883 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1183: void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
+ 884 ; -----------------------------------------
+ 885 ; function USART_ClearITPendingBit
+ 886 ; -----------------------------------------
+ 00034C 887 _USART_ClearITPendingBit:
+ 888 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1188: USARTx->SR &= (uint8_t)(~USART_SR_TC);
+ 00034C F6 [ 1] 889 ld a, (x)
+ 00034D A4 BF [ 1] 890 and a, #0xbf
+ 00034F F7 [ 1] 891 ld (x), a
+ 892 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1189: }
+ 000350 1E 01 [ 2] 893 ldw x, (1, sp)
+ 000352 5B 04 [ 2] 894 addw sp, #4
+ 000354 FC [ 2] 895 jp (x)
+ 896 .area CODE
+ 897 .area CONST
+ 898 .area INITIALIZER
+ 899 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_usart.rel b/firmware/STM8L15X_LD/stm8l15x_usart.rel
new file mode 100644
index 0000000..709d75f
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_usart.rel
@@ -0,0 +1,406 @@
+XH3
+H B areas 1C global symbols
+M stm8l15x_usart
+S .__.ABS. Def000000
+S __divulong Ref000000
+S _CLK_GetClockFreq Ref000000
+A _CODE size 0 flags 0 addr 0
+A DATA size 0 flags 0 addr 0
+A INITIALIZED size 0 flags 0 addr 0
+A DABS size 0 flags 8 addr 0
+A HOME size 0 flags 0 addr 0
+A GSINIT size 0 flags 0 addr 0
+A GSFINAL size 0 flags 0 addr 0
+A CONST size 0 flags 0 addr 0
+A INITIALIZER size 0 flags 0 addr 0
+A CODE size 355 flags 0 addr 0
+S _USART_ITConfig Def0001F1
+S _USART_ReceiveData8 Def0000F0
+S _USART_ReceiveData9 Def0000F3
+S _USART_SendData8 Def00010E
+S _USART_SendData9 Def000111
+S _USART_DeInit Def000000
+S _USART_ClockInit Def000094
+S _USART_GetITStatus Def0002B4
+S _USART_HalfDuplexCmd Def000169
+S _USART_SetPrescaler Def0000E3
+S _USART_IrDACmd Def0001C2
+S _USART_Cmd Def0000CE
+S _USART_Init Def000017
+S _USART_SmartCardCmd Def00017E
+S _USART_IrDAConfig Def0001AD
+S _USART_ReceiverWakeUpCmd Def000136
+S _USART_GetFlagStatus Def000280
+S _USART_ClearFlag Def0002A8
+S _USART_WakeUpConfig Def00015A
+S _USART_DMACmd Def0001D7
+S _USART_ClearITPendingBit Def00034C
+S _USART_SetGuardTime Def0001A8
+S _USART_SendBreak Def0000E8
+S _USART_SmartCardNACKCmd Def000193
+S _USART_SetAddress Def00014B
+A CABS size 0 flags 8 addr 0
+T 00 00 00
+R 00 00 00 09
+T 00 00 00 90 93 E6 01 93 6F 03 93 6F 02 93 6F 04
+R 00 00 00 09
+T 00 00 0D 93 6F 05 93 6F 06 93 6F 07 81
+R 00 00 00 09
+T 00 00 17
+R 00 00 00 09
+T 00 00 17 52 0B 1F 0A 1C 00 04 F6 A4 E9 6B 09 F7
+R 00 00 00 09
+T 00 00 24 7B 12 1A 14 1A 09 F7 1E 0A 1C 00 06 F6
+R 00 00 00 09
+T 00 00 31 A4 CF F7 1A 13 F7 1E 0A 5C 5C 1F 01 F6
+R 00 00 00 09
+T 00 00 3E 1E 01 7F 1E 0A 1C 00 03 1F 03 F6 A4 0F
+R 00 00 00 09
+T 00 00 4B 1E 03 F7 1E 03 7F CD 00 00 1F 08 1E 10
+R 00 00 00 09 02 0A 00 02
+T 00 00 58 89 1E 10 89 1E 0C 89 90 89 CD 00 00 5B
+R 00 00 00 09 02 0D 00 01
+T 00 00 65 08 17 05 9E A4 F0 6B 09 16 03 7B 09 90
+R 00 00 00 09
+T 00 00 72 F7 9F A4 0F 1A 09 16 03 90 F7 A6 10 62
+R 00 00 00 09
+T 00 00 7F 9F 1E 01 F7 1E 0A 1C 00 05 F6 A4 F3 F7
+R 00 00 00 09
+T 00 00 8C 1A 15 F7 1E 0C 5B 15 FC
+R 00 00 00 09
+T 00 00 94
+R 00 00 00 09
+T 00 00 94 52 05 6B 05 1C 00 06 1F 01 F6 A4 F8 6B
+R 00 00 00 09
+T 00 00 A1 03 1E 01 7B 03 F7 7B 08 1A 09 6B 04 7B
+R 00 00 00 09
+T 00 00 AE 0A 1A 04 1A 03 1E 01 F7 1E 01 F6 0D 05
+R 00 00 00 09
+T 00 00 BB 27 07 AA 08 1E 01 F7 20 05
+R 00 00 00 09
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diff --git a/firmware/STM8L15X_LD/stm8l15x_usart.rst b/firmware/STM8L15X_LD/stm8l15x_usart.rst
new file mode 100644
index 0000000..c28fd08
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_usart.rst
@@ -0,0 +1,899 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ISO C Compiler
+ 3 ; Version 4.5.0 #15242 (Linux)
+ 4 ;--------------------------------------------------------
+ 5 .module stm8l15x_usart
+ 6
+ 7 ;--------------------------------------------------------
+ 8 ; Public variables in this module
+ 9 ;--------------------------------------------------------
+ 10 .globl _CLK_GetClockFreq
+ 11 .globl _USART_DeInit
+ 12 .globl _USART_Init
+ 13 .globl _USART_ClockInit
+ 14 .globl _USART_Cmd
+ 15 .globl _USART_SetPrescaler
+ 16 .globl _USART_SendBreak
+ 17 .globl _USART_ReceiveData8
+ 18 .globl _USART_ReceiveData9
+ 19 .globl _USART_SendData8
+ 20 .globl _USART_SendData9
+ 21 .globl _USART_ReceiverWakeUpCmd
+ 22 .globl _USART_SetAddress
+ 23 .globl _USART_WakeUpConfig
+ 24 .globl _USART_HalfDuplexCmd
+ 25 .globl _USART_SmartCardCmd
+ 26 .globl _USART_SmartCardNACKCmd
+ 27 .globl _USART_SetGuardTime
+ 28 .globl _USART_IrDAConfig
+ 29 .globl _USART_IrDACmd
+ 30 .globl _USART_DMACmd
+ 31 .globl _USART_ITConfig
+ 32 .globl _USART_GetFlagStatus
+ 33 .globl _USART_ClearFlag
+ 34 .globl _USART_GetITStatus
+ 35 .globl _USART_ClearITPendingBit
+ 36 ;--------------------------------------------------------
+ 37 ; ram data
+ 38 ;--------------------------------------------------------
+ 39 .area DATA
+ 40 ;--------------------------------------------------------
+ 41 ; ram data
+ 42 ;--------------------------------------------------------
+ 43 .area INITIALIZED
+ 44 ;--------------------------------------------------------
+ 45 ; absolute external ram data
+ 46 ;--------------------------------------------------------
+ 47 .area DABS (ABS)
+ 48
+ 49 ; default segment ordering for linker
+ 50 .area HOME
+ 51 .area GSINIT
+ 52 .area GSFINAL
+ 53 .area CONST
+ 54 .area INITIALIZER
+ 55 .area CODE
+ 56
+ 57 ;--------------------------------------------------------
+ 58 ; global & static initialisations
+ 59 ;--------------------------------------------------------
+ 60 .area HOME
+ 61 .area GSINIT
+ 62 .area GSFINAL
+ 63 .area GSINIT
+ 64 ;--------------------------------------------------------
+ 65 ; Home
+ 66 ;--------------------------------------------------------
+ 67 .area HOME
+ 68 .area HOME
+ 69 ;--------------------------------------------------------
+ 70 ; code
+ 71 ;--------------------------------------------------------
+ 72 .area CODE
+ 73 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 148: void USART_DeInit(USART_TypeDef* USARTx)
+ 74 ; -----------------------------------------
+ 75 ; function USART_DeInit
+ 76 ; -----------------------------------------
+ 0081AD 77 _USART_DeInit:
+ 78 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 154: (void) USARTx->DR;
+ 0081AD 90 93 [ 1] 79 ldw y, x
+ 0081AF E6 01 [ 1] 80 ld a, (0x1, x)
+ 81 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 156: USARTx->BRR2 = USART_BRR2_RESET_VALUE; /* Set USART_BRR2 to reset value 0x00 */
+ 0081B1 93 [ 1] 82 ldw x, y
+ 0081B2 6F 03 [ 1] 83 clr (0x0003, x)
+ 84 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 157: USARTx->BRR1 = USART_BRR1_RESET_VALUE; /* Set USART_BRR1 to reset value 0x00 */
+ 0081B4 93 [ 1] 85 ldw x, y
+ 0081B5 6F 02 [ 1] 86 clr (0x02, x)
+ 87 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 159: USARTx->CR1 = USART_CR1_RESET_VALUE; /* Set USART_CR1 to reset value 0x00 */
+ 0081B7 93 [ 1] 88 ldw x, y
+ 0081B8 6F 04 [ 1] 89 clr (0x0004, x)
+ 90 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 160: USARTx->CR2 = USART_CR2_RESET_VALUE; /* Set USART_CR2 to reset value 0x00 */
+ 0081BA 93 [ 1] 91 ldw x, y
+ 0081BB 6F 05 [ 1] 92 clr (0x0005, x)
+ 93 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 161: USARTx->CR3 = USART_CR3_RESET_VALUE; /* Set USART_CR3 to reset value 0x00 */
+ 0081BD 93 [ 1] 94 ldw x, y
+ 0081BE 6F 06 [ 1] 95 clr (0x0006, x)
+ 96 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 162: USARTx->CR4 = USART_CR4_RESET_VALUE; /* Set USART_CR4 to reset value 0x00 */
+ 0081C0 93 [ 1] 97 ldw x, y
+ 0081C1 6F 07 [ 1] 98 clr (0x0007, x)
+ 99 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 163: }
+ 0081C3 81 [ 4] 100 ret
+ 101 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 192: void USART_Init(USART_TypeDef* USARTx, uint32_t BaudRate, USART_WordLength_TypeDef
+ 102 ; -----------------------------------------
+ 103 ; function USART_Init
+ 104 ; -----------------------------------------
+ 0081C4 105 _USART_Init:
+ 0081C4 52 0B [ 2] 106 sub sp, #11
+ 107 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 210: USARTx->CR1 &= (uint8_t)(~(USART_CR1_PCEN | USART_CR1_PS | USART_CR1_M));
+ 0081C6 1F 0A [ 2] 108 ldw (0x0a, sp), x
+ 0081C8 1C 00 04 [ 2] 109 addw x, #0x0004
+ 0081CB F6 [ 1] 110 ld a, (x)
+ 0081CC A4 E9 [ 1] 111 and a, #0xe9
+ 0081CE 6B 09 [ 1] 112 ld (0x09, sp), a
+ 0081D0 F7 [ 1] 113 ld (x), a
+ 114 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 213: USARTx->CR1 |= (uint8_t)((uint8_t)USART_WordLength | (uint8_t)USART_Parity);
+ 0081D1 7B 12 [ 1] 115 ld a, (0x12, sp)
+ 0081D3 1A 14 [ 1] 116 or a, (0x14, sp)
+ 0081D5 1A 09 [ 1] 117 or a, (0x09, sp)
+ 0081D7 F7 [ 1] 118 ld (x), a
+ 119 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 216: USARTx->CR3 &= (uint8_t)(~USART_CR3_STOP);
+ 0081D8 1E 0A [ 2] 120 ldw x, (0x0a, sp)
+ 0081DA 1C 00 06 [ 2] 121 addw x, #0x0006
+ 0081DD F6 [ 1] 122 ld a, (x)
+ 0081DE A4 CF [ 1] 123 and a, #0xcf
+ 0081E0 F7 [ 1] 124 ld (x), a
+ 125 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 218: USARTx->CR3 |= (uint8_t)USART_StopBits;
+ 0081E1 1A 13 [ 1] 126 or a, (0x13, sp)
+ 0081E3 F7 [ 1] 127 ld (x), a
+ 128 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 221: USARTx->BRR1 &= (uint8_t)(~USART_BRR1_DIVM);
+ 0081E4 1E 0A [ 2] 129 ldw x, (0x0a, sp)
+ 0081E6 5C [ 1] 130 incw x
+ 0081E7 5C [ 1] 131 incw x
+ 0081E8 1F 01 [ 2] 132 ldw (0x01, sp), x
+ 0081EA F6 [ 1] 133 ld a, (x)
+ 0081EB 1E 01 [ 2] 134 ldw x, (0x01, sp)
+ 0081ED 7F [ 1] 135 clr (x)
+ 136 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 223: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVM);
+ 0081EE 1E 0A [ 2] 137 ldw x, (0x0a, sp)
+ 0081F0 1C 00 03 [ 2] 138 addw x, #0x0003
+ 0081F3 1F 03 [ 2] 139 ldw (0x03, sp), x
+ 0081F5 F6 [ 1] 140 ld a, (x)
+ 0081F6 A4 0F [ 1] 141 and a, #0x0f
+ 0081F8 1E 03 [ 2] 142 ldw x, (0x03, sp)
+ 0081FA F7 [ 1] 143 ld (x), a
+ 144 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 225: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVF);
+ 0081FB 1E 03 [ 2] 145 ldw x, (0x03, sp)
+ 0081FD 7F [ 1] 146 clr (x)
+ 147 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 227: BaudRate_Mantissa = (uint32_t)(CLK_GetClockFreq() / BaudRate );
+ 0081FE CD 85 D6 [ 4] 148 call _CLK_GetClockFreq
+ 008201 1F 08 [ 2] 149 ldw (0x08, sp), x
+ 008203 1E 10 [ 2] 150 ldw x, (0x10, sp)
+ 008205 89 [ 2] 151 pushw x
+ 008206 1E 10 [ 2] 152 ldw x, (0x10, sp)
+ 008208 89 [ 2] 153 pushw x
+ 008209 1E 0C [ 2] 154 ldw x, (0x0c, sp)
+ 00820B 89 [ 2] 155 pushw x
+ 00820C 90 89 [ 2] 156 pushw y
+ 157 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 229: USARTx->BRR2 = (uint8_t)((BaudRate_Mantissa >> (uint8_t)8) & (uint8_t)0xF0);
+ 00820E CD 92 5C [ 4] 158 call __divulong
+ 008211 5B 08 [ 2] 159 addw sp, #8
+ 008213 17 05 [ 2] 160 ldw (0x05, sp), y
+ 008215 9E [ 1] 161 ld a, xh
+ 008216 A4 F0 [ 1] 162 and a, #0xf0
+ 008218 6B 09 [ 1] 163 ld (0x09, sp), a
+ 00821A 16 03 [ 2] 164 ldw y, (0x03, sp)
+ 00821C 7B 09 [ 1] 165 ld a, (0x09, sp)
+ 00821E 90 F7 [ 1] 166 ld (y), a
+ 167 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 231: USARTx->BRR2 |= (uint8_t)(BaudRate_Mantissa & (uint8_t)0x0F);
+ 008220 9F [ 1] 168 ld a, xl
+ 008221 A4 0F [ 1] 169 and a, #0x0f
+ 008223 1A 09 [ 1] 170 or a, (0x09, sp)
+ 008225 16 03 [ 2] 171 ldw y, (0x03, sp)
+ 008227 90 F7 [ 1] 172 ld (y), a
+ 173 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 233: USARTx->BRR1 = (uint8_t)(BaudRate_Mantissa >> (uint8_t)4);
+ 008229 A6 10 [ 1] 174 ld a, #0x10
+ 00822B 62 [ 2] 175 div x, a
+ 00822C 9F [ 1] 176 ld a, xl
+ 00822D 1E 01 [ 2] 177 ldw x, (0x01, sp)
+ 00822F F7 [ 1] 178 ld (x), a
+ 179 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 236: USARTx->CR2 &= (uint8_t)~(USART_CR2_TEN | USART_CR2_REN);
+ 008230 1E 0A [ 2] 180 ldw x, (0x0a, sp)
+ 008232 1C 00 05 [ 2] 181 addw x, #0x0005
+ 008235 F6 [ 1] 182 ld a, (x)
+ 008236 A4 F3 [ 1] 183 and a, #0xf3
+ 008238 F7 [ 1] 184 ld (x), a
+ 185 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 238: USARTx->CR2 |= (uint8_t)USART_Mode;
+ 008239 1A 15 [ 1] 186 or a, (0x15, sp)
+ 00823B F7 [ 1] 187 ld (x), a
+ 188 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 239: }
+ 00823C 1E 0C [ 2] 189 ldw x, (12, sp)
+ 00823E 5B 15 [ 2] 190 addw sp, #21
+ 008240 FC [ 2] 191 jp (x)
+ 192 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 264: void USART_ClockInit(USART_TypeDef* USARTx, USART_Clock_TypeDef USART_Clock,
+ 193 ; -----------------------------------------
+ 194 ; function USART_ClockInit
+ 195 ; -----------------------------------------
+ 008241 196 _USART_ClockInit:
+ 008241 52 05 [ 2] 197 sub sp, #5
+ 008243 6B 05 [ 1] 198 ld (0x05, sp), a
+ 199 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
+ 008245 1C 00 06 [ 2] 200 addw x, #0x0006
+ 008248 1F 01 [ 2] 201 ldw (0x01, sp), x
+ 00824A F6 [ 1] 202 ld a, (x)
+ 00824B A4 F8 [ 1] 203 and a, #0xf8
+ 00824D 6B 03 [ 1] 204 ld (0x03, sp), a
+ 00824F 1E 01 [ 2] 205 ldw x, (0x01, sp)
+ 008251 7B 03 [ 1] 206 ld a, (0x03, sp)
+ 008253 F7 [ 1] 207 ld (x), a
+ 208 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 277: USARTx->CR3 |= (uint8_t)((uint8_t)((uint8_t)(USART_CPOL | (uint8_t)USART_CPHA ) | USART_LastBit));
+ 008254 7B 08 [ 1] 209 ld a, (0x08, sp)
+ 008256 1A 09 [ 1] 210 or a, (0x09, sp)
+ 008258 6B 04 [ 1] 211 ld (0x04, sp), a
+ 00825A 7B 0A [ 1] 212 ld a, (0x0a, sp)
+ 00825C 1A 04 [ 1] 213 or a, (0x04, sp)
+ 00825E 1A 03 [ 1] 214 or a, (0x03, sp)
+ 008260 1E 01 [ 2] 215 ldw x, (0x01, sp)
+ 008262 F7 [ 1] 216 ld (x), a
+ 217 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
+ 008263 1E 01 [ 2] 218 ldw x, (0x01, sp)
+ 008265 F6 [ 1] 219 ld a, (x)
+ 220 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 279: if (USART_Clock != USART_Clock_Disable)
+ 008266 0D 05 [ 1] 221 tnz (0x05, sp)
+ 008268 27 07 [ 1] 222 jreq 00102$
+ 223 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 281: USARTx->CR3 |= (uint8_t)(USART_CR3_CLKEN); /* Set the Clock Enable bit */
+ 00826A AA 08 [ 1] 224 or a, #0x08
+ 00826C 1E 01 [ 2] 225 ldw x, (0x01, sp)
+ 00826E F7 [ 1] 226 ld (x), a
+ 00826F 20 05 [ 2] 227 jra 00104$
+ 008271 228 00102$:
+ 229 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 285: USARTx->CR3 &= (uint8_t)(~USART_CR3_CLKEN); /* Clear the Clock Enable bit */
+ 008271 A4 F7 [ 1] 230 and a, #0xf7
+ 008273 1E 01 [ 2] 231 ldw x, (0x01, sp)
+ 008275 F7 [ 1] 232 ld (x), a
+ 008276 233 00104$:
+ 234 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 287: }
+ 008276 1E 06 [ 2] 235 ldw x, (6, sp)
+ 008278 5B 0A [ 2] 236 addw sp, #10
+ 00827A FC [ 2] 237 jp (x)
+ 238 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 296: void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 239 ; -----------------------------------------
+ 240 ; function USART_Cmd
+ 241 ; -----------------------------------------
+ 00827B 242 _USART_Cmd:
+ 00827B 88 [ 1] 243 push a
+ 00827C 6B 01 [ 1] 244 ld (0x01, sp), a
+ 245 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
+ 00827E 1C 00 04 [ 2] 246 addw x, #0x0004
+ 008281 F6 [ 1] 247 ld a, (x)
+ 248 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 298: if (NewState != DISABLE)
+ 008282 0D 01 [ 1] 249 tnz (0x01, sp)
+ 008284 27 05 [ 1] 250 jreq 00102$
+ 251 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
+ 008286 A4 DF [ 1] 252 and a, #0xdf
+ 008288 F7 [ 1] 253 ld (x), a
+ 008289 20 03 [ 2] 254 jra 00104$
+ 00828B 255 00102$:
+ 256 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 304: USARTx->CR1 |= USART_CR1_USARTD; /**< USART Disable (for low power consumption) */
+ 00828B AA 20 [ 1] 257 or a, #0x20
+ 00828D F7 [ 1] 258 ld (x), a
+ 00828E 259 00104$:
+ 260 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 306: }
+ 00828E 84 [ 1] 261 pop a
+ 00828F 81 [ 4] 262 ret
+ 263 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 329: void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
+ 264 ; -----------------------------------------
+ 265 ; function USART_SetPrescaler
+ 266 ; -----------------------------------------
+ 008290 267 _USART_SetPrescaler:
+ 268 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 332: USARTx->PSCR = USART_Prescaler;
+ 008290 1C 00 0A [ 2] 269 addw x, #0x000a
+ 008293 F7 [ 1] 270 ld (x), a
+ 271 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 333: }
+ 008294 81 [ 4] 272 ret
+ 273 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 340: void USART_SendBreak(USART_TypeDef* USARTx)
+ 274 ; -----------------------------------------
+ 275 ; function USART_SendBreak
+ 276 ; -----------------------------------------
+ 008295 277 _USART_SendBreak:
+ 278 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 342: USARTx->CR2 |= USART_CR2_SBK;
+ 008295 1C 00 05 [ 2] 279 addw x, #0x0005
+ 008298 F6 [ 1] 280 ld a, (x)
+ 008299 AA 01 [ 1] 281 or a, #0x01
+ 00829B F7 [ 1] 282 ld (x), a
+ 283 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 343: }
+ 00829C 81 [ 4] 284 ret
+ 285 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 382: uint8_t USART_ReceiveData8(USART_TypeDef* USARTx)
+ 286 ; -----------------------------------------
+ 287 ; function USART_ReceiveData8
+ 288 ; -----------------------------------------
+ 00829D 289 _USART_ReceiveData8:
+ 290 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 384: return USARTx->DR;
+ 00829D E6 01 [ 1] 291 ld a, (0x1, x)
+ 292 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 385: }
+ 00829F 81 [ 4] 293 ret
+ 294 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 392: uint16_t USART_ReceiveData9(USART_TypeDef* USARTx)
+ 295 ; -----------------------------------------
+ 296 ; function USART_ReceiveData9
+ 297 ; -----------------------------------------
+ 0082A0 298 _USART_ReceiveData9:
+ 0082A0 89 [ 2] 299 pushw x
+ 300 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 396: temp = ((uint16_t)(((uint16_t)((uint16_t)USARTx->CR1 & (uint16_t)USART_CR1_R8)) << 1));
+ 0082A1 90 93 [ 1] 301 ldw y, x
+ 0082A3 E6 04 [ 1] 302 ld a, (0x4, x)
+ 0082A5 A4 80 [ 1] 303 and a, #0x80
+ 0082A7 97 [ 1] 304 ld xl, a
+ 0082A8 4F [ 1] 305 clr a
+ 0082A9 95 [ 1] 306 ld xh, a
+ 0082AA 58 [ 2] 307 sllw x
+ 0082AB 1F 01 [ 2] 308 ldw (0x01, sp), x
+ 309 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 397: return (uint16_t)( ((uint16_t)((uint16_t)USARTx->DR) | temp) & ((uint16_t)0x01FF));
+ 0082AD 90 E6 01 [ 1] 310 ld a, (0x1, y)
+ 0082B0 1A 02 [ 1] 311 or a, (0x02, sp)
+ 0082B2 97 [ 1] 312 ld xl, a
+ 0082B3 7B 01 [ 1] 313 ld a, (0x01, sp)
+ 0082B5 A4 01 [ 1] 314 and a, #0x01
+ 0082B7 95 [ 1] 315 ld xh, a
+ 316 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 398: }
+ 0082B8 5B 02 [ 2] 317 addw sp, #2
+ 0082BA 81 [ 4] 318 ret
+ 319 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 405: void USART_SendData8(USART_TypeDef* USARTx, uint8_t Data)
+ 320 ; -----------------------------------------
+ 321 ; function USART_SendData8
+ 322 ; -----------------------------------------
+ 0082BB 323 _USART_SendData8:
+ 324 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 408: USARTx->DR = Data;
+ 0082BB 5C [ 1] 325 incw x
+ 0082BC F7 [ 1] 326 ld (x), a
+ 327 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 409: }
+ 0082BD 81 [ 4] 328 ret
+ 329 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 418: void USART_SendData9(USART_TypeDef* USARTx, uint16_t Data)
+ 330 ; -----------------------------------------
+ 331 ; function USART_SendData9
+ 332 ; -----------------------------------------
+ 0082BE 333 _USART_SendData9:
+ 0082BE 52 03 [ 2] 334 sub sp, #3
+ 335 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 423: USARTx->CR1 &= ((uint8_t)~USART_CR1_T8);
+ 0082C0 1F 02 [ 2] 336 ldw (0x02, sp), x
+ 0082C2 1C 00 04 [ 2] 337 addw x, #0x0004
+ 0082C5 F6 [ 1] 338 ld a, (x)
+ 0082C6 A4 BF [ 1] 339 and a, #0xbf
+ 0082C8 6B 01 [ 1] 340 ld (0x01, sp), a
+ 0082CA F7 [ 1] 341 ld (x), a
+ 342 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 426: USARTx->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & USART_CR1_T8);
+ 0082CB 16 06 [ 2] 343 ldw y, (0x06, sp)
+ 0082CD 90 54 [ 2] 344 srlw y
+ 0082CF 90 54 [ 2] 345 srlw y
+ 0082D1 90 9F [ 1] 346 ld a, yl
+ 0082D3 A4 40 [ 1] 347 and a, #0x40
+ 0082D5 1A 01 [ 1] 348 or a, (0x01, sp)
+ 0082D7 F7 [ 1] 349 ld (x), a
+ 350 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 429: USARTx->DR = (uint8_t)(Data);
+ 0082D8 1E 02 [ 2] 351 ldw x, (0x02, sp)
+ 0082DA 5C [ 1] 352 incw x
+ 0082DB 7B 07 [ 1] 353 ld a, (0x07, sp)
+ 0082DD F7 [ 1] 354 ld (x), a
+ 355 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 430: }
+ 0082DE 1E 04 [ 2] 356 ldw x, (4, sp)
+ 0082E0 5B 07 [ 2] 357 addw sp, #7
+ 0082E2 FC [ 2] 358 jp (x)
+ 359 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 473: void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 360 ; -----------------------------------------
+ 361 ; function USART_ReceiverWakeUpCmd
+ 362 ; -----------------------------------------
+ 0082E3 363 _USART_ReceiverWakeUpCmd:
+ 0082E3 88 [ 1] 364 push a
+ 0082E4 6B 01 [ 1] 365 ld (0x01, sp), a
+ 366 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
+ 0082E6 1C 00 05 [ 2] 367 addw x, #0x0005
+ 0082E9 F6 [ 1] 368 ld a, (x)
+ 369 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 477: if (NewState != DISABLE)
+ 0082EA 0D 01 [ 1] 370 tnz (0x01, sp)
+ 0082EC 27 05 [ 1] 371 jreq 00102$
+ 372 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
+ 0082EE AA 02 [ 1] 373 or a, #0x02
+ 0082F0 F7 [ 1] 374 ld (x), a
+ 0082F1 20 03 [ 2] 375 jra 00104$
+ 0082F3 376 00102$:
+ 377 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 485: USARTx->CR2 &= ((uint8_t)~USART_CR2_RWU);
+ 0082F3 A4 FD [ 1] 378 and a, #0xfd
+ 0082F5 F7 [ 1] 379 ld (x), a
+ 0082F6 380 00104$:
+ 381 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 487: }
+ 0082F6 84 [ 1] 382 pop a
+ 0082F7 81 [ 4] 383 ret
+ 384 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 496: void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
+ 385 ; -----------------------------------------
+ 386 ; function USART_SetAddress
+ 387 ; -----------------------------------------
+ 0082F8 388 _USART_SetAddress:
+ 0082F8 88 [ 1] 389 push a
+ 0082F9 6B 01 [ 1] 390 ld (0x01, sp), a
+ 391 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 502: USARTx->CR4 &= ((uint8_t)~USART_CR4_ADD);
+ 0082FB 1C 00 07 [ 2] 392 addw x, #0x0007
+ 0082FE F6 [ 1] 393 ld a, (x)
+ 0082FF A4 F0 [ 1] 394 and a, #0xf0
+ 008301 F7 [ 1] 395 ld (x), a
+ 396 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 504: USARTx->CR4 |= USART_Address;
+ 008302 1A 01 [ 1] 397 or a, (0x01, sp)
+ 008304 F7 [ 1] 398 ld (x), a
+ 399 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 505: }
+ 008305 84 [ 1] 400 pop a
+ 008306 81 [ 4] 401 ret
+ 402 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 515: void USART_WakeUpConfig(USART_TypeDef* USARTx, USART_WakeUp_TypeDef USART_WakeUp)
+ 403 ; -----------------------------------------
+ 404 ; function USART_WakeUpConfig
+ 405 ; -----------------------------------------
+ 008307 406 _USART_WakeUpConfig:
+ 008307 88 [ 1] 407 push a
+ 008308 6B 01 [ 1] 408 ld (0x01, sp), a
+ 409 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 519: USARTx->CR1 &= ((uint8_t)~USART_CR1_WAKE);
+ 00830A 1C 00 04 [ 2] 410 addw x, #0x0004
+ 00830D F6 [ 1] 411 ld a, (x)
+ 00830E A4 F7 [ 1] 412 and a, #0xf7
+ 008310 F7 [ 1] 413 ld (x), a
+ 414 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 520: USARTx->CR1 |= (uint8_t)USART_WakeUp;
+ 008311 1A 01 [ 1] 415 or a, (0x01, sp)
+ 008313 F7 [ 1] 416 ld (x), a
+ 417 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 521: }
+ 008314 84 [ 1] 418 pop a
+ 008315 81 [ 4] 419 ret
+ 420 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 566: void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 421 ; -----------------------------------------
+ 422 ; function USART_HalfDuplexCmd
+ 423 ; -----------------------------------------
+ 008316 424 _USART_HalfDuplexCmd:
+ 008316 88 [ 1] 425 push a
+ 008317 6B 01 [ 1] 426 ld (0x01, sp), a
+ 427 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
+ 008319 1C 00 08 [ 2] 428 addw x, #0x0008
+ 00831C F6 [ 1] 429 ld a, (x)
+ 430 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 570: if (NewState != DISABLE)
+ 00831D 0D 01 [ 1] 431 tnz (0x01, sp)
+ 00831F 27 05 [ 1] 432 jreq 00102$
+ 433 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
+ 008321 AA 08 [ 1] 434 or a, #0x08
+ 008323 F7 [ 1] 435 ld (x), a
+ 008324 20 03 [ 2] 436 jra 00104$
+ 008326 437 00102$:
+ 438 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 576: USARTx->CR5 &= (uint8_t)~USART_CR5_HDSEL; /**< USART Half Duplex Disable */
+ 008326 A4 F7 [ 1] 439 and a, #0xf7
+ 008328 F7 [ 1] 440 ld (x), a
+ 008329 441 00104$:
+ 442 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 578: }
+ 008329 84 [ 1] 443 pop a
+ 00832A 81 [ 4] 444 ret
+ 445 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 644: void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 446 ; -----------------------------------------
+ 447 ; function USART_SmartCardCmd
+ 448 ; -----------------------------------------
+ 00832B 449 _USART_SmartCardCmd:
+ 00832B 88 [ 1] 450 push a
+ 00832C 6B 01 [ 1] 451 ld (0x01, sp), a
+ 452 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
+ 00832E 1C 00 08 [ 2] 453 addw x, #0x0008
+ 008331 F6 [ 1] 454 ld a, (x)
+ 455 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 648: if (NewState != DISABLE)
+ 008332 0D 01 [ 1] 456 tnz (0x01, sp)
+ 008334 27 05 [ 1] 457 jreq 00102$
+ 458 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
+ 008336 AA 20 [ 1] 459 or a, #0x20
+ 008338 F7 [ 1] 460 ld (x), a
+ 008339 20 03 [ 2] 461 jra 00104$
+ 00833B 462 00102$:
+ 463 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 656: USARTx->CR5 &= ((uint8_t)(~USART_CR5_SCEN));
+ 00833B A4 DF [ 1] 464 and a, #0xdf
+ 00833D F7 [ 1] 465 ld (x), a
+ 00833E 466 00104$:
+ 467 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 658: }
+ 00833E 84 [ 1] 468 pop a
+ 00833F 81 [ 4] 469 ret
+ 470 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 667: void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 471 ; -----------------------------------------
+ 472 ; function USART_SmartCardNACKCmd
+ 473 ; -----------------------------------------
+ 008340 474 _USART_SmartCardNACKCmd:
+ 008340 88 [ 1] 475 push a
+ 008341 6B 01 [ 1] 476 ld (0x01, sp), a
+ 477 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
+ 008343 1C 00 08 [ 2] 478 addw x, #0x0008
+ 008346 F6 [ 1] 479 ld a, (x)
+ 480 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 671: if (NewState != DISABLE)
+ 008347 0D 01 [ 1] 481 tnz (0x01, sp)
+ 008349 27 05 [ 1] 482 jreq 00102$
+ 483 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
+ 00834B AA 10 [ 1] 484 or a, #0x10
+ 00834D F7 [ 1] 485 ld (x), a
+ 00834E 20 03 [ 2] 486 jra 00104$
+ 008350 487 00102$:
+ 488 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 679: USARTx->CR5 &= ((uint8_t)~(USART_CR5_NACK));
+ 008350 A4 EF [ 1] 489 and a, #0xef
+ 008352 F7 [ 1] 490 ld (x), a
+ 008353 491 00104$:
+ 492 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 681: }
+ 008353 84 [ 1] 493 pop a
+ 008354 81 [ 4] 494 ret
+ 495 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 690: void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
+ 496 ; -----------------------------------------
+ 497 ; function USART_SetGuardTime
+ 498 ; -----------------------------------------
+ 008355 499 _USART_SetGuardTime:
+ 500 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 693: USARTx->GTR = USART_GuardTime;
+ 008355 1C 00 09 [ 2] 501 addw x, #0x0009
+ 008358 F7 [ 1] 502 ld (x), a
+ 503 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 694: }
+ 008359 81 [ 4] 504 ret
+ 505 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 751: void USART_IrDAConfig(USART_TypeDef* USARTx, USART_IrDAMode_TypeDef USART_IrDAMode)
+ 506 ; -----------------------------------------
+ 507 ; function USART_IrDAConfig
+ 508 ; -----------------------------------------
+ 00835A 509 _USART_IrDAConfig:
+ 00835A 88 [ 1] 510 push a
+ 00835B 6B 01 [ 1] 511 ld (0x01, sp), a
+ 512 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
+ 00835D 1C 00 08 [ 2] 513 addw x, #0x0008
+ 008360 F6 [ 1] 514 ld a, (x)
+ 515 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 755: if (USART_IrDAMode != USART_IrDAMode_Normal)
+ 008361 0D 01 [ 1] 516 tnz (0x01, sp)
+ 008363 27 05 [ 1] 517 jreq 00102$
+ 518 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
+ 008365 AA 04 [ 1] 519 or a, #0x04
+ 008367 F7 [ 1] 520 ld (x), a
+ 008368 20 03 [ 2] 521 jra 00104$
+ 00836A 522 00102$:
+ 523 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 761: USARTx->CR5 &= ((uint8_t)~USART_CR5_IRLP);
+ 00836A A4 FB [ 1] 524 and a, #0xfb
+ 00836C F7 [ 1] 525 ld (x), a
+ 00836D 526 00104$:
+ 527 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 763: }
+ 00836D 84 [ 1] 528 pop a
+ 00836E 81 [ 4] 529 ret
+ 530 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 772: void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
+ 531 ; -----------------------------------------
+ 532 ; function USART_IrDACmd
+ 533 ; -----------------------------------------
+ 00836F 534 _USART_IrDACmd:
+ 00836F 88 [ 1] 535 push a
+ 008370 6B 01 [ 1] 536 ld (0x01, sp), a
+ 537 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
+ 008372 1C 00 08 [ 2] 538 addw x, #0x0008
+ 008375 F6 [ 1] 539 ld a, (x)
+ 540 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 778: if (NewState != DISABLE)
+ 008376 0D 01 [ 1] 541 tnz (0x01, sp)
+ 008378 27 05 [ 1] 542 jreq 00102$
+ 543 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
+ 00837A AA 02 [ 1] 544 or a, #0x02
+ 00837C F7 [ 1] 545 ld (x), a
+ 00837D 20 03 [ 2] 546 jra 00104$
+ 00837F 547 00102$:
+ 548 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 786: USARTx->CR5 &= ((uint8_t)~USART_CR5_IREN);
+ 00837F A4 FD [ 1] 549 and a, #0xfd
+ 008381 F7 [ 1] 550 ld (x), a
+ 008382 551 00104$:
+ 552 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 788: }
+ 008382 84 [ 1] 553 pop a
+ 008383 81 [ 4] 554 ret
+ 555 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 818: void USART_DMACmd(USART_TypeDef* USARTx, USART_DMAReq_TypeDef USART_DMAReq,
+ 556 ; -----------------------------------------
+ 557 ; function USART_DMACmd
+ 558 ; -----------------------------------------
+ 008384 559 _USART_DMACmd:
+ 008384 88 [ 1] 560 push a
+ 561 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
+ 008385 1C 00 08 [ 2] 562 addw x, #0x0008
+ 008388 88 [ 1] 563 push a
+ 008389 F6 [ 1] 564 ld a, (x)
+ 00838A 6B 02 [ 1] 565 ld (0x02, sp), a
+ 00838C 84 [ 1] 566 pop a
+ 567 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 825: if (NewState != DISABLE)
+ 00838D 0D 04 [ 1] 568 tnz (0x04, sp)
+ 00838F 27 05 [ 1] 569 jreq 00102$
+ 570 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
+ 008391 1A 01 [ 1] 571 or a, (0x01, sp)
+ 008393 F7 [ 1] 572 ld (x), a
+ 008394 20 04 [ 2] 573 jra 00104$
+ 008396 574 00102$:
+ 575 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 835: USARTx->CR5 &= (uint8_t)~USART_DMAReq;
+ 008396 43 [ 1] 576 cpl a
+ 008397 14 01 [ 1] 577 and a, (0x01, sp)
+ 008399 F7 [ 1] 578 ld (x), a
+ 00839A 579 00104$:
+ 580 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 837: }
+ 00839A 84 [ 1] 581 pop a
+ 00839B 85 [ 2] 582 popw x
+ 00839C 84 [ 1] 583 pop a
+ 00839D FC [ 2] 584 jp (x)
+ 585 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 939: void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState NewState)
+ 586 ; -----------------------------------------
+ 587 ; function USART_ITConfig
+ 588 ; -----------------------------------------
+ 00839E 589 _USART_ITConfig:
+ 00839E 52 09 [ 2] 590 sub sp, #9
+ 0083A0 1F 08 [ 2] 591 ldw (0x08, sp), x
+ 592 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 946: usartreg = (uint8_t)((uint16_t)USART_IT >> 0x08);
+ 0083A2 1E 0C [ 2] 593 ldw x, (0x0c, sp)
+ 594 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 948: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
+ 0083A4 7B 0D [ 1] 595 ld a, (0x0d, sp)
+ 0083A6 A4 0F [ 1] 596 and a, #0x0f
+ 0083A8 88 [ 1] 597 push a
+ 0083A9 A6 01 [ 1] 598 ld a, #0x01
+ 0083AB 6B 08 [ 1] 599 ld (0x08, sp), a
+ 0083AD 84 [ 1] 600 pop a
+ 0083AE 4D [ 1] 601 tnz a
+ 0083AF 27 05 [ 1] 602 jreq 00154$
+ 0083B1 603 00153$:
+ 0083B1 08 07 [ 1] 604 sll (0x07, sp)
+ 0083B3 4A [ 1] 605 dec a
+ 0083B4 26 FB [ 1] 606 jrne 00153$
+ 0083B6 607 00154$:
+ 608 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
+ 0083B6 9E [ 1] 609 ld a, xh
+ 0083B7 4A [ 1] 610 dec a
+ 0083B8 26 05 [ 1] 611 jrne 00156$
+ 0083BA A6 01 [ 1] 612 ld a, #0x01
+ 0083BC 6B 01 [ 1] 613 ld (0x01, sp), a
+ 0083BE C5 614 .byte 0xc5
+ 0083BF 615 00156$:
+ 0083BF 0F 01 [ 1] 616 clr (0x01, sp)
+ 0083C1 617 00157$:
+ 618 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
+ 0083C1 16 08 [ 2] 619 ldw y, (0x08, sp)
+ 0083C3 72 A9 00 04 [ 2] 620 addw y, #0x0004
+ 0083C7 17 02 [ 2] 621 ldw (0x02, sp), y
+ 622 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
+ 0083C9 9E [ 1] 623 ld a, xh
+ 0083CA A0 05 [ 1] 624 sub a, #0x05
+ 0083CC 26 04 [ 1] 625 jrne 00159$
+ 0083CE 4C [ 1] 626 inc a
+ 0083CF 6B 04 [ 1] 627 ld (0x04, sp), a
+ 0083D1 C5 628 .byte 0xc5
+ 0083D2 629 00159$:
+ 0083D2 0F 04 [ 1] 630 clr (0x04, sp)
+ 0083D4 631 00160$:
+ 632 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
+ 0083D4 1E 08 [ 2] 633 ldw x, (0x08, sp)
+ 0083D6 1C 00 08 [ 2] 634 addw x, #0x0008
+ 0083D9 1F 05 [ 2] 635 ldw (0x05, sp), x
+ 636 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
+ 0083DB 1E 08 [ 2] 637 ldw x, (0x08, sp)
+ 0083DD 1C 00 05 [ 2] 638 addw x, #0x0005
+ 639 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 950: if (NewState != DISABLE)
+ 0083E0 0D 0E [ 1] 640 tnz (0x0e, sp)
+ 0083E2 27 22 [ 1] 641 jreq 00114$
+ 642 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
+ 0083E4 0D 01 [ 1] 643 tnz (0x01, sp)
+ 0083E6 27 0A [ 1] 644 jreq 00105$
+ 645 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
+ 0083E8 1E 02 [ 2] 646 ldw x, (0x02, sp)
+ 0083EA F6 [ 1] 647 ld a, (x)
+ 0083EB 1A 07 [ 1] 648 or a, (0x07, sp)
+ 0083ED 1E 02 [ 2] 649 ldw x, (0x02, sp)
+ 0083EF F7 [ 1] 650 ld (x), a
+ 0083F0 20 36 [ 2] 651 jra 00116$
+ 0083F2 652 00105$:
+ 653 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
+ 0083F2 0D 04 [ 1] 654 tnz (0x04, sp)
+ 0083F4 27 0A [ 1] 655 jreq 00102$
+ 656 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
+ 0083F6 1E 05 [ 2] 657 ldw x, (0x05, sp)
+ 0083F8 F6 [ 1] 658 ld a, (x)
+ 0083F9 1A 07 [ 1] 659 or a, (0x07, sp)
+ 0083FB 1E 05 [ 2] 660 ldw x, (0x05, sp)
+ 0083FD F7 [ 1] 661 ld (x), a
+ 0083FE 20 28 [ 2] 662 jra 00116$
+ 008400 663 00102$:
+ 664 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
+ 008400 F6 [ 1] 665 ld a, (x)
+ 008401 1A 07 [ 1] 666 or a, (0x07, sp)
+ 008403 F7 [ 1] 667 ld (x), a
+ 008404 20 22 [ 2] 668 jra 00116$
+ 008406 669 00114$:
+ 670 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
+ 008406 03 07 [ 1] 671 cpl (0x07, sp)
+ 672 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 970: if (usartreg == 0x01)
+ 008408 0D 01 [ 1] 673 tnz (0x01, sp)
+ 00840A 27 0A [ 1] 674 jreq 00111$
+ 675 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
+ 00840C 1E 02 [ 2] 676 ldw x, (0x02, sp)
+ 00840E F6 [ 1] 677 ld a, (x)
+ 00840F 14 07 [ 1] 678 and a, (0x07, sp)
+ 008411 1E 02 [ 2] 679 ldw x, (0x02, sp)
+ 008413 F7 [ 1] 680 ld (x), a
+ 008414 20 12 [ 2] 681 jra 00116$
+ 008416 682 00111$:
+ 683 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 974: else if (usartreg == 0x05)
+ 008416 0D 04 [ 1] 684 tnz (0x04, sp)
+ 008418 27 0A [ 1] 685 jreq 00108$
+ 686 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 976: USARTx->CR5 &= (uint8_t)(~itpos);
+ 00841A 1E 05 [ 2] 687 ldw x, (0x05, sp)
+ 00841C F6 [ 1] 688 ld a, (x)
+ 00841D 14 07 [ 1] 689 and a, (0x07, sp)
+ 00841F 1E 05 [ 2] 690 ldw x, (0x05, sp)
+ 008421 F7 [ 1] 691 ld (x), a
+ 008422 20 04 [ 2] 692 jra 00116$
+ 008424 693 00108$:
+ 694 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 981: USARTx->CR2 &= (uint8_t)(~itpos);
+ 008424 F6 [ 1] 695 ld a, (x)
+ 008425 14 07 [ 1] 696 and a, (0x07, sp)
+ 008427 F7 [ 1] 697 ld (x), a
+ 008428 698 00116$:
+ 699 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 984: }
+ 008428 1E 0A [ 2] 700 ldw x, (10, sp)
+ 00842A 5B 0E [ 2] 701 addw sp, #14
+ 00842C FC [ 2] 702 jp (x)
+ 703 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1002: FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
+ 704 ; -----------------------------------------
+ 705 ; function USART_GetFlagStatus
+ 706 ; -----------------------------------------
+ 00842D 707 _USART_GetFlagStatus:
+ 00842D 88 [ 1] 708 push a
+ 709 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
+ 00842E 16 04 [ 2] 710 ldw y, (0x04, sp)
+ 711 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ 008430 7B 05 [ 1] 712 ld a, (0x05, sp)
+ 008432 6B 01 [ 1] 713 ld (0x01, sp), a
+ 714 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
+ 008434 90 A3 01 01 [ 2] 715 cpw y, #0x0101
+ 008438 26 0D [ 1] 716 jrne 00108$
+ 717 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ 00843A E6 05 [ 1] 718 ld a, (0x5, x)
+ 00843C 14 01 [ 1] 719 and a, (0x01, sp)
+ 00843E 27 04 [ 1] 720 jreq 00102$
+ 721 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1014: status = SET;
+ 008440 A6 01 [ 1] 722 ld a, #0x01
+ 008442 20 0C [ 2] 723 jra 00109$
+ 008444 724 00102$:
+ 725 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1019: status = RESET;
+ 008444 4F [ 1] 726 clr a
+ 008445 20 09 [ 2] 727 jra 00109$
+ 008447 728 00108$:
+ 729 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1024: if ((USARTx->SR & (uint8_t)USART_FLAG) != (uint8_t)0x00)
+ 008447 F6 [ 1] 730 ld a, (x)
+ 008448 14 01 [ 1] 731 and a, (0x01, sp)
+ 00844A 27 03 [ 1] 732 jreq 00105$
+ 733 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1027: status = SET;
+ 00844C A6 01 [ 1] 734 ld a, #0x01
+ 735 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1032: status = RESET;
+ 00844E 21 736 .byte 0x21
+ 00844F 737 00105$:
+ 00844F 4F [ 1] 738 clr a
+ 008450 739 00109$:
+ 740 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1036: return status;
+ 741 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1037: }
+ 008450 1E 02 [ 2] 742 ldw x, (2, sp)
+ 008452 5B 05 [ 2] 743 addw sp, #5
+ 008454 FC [ 2] 744 jp (x)
+ 745 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1060: void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
+ 746 ; -----------------------------------------
+ 747 ; function USART_ClearFlag
+ 748 ; -----------------------------------------
+ 008455 749 _USART_ClearFlag:
+ 750 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1065: USARTx->SR = (uint8_t)((uint16_t)~((uint16_t)USART_FLAG));
+ 008455 16 03 [ 2] 751 ldw y, (0x03, sp)
+ 008457 90 53 [ 2] 752 cplw y
+ 008459 90 9F [ 1] 753 ld a, yl
+ 00845B F7 [ 1] 754 ld (x), a
+ 755 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1066: }
+ 00845C 1E 01 [ 2] 756 ldw x, (1, sp)
+ 00845E 5B 04 [ 2] 757 addw sp, #4
+ 008460 FC [ 2] 758 jp (x)
+ 759 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1083: ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
+ 760 ; -----------------------------------------
+ 761 ; function USART_GetITStatus
+ 762 ; -----------------------------------------
+ 008461 763 _USART_GetITStatus:
+ 008461 52 09 [ 2] 764 sub sp, #9
+ 008463 1F 08 [ 2] 765 ldw (0x08, sp), x
+ 766 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1096: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
+ 008465 7B 0D [ 1] 767 ld a, (0x0d, sp)
+ 008467 97 [ 1] 768 ld xl, a
+ 008468 A4 0F [ 1] 769 and a, #0x0f
+ 00846A 88 [ 1] 770 push a
+ 00846B A6 01 [ 1] 771 ld a, #0x01
+ 00846D 6B 04 [ 1] 772 ld (0x04, sp), a
+ 00846F 84 [ 1] 773 pop a
+ 008470 4D [ 1] 774 tnz a
+ 008471 27 05 [ 1] 775 jreq 00179$
+ 008473 776 00178$:
+ 008473 08 03 [ 1] 777 sll (0x03, sp)
+ 008475 4A [ 1] 778 dec a
+ 008476 26 FB [ 1] 779 jrne 00178$
+ 008478 780 00179$:
+ 781 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1098: itmask1 = (uint8_t)((uint8_t)USART_IT >> (uint8_t)4);
+ 008478 9F [ 1] 782 ld a, xl
+ 008479 4E [ 1] 783 swap a
+ 00847A A4 0F [ 1] 784 and a, #0x0f
+ 785 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1100: itmask2 = (uint8_t)((uint8_t)1 << itmask1);
+ 00847C 88 [ 1] 786 push a
+ 00847D A6 01 [ 1] 787 ld a, #0x01
+ 00847F 6B 08 [ 1] 788 ld (0x08, sp), a
+ 008481 84 [ 1] 789 pop a
+ 008482 4D [ 1] 790 tnz a
+ 008483 27 05 [ 1] 791 jreq 00181$
+ 008485 792 00180$:
+ 008485 08 07 [ 1] 793 sll (0x07, sp)
+ 008487 4A [ 1] 794 dec a
+ 008488 26 FB [ 1] 795 jrne 00180$
+ 00848A 796 00181$:
+ 797 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
+ 00848A 16 0C [ 2] 798 ldw y, (0x0c, sp)
+ 00848C 17 01 [ 2] 799 ldw (0x01, sp), y
+ 800 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ 00848E 16 08 [ 2] 801 ldw y, (0x08, sp)
+ 008490 17 04 [ 2] 802 ldw (0x04, sp), y
+ 803 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
+ 008492 1E 01 [ 2] 804 ldw x, (0x01, sp)
+ 008494 A3 01 00 [ 2] 805 cpw x, #0x0100
+ 008497 26 1D [ 1] 806 jrne 00118$
+ 807 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1106: enablestatus = (uint8_t)((uint8_t)USARTx->CR1 & itmask2);
+ 008499 16 08 [ 2] 808 ldw y, (0x08, sp)
+ 00849B 17 01 [ 2] 809 ldw (0x01, sp), y
+ 00849D 93 [ 1] 810 ldw x, y
+ 00849E E6 04 [ 1] 811 ld a, (0x4, x)
+ 0084A0 14 07 [ 1] 812 and a, (0x07, sp)
+ 0084A2 6B 07 [ 1] 813 ld (0x07, sp), a
+ 814 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ 0084A4 1E 04 [ 2] 815 ldw x, (0x04, sp)
+ 0084A6 F6 [ 1] 816 ld a, (x)
+ 0084A7 14 03 [ 1] 817 and a, (0x03, sp)
+ 0084A9 27 08 [ 1] 818 jreq 00102$
+ 0084AB 0D 07 [ 1] 819 tnz (0x07, sp)
+ 0084AD 27 04 [ 1] 820 jreq 00102$
+ 821 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1112: pendingbitstatus = SET;
+ 0084AF A6 01 [ 1] 822 ld a, #0x01
+ 0084B1 20 41 [ 2] 823 jra 00119$
+ 0084B3 824 00102$:
+ 825 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1117: pendingbitstatus = RESET;
+ 0084B3 4F [ 1] 826 clr a
+ 0084B4 20 3E [ 2] 827 jra 00119$
+ 0084B6 828 00118$:
+ 829 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ 0084B6 1E 08 [ 2] 830 ldw x, (0x08, sp)
+ 0084B8 E6 05 [ 1] 831 ld a, (0x5, x)
+ 0084BA 14 07 [ 1] 832 and a, (0x07, sp)
+ 833 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1121: else if (USART_IT == USART_IT_OR)
+ 0084BC 1E 01 [ 2] 834 ldw x, (0x01, sp)
+ 0084BE A3 02 35 [ 2] 835 cpw x, #0x0235
+ 0084C1 26 20 [ 1] 836 jrne 00115$
+ 837 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ 0084C3 6B 06 [ 1] 838 ld (0x06, sp), a
+ 839 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1127: temp = (uint8_t)(USARTx->CR5 & USART_CR5_EIE);
+ 0084C5 1E 08 [ 2] 840 ldw x, (0x08, sp)
+ 0084C7 E6 08 [ 1] 841 ld a, (0x8, x)
+ 0084C9 A4 01 [ 1] 842 and a, #0x01
+ 0084CB 6B 07 [ 1] 843 ld (0x07, sp), a
+ 844 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1129: if (( (USARTx->SR & itpos) != 0x00) && ((enablestatus || temp)))
+ 0084CD 1E 04 [ 2] 845 ldw x, (0x04, sp)
+ 0084CF F6 [ 1] 846 ld a, (x)
+ 0084D0 14 03 [ 1] 847 and a, (0x03, sp)
+ 0084D2 27 0C [ 1] 848 jreq 00106$
+ 0084D4 0D 06 [ 1] 849 tnz (0x06, sp)
+ 0084D6 26 04 [ 1] 850 jrne 00105$
+ 0084D8 0D 07 [ 1] 851 tnz (0x07, sp)
+ 0084DA 27 04 [ 1] 852 jreq 00106$
+ 0084DC 853 00105$:
+ 854 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1132: pendingbitstatus = SET;
+ 0084DC A6 01 [ 1] 855 ld a, #0x01
+ 0084DE 20 14 [ 2] 856 jra 00119$
+ 0084E0 857 00106$:
+ 858 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1137: pendingbitstatus = RESET;
+ 0084E0 4F [ 1] 859 clr a
+ 0084E1 20 11 [ 2] 860 jra 00119$
+ 0084E3 861 00115$:
+ 862 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1144: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
+ 0084E3 6B 07 [ 1] 863 ld (0x07, sp), a
+ 864 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1146: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
+ 0084E5 1E 04 [ 2] 865 ldw x, (0x04, sp)
+ 0084E7 F6 [ 1] 866 ld a, (x)
+ 0084E8 14 03 [ 1] 867 and a, (0x03, sp)
+ 0084EA 27 07 [ 1] 868 jreq 00111$
+ 0084EC 0D 07 [ 1] 869 tnz (0x07, sp)
+ 0084EE 27 03 [ 1] 870 jreq 00111$
+ 871 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1149: pendingbitstatus = SET;
+ 0084F0 A6 01 [ 1] 872 ld a, #0x01
+ 873 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1154: pendingbitstatus = RESET;
+ 0084F2 21 874 .byte 0x21
+ 0084F3 875 00111$:
+ 0084F3 4F [ 1] 876 clr a
+ 0084F4 877 00119$:
+ 878 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1159: return pendingbitstatus;
+ 879 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1160: }
+ 0084F4 1E 0A [ 2] 880 ldw x, (10, sp)
+ 0084F6 5B 0D [ 2] 881 addw sp, #13
+ 0084F8 FC [ 2] 882 jp (x)
+ 883 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1183: void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
+ 884 ; -----------------------------------------
+ 885 ; function USART_ClearITPendingBit
+ 886 ; -----------------------------------------
+ 0084F9 887 _USART_ClearITPendingBit:
+ 888 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1188: USARTx->SR &= (uint8_t)(~USART_SR_TC);
+ 0084F9 F6 [ 1] 889 ld a, (x)
+ 0084FA A4 BF [ 1] 890 and a, #0xbf
+ 0084FC F7 [ 1] 891 ld (x), a
+ 892 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1189: }
+ 0084FD 1E 01 [ 2] 893 ldw x, (1, sp)
+ 0084FF 5B 04 [ 2] 894 addw sp, #4
+ 008501 FC [ 2] 895 jp (x)
+ 896 .area CODE
+ 897 .area CONST
+ 898 .area INITIALIZER
+ 899 .area CABS (ABS)
diff --git a/firmware/STM8L15X_LD/stm8l15x_usart.sym b/firmware/STM8L15X_LD/stm8l15x_usart.sym
new file mode 100644
index 0000000..b04922f
--- /dev/null
+++ b/firmware/STM8L15X_LD/stm8l15x_usart.sym
@@ -0,0 +1,55 @@
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
+Hexadecimal [24-Bits]
+
+Symbol Table
+
+ .__.$$$. = 002710 L
+ .__.ABS. = 000000 G
+ .__.CPU. = 000000 L
+ .__.H$L. = 000001 L
+ _CLK_GetClockFreq ****** GX
+ 9 _USART_ClearFlag 0002A8 GR
+ 9 _USART_ClearITPendingBit 00034C GR
+ 9 _USART_ClockInit 000094 GR
+ 9 _USART_Cmd 0000CE GR
+ 9 _USART_DMACmd 0001D7 GR
+ 9 _USART_DeInit 000000 GR
+ 9 _USART_GetFlagStatus 000280 GR
+ 9 _USART_GetITStatus 0002B4 GR
+ 9 _USART_HalfDuplexCmd 000169 GR
+ 9 _USART_ITConfig 0001F1 GR
+ 9 _USART_Init 000017 GR
+ 9 _USART_IrDACmd 0001C2 GR
+ 9 _USART_IrDAConfig 0001AD GR
+ 9 _USART_ReceiveData8 0000F0 GR
+ 9 _USART_ReceiveData9 0000F3 GR
+ 9 _USART_ReceiverWakeUpCmd 000136 GR
+ 9 _USART_SendBreak 0000E8 GR
+ 9 _USART_SendData8 00010E GR
+ 9 _USART_SendData9 000111 GR
+ 9 _USART_SetAddress 00014B GR
+ 9 _USART_SetGuardTime 0001A8 GR
+ 9 _USART_SetPrescaler 0000E3 GR
+ 9 _USART_SmartCardCmd 00017E GR
+ 9 _USART_SmartCardNACKCmd 000193 GR
+ 9 _USART_WakeUpConfig 00015A GR
+ __divulong ****** GX
+
+
+ ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
+Hexadecimal [24-Bits]
+
+Area Table
+
+ 0 _CODE size 0 flags 0
+ 1 DATA size 0 flags 0
+ 2 INITIALIZED size 0 flags 0
+ 3 DABS size 0 flags 8
+ 4 HOME size 0 flags 0
+ 5 GSINIT size 0 flags 0
+ 6 GSFINAL size 0 flags 0
+ 7 CONST size 0 flags 0
+ 8 INITIALIZER size 0 flags 0
+ 9 CODE size 355 flags 0
+ A CABS size 0 flags 8
+
diff --git a/firmware/inc/stm8l151x/inc/stm8l15x.h b/firmware/inc/stm8l151x/inc/stm8l15x.h
new file mode 100644
index 0000000..0a15404
--- /dev/null
+++ b/firmware/inc/stm8l151x/inc/stm8l15x.h
@@ -0,0 +1,3091 @@
+/**
+ ******************************************************************************
+ * @file stm8l15x.h
+ * @author MCD Application Team
+ * @version V1.6.1
+ * @date 30-September-2014
+ * @brief This file contains all the peripheral register's definitions, bits
+ * definitions and memory mapping for STM8L15x devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM8L15x_H
+ #define __STM8L15x_H
+
+/** @addtogroup STM8L15x_StdPeriph_Driver
+ * @{
+ */
+/* Uncomment the line below according to the target STM8L15x device used in your
+ application
+ */
+// #define STM8L15X_LD /*!< STM8L15X_LD: STM8L15x Low density devices */
+/* #define STM8L15X_MD */ /*!< STM8L15X_MD: STM8L15x Medium density devices */
+/* #define STM8L15X_MDP */ /*!< STM8L15X_MDP: STM8L15x Medium density plus devices */
+/* #define STM8L15X_HD */ /*!< STM8L15X_HD: STM8L15x/16x High density devices */
+/* #define STM8L05X_LD_VL */ /*!< STM8L05X_LD_VL: STM8L051xx3 Low density value line devices */
+/* #define STM8L05X_MD_VL */ /*!< STM8L05X_MD_VL: STM8L052xx6 Medium density value line devices */
+/* #define STM8L05X_HD_VL */ /*!< STM8L05X_HD_VL: STM8L052xx8 High density value line devices */
+/* #define STM8AL31_L_MD */ /*!< STM8AL31_L_MD: STM8AL3x Medium density devices */
+
+
+/* Tip: To avoid modifying this file each time you need to switch between these
+ devices, you can define the device in your toolchain compiler preprocessor.
+
+ - Low density STM8L15x devices are STM8L151C3, STM8L151K3, STM8L151G3, STM8L151F3,
+ STM8L151C2, STM8L151K2, STM8L151G2 and STM8L151F2 microcontrollers where the
+ Flash memory density ranges between 4 and 8 Kbytes.
+ - Medium density STM8L15x devices are STM8L151C4, STM8L151C6, STM8L152C4,
+ STM8L152C6, STM8L151K4, STM8L151K6, STM8L152K4, STM8L152K6, STM8L151G4,
+ STM8L151G6, STM8L152G4 and STM8L152G6 microcontrollers where the Flash memory
+ density ranges between 16 and 32 Kbytes.
+ - Medium density Plus devices are STM8L151R6, STM8L152R6 microcontrollers where
+ the Flash memory density is fixed and equal to 32 Kbytes and a wider range of
+ peripheral than the medium density devices.
+ - High density STM8L15x devices are STM8L151x8, STM8L152x8, STM8L162R8 and STM8L162M8
+ microcontrollers where the Flash memory density is fixed and equal to 64 Kbytes with
+ the same peripheral set than Medium Density Plus devices.
+ - Value line low density STM8L05xx devices are STM8L051x3 microcontrollers
+ with 8-KB Flash
+ - Value line medium density STM8L05xx devices are STM8L052x6 microcontrollers
+ with 32-KB Flash
+ - Value line high density STM8L05xx devices: STM8L052x8 microcontrollers
+ with 64-KB Flash
+ - Medium density STM8AL31xx/STM8AL3Lxx devices: STM8AL3168, STM8AL3166,
+ STM8AL3148,STM8AL3146, STM8AL3138, STM8AL3136, STM8AL3L68, STM8AL3L66,
+ STM8AL3L48, STM8AL3L46 microcontrollers with 8-KB, 16-KB or 32-KB Flash
+ */
+
+#if !defined (STM8L15X_MD) && !defined (STM8L15X_MDP) && !defined (STM8L15X_HD) && !defined (STM8L15X_LD) \
+&& !defined (STM8L05X_LD_VL) && !defined (STM8L05X_MD_VL) && !defined (STM8L05X_HD_VL) && !defined (STM8AL31_L_MD)
+ #error "Please select first the target STM8L device used in your application (in stm8l15x.h file)"
+#endif
+
+/******************************************************************************/
+/* Library configuration section */
+/******************************************************************************/
+/* Check the used compiler */
+#if defined(__CSMC__)
+ #define _COSMIC_
+#elif defined(__RCSTM8__)
+ #define _RAISONANCE_
+#elif defined(__ICCSTM8__)
+ #define _IAR_
+#elif defined(__SDCC) /* SDCC patch: add compiler and version */
+ #define _SDCC_
+ #define SDCC_VERSION (__SDCC_VERSION_MAJOR * 10000 \
+ + __SDCC_VERSION_MINOR * 100 \
+ + __SDCC_VERSION_PATCH)
+#else
+ #error "Unsupported Compiler!" /* Compiler defines not found */
+#endif
+
+#if !defined USE_STDPERIPH_DRIVER
+/* Comment the line below if you will not use the peripherals drivers.
+ In this case, these drivers will not be included and the application code will be
+ based on direct access to peripherals registers */
+ #define USE_STDPERIPH_DRIVER
+#endif
+
+/**
+ * @brief In the following line adjust the value of External High Speed oscillator (HSE)
+ used in your application
+
+ Tip: To avoid modifying this file each time you need to use different HSE, you
+ can define the HSE value in your toolchain compiler preprocessor.
+ */
+#if !defined HSE_VALUE
+ #define HSE_VALUE ((uint32_t)16000000) /*!< Typical Value of the HSE in Hz */
+#endif /* HSE_VALUE */
+
+/**
+ * @brief Definition of External Low Speed oscillator (LSE) frequency
+ */
+#if !defined LSE_VALUE
+ #define LSE_VALUE ((uint32_t)32768) /*!< Typical Value of the LSE in Hz */
+#endif /* LSE_VALUE */
+/**
+ * @brief Definition of Device on-chip RC oscillator frequencies
+ */
+#if !defined HSI_VALUE
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Typical Value of the HSI in Hz */
+#endif /* HSI_VALUE */
+
+#if !defined LSI_VALUE
+ #define LSI_VALUE ((uint32_t)38000) /*!< Typical Value of the LSI in Hz */
+#endif /* LSI_VALUE */
+
+#ifdef _COSMIC_
+ #define FAR @far
+ #define NEAR @near
+ #define TINY @tiny
+ #define EEPROM @eeprom
+ #define CONST const
+#elif defined (_RAISONANCE_) /* __RCSTM8__ */
+ #define FAR far
+ #define NEAR data
+ #define TINY page0
+ #define EEPROM eeprom
+ #define CONST code
+ #if defined (STM8L15X_MD) || defined (STM8L15X_MDP) || defined (STM8L05X_MD_VL) || \
+ defined (STM8AL31_L_MD)
+ /*!< Used with memory Models for code less than 64K */
+ #define MEMCPY memcpy
+ #elif defined (STM8L15X_HD) || defined (STM8L05X_HD_VL)
+ /*!< Used with memory Models for code higher than 64K */
+ #define MEMCPY fmemcpy
+ #endif /* STM8L15X_MD or STM8L15X_MDP or STM8L05X_MD_VL or STM8AL31_L_MD*/
+#elif defined (_SDCC_) /* SDCC patch: mostly not required / not supported */
+ #define FAR
+ #define NEAR
+ #define TINY
+ #define EEPROM
+ #define CONST const
+#else /*_IAR_*/
+ #define FAR __far
+ #define NEAR __near
+ #define TINY __tiny
+ #define EEPROM __eeprom
+ #define CONST const
+#endif /* __CSMC__ */
+
+/**
+ * @brief Legacy definition
+ */
+#define __CONST CONST
+
+#if defined (STM8L15X_MD) || defined (STM8L15X_MDP) || defined (STM8L15X_LD) || \
+defined (STM8L05X_LD_VL) || defined (STM8L05X_MD_VL) || defined (STM8AL31_L_MD)
+/*!< Used with memory Models for code smaller than 64K */
+ #define PointerAttr NEAR
+ #define MemoryAddressCast uint16_t
+ #undef _SDCC_BIGMEM_ /* SDCC patch: simplify sdcc && >64kB indicator over different SPLs */
+#elif defined (STM8L15X_HD) || defined (STM8L05X_HD_VL)
+/*!< Used with memory Models for code higher than 64K */
+ #define PointerAttr FAR
+ #define MemoryAddressCast uint32_t
+ #define _SDCC_BIGMEM_ /* SDCC patch: simplify sdcc && >64kB indicator over different SPLs */
+#endif /* STM8L15X_MD or STM8L15X_MDP or STM8L15X_LD or STM8L05X_LD_VL or STM8L05X_MD_VL
+ or STM8AL31_L_MD */
+
+/* Uncomment the line below to enable the FLASH functions execution from RAM */
+#if !defined (RAM_EXECUTION)
+/* #define RAM_EXECUTION (1) */
+#endif /* RAM_EXECUTION */
+
+#ifdef RAM_EXECUTION
+ #ifdef _COSMIC_
+ #define IN_RAM(a) a
+ #elif defined (_RAISONANCE_) /* __RCSTM8__ */
+ #define IN_RAM(a) a inram
+ #elif defined (_SDCC_) /* SDCC patch: code in RAM not yet patched */
+ #error RAM execution not yet implemented in patch, comment RAM_EXECUTION in stm8s.h
+ #else /*_IAR_*/
+ #define IN_RAM(a) __ramfunc a
+ #endif /* _COSMIC_ */
+#else
+ #define IN_RAM(a) a
+#endif /* RAM_EXECUTION */
+
+/*!< [31:16] STM8L15X Standard Peripheral Library main version */
+#define __STM8L15X_STDPERIPH_VERSION_MAIN ((uint8_t)0x01) /*!< [31:24] main version */
+#define __STM8L15X_STDPERIPH_VERSION_SUB1 ((uint8_t)0x06) /*!< [23:16] sub1 version */
+#define __STM8L15X_STDPERIPH_VERSION_SUB2 ((uint8_t)0x01) /*!< [15:8] sub2 version */
+#define __STM8L15X_STDPERIPH_VERSION_RC ((uint8_t)0x00) /*!< [7:0] release candidate */
+#define __STM8L15X_STDPERIPH_VERSION ( (__STM8L15X_STDPERIPH_VERSION_MAIN << 24)\
+ |(__STM8L15X_STDPERIPH_VERSION_SUB1 << 16)\
+ |(__STM8L15X_STDPERIPH_VERSION_SUB2 << 8)\
+ |(__STM8L15X_STDPERIPH_VERSION_RC))
+
+/******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Exported types and constants ----------------------------------------------*/
+
+/** @addtogroup Exported_types
+ * @{
+ */
+
+/**
+ * IO definitions
+ *
+ * define access restrictions to peripheral registers
+ */
+#define __I volatile const /*!< defines 'read only' permissions */
+#define __O volatile /*!< defines 'write only' permissions */
+#define __IO volatile /*!< defines 'read / write' permissions */
+
+/* SDCC patch: define standard data types */
+#if defined(_COSMIC_) || defined(_RAISONANCE_) || defined(_IAR_)
+
+ // skip if already defined
+ #ifndef INT8_MAX
+
+ /*!< Signed integer types */
+ typedef signed char int8_t;
+ typedef signed short int16_t;
+ typedef signed long int32_t;
+
+ /*!< Unsigned integer types */
+ typedef unsigned char uint8_t;
+ typedef unsigned short uint16_t;
+ typedef unsigned long uint32_t;
+
+ /*!< STM8 Standard Peripheral Library old types (maintained for legacy purpose) */
+ typedef int32_t s32;
+ typedef int16_t s16;
+ typedef int8_t s8;
+
+ typedef uint32_t u32;
+ typedef uint16_t u16;
+ typedef uint8_t u8;
+
+ #endif // INT8_MAX
+
+#elif defined(_SDCC_)
+
+ // use compiler standard header
+ #include
+
+#else
+ #error "Unsupported Compiler!" /* Compiler defines not found */
+#endif
+
+
+/* SDCC patch: SDCC defines a special Bool type, use that if available */
+#ifdef __bool_true_false_are_defined
+ #define TRUE true
+ #define FALSE false
+#else
+ typedef enum {FALSE = 0, TRUE = !FALSE} bool;
+#endif
+
+typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus, BitAction;
+
+typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+
+typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
+
+#define U8_MAX (255)
+#define S8_MAX (127)
+#define S8_MIN (-128)
+#define U16_MAX (65535u)
+#define S16_MAX (32767)
+#define S16_MIN (-32768)
+#define U32_MAX (4294967295uL)
+#define S32_MAX (2147483647)
+#define S32_MIN (-2147483648uL)
+
+/**
+ * @}
+ */
+
+/** @addtogroup MAP_FILE_Exported_Types_and_Constants
+ * @{
+ */
+
+/******************************************************************************/
+/* IP registers structures */
+/******************************************************************************/
+
+/*----------------------------------------------------------------------------*/
+/**
+ * @brief General Purpose I/Os (GPIO)
+ */
+typedef struct GPIO_struct
+{
+ __IO uint8_t ODR; /*!< Output Data Register */
+ __IO uint8_t IDR; /*!< Input Data Register */
+ __IO uint8_t DDR; /*!< Data Direction Register */
+ __IO uint8_t CR1; /*!< Configuration Register 1 */
+ __IO uint8_t CR2; /*!< Configuration Register 2 */
+}
+GPIO_TypeDef;
+
+/** @addtogroup GPIO_Registers_Reset_Value
+ * @{
+ */
+#define GPIO_ODR_RESET_VALUE ((uint8_t)0x00)
+#define GPIO_DDR_RESET_VALUE ((uint8_t)0x00)
+#define GPIO_CR1_RESET_VALUE ((uint8_t)0x00)
+#define GPIO_CR2_RESET_VALUE ((uint8_t)0x00)
+/**
+ * @}
+ */
+/*----------------------------------------------------------------------------*/
+
+/**
+ * @brief Real-Time Clock (RTC) peripheral registers.
+ */
+typedef struct RTC_struct
+{
+ __IO uint8_t TR1; /*!< Time Register 1*/
+ __IO uint8_t TR2; /*!< Time Register 2*/
+ __IO uint8_t TR3; /*!< Time Register 3*/
+
+ uint8_t RESERVED0;
+
+ __IO uint8_t DR1; /*!< Date Register 1*/
+ __IO uint8_t DR2; /*!< Date Register 2*/
+ __IO uint8_t DR3; /*!< Date Register 3*/
+
+ uint8_t RESERVED1;
+
+ __IO uint8_t CR1; /*!< Control Register 1*/
+ __IO uint8_t CR2; /*!< Control Register 2*/
+ __IO uint8_t CR3; /*!< Control Register 3*/
+
+ uint8_t RESERVED2;
+
+ __IO uint8_t ISR1; /*!< Initialisation and Status Register 1 */
+ __IO uint8_t ISR2; /*!< Initialisation and Status Register 2 */
+
+ uint8_t RESERVED3;
+ uint8_t RESERVED4;
+
+ __IO uint8_t SPRERH; /*!< Synchronous Prediv high Register */
+ __IO uint8_t SPRERL; /*!< Synchronous Prediv Low Register */
+ __IO uint8_t APRER; /*!< Asynchronous Prediv Register */
+
+ uint8_t RESERVED5;
+
+ __IO uint8_t WUTRH; /*!< Wake-Up Timer High Register */
+ __IO uint8_t WUTRL; /*!< Wake-Up Timer Low Register */
+
+ uint8_t RESERVED6;
+
+ __IO uint8_t SSRH; /*!< Sub Second High Register */
+ __IO uint8_t SSRL; /*!< Sub Second Low Register */
+
+ __IO uint8_t WPR; /*!< Write Protection Register */
+
+ __IO uint8_t SHIFTRH; /*!< Shift control High Register */
+ __IO uint8_t SHIFTRL; /*!< Shift control Low Register */
+
+ __IO uint8_t ALRMAR1; /*!< ALARM A Register 1 */
+ __IO uint8_t ALRMAR2; /*!< ALARM A Register 2 */
+ __IO uint8_t ALRMAR3; /*!< ALARM A Register 3 */
+ __IO uint8_t ALRMAR4; /*!< ALARM A Register 4 */
+
+ uint8_t RESERVED7[4];
+
+ __IO uint8_t ALRMASSRH; /*!< ALARM A Subsecond Register High */
+ __IO uint8_t ALRMASSRL; /*!< ALARM A Subsecond Register Low */
+ __IO uint8_t ALRMASSMSKR; /*!< ALARM A Subsecond Mask Register */
+
+ uint8_t RESERVED8[3];
+
+ __IO uint8_t CALRH; /*!< Calibration register high */
+ __IO uint8_t CALRL; /*!< Calibration register low */
+
+ __IO uint8_t TCR1; /*!< Tamper control register 1 */
+ __IO uint8_t TCR2; /*!< Tamper control register 2 */
+}
+RTC_TypeDef;
+
+/** @addtogroup RTC_Registers_Reset_Value
+ * @{
+ */
+#define RTC_TR1_RESET_VALUE ((uint8_t)0x00)
+#define RTC_TR2_RESET_VALUE ((uint8_t)0x00)
+#define RTC_TR3_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_DR1_RESET_VALUE ((uint8_t)0x01)
+#define RTC_DR2_RESET_VALUE ((uint8_t)0x21)
+#define RTC_DR3_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_CR1_RESET_VALUE ((uint8_t)0x00)
+#define RTC_CR2_RESET_VALUE ((uint8_t)0x00)
+#define RTC_CR3_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_ISR1_RESET_VALUE ((uint8_t)0x07)
+#define RTC_ISR2_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_SPRERH_RESET_VALUE ((uint8_t)0x00)
+#define RTC_SPRERL_RESET_VALUE ((uint8_t)0xFF)
+#define RTC_APRER_RESET_VALUE ((uint8_t)0x7F)
+
+#define RTC_WUTRH_RESET_VALUE ((uint8_t)0xFF)
+#define RTC_WUTRL_RESET_VALUE ((uint8_t)0xFF)
+
+#define RTC_WPR_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_ALRMAR1_RESET_VALUE ((uint8_t)0x00)
+#define RTC_ALRMAR2_RESET_VALUE ((uint8_t)0x00)
+#define RTC_ALRMAR3_RESET_VALUE ((uint8_t)0x00)
+#define RTC_ALRMAR4_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_SHIFTRH_RESET_VALUE ((uint8_t)0x00)
+#define RTC_SHIFTRL_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_ALRMASSRH_RESET_VALUE ((uint8_t)0x00)
+#define RTC_ALRMASSRL_RESET_VALUE ((uint8_t)0x00)
+#define RTC_ALRMASSMSKR_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_CALRH_RESET_VALUE ((uint8_t)0x00)
+#define RTC_CALRL_RESET_VALUE ((uint8_t)0x00)
+
+#define RTC_TCR1_RESET_VALUE ((uint8_t)0x00)
+#define RTC_TCR2_RESET_VALUE ((uint8_t)0x00)
+
+/**
+ * @}
+ */
+
+/** @addtogroup RTC_Registers_Bits_Definition
+ * @{
+ */
+
+/* Bits definition for RTC_TR1 register*/
+#define RTC_TR1_ST ((uint8_t)0x70)
+#define RTC_TR1_SU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_TR2 register*/
+#define RTC_TR2_MNT ((uint8_t)0x70)
+#define RTC_TR2_MNU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_TR3 register*/
+#define RTC_TR3_PM ((uint8_t)0x40)
+#define RTC_TR3_HT ((uint8_t)0x30)
+#define RTC_TR3_HU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_DR1 register*/
+#define RTC_DR1_DT ((uint8_t)0x30)
+#define RTC_DR1_DU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_DR2 register*/
+#define RTC_DR2_WDU ((uint8_t)0xE0)
+#define RTC_DR2_MT ((uint8_t)0x10)
+#define RTC_DR2_MU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_DR3 register*/
+#define RTC_DR3_YT ((uint8_t)0xF0)
+#define RTC_DR3_YU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_CR1 register*/
+#define RTC_CR1_FMT ((uint8_t)0x40)
+#define RTC_CR1_RATIO ((uint8_t)0x20)
+#define RTC_CR1_WUCKSEL ((uint8_t)0x07)
+#define RTC_CR1_BYPSHAD ((uint8_t)0x10)
+
+
+/* Bits definition for RTC_CR2 register*/
+#define RTC_CR2_WUTIE ((uint8_t)0x40)
+#define RTC_CR2_ALRAIE ((uint8_t)0x10)
+#define RTC_CR2_WUTE ((uint8_t)0x04)
+#define RTC_CR2_ALRAE ((uint8_t)0x01)
+#define RTC_CR2_ALRIE ((uint8_t)0x20)
+
+
+
+/* Bits definition for RTC_CR3 register*/
+#define RTC_CR3_COE ((uint8_t)0x80)
+#define RTC_CR3_OSEL ((uint8_t)0x60)
+#define RTC_CR3_POL ((uint8_t)0x10)
+#define RTC_CR3_COSEL ((uint8_t)0x08)
+#define RTC_CR3_BCK ((uint8_t)0x04)
+#define RTC_CR3_SUB1H ((uint8_t)0x02)
+#define RTC_CR3_ADD1H ((uint8_t)0x01)
+
+
+/* Bits definition for RTC_ISR1 register*/
+#define RTC_ISR1_INIT ((uint8_t)0x80)
+#define RTC_ISR1_INITF ((uint8_t)0x40)
+#define RTC_ISR1_RSF ((uint8_t)0x20)
+#define RTC_ISR1_INITS ((uint8_t)0x10)
+#define RTC_ISR1_SHPF ((uint8_t)0x08)
+#define RTC_ISR1_WUTWF ((uint8_t)0x04)
+#define RTC_ISR1_RECALPF ((uint8_t)0x02)
+#define RTC_ISR1_ALRAWF ((uint8_t)0x01)
+
+
+/* Bits definition for RTC_ISR2 register*/
+#define RTC_ISR2_WUTF ((uint8_t)0x04)
+#define RTC_ISR2_ALRAF ((uint8_t)0x01)
+#define RTC_ISR2_TAMP3F ((uint8_t)0x80)
+#define RTC_ISR2_TAMP2F ((uint8_t)0x40)
+#define RTC_ISR2_TAMP1F ((uint8_t)0x20)
+
+/* Bits definition for RTC_SHIFTRH register*/
+#define RTC_SHIFTRH_ADD1S ((uint8_t)0x80)
+#define RTC_SHIFTRH_SUBFS ((uint8_t)0x7F)
+
+/* Bits definition for RTC_SHIFTRL register*/
+#define RTC_SHIFTRL_SUBFS ((uint8_t)0xFF)
+
+
+/* Bits definition for RTC_ALRMAR1 register*/
+#define RTC_ALRMAR1_MSK1 ((uint8_t)0x80)
+#define RTC_ALRMAR1_ST ((uint8_t)0x70)
+#define RTC_ALRMAR1_SU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_ALRMAR2 register*/
+#define RTC_ALRMAR2_MSK2 ((uint8_t)0x80)
+#define RTC_ALRMAR2_MNT ((uint8_t)0x70)
+#define RTC_ALRMAR2_MNU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_ALRMAR3 register*/
+#define RTC_ALRMAR3_MSK3 ((uint8_t)0x80)
+#define RTC_ALRMAR3_PM ((uint8_t)0x40)
+#define RTC_ALRMAR3_HT ((uint8_t)0x30)
+#define RTC_ALRMAR3_HU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_ALRMAR4 register*/
+#define RTC_ALRMAR4_MSK4 ((uint8_t)0x80)
+#define RTC_ALRMAR4_WDSEL ((uint8_t)0x40)
+#define RTC_ALRMAR4_DT ((uint8_t)0x30)
+#define RTC_ALRMAR4_DU ((uint8_t)0x0F)
+
+/* Bits definition for RTC_ALRMASSRH register*/
+#define RTC_ALRMASSRH_ALSS ((uint8_t)0x7F)
+
+/* Bits definition for RTC_ALRMASSRL register*/
+#define RTC_ALRMASSRL_ALSS ((uint8_t)0xFF)
+
+/* Bits definition for RTC_ALRMASSMSKR register*/
+#define RTC_ALRMASSMSKR_MASKSS ((uint8_t)0x1F)
+
+
+/* Bits definition for RTC_CALRH register*/
+#define RTC_CALRH_CALP ((uint8_t)0x80)
+#define RTC_CALRH_CALW8 ((uint8_t)0x40)
+#define RTC_CALRH_CALW16 ((uint8_t)0x20)
+#define RTC_CALRH_CALWx ((uint8_t)0x60)
+#define RTC_CALRH_CALM ((uint8_t)0x01)
+
+/* Bits definition for RTC_CALRL register*/
+#define RTC_CALRL_CALM ((uint8_t)0xFF)
+
+/* Bits definition for RTC_TCR1 register*/
+#define RTC_TCR1_TAMP3LEVEL ((uint8_t)0x40)
+#define RTC_TCR1_TAMP3E ((uint8_t)0x20)
+#define RTC_TCR1_TAMP2LEVEL ((uint8_t)0x10)
+#define RTC_TCR1_TAMP2E ((uint8_t)0x08)
+#define RTC_TCR1_TAMP1LEVEL ((uint8_t)0x04)
+#define RTC_TCR1_TAMP1E ((uint8_t)0x02)
+#define RTC_TCR1_TAMPIE ((uint8_t)0x01)
+
+/* Bits definition for RTC_TCR2 register*/
+#define RTC_TCR2_TAMPPUDIS ((uint8_t)0x80)
+#define RTC_TCR2_TAMPPRCH ((uint8_t)0x60)
+#define RTC_TCR2_TAMPFLT ((uint8_t)0x18)
+#define RTC_TCR2_TAMPFREQ ((uint8_t)0x07)
+
+
+/*RTC special defines */
+#define RTC_WPR_EnableKey ((uint8_t)0xFF)
+#define RTC_WPR_DisableKey1 ((uint8_t)0xCA)
+#define RTC_WPR_DisableKey2 ((uint8_t)0x53)
+
+/**
+ * @}
+ */
+
+/**
+ * @brief CSS on LSE registers.
+ */
+typedef struct CSSLSE_struct
+{
+ __IO uint8_t CSR; /*!< Control and Status Register*/
+}
+CSSLSE_TypeDef;
+
+/** @addtogroup CSSLSE_Registers_Reset_Value
+ * @{
+ */
+#define CSSLSE_CSR_RESET_VALUE ((uint8_t)0x00)
+
+/**
+ * @}
+ */
+
+/** @addtogroup CSSLSE_Registers_Bits_Definition
+ * @{
+ */
+
+/* Bits definition for CSSLSE_CSR register*/
+#define CSSLSE_CSR_SWITCHF ((uint8_t)0x10)
+#define CSSLSE_CSR_CSSF ((uint8_t)0x08)
+#define CSSLSE_CSR_CSSIE ((uint8_t)0x04)
+#define CSSLSE_CSR_SWITCHEN ((uint8_t)0x02)
+#define CSSLSE_CSR_CSSEN ((uint8_t)0x01)
+
+/**
+ * @}
+ */
+/*----------------------------------------------------------------------------*/
+/**
+ * @brief Beeper (BEEP) peripheral registers.
+ */
+
+typedef struct BEEP_struct
+{
+ __IO uint8_t CSR1; /*!< BEEP Control status register1 */
+ uint8_t RSERVED1;
+ uint8_t RESERVED2;
+ __IO uint8_t CSR2; /*!< BEEP Control status register2 */
+}
+BEEP_TypeDef;
+
+/** @addtogroup BEEP_Registers_Reset_Value
+ * @{
+ */
+#define BEEP_CSR1_RESET_VALUE ((uint8_t)0x00)
+#define BEEP_CSR2_RESET_VALUE ((uint8_t)0x1F)
+
+/**
+ * @}
+ */
+
+/** @addtogroup BEEP_Registers_Bits_Definition
+ * @{
+ */
+
+#define BEEP_CSR1_MSR ((uint8_t)0x01) /*!< Measurement enable mask */
+
+#define BEEP_CSR2_BEEPSEL ((uint8_t)0xC0) /*!< Beeper frequency selection mask */
+#define BEEP_CSR2_BEEPEN ((uint8_t)0x20) /*!< Beeper enable mask */
+#define BEEP_CSR2_BEEPDIV ((uint8_t)0x1F) /*!< Beeper Divider prescalar mask */
+
+/**
+ * @}
+ */
+
+/*----------------------------------------------------------------------------ok*/
+
+/**
+ * @brief Configuration Registers (CFG)
+ */
+
+typedef struct CFG_struct
+{
+ __IO uint8_t GCR; /*!< Global Configuration register */
+}
+CFG_TypeDef;
+
+/** @addtogroup CFG_Registers_Reset_Value
+ * @{
+ */
+
+#define CFG_GCR_RESET_VALUE ((uint8_t)0x00)
+
+/**
+ * @}
+ */
+
+/** @addtogroup CFG_Registers_Bits_Definition
+ * @{
+ */
+
+#define CFG_GCR_SWD ((uint8_t)0x01) /*!< Swim disable bit mask */
+#define CFG_GCR_AL ((uint8_t)0x02) /*!< Activation Level bit mask */
+
+/**
+ * @}
+ */
+/*----------------------------------------------------------------------------ok*/
+
+/**
+ * @brief SYSCFG
+ */
+
+typedef struct SYSCFG_struct
+{
+ __IO uint8_t RMPCR3; /*!< Remap control register 3 */
+ __IO uint8_t RMPCR1; /*!< Remap control register 1 */
+ __IO uint8_t RMPCR2; /*!< Remap control register 2 */
+}
+SYSCFG_TypeDef;
+
+/** @addtogroup SYSCFG_Registers_Reset_Value
+ * @{
+ */
+#define SYSCFG_RMPCR1_RESET_VALUE ((uint8_t)0x0C)
+#define SYSCFG_RMPCR2_RESET_VALUE ((uint8_t)0x00)
+#define SYSCFG_RMPCR3_RESET_VALUE ((uint8_t)0x00)
+
+/**
+ * @}
+ */
+
+/** @addtogroup SYSCFG_Registers_Bits_Definition
+ * @{
+ */
+
+/* For DMA Channel Mapping*/
+#define SYSCFG_RMPCR1_ADC1DMA_REMAP ((uint8_t)0x03) /*!< ADC1 DMA channel remapping */
+#define SYSCFG_RMPCR1_TIM4DMA_REMAP ((uint8_t)0x0C) /*!< TIM4 DMA channel remapping */
+
+
+/* For GPIO Reapping*/
+#define SYSCFG_RMPCR1_USART1TR_REMAP ((uint8_t)0x30) /*!< USART1_TX and USART1_RX remapping */
+#define SYSCFG_RMPCR1_USART1CK_REMAP ((uint8_t)0x40) /*!< USART1_CK remapping */
+#define SYSCFG_RMPCR1_SPI1_REMAP ((uint8_t)0x80) /*!< SPI1 remapping */
+
+#define SYSCFG_RMPCR2_ADC1TRIG_REMAP ((uint8_t)0x01) /*!< ADC1 External Trigger remap */
+#define SYSCFG_RMPCR2_TIM2TRIG_REMAP ((uint8_t)0x02) /*!< TIM2 Trigger remap */
+#define SYSCFG_RMPCR2_TIM3TRIG_REMAP1 ((uint8_t)0x04) /*!< TIM3 Trigger remap 1 */
+#define SYSCFG_RMPCR2_TIM2TRIG_LSE ((uint8_t)0x08) /*!< TIM2 Trigger remap to LSE */
+#define SYSCFG_RMPCR2_TIM3TRIG_LSE ((uint8_t)0x10) /*!< TIM3 Trigger remap to LSE */
+#define SYSCFG_RMPCR2_SPI2_REMAP ((uint8_t)0x20) /*!< SPI2 remapping */
+#define SYSCFG_RMPCR2_TIM3TRIG_REMAP2 ((uint8_t)0x40) /*!< TIM3 Trigger remap 2 */
+#define SYSCFG_RMPCR2_TIM23BKIN_REMAP ((uint8_t)0x80) /*!< TIM2 & TIM3 Break input remap */
+
+#define SYSCFG_RMPCR3_SPI1_REMAP ((uint8_t)0x01) /*!< SPI1 remapping */
+#define SYSCFG_RMPCR3_USART3TR_REMAP ((uint8_t)0x02) /*!< USART3_TX and USART3_RX remapping */
+#define SYSCFG_RMPCR3_USART3CK_REMAP ((uint8_t)0x04) /*!< USART3_CK remapping */
+#define SYSCFG_RMPCR3_TIM3CH1_REMAP ((uint8_t)0x08) /*!< TIM3 channel 1 remapping */
+#define SYSCFG_RMPCR3_TIM3CH2_REMAP ((uint8_t)0x10) /*!< TIM3 channel 2 remapping */
+#define SYSCFG_RMPCR3_CCO_REMAP ((uint8_t)0x20) /*!< CCO remapping */
+
+/**
+ * @}
+ */
+/*----------------------------------------------------------------------------ok*/
+
+/**
+ * @brief Clock Controller (CLK)
+ */
+typedef struct CLK_struct
+{
+ __IO uint8_t CKDIVR; /*!< Clock Master Divider Register */
+ __IO uint8_t CRTCR; /*!< RTC Clock selection Register */
+ __IO uint8_t ICKCR; /*!< Internal Clocks Control Register */
+ __IO uint8_t PCKENR1; /*!< Peripheral Clock Gating Register 1 */
+ __IO uint8_t PCKENR2; /*!< Peripheral Clock Gating Register 2 */
+ __IO uint8_t CCOR; /*!< Configurable Clock Output Register */
+ __IO uint8_t ECKCR; /*!< External Clocks Control Register */
+ __IO uint8_t SCSR; /*!< System clock status Register */
+ __IO uint8_t SWR; /*!< System clock Switch Register */
+ __IO uint8_t SWCR; /*!< Switch Control Register */
+ __IO uint8_t CSSR; /*!< Clock Security Sytem Register */
+ __IO uint8_t CBEEPR; /*!< Clock BEEP Register */
+ __IO uint8_t HSICALR; /*!< HSI Calibration Register */
+ __IO uint8_t HSITRIMR; /*!< HSI clock Calibration Trimmer Register */
+ __IO uint8_t HSIUNLCKR; /*!< HSI Unlock Register */
+ __IO uint8_t REGCSR; /*!< Main regulator control status register */
+ __IO uint8_t PCKENR3; /*!< Peripheral Clock Gating Register 3 */
+}
+CLK_TypeDef;
+
+/** @addtogroup CLK_Registers_Reset_Value
+ * @{
+ */
+#define CLK_CKDIVR_RESET_VALUE ((uint8_t)0x03)
+#define CLK_CRTCR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_ICKCR_RESET_VALUE ((uint8_t)0x11)
+#define CLK_PCKENR1_RESET_VALUE ((uint8_t)0x00)
+#define CLK_PCKENR2_RESET_VALUE ((uint8_t)0x80)
+#define CLK_PCKENR3_RESET_VALUE ((uint8_t)0x00)
+#define CLK_CCOR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_ECKCR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_SCSR_RESET_VALUE ((uint8_t)0x01)
+#define CLK_SWR_RESET_VALUE ((uint8_t)0x01)
+#define CLK_SWCR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_CSSR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_CBEEPR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_HSICALR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_HSITRIMR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_HSIUNLCKR_RESET_VALUE ((uint8_t)0x00)
+#define CLK_REGCSR_RESET_VALUE ((uint8_t)0xB9)
+/**
+ * @}
+ */
+
+/** @addtogroup CLK_Registers_Bits_Definition
+ * @{
+ */
+
+#define CLK_CKDIVR_CKM ((uint8_t)0x07) /*!< System clock prescaler mask */
+
+#define CLK_CRTCR_RTCDIV ((uint8_t)0xE0) /*!< RTC clock prescaler mask*/
+#define CLK_CRTCR_RTCSEL ((uint8_t)0x1E) /*!< RTC clock output selection mask */
+#define CLK_CRTCR_RTCSWBSY ((uint8_t)0x01) /*!< RTC clock switch busy */
+
+#define CLK_ICKCR_BEEPAHALT ((uint8_t)0x40) /*!< BEEP clock Active Halt/Halt mode */
+#define CLK_ICKCR_FHWU ((uint8_t)0x20) /*!< Fast Wake-up from Active Halt/Halt mode */
+#define CLK_ICKCR_SAHALT ((uint8_t)0x10) /*!< Slow Active-halt mode */
+#define CLK_ICKCR_LSIRDY ((uint8_t)0x08) /*!< Low speed internal RC oscillator ready */
+#define CLK_ICKCR_LSION ((uint8_t)0x04) /*!< Low speed internal RC oscillator enable */
+#define CLK_ICKCR_HSIRDY ((uint8_t)0x02) /*!< High speed internal RC oscillator ready */
+#define CLK_ICKCR_HSION ((uint8_t)0x01) /*!< High speed internal RC oscillator enable */
+
+#define CLK_PCKENR1_TIM2 ((uint8_t)0x01) /*!< Timer 2 clock enable */
+#define CLK_PCKENR1_TIM3 ((uint8_t)0x02) /*!< Timer 3 clock enable */
+#define CLK_PCKENR1_TIM4 ((uint8_t)0x04) /*!< Timer 4 clock enable */
+#define CLK_PCKENR1_I2C1 ((uint8_t)0x08) /*!< I2C1 clock enable */
+#define CLK_PCKENR1_SPI1 ((uint8_t)0x10) /*!< SPI1 clock enable */
+#define CLK_PCKENR1_USART1 ((uint8_t)0x20) /*!< USART1 clock enable */
+#define CLK_PCKENR1_BEEP ((uint8_t)0x40) /*!< BEEP clock enable */
+#define CLK_PCKENR1_DAC ((uint8_t)0x80) /*!< DAC clock enable */
+
+#define CLK_PCKENR2_ADC1 ((uint8_t)0x01) /*!< ADC1 clock enable */
+#define CLK_PCKENR2_TIM1 ((uint8_t)0x02) /*!< TIM1 clock enable */
+#define CLK_PCKENR2_RTC ((uint8_t)0x04) /*!< RTC clock enable */
+#define CLK_PCKENR2_LCD ((uint8_t)0x08) /*!< LCD clock enable */
+#define CLK_PCKENR2_DMA1 ((uint8_t)0x10) /*!< DMA1 clock enable */
+#define CLK_PCKENR2_COMP ((uint8_t)0x20) /*!< Comparator clock enable */
+#define CLK_PCKENR2_BOOTROM ((uint8_t)0x80) /*!< Boot ROM clock enable */
+
+#define CLK_PCKENR3_AES ((uint8_t)0x01) /*!< AES clock enable */
+#define CLK_PCKENR3_TIM5 ((uint8_t)0x02) /*!< Timer 5 clock enable */
+#define CLK_PCKENR3_SPI2 ((uint8_t)0x04) /*!< SPI2 clock enable */
+#define CLK_PCKENR3_UASRT2 ((uint8_t)0x08) /*!< USART2 clock enable */
+#define CLK_PCKENR3_USART3 ((uint8_t)0x10) /*!< USART3 clock enable */
+
+#define CLK_CCOR_CCODIV ((uint8_t)0xE0) /*!< Configurable Clock output prescaler */
+#define CLK_CCOR_CCOSEL ((uint8_t)0x1E) /*!< Configurable clock output selection */
+#define CLK_CCOR_CCOSWBSY ((uint8_t)0x01) /*!< Configurable clock output switch busy flag */
+
+#define CLK_ECKCR_LSEBYP ((uint8_t)0x20) /*!< Low speed external clock bypass */
+#define CLK_ECKCR_HSEBYP ((uint8_t)0x10) /*!< High speed external clock bypass */
+#define CLK_ECKCR_LSERDY ((uint8_t)0x08) /*!< Low speed external crystal oscillator ready */
+#define CLK_ECKCR_LSEON ((uint8_t)0x04) /*!< Low speed external crystal oscillator enable */
+#define CLK_ECKCR_HSERDY ((uint8_t)0x02) /*!< High speed external crystal oscillator ready */
+#define CLK_ECKCR_HSEON ((uint8_t)0x01) /*!< High speed external crystal oscillator enable */
+
+#define CLK_SCSR_CKM ((uint8_t)0x0F) /*!< System clock status bits */
+
+#define CLK_SWR_SWI ((uint8_t)0x0F) /*!< System clock selection bits */
+
+#define CLK_SWCR_SWIF ((uint8_t)0x08) /*!< Clock switch interrupt flag */
+#define CLK_SWCR_SWIEN ((uint8_t)0x04) /*!< Clock switch interrupt enable */
+#define CLK_SWCR_SWEN ((uint8_t)0x02) /*!< Switch start/stop */
+#define CLK_SWCR_SWBSY ((uint8_t)0x01) /*!< Switch busy */
+
+#define CLK_CSSR_CSSDGON ((uint8_t)0x10) /*!< Clock security sytem deglitcher system */
+#define CLK_CSSR_CSSD ((uint8_t)0x08) /*!< Clock security sytem detection */
+#define CLK_CSSR_CSSDIE ((uint8_t)0x04) /*!< Clock security system detection interrupt enable */
+#define CLK_CSSR_AUX ((uint8_t)0x02) /*!< Auxiliary oscillator connected to master clock */
+#define CLK_CSSR_CSSEN ((uint8_t)0x01) /*!< Clock security system enable */
+
+#define CLK_CBEEPR_CLKBEEPSEL ((uint8_t)0x06) /*!< Configurable BEEP clock source selection */
+#define CLK_CBEEPR_BEEPSWBSY ((uint8_t)0x01) /*!< BEEP clock busy in switch */
+
+#define CLK_HSICALR_HSICAL ((uint8_t)0xFF) /*!< Copy of otpion byte trimming HSI oscillator */
+
+#define CLK_HSITRIMR_HSITRIM ((uint8_t)0xFF) /*!< High speed internal oscillator trimmer */
+
+#define CLK_HSIUNLCKR_HSIUNLCK ((uint8_t)0xFF) /*!< High speed internal oscillator trimmer unlock */
+
+#define CLK_REGCSR_EEREADY ((uint8_t)0x80) /*!< Flash program memory and Data EEPROM ready */
+#define CLK_REGCSR_EEBUSY ((uint8_t)0x40) /*!< Flash program memory and Data EEPROM busy */
+#define CLK_REGCSR_LSEPD ((uint8_t)0x20) /*!< LSE power-down */
+#define CLK_REGCSR_HSEPD ((uint8_t)0x10) /*!< HSE power-down */
+#define CLK_REGCSR_LSIPD ((uint8_t)0x08) /*!< LSI power-down */
+#define CLK_REGCSR_HSIPD ((uint8_t)0x04) /*!< HSI power-down */
+#define CLK_REGCSR_REGOFF ((uint8_t)0x02) /*!< Main regulator OFF */
+#define CLK_REGCSR_REGREADY ((uint8_t)0x01) /*!< Main regulator ready */
+
+/**
+ * @}
+ */
+/*----------------------------------------------------------------------------ok*/
+
+/**
+ * @brief Comparator interface (COMP)
+ */
+
+typedef struct COMP_struct
+{
+ __IO uint8_t CSR1; /*!< Control status register 1 */
+ __IO uint8_t CSR2; /*!< Control status register 2 */
+ __IO uint8_t CSR3; /*!< Control status register 3 */
+ __IO uint8_t CSR4; /*!< Control status register 4 */
+ __IO uint8_t CSR5; /*!< Control status register 5 */
+}
+COMP_TypeDef;
+
+
+/** @addtogroup COMP_Registers_Reset_Value
+ * @{
+ */
+#define COMP_CSR1_RESET_VALUE ((uint8_t)0x00)
+#define COMP_CSR2_RESET_VALUE ((uint8_t)0x00)
+#define COMP_CSR3_RESET_VALUE ((uint8_t)0xC0)
+#define COMP_CSR4_RESET_VALUE ((uint8_t)0x00)
+#define COMP_CSR5_RESET_VALUE ((uint8_t)0x00)
+
+/**
+ * @}
+ */
+
+/** @addtogroup COMP_Registers_Bits_Definition
+ * @{
+ */
+
+/* CSR1 */
+#define COMP_CSR1_IE1 ((uint8_t)0x20) /*!< Comparator 1 Interrupt Enable Mask. */
+#define COMP_CSR1_EF1 ((uint8_t)0x10) /*!< Comparator 1 Event Flag Mask. */
+#define COMP_CSR1_CMP1OUT ((uint8_t)0x08) /*!< Comparator 1 Ouptput Mask. */
+#define COMP_CSR1_STE ((uint8_t)0x04) /*!< Schmitt trigger enable Mask. */
+#define COMP_CSR1_CMP1 ((uint8_t)0x03) /*!< Comparator 1 Configuration Mask. */
+
+/* CSR2 */
+#define COMP_CSR2_IE2 ((uint8_t)0x20) /*!< Comparator 2 Interrupt Enable Mask. */
+#define COMP_CSR2_EF2 ((uint8_t)0x10) /*!< Comparator 2 Event Flag Mask. */
+#define COMP_CSR2_CMP2OUT ((uint8_t)0x08) /*!< Comparator 2 Ouptput Mask. */
+#define COMP_CSR2_SPEED ((uint8_t)0x04) /*!< Comparator 2 speed modeMask. */
+#define COMP_CSR2_CMP2 ((uint8_t)0x03) /*!< Comparator 2 Configuration Mask. */
+
+/* CSR3 */
+#define COMP_CSR3_OUTSEL ((uint8_t)0xC0) /*!< Comparator 2 output selection Mask. */
+#define COMP_CSR3_INSEL ((uint8_t)0x38) /*!< Inversion input selection Mask. */
+#define COMP_CSR3_VREFEN ((uint8_t)0x04) /*!< Internal reference voltage Enable Mask. */
+#define COMP_CSR3_WNDWE ((uint8_t)0x02) /*!< Window Mode Enable Mask. */
+#define COMP_CSR3_VREFOUTEN ((uint8_t)0x01) /*!< VREF Output Enable Mask. */
+
+/* CSR4 */
+#define COMP_CSR4_NINVTRIG ((uint8_t)0x38) /*!< COMP2 non-inverting input Mask. */
+#define COMP_CSR4_INVTRIG ((uint8_t)0x07) /*!< COMP2 inverting input Mask. */
+
+/* CSR5 */
+#define COMP_CSR5_DACTRIG ((uint8_t)0x38) /*!< DAC outputs Mask. */
+#define COMP_CSR5_VREFTRIG ((uint8_t)0x07) /*!< VREF outputs Mask. */
+
+/**
+ * @}
+ */
+
+/*----------------------------------------------------------------------------ok*/
+
+/**
+ * @brief External Interrupt Controller (EXTI)
+ */
+typedef struct EXTI_struct
+{
+ __IO uint8_t CR1; /*!< The four LSB EXTI pin sensitivity */
+ __IO uint8_t CR2; /*!< The four MSB EXTI pin sensitivity */
+ __IO uint8_t CR3; /*!< EXTI port B & port D sensitivity */
+ __IO uint8_t SR1; /*!< Pins Status flag register 1 */
+ __IO uint8_t SR2; /*!< Ports Status flage register 2 */
+ __IO uint8_t CONF1; /*!< Port interrupt selector */
+ uint8_t RESERVED[4]; /*!< reserved area */
+ __IO uint8_t CR4; /*!< EXTI port G & port H sensitivity */
+ __IO uint8_t CONF2; /*!< Port interrupt selector */
+}
+EXTI_TypeDef;
+
+/** @addtogroup EXTI_Registers_Reset_Value
+ * @{
+ */
+
+#define EXTI_CR1_RESET_VALUE ((uint8_t)0x00)
+#define EXTI_CR2_RESET_VALUE ((uint8_t)0x00)
+#define EXTI_CR3_RESET_VALUE ((uint8_t)0x00)
+#define EXTI_CONF1_RESET_VALUE ((uint8_t)0x00)
+#define EXTI_SR1_RESET_VALUE ((uint8_t)0x00)
+#define EXTI_SR2_RESET_VALUE ((uint8_t)0x00)
+#define EXTI_CR4_RESET_VALUE ((uint8_t)0x00)
+#define EXTI_CONF2_RESET_VALUE ((uint8_t)0x00)
+
+/**
+ * @}
+ */
+
+/** @addtogroup EXTI_Registers_Bits_Definition
+ * @{
+ */
+/* CR1 */
+#define EXTI_CR1_P3IS ((uint8_t)0xC0) /*!< EXTI Pin 3 external interrupt sensitivity bit Mask */
+#define EXTI_CR1_P2IS ((uint8_t)0x30) /*!< EXTI Pin 2 external interrupt sensitivity bit Mask */
+#define EXTI_CR1_P1IS ((uint8_t)0x0C) /*!< EXTI Pin 1 external interrupt sensitivity bit Mask */
+#define EXTI_CR1_P0IS ((uint8_t)0x03) /*!< EXTI Pin 0 external interrupt sensitivity bit Mask */
+
+/* CR2 */
+#define EXTI_CR2_P7IS ((uint8_t)0xC0) /*!< EXTI Pin 7 external interrupt sensitivity bit Mask */
+#define EXTI_CR2_P6IS ((uint8_t)0x30) /*!< EXTI Pin 6 external interrupt sensitivity bit Mask */
+#define EXTI_CR2_P5IS ((uint8_t)0x0C) /*!< EXTI Pin 5 external interrupt sensitivity bit Mask */
+#define EXTI_CR2_P4IS ((uint8_t)0x03) /*!< EXTI Pin 4 external interrupt sensitivity bit Mask */
+
+/* CR3 */
+#define EXTI_CR3_PBIS ((uint8_t)0x03) /*!< EXTI PORTB external interrupt sensitivity bits Mask */
+#define EXTI_CR3_PDIS ((uint8_t)0x0C) /*!< EXTI PORTD external interrupt sensitivity bits Mask */
+#define EXTI_CR3_PEIS ((uint8_t)0x30) /*!< EXTI PORTE external interrupt sensitivity bits Mask */
+#define EXTI_CR3_PFIS ((uint8_t)0xC0) /*!< EXTI PORTF external interrupt sensitivity bits Mask */
+
+/* CONF1 */
+#define EXTI_CONF1_PBLIS ((uint8_t)0x01) /*!< EXTI PORTB low interrupt selector bit Mask */
+#define EXTI_CONF1_PBHIS ((uint8_t)0x02) /*!< EXTI PORTB high interrupt selector bit Mask */
+#define EXTI_CONF1_PDLIS ((uint8_t)0x04) /*!< EXTI PORTD low interrupt selector bit Mask */
+#define EXTI_CONF1_PDHIS ((uint8_t)0x08) /*!< EXTI PORTD high interrupt selector bit Mask */
+#define EXTI_CONF1_PELIS ((uint8_t)0x10) /*!< EXTI PORTE low interrupt selector bit Mask */
+#define EXTI_CONF1_PEHIS ((uint8_t)0x20) /*!< EXTI PORTE high interrupt selector bit Mask */
+#define EXTI_CONF1_PFLIS ((uint8_t)0x40) /*!< EXTI PORTF low interrupt selector bit Mask */
+#define EXTI_CONF1_PFES ((uint8_t)0x80) /*!< EXTI PORTF or PORTE interrupt selector bit Mask */
+
+/* CR4 */
+#define EXTI_CR4_PGIS ((uint8_t)0x03) /*!< EXTI PORTG external interrupt sensitivity bits Mask */
+#define EXTI_CR4_PHIS ((uint8_t)0x0C) /*!< EXTI PORTH external interrupt sensitivity bits Mask */
+
+/* CONF2 */
+#define EXTI_CONF2_PFHIS ((uint8_t)0x01) /*!< EXTI PORTF high interrupt selector bit Mask */
+#define EXTI_CONF2_PGLIS ((uint8_t)0x02) /*!< EXTI PORTG low interrupt selector bit Mask */
+#define EXTI_CONF2_PGHIS ((uint8_t)0x04) /*!< EXTI PORTG high interrupt selector bit Mask */
+#define EXTI_CONF2_PHLIS ((uint8_t)0x08) /*!< EXTI PORTH low interrupt selector bit Mask */
+#define EXTI_CONF2_PHHIS ((uint8_t)0x10) /*!< EXTI PORTH high interrupt selector bit Mask */
+#define EXTI_CONF2_PGBS ((uint8_t)0x20) /*!< EXTI PORTB or PORTG interrupt selector bit Mask */
+#define EXTI_CONF2_PHDS ((uint8_t)0x40) /*!< EXTI PORTD or PORTH interrupt selector bit Mask */
+
+/**
+ * @}
+ */
+
+/*----------------------------------------------------------------------------ok*/
+
+/**
+ * @brief FLASH and Data EEPROM
+ */
+typedef struct FLASH_struct
+{
+ __IO uint8_t CR1; /*!< Flash control register 1 */
+ __IO uint8_t CR2; /*!< Flash control register 2 */
+ __IO uint8_t PUKR; /*!< Flash program memory unprotection register */
+ __IO uint8_t DUKR; /*!< Data EEPROM unprotection register */
+ __IO uint8_t IAPSR; /*!< Flash in-application programming status register */
+}
+FLASH_TypeDef;
+
+/** @addtogroup FLASH_Registers_Reset_Value
+ * @{
+ */
+#define FLASH_CR1_RESET_VALUE ((uint8_t)0x00)
+#define FLASH_CR2_RESET_VALUE ((uint8_t)0x00)
+#define FLASH_PUKR_RESET_VALUE ((uint8_t)0xAE)
+#define FLASH_DUKR_RESET_VALUE ((uint8_t)0x56)
+#define FLASH_IAPSR_RESET_VALUE ((uint8_t)0x40)
+
+
+/**
+ * @}
+ */
+
+/** @addtogroup FLASH_Registers_Bits_Definition
+ * @{
+ */
+#define FLASH_CR1_EEPM ((uint8_t)0x08) /*!< Flash low power selection during Run and Low power run mode Mask */
+#define FLASH_CR1_WAITM ((uint8_t)0x04) /*!< Flash low power selection during Wait and Low power wait mode Mask */
+#define FLASH_CR1_IE ((uint8_t)0x02) /*!< Flash Interrupt enable Mask */
+#define FLASH_CR1_FIX ((uint8_t)0x01) /*!< Fix programming time Mask */
+
+#define FLASH_CR2_OPT ((uint8_t)0x80) /*!< Enable write access to option bytes*/
+#define FLASH_CR2_WPRG ((uint8_t)0x40) /*!< Word write once Mask */
+#define FLASH_CR2_ERASE ((uint8_t)0x20) /*!< Erase block Mask */
+#define FLASH_CR2_FPRG ((uint8_t)0x10) /*!< Fast programming mode Mask */
+#define FLASH_CR2_PRG ((uint8_t)0x01) /*!< Program block Mask */
+
+#define FLASH_IAPSR_HVOFF ((uint8_t)0x40) /*!< End of high voltage flag Mask */
+#define FLASH_IAPSR_DUL ((uint8_t)0x08) /*!< Data EEPROM unlocked flag Mask */
+#define FLASH_IAPSR_EOP ((uint8_t)0x04) /*!< End of operation flag Mask */
+#define FLASH_IAPSR_PUL ((uint8_t)0x02) /*!< Program memory unlocked flag Mask */
+#define FLASH_IAPSR_WR_PG_DIS ((uint8_t)0x01) /*!< Write attempted to protected page Mask */
+
+#define FLASH_PUKR_PUK ((uint8_t)0xFF) /*!< Flash Program memory unprotection mask */
+
+#define FLASH_DUKR_DUK ((uint8_t)0xFF) /*!< Data EEPROM unprotection mask */
+
+
+/**
+ * @}
+ */
+
+/*----------------------------------------------------------------------------*/
+
+/**
+ * @brief Inter-Integrated Circuit (I2C)
+ */
+typedef struct I2C_struct
+{
+ __IO uint8_t CR1; /*!< I2C control register 1 */
+ __IO uint8_t CR2; /*!< I2C control register 2 */
+ __IO uint8_t FREQR; /*!< I2C frequency register */
+ __IO uint8_t OARL; /*!< I2C own address register 1 LSB */
+ __IO uint8_t OARH; /*!< I2C own address register 1 MSB */
+ __IO uint8_t OAR2; /*!< I2C own address register 2 */
+ __IO uint8_t DR; /*!< I2C data register */
+ __IO uint8_t SR1; /*!< I2C status register 1 */
+ __IO uint8_t SR2; /*!< I2C status register 2 */
+ __IO uint8_t SR3; /*!< I2C status register 3 */
+ __IO uint8_t ITR; /*!< I2C interrupt & DMA register */
+ __IO uint8_t CCRL; /*!< I2C clock control register low */
+ __IO uint8_t CCRH; /*!< I2C clock control register high */
+ __IO uint8_t TRISER; /*!< I2C maximum rise time register */
+ __IO uint8_t PECR; /*!< I2CPacket Error Checking register */
+}
+I2C_TypeDef;
+
+/** @addtogroup I2C_Registers_Reset_Value
+ * @{
+ */
+#define I2C_CR1_RESET_VALUE ((uint8_t)0x00)
+#define I2C_CR2_RESET_VALUE ((uint8_t)0x00)
+#define I2C_FREQR_RESET_VALUE ((uint8_t)0x00)
+#define I2C_OARL_RESET_VALUE ((uint8_t)0x00)
+#define I2C_OARH_RESET_VALUE ((uint8_t)0x00)
+#define I2C_OAR2_RESET_VALUE ((uint8_t)0x00)
+#define I2C_DR_RESET_VALUE ((uint8_t)0x00)
+#define I2C_SR1_RESET_VALUE ((uint8_t)0x00)
+#define I2C_SR2_RESET_VALUE ((uint8_t)0x00)
+#define I2C_SR3_RESET_VALUE ((uint8_t)0x00)
+#define I2C_ITR_RESET_VALUE ((uint8_t)0x00)
+#define I2C_CCRL_RESET_VALUE ((uint8_t)0x00)
+#define I2C_CCRH_RESET_VALUE ((uint8_t)0x00)
+#define I2C_TRISER_RESET_VALUE ((uint8_t)0x02)
+#define I2C_PECR_RESET_VALUE ((uint8_t)0x00)
+
+/**
+ * @}
+ */
+
+/** @addtogroup I2C_Registers_Bits_Definition
+ * @{
+ */
+
+#define I2C_CR1_NOSTRETCH ((uint8_t)0x80) /*!< Clock Stretching Disable (Slave mode) */
+#define I2C_CR1_ENGC ((uint8_t)0x40) /*!< General Call Enable */
+#define I2C_CR1_ENPEC ((uint8_t)0x20) /*!< PEC Enable */
+#define I2C_CR1_ARP ((uint8_t)0x10) /*!< ARP Enable */
+#define I2C_CR1_SMBTYPE ((uint8_t)0x08) /*!< SMBus type */
+#define I2C_CR1_SMBUS ((uint8_t)0x02) /*!< SMBus mode */
+#define I2C_CR1_PE ((uint8_t)0x01) /*!< Peripheral Enable */
+
+#define I2C_CR2_SWRST ((uint8_t)0x80) /*!< Software Reset */
+#define I2C_CR2_ALERT ((uint8_t)0x20) /*!< SMBus Alert*/
+#define I2C_CR2_PEC ((uint8_t)0x10) /*!< Packet Error Checking */
+#define I2C_CR2_POS ((uint8_t)0x08) /*!< Acknowledge */
+#define I2C_CR2_ACK ((uint8_t)0x04) /*!< Acknowledge Enable */
+#define I2C_CR2_STOP ((uint8_t)0x02) /*!< Stop Generation */
+#define I2C_CR2_START ((uint8_t)0x01) /*!< Start Generation */
+
+#define I2C_FREQR_FREQ ((uint8_t)0x3F) /*!< Peripheral Clock Frequency */
+
+#define I2C_OARL_ADD ((uint8_t)0xFE) /*!< Interface Address bits [7..1] */
+#define I2C_OARL_ADD0 ((uint8_t)0x01) /*!< Interface Address bit0 */
+
+#define I2C_OARH_ADDMODE ((uint8_t)0x80) /*!< Addressing Mode (Slave mode) */
+#define I2C_OARH_ADDCONF ((uint8_t)0x40) /*!< Address mode configuration */
+#define I2C_OARH_ADD ((uint8_t)0x06) /*!< Interface Address bits [9..8] */
+
+#define I2C_OAR2_ADD2 ((uint8_t)0xFE) /*!< Interface Address bits [7..1] */
+#define I2C_OAR2_ENDUAL ((uint8_t)0x01) /*!< Dual addressing mode enable */
+
+#define I2C_DR_DR ((uint8_t)0xFF) /*!< Data Register */
+
+#define I2C_SR1_TXE ((uint8_t)0x80) /*!< Data Register Empty (transmitters) */
+#define I2C_SR1_RXNE ((uint8_t)0x40) /*!< Data Register not Empty (receivers) */
+#define I2C_SR1_STOPF ((uint8_t)0x10) /*!< Stop detection (Slave mode) */
+#define I2C_SR1_ADD10 ((uint8_t)0x08) /*!< 10-bit header sent (Master mode) */
+#define I2C_SR1_BTF ((uint8_t)0x04) /*!< Byte Transfer Finished */
+#define I2C_SR1_ADDR ((uint8_t)0x02) /*!< Address sent (master mode)/matched (slave mode) */
+#define I2C_SR1_SB ((uint8_t)0x01) /*!< Start Bit (Master mode) */
+
+#define I2C_SR2_SMBALERT ((uint8_t)0x80) /*!< SMBus Alert */
+#define I2C_SR2_TIMEOUT ((uint8_t)0x40) /*!< Time out or TLow error */
+#define I2C_SR2_WUFH ((uint8_t)0x20) /*!< Wake-up from Halt */
+#define I2C_SR2_PECERR ((uint8_t)0x10) /*!< PEC error in reception */
+#define I2C_SR2_OVR ((uint8_t)0x08) /*!< Overrun/Underrun */
+#define I2C_SR2_AF ((uint8_t)0x04) /*!< Acknowledge Failure */
+#define I2C_SR2_ARLO ((uint8_t)0x02) /*!< Arbitration Lost (master mode) */
+#define I2C_SR2_BERR ((uint8_t)0x01) /*!< Bus Error */
+
+#define I2C_SR3_DUALF ((uint8_t)0x80) /*!< Dual flag (Slave mode) */
+#define I2C_SR3_SMBHOST ((uint8_t)0x40) /*!< SMBus Host Header (Slave mode) */
+#define I2C_SR3_SMBDEFAULT ((uint8_t)0x20) /*!< SMBus Default Header (Slave mode) */
+#define I2C_SR3_GENCALL ((uint8_t)0x10) /*!< General Call Header (Slave mode) */
+#define I2C_SR3_TRA ((uint8_t)0x04) /*!< Transmitter/Receiver */
+#define I2C_SR3_BUSY ((uint8_t)0x02) /*!< Bus Busy */
+#define I2C_SR3_MSL ((uint8_t)0x01) /*!< Master/Slave */
+
+#define I2C_ITR_LAST ((uint8_t)0x10) /*!< DMA Last transfer */
+#define I2C_ITR_DMAEN ((uint8_t)0x08) /*!< DMA request Enable */
+#define I2C_ITR_ITBUFEN ((uint8_t)0x04) /*!< Buffer Interrupt Enable */
+#define I2C_ITR_ITEVTEN ((uint8_t)0x02) /*!< Event Interrupt Enable */
+#define I2C_ITR_ITERREN ((uint8_t)0x01) /*!< Error Interrupt Enable */
+
+#define I2C_CCRL_CCR ((uint8_t)0xFF) /*!< Clock Control Register (Master mode) */
+
+#define I2C_CCRH_FS ((uint8_t)0x80) /*!< Master Mode Selection */
+#define I2C_CCRH_DUTY ((uint8_t)0x40) /*!< Fast Mode Duty Cycle */
+#define I2C_CCRH_CCR ((uint8_t)0x0F) /*!< Clock Control Register in Fast/Standard mode (Master mode) bits [11..8] */
+
+#define I2C_TRISER_TRISE ((uint8_t)0x3F) /*!< Maximum Rise Time in Fast/Standard mode (Master mode) */
+
+#define I2C_PECR_PEC ((uint8_t)0xFF) /*!< Packet error checking */
+
+/**
+ * @}
+ */
+
+/*----------------------------------------------------------------------------*/
+
+/**
+ * @brief IR digital interface (IRTIM)
+ */
+typedef struct IRTIM_struct
+{
+ __IO uint8_t CR; /*!< control register */
+}
+IRTIM_TypeDef;
+/** @addtogroup IRTIM_Registers_Reset_Value
+ * @{
+ */
+#define IRTIM_CR_RESET_VALUE ((uint8_t)0x00)
+
+
+/**
+* @}
+*/
+
+/** @addtogroup IRTIM_Registers_Bits_Definition
+ * @{
+ */
+/* CR*/
+#define IRTIM_CR_EN ((uint8_t)0x01) /*!< IRTIM_OUT enable Mask. */
+#define IRTIM_CR_HSEN ((uint8_t)0x02) /*!< High sink open drain buffer enable Mask */
+
+/**
+ * @}
+ */
+
+/*----------------------------------------------------------------------------*/
+
+/**
+ * @brief Interrupt Controller (ITC)
+ */
+typedef struct ITC_struct
+{
+ __IO uint8_t ISPR1; /*!< Interrupt Software Priority register 1 */
+ __IO uint8_t ISPR2; /*!< Interrupt Software Priority register 2 */
+ __IO uint8_t ISPR3; /*!< Interrupt Software Priority register 3 */
+ __IO uint8_t ISPR4; /*!< Interrupt Software Priority register 4 */
+ __IO uint8_t ISPR5; /*!< Interrupt Software Priority register 5 */
+ __IO uint8_t ISPR6; /*!< Interrupt Software Priority register 6 */
+ __IO uint8_t ISPR7; /*!< Interrupt Software Priority register 7 */
+ __IO uint8_t ISPR8; /*!< Interrupt Software Priority register 8 */
+}
+ITC_TypeDef;
+
+/** @addtogroup ITC_Registers_Reset_Value
+ * @{
+ */
+#define ITC_SPRX_RESET_VALUE ((uint8_t)0xFF) /*!< Reset value of Software Priority registers 0 to 7 */
+/**
+ * @}
+ */
+
+/*----------------------------------------------------------------------------*/
+
+/**
+ * @brief Internal Low Speed Watchdog (IWDG)
+ */
+typedef struct IWDG_struct
+{
+ __IO uint8_t KR; /*!< Low Speed Watchdog Key Register */
+ __IO uint8_t PR; /*!< Low Speed Watchdog Prescaler Register */
+ __IO uint8_t RLR; /*!< Low Speed Watchdog Reload Register */
+}
+IWDG_TypeDef;
+
+/** @addtogroup IWDG_Registers_Reset_Value
+ * @{
+ */
+#define IWDG_RLR_RESET_VALUE ((uint8_t)0xFF) /*!
+ #define enableInterrupts() _rim_() /*!
+ #define enableInterrupts() __enable_interrupt() /* enable interrupts */
+ #define disableInterrupts() __disable_interrupt() /* disable interrupts */
+ #define rim() __enable_interrupt() /* enable interrupts */
+ #define sim() __disable_interrupt() /* disable interrupts */
+ #define nop() __no_operation() /* No Operation */
+ #define trap() __trap() /* Trap (soft IT) */
+ #define wfi() __wait_for_interrupt() /* Wait For Interrupt */
+ #define wfe() __wait_for_event(); /* Wait for event */
+ #define halt() __halt() /* Halt */
+#endif /* _RAISONANCE_ */
+
+/*============================== Interrupt vector Handling ========================*/
+
+#ifdef _COSMIC_
+ #define INTERRUPT_HANDLER(a,b) @far @interrupt void a(void)
+ #define INTERRUPT_HANDLER_TRAP(a) void @far @interrupt a(void)
+#endif /* _COSMIC_ */
+
+#ifdef _RAISONANCE_
+ #define INTERRUPT_HANDLER(a,b) void a(void) interrupt b
+ #define INTERRUPT_HANDLER_TRAP(a) void a(void) trap
+#endif /* _RAISONANCE_ */
+
+#ifdef _IAR_
+ #define STRINGVECTOR(x) #x
+ #define VECTOR_ID(x) STRINGVECTOR( vector = (x) )
+ #define INTERRUPT_HANDLER( a, b ) \
+ _Pragma( VECTOR_ID( (b)+2 ) ) \
+ __interrupt void (a)( void )
+ #define INTERRUPT_HANDLER_TRAP(a) \
+ _Pragma( VECTOR_ID( 1 ) ) \
+ __interrupt void (a) (void)
+#endif /* _IAR_ */
+
+/* SDCC patch: declare ISR handlers */
+#ifdef _SDCC_
+ #define INTERRUPT_HANDLER(a,b) void a(void) __interrupt(b)
+
+ /* traps require >=v3.4.3 -> else warn and skip */
+ #if SDCC_VERSION >= 30403
+ #define INTERRUPT_HANDLER_TRAP(a) void a(void) __trap
+ #else
+ #warning traps require SDCC>=v3.4.3. Update if required
+ #define INTERRUPT_HANDLER_TRAP(a) void a(void)
+ #endif
+
+#endif /* _SDCC_ */
+
+/*============================== Interrupt Handler declaration ========================*/
+#ifdef _COSMIC_
+ #define INTERRUPT @far @interrupt
+#elif defined(_IAR_)
+ #define INTERRUPT __interrupt
+#elif defined(_SDCC_) /* SDCC patch: doesn't work like that in SDCC -> skip */
+ #define INTERRUPT __interrupt
+ //#include "stm8s_it.h" /* must be included in main.c! */
+#endif /* _COSMIC_ */
+
+/*============================== Handling bits ====================================*/
+/*-----------------------------------------------------------------------------
+Method : I
+Description : Handle the bit from the character variables.
+Comments : The different parameters of commands are
+ - VAR : Name of the character variable where the bit is located.
+ - Place : Bit position in the variable (7 6 5 4 3 2 1 0)
+ - Value : Can be 0 (reset bit) or not 0 (set bit)
+ The "MskBit" command allows to select some bits in a source
+ variables and copy it in a destination var (return the value).
+ The "ValBit" command returns the value of a bit in a char
+ variable: the bit is reset if it returns 0 else the bit is set.
+ This method generates not an optimised code yet.
+-----------------------------------------------------------------------------*/
+#define SetBit(VAR,Place) ( (VAR) |= (uint8_t)((uint8_t)1<<(uint8_t)(Place)) )
+#define ClrBit(VAR,Place) ( (VAR) &= (uint8_t)((uint8_t)((uint8_t)1<<(uint8_t)(Place))^(uint8_t)255) )
+
+#define ChgBit(VAR,Place) ( (VAR) ^= (uint8_t)((uint8_t)1<<(uint8_t)(Place)) )
+#define AffBit(VAR,Place,Value) ((Value) ? \
+ ((VAR) |= ((uint8_t)1<<(Place))) : \
+ ((VAR) &= (((uint8_t)1<<(Place))^(uint8_t)255)))
+#define MskBit(Dest,Msk,Src) ( (Dest) = ((Msk) & (Src)) | ((~(Msk)) & (Dest)) )
+
+#define ValBit(VAR,Place) ((uint8_t)(VAR) & (uint8_t)((uint8_t)1<<(uint8_t)(Place)))
+
+#define BYTE_0(n) ((uint8_t)((n) & (uint8_t)0xFF)) /*!< Returns the low byte of the 32-bit value */
+#define BYTE_1(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)8))) /*!< Returns the second byte of the 32-bit value */
+#define BYTE_2(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)16))) /*!< Returns the third byte of the 32-bit value */
+#define BYTE_3(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)24))) /*!< Returns the high byte of the 32-bit value */
+
+/*============================== Assert Macros ====================================*/
+#define IS_STATE_VALUE(STATE) \
+ (((STATE) == SET) || \
+ ((STATE) == RESET))
+
+/*-----------------------------------------------------------------------------
+Method : II
+Description : Handle directly the bit.
+Comments : The idea is to handle directly with the bit name. For that, it is
+ necessary to have RAM area descriptions (example: HW register...)
+ and the following command line for each area.
+ This method generates the most optimized code.
+-----------------------------------------------------------------------------*/
+
+#define AREA 0x00 /* The area of bits begins at address 0x10. */
+
+#define BitClr(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) &= (~(1<<(7-(BIT)%8))) )
+#define BitSet(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) |= (1<<(7-(BIT)%8)) )
+#define BitVal(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) & (1<<(7-(BIT)%8)) )
+
+
+#endif /* __STM8L15x_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/inc/stm8l151x/inc/stm8l15x_adc.h b/firmware/inc/stm8l151x/inc/stm8l15x_adc.h
new file mode 100644
index 0000000..c79975c
--- /dev/null
+++ b/firmware/inc/stm8l151x/inc/stm8l15x_adc.h
@@ -0,0 +1,386 @@
+/**
+ ******************************************************************************
+ * @file stm8l15x_adc.h
+ * @author MCD Application Team
+ * @version V1.6.1
+ * @date 30-September-2014
+ * @brief This file contains all the functions prototypes for the ADC
+ * firmware library.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM8L15x_ADC_H
+#define __STM8L15x_ADC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm8l15x.h"
+
+/** @addtogroup STM8L15x_StdPeriph_Driver
+ * @{
+ */
+
+/** @addtogroup ADC
+ * @{
+ */
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup ADC_Exported_Types
+ * @{
+ */
+
+
+/** @defgroup ADC_Channels
+ * @{
+ */
+typedef enum
+{
+ ADC_Channel_0 = ((uint16_t)0x0301), /*!< Channel 00 */
+ ADC_Channel_1 = ((uint16_t)0x0302), /*!< Channel 01 */
+ ADC_Channel_2 = ((uint16_t)0x0304), /*!< Channel 02 */
+ ADC_Channel_3 = ((uint16_t)0x0308), /*!< Channel 03 */
+ ADC_Channel_4 = ((uint16_t)0x0310), /*!< Channel 04 */
+ ADC_Channel_5 = ((uint16_t)0x0320), /*!< Channel 05 */
+ ADC_Channel_6 = ((uint16_t)0x0340), /*!< Channel 06 */
+ ADC_Channel_7 = ((uint16_t)0x0380), /*!< Channel 07 */
+
+ ADC_Channel_8 = ((uint16_t)0x0201), /*!< Channel 08 */
+ ADC_Channel_9 = ((uint16_t)0x0202), /*!< Channel 09 */
+ ADC_Channel_10 = ((uint16_t)0x0204), /*!< Channel 10 */
+ ADC_Channel_11 = ((uint16_t)0x0208), /*!< Channel 11 */
+ ADC_Channel_12 = ((uint16_t)0x0210), /*!< Channel 12 */
+ ADC_Channel_13 = ((uint16_t)0x0220), /*!< Channel 13 */
+ ADC_Channel_14 = ((uint16_t)0x0240), /*!< Channel 14 */
+ ADC_Channel_15 = ((uint16_t)0x0280), /*!< Channel 15 */
+
+ ADC_Channel_16 = ((uint16_t)0x0101), /*!< Channel 16 */
+ ADC_Channel_17 = ((uint16_t)0x0102), /*!< Channel 17 */
+ ADC_Channel_18 = ((uint16_t)0x0104), /*!< Channel 18 */
+ ADC_Channel_19 = ((uint16_t)0x0108), /*!< Channel 19 */
+ ADC_Channel_20 = ((uint16_t)0x0110), /*!< Channel 20 */
+ ADC_Channel_21 = ((uint16_t)0x0120), /*!< Channel 21 */
+ ADC_Channel_22 = ((uint16_t)0x0140), /*!< Channel 22 */
+ ADC_Channel_23 = ((uint16_t)0x0180), /*!< Channel 23 */
+
+ ADC_Channel_24 = ((uint16_t)0x0001), /*!< Channel 24 */
+ ADC_Channel_25 = ((uint16_t)0x0002), /*!< Channel 25 */
+ ADC_Channel_26 = ((uint16_t)0x0004), /*!< Channel 26 */
+ ADC_Channel_27 = ((uint16_t)0x0008), /*!< Channel 27 */
+
+ ADC_Channel_Vrefint = ((uint16_t)0x0010), /*!< Vrefint Channel */
+ ADC_Channel_TempSensor = ((uint16_t)0x0020), /*!< Temperature sensor Channel */
+
+ /* combination*/
+ ADC_Channel_00To07 = ((uint16_t)0x03FF), /*!