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add spl, first tries programming

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seppl
2025-06-28 16:14:14 +02:00
parent 2155e2b176
commit 012355c2e8
104 changed files with 58111 additions and 3 deletions
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155
firmware/STM8L15X_LD/STM8L15X_LD.hex Normal file
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:00000001FF

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firmware/STM8L15X_LD/STM8L15X_LD.lk Normal file
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-muwx
-i ../STM8L15X_LD/STM8L15X_LD.hex
-b HOME = 0x8000
-b DATA = 0x0001
-k /opt/sdcc/bin/../share/sdcc/lib/stm8
-k /usr/local/share/sdcc/lib/stm8
-l stm8
-l stm8
../STM8L15X_LD/main.rel
../STM8L15X_LD/stm8l15x_it.rel
../STM8L15X_LD/stm8l15x_usart.rel
../STM8L15X_LD/stm8l15x_clk.rel
../STM8L15X_LD/stm8l15x_gpio.rel
../STM8L15X_LD/stm8l15x_rtc.rel
-e

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firmware/STM8L15X_LD/STM8L15X_LD.map Normal file
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ASxxxx Linker V03.00/V05.40 + sdld, page 1.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
. .ABS. 00000000 00000000 = 0. bytes (ABS,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
00000000 .__.ABS. _startup
00000000 l_CABS
00000000 l_DABS
00000000 l_DATA
00000000 l_INITIALIZED
00000000 l_INITIALIZER
00000000 l__CODE
00000000 s_CABS
00000000 s_DABS
00000000 s__CODE
00000001 l_SSEG
00000001 s_DATA
00000001 s_INITIALIZED
00000001 s_SSEG
00000003 l_GSFINAL
0000000B l_CONST
00000023 l_GSINIT
00000083 l_HOME
00001205 l_CODE
00008000 s_HOME
00008083 s_GSINIT
000080A6 s_GSFINAL
000080A9 s_CONST
000080B4 s_CODE
000080B4 s_INITIALIZER
ASxxxx Linker V03.00/V05.40 + sdld, page 2.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
SSEG 00000001 00000001 = 1. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
ASxxxx Linker V03.00/V05.40 + sdld, page 3.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
HOME 00008000 00000083 = 131. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
ASxxxx Linker V03.00/V05.40 + sdld, page 4.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
GSINIT 00008083 00000023 = 35. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
ASxxxx Linker V03.00/V05.40 + sdld, page 5.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
GSFINAL 000080A6 00000003 = 3. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
ASxxxx Linker V03.00/V05.40 + sdld, page 6.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CONST 000080A9 0000000B = 11. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
000080AF _SYSDivFactor stm8l15x_clk
ASxxxx Linker V03.00/V05.40 + sdld, page 7.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CODE 000080B4 00001205 = 4613. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
000080B4 _main main
0000818F _TRAP_IRQHandler stm8l15x_it
00008190 _FLASH_IRQHandler stm8l15x_it
00008191 _DMA1_CHANNEL0_1_IRQHandler stm8l15x_it
00008192 _DMA1_CHANNEL2_3_IRQHandler stm8l15x_it
00008193 _RTC_CSSLSE_IRQHandler stm8l15x_it
00008194 _EXTIE_F_PVD_IRQHandler stm8l15x_it
00008195 _EXTIB_G_IRQHandler stm8l15x_it
00008196 _EXTID_H_IRQHandler stm8l15x_it
00008197 _EXTI0_IRQHandler stm8l15x_it
00008198 _EXTI1_IRQHandler stm8l15x_it
00008199 _EXTI2_IRQHandler stm8l15x_it
0000819A _EXTI3_IRQHandler stm8l15x_it
0000819B _EXTI4_IRQHandler stm8l15x_it
0000819C _EXTI5_IRQHandler stm8l15x_it
0000819D _EXTI6_IRQHandler stm8l15x_it
0000819E _EXTI7_IRQHandler stm8l15x_it
0000819F _LCD_AES_IRQHandler stm8l15x_it
000081A0 _SWITCH_CSS_BREAK_DAC_IRQHandler stm8l15x_it
000081A1 _ADC1_COMP_IRQHandler stm8l15x_it
000081A2 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_ stm8l15x_it
000081A3 _TIM2_CC_USART2_RX_IRQHandler stm8l15x_it
000081A4 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_ stm8l15x_it
000081A5 _TIM3_CC_USART3_RX_IRQHandler stm8l15x_it
000081A6 _TIM1_UPD_OVF_TRG_COM_IRQHandler stm8l15x_it
000081A7 _TIM1_CC_IRQHandler stm8l15x_it
000081A8 _TIM4_UPD_OVF_TRG_IRQHandler stm8l15x_it
000081A9 _SPI1_IRQHandler stm8l15x_it
000081AA _USART1_TX_TIM5_UPD_OVF_TRG_BRK_ stm8l15x_it
000081AB _USART1_RX_TIM5_CC_IRQHandler stm8l15x_it
000081AC _I2C1_SPI2_IRQHandler stm8l15x_it
000081AD _USART_DeInit stm8l15x_usart
000081C4 _USART_Init stm8l15x_usart
00008241 _USART_ClockInit stm8l15x_usart
0000827B _USART_Cmd stm8l15x_usart
00008290 _USART_SetPrescaler stm8l15x_usart
00008295 _USART_SendBreak stm8l15x_usart
0000829D _USART_ReceiveData8 stm8l15x_usart
000082A0 _USART_ReceiveData9 stm8l15x_usart
000082BB _USART_SendData8 stm8l15x_usart
000082BE _USART_SendData9 stm8l15x_usart
000082E3 _USART_ReceiverWakeUpCmd stm8l15x_usart
000082F8 _USART_SetAddress stm8l15x_usart
00008307 _USART_WakeUpConfig stm8l15x_usart
00008316 _USART_HalfDuplexCmd stm8l15x_usart
0000832B _USART_SmartCardCmd stm8l15x_usart
00008340 _USART_SmartCardNACKCmd stm8l15x_usart
00008355 _USART_SetGuardTime stm8l15x_usart
0000835A _USART_IrDAConfig stm8l15x_usart
0000836F _USART_IrDACmd stm8l15x_usart
ASxxxx Linker V03.00/V05.40 + sdld, page 8.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CODE 000080B4 00001205 = 4613. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
00008384 _USART_DMACmd stm8l15x_usart
0000839E _USART_ITConfig stm8l15x_usart
0000842D _USART_GetFlagStatus stm8l15x_usart
00008455 _USART_ClearFlag stm8l15x_usart
00008461 _USART_GetITStatus stm8l15x_usart
000084F9 _USART_ClearITPendingBit stm8l15x_usart
00008502 _CLK_DeInit stm8l15x_clk
00008543 _CLK_HSICmd stm8l15x_clk
0000855B _CLK_AdjustHSICalibrationValue stm8l15x_clk
00008567 _CLK_LSICmd stm8l15x_clk
0000857F _CLK_HSEConfig stm8l15x_clk
00008594 _CLK_LSEConfig stm8l15x_clk
000085A9 _CLK_ClockSecuritySystemEnable stm8l15x_clk
000085AE _CLK_ClockSecuritySytemDeglitchC stm8l15x_clk
000085C6 _CLK_CCOConfig stm8l15x_clk
000085CE _CLK_SYSCLKSourceConfig stm8l15x_clk
000085D2 _CLK_GetSYSCLKSource stm8l15x_clk
000085D6 _CLK_GetClockFreq stm8l15x_clk
00008629 _CLK_SYSCLKDivConfig stm8l15x_clk
0000862D _CLK_SYSCLKSourceSwitchCmd stm8l15x_clk
00008645 _CLK_RTCClockConfig stm8l15x_clk
0000864D _CLK_BEEPClockConfig stm8l15x_clk
00008651 _CLK_PeripheralClockConfig stm8l15x_clk
000086B9 _CLK_LSEClockSecuritySystemEnabl stm8l15x_clk
000086BE _CLK_RTCCLKSwitchOnLSEFailureEna stm8l15x_clk
000086C3 _CLK_HaltConfig stm8l15x_clk
000086E1 _CLK_MainRegulatorCmd stm8l15x_clk
000086F9 _CLK_ITConfig stm8l15x_clk
0000875E _CLK_GetFlagStatus stm8l15x_clk
000087CC _CLK_ClearFlag stm8l15x_clk
000087D1 _CLK_GetITStatus stm8l15x_clk
0000880B _CLK_ClearITPendingBit stm8l15x_clk
0000881B _GPIO_DeInit stm8l15x_gpio
00008828 _GPIO_Init stm8l15x_gpio
000088A3 _GPIO_ExternalPullUpConfig stm8l15x_gpio
000088BD _GPIO_Write stm8l15x_gpio
000088BF _GPIO_WriteBit stm8l15x_gpio
000088D6 _GPIO_SetBits stm8l15x_gpio
000088DF _GPIO_ResetBits stm8l15x_gpio
000088EB _GPIO_ToggleBits stm8l15x_gpio
000088F4 _GPIO_ReadInputData stm8l15x_gpio
000088F7 _GPIO_ReadOutputData stm8l15x_gpio
000088F9 _GPIO_ReadInputDataBit stm8l15x_gpio
00008906 _GPIO_ReadOutputDataBit stm8l15x_gpio
00008912 _RTC_DeInit stm8l15x_rtc
000089DD _RTC_Init stm8l15x_rtc
00008A26 _RTC_StructInit stm8l15x_rtc
00008A36 _RTC_WriteProtectionCmd stm8l15x_rtc
00008A47 _RTC_EnterInitMode stm8l15x_rtc
00008A68 _RTC_ExitInitMode stm8l15x_rtc
00008A6D _RTC_WaitForSynchro stm8l15x_rtc
ASxxxx Linker V03.00/V05.40 + sdld, page 9.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
CODE 000080B4 00001205 = 4613. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
00008A99 _RTC_RatioCmd stm8l15x_rtc
00008ABD _RTC_BypassShadowCmd stm8l15x_rtc
00008AE1 _RTC_SetTime stm8l15x_rtc
00008B6D _RTC_TimeStructInit stm8l15x_rtc
00008B7A _RTC_GetTime stm8l15x_rtc
00008BCC _RTC_GetSubSecond stm8l15x_rtc
00008BDD _RTC_SetDate stm8l15x_rtc
00008C84 _RTC_DateStructInit stm8l15x_rtc
00008C98 _RTC_GetDate stm8l15x_rtc
00008CF1 _RTC_SetAlarm stm8l15x_rtc
00008DE9 _RTC_AlarmStructInit stm8l15x_rtc
00008E03 _RTC_GetAlarm stm8l15x_rtc
00008EB5 _RTC_AlarmCmd stm8l15x_rtc
00008EFD _RTC_AlarmSubSecondConfig stm8l15x_rtc
00008F38 _RTC_WakeUpClockConfig stm8l15x_rtc
00008F5D _RTC_SetWakeUpCounter stm8l15x_rtc
00008F72 _RTC_GetWakeUpCounter stm8l15x_rtc
00008F80 _RTC_WakeUpCmd stm8l15x_rtc
00008FBE _RTC_DayLightSavingConfig stm8l15x_rtc
00008FE5 _RTC_GetStoreOperation stm8l15x_rtc
00008FEB _RTC_OutputConfig stm8l15x_rtc
00009012 _RTC_SynchroShiftConfig stm8l15x_rtc
0000904D _RTC_SmoothCalibConfig stm8l15x_rtc
0000908F _RTC_CalibOutputConfig stm8l15x_rtc
000090B3 _RTC_CalibOutputCmd stm8l15x_rtc
000090D7 _RTC_TamperLevelConfig stm8l15x_rtc
00009101 _RTC_TamperFilterConfig stm8l15x_rtc
00009122 _RTC_TamperSamplingFreqConfig stm8l15x_rtc
00009143 _RTC_TamperPinsPrechargeDuration stm8l15x_rtc
00009164 _RTC_TamperCmd stm8l15x_rtc
0000918E _RTC_ITConfig stm8l15x_rtc
000091D6 _RTC_GetFlagStatus stm8l15x_rtc
000091FB _RTC_ClearFlag stm8l15x_rtc
00009208 _RTC_GetITStatus stm8l15x_rtc
0000922C _RTC_ClearITPendingBit stm8l15x_rtc
0000925C __divulong _divulong
000092B7 ___sdcc_external_startup _startup
ASxxxx Linker V03.00/V05.40 + sdld, page 10.
Files Linked [ module(s) ]
../STM8L15X_LD/main.rel [ main ]
../STM8L15X_LD/stm8l15x_it.rel [ stm8l15x_it ]
../STM8L15X_LD/stm8l15x_usart.rel [ stm8l15x_usart ]
../STM8L15X_LD/stm8l15x_clk.rel [ stm8l15x_clk ]
../STM8L15X_LD/stm8l15x_gpio.rel [ stm8l15x_gpio ]
../STM8L15X_LD/stm8l15x_rtc.rel [ stm8l15x_rtc ]
Libraries Linked [ object file ]
/opt/sdcc/bin/../share/sdcc/lib/stm8/stm8.lib
[ _divulong.rel ]
/opt/sdcc/bin/../share/sdcc/lib/stm8/stm8.lib
[ _startup.rel ]
ASxxxx Linker V03.00/V05.40 + sdld, page 11.
User Base Address Definitions
HOME = 0x8000
DATA = 0x0001

324
firmware/STM8L15X_LD/main.asm Normal file
View File

@@ -0,0 +1,324 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ISO C Compiler
; Version 4.5.0 #15242 (Linux)
;--------------------------------------------------------
.module main
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _main
.globl _USART_Cmd
.globl _USART_Init
.globl _GPIO_ResetBits
.globl _GPIO_SetBits
.globl _GPIO_Init
.globl _CLK_PeripheralClockConfig
.globl _CLK_SYSCLKSourceSwitchCmd
.globl _CLK_SYSCLKDivConfig
.globl _CLK_GetSYSCLKSource
.globl _CLK_SYSCLKSourceConfig
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area INITIALIZED
;--------------------------------------------------------
; Stack segment in internal ram
;--------------------------------------------------------
.area SSEG
__start__stack:
.ds 1
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area DABS (ABS)
; default segment ordering for linker
.area HOME
.area GSINIT
.area GSFINAL
.area CONST
.area INITIALIZER
.area CODE
;--------------------------------------------------------
; interrupt vector
;--------------------------------------------------------
.area HOME
__interrupt_vect:
int s_GSINIT ; reset
int _TRAP_IRQHandler ; trap
int 0x000000 ; int0
int _FLASH_IRQHandler ; int1
int _DMA1_CHANNEL0_1_IRQHandler ; int2
int _DMA1_CHANNEL2_3_IRQHandler ; int3
int _RTC_CSSLSE_IRQHandler ; int4
int _EXTIE_F_PVD_IRQHandler ; int5
int _EXTIB_G_IRQHandler ; int6
int _EXTID_H_IRQHandler ; int7
int _EXTI0_IRQHandler ; int8
int _EXTI1_IRQHandler ; int9
int _EXTI2_IRQHandler ; int10
int _EXTI3_IRQHandler ; int11
int _EXTI4_IRQHandler ; int12
int _EXTI5_IRQHandler ; int13
int _EXTI6_IRQHandler ; int14
int _EXTI7_IRQHandler ; int15
int _LCD_AES_IRQHandler ; int16
int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
int _ADC1_COMP_IRQHandler ; int18
int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
int _TIM2_CC_USART2_RX_IRQHandler ; int20
int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
int _TIM3_CC_USART3_RX_IRQHandler ; int22
int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
int _TIM1_CC_IRQHandler ; int24
int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
int _SPI1_IRQHandler ; int26
int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
int _USART1_RX_TIM5_CC_IRQHandler ; int28
int _I2C1_SPI2_IRQHandler ; int29
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME
.area GSINIT
.area GSFINAL
.area GSINIT
call ___sdcc_external_startup
tnz a
jreq __sdcc_init_data
jp __sdcc_program_startup
__sdcc_init_data:
; stm8_genXINIT() start
ldw x, #l_DATA
jreq 00002$
00001$:
clr (s_DATA - 1, x)
decw x
jrne 00001$
00002$:
ldw x, #l_INITIALIZER
jreq 00004$
00003$:
ld a, (s_INITIALIZER - 1, x)
ld (s_INITIALIZED - 1, x), a
decw x
jrne 00003$
00004$:
; stm8_genXINIT() end
.area GSFINAL
jp __sdcc_program_startup
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME
.area HOME
__sdcc_program_startup:
jp _main
; return from main will return to caller
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CODE
; ../src/main.c: 24: void main(void)
; -----------------------------------------
; function main
; -----------------------------------------
_main:
; ../src/main.c: 27: Led_Init;
push #0xc0
ld a, #0x10
ldw x, #0x500a
call _GPIO_Init
; ../src/main.c: 28: blink(1);
clrw x
incw x
call _blink
; ../src/main.c: 29: USART_Config();
call _USART_Config
; ../src/main.c: 30: println("Hello");
ldw x, #(___str_0+0)
call _println
; ../src/main.c: 31: while (1);
00102$:
jra 00102$
; ../src/main.c: 32: }
ret
; ../src/main.c: 34: static void CLK_Config(void)
; -----------------------------------------
; function CLK_Config
; -----------------------------------------
_CLK_Config:
; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
ld a, #0x01
call _CLK_SYSCLKSourceSwitchCmd
; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
ld a, #0x08
call _CLK_SYSCLKSourceConfig
; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
clr a
call _CLK_SYSCLKDivConfig
; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
00101$:
call _CLK_GetSYSCLKSource
cp a, #0x08
jrne 00101$
ret
jra 00101$
; ../src/main.c: 42: }
ret
; ../src/main.c: 44: static void blink(uint16_t repeats) {
; -----------------------------------------
; function blink
; -----------------------------------------
_blink:
sub sp, #4
ldw (0x01, sp), x
; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
clrw x
ldw (0x03, sp), x
00111$:
ldw x, (0x03, sp)
cpw x, (0x01, sp)
jrugt 00113$
; ../src/main.c: 46: Led_ON;
ld a, #0x10
ldw x, #0x500a
call _GPIO_SetBits
; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
clrw x
00105$:
ldw y, x
cpw y, #0x0fa0
jrugt 00101$
nop
incw x
jra 00105$
00101$:
; ../src/main.c: 48: Led_OFF;
ld a, #0x10
ldw x, #0x500a
call _GPIO_ResetBits
; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
clrw x
00108$:
ldw y, x
cpw y, #0x0fa0
jrugt 00112$
nop
incw x
jra 00108$
00112$:
; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
ldw x, (0x03, sp)
incw x
ldw (0x03, sp), x
jra 00111$
00113$:
; ../src/main.c: 51: }
addw sp, #4
ret
; ../src/main.c: 53: static void putchar(uint8_t Data) {
; -----------------------------------------
; function putchar
; -----------------------------------------
_putchar:
; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
00101$:
ldw x, #0x5230
push a
ld a, (x)
ld xh, a
pop a
tnzw x
jrpl 00101$
; ../src/main.c: 55: USART1->DR = Data;
ld 0x5231, a
; ../src/main.c: 56: }
ret
; ../src/main.c: 58: static void print(const char* s){
; -----------------------------------------
; function print
; -----------------------------------------
_print:
; ../src/main.c: 59: while (*s) {
00101$:
ld a, (x)
jrne 00121$
ret
00121$:
; ../src/main.c: 60: putchar(*s++);
incw x
pushw x
call _putchar
popw x
jra 00101$
; ../src/main.c: 62: }
ret
; ../src/main.c: 64: static void println(const char* s){
; -----------------------------------------
; function println
; -----------------------------------------
_println:
; ../src/main.c: 65: print(s);
call _print
; ../src/main.c: 66: putchar('\n');
ld a, #0x0a
; ../src/main.c: 67: }
jp _putchar
; ../src/main.c: 69: static void USART_Config(void)
; -----------------------------------------
; function USART_Config
; -----------------------------------------
_USART_Config:
; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
ld a, 0x509e
and a, #0xcf
ld 0x509e, a
; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
bset 0x509e, #4
; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
push #0xf0
ld a, #0x04
ldw x, #0x5000
call _GPIO_Init
; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
push #0x00
ld a, #0x08
ldw x, #0x5000
call _GPIO_Init
; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
push #0x01
ld a, #0x05
call _CLK_PeripheralClockConfig
; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
push #0x08
push #0x00
push #0x00
push #0x00
push #0x80
push #0x25
clrw x
pushw x
ldw x, #0x5230
call _USART_Init
; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
ld a, #0x01
ldw x, #0x5230
; ../src/main.c: 84: }
jp _USART_Cmd
.area CODE
.area CONST
.area CONST
___str_0:
.ascii "Hello"
.db 0x00
.area CODE
.area INITIALIZER
.area CABS (ABS)

324
firmware/STM8L15X_LD/main.lst Normal file
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@@ -0,0 +1,324 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module main
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _main
11 .globl _USART_Cmd
12 .globl _USART_Init
13 .globl _GPIO_ResetBits
14 .globl _GPIO_SetBits
15 .globl _GPIO_Init
16 .globl _CLK_PeripheralClockConfig
17 .globl _CLK_SYSCLKSourceSwitchCmd
18 .globl _CLK_SYSCLKDivConfig
19 .globl _CLK_GetSYSCLKSource
20 .globl _CLK_SYSCLKSourceConfig
21 ;--------------------------------------------------------
22 ; ram data
23 ;--------------------------------------------------------
24 .area DATA
25 ;--------------------------------------------------------
26 ; ram data
27 ;--------------------------------------------------------
28 .area INITIALIZED
29 ;--------------------------------------------------------
30 ; Stack segment in internal ram
31 ;--------------------------------------------------------
32 .area SSEG
000000 33 __start__stack:
000000 34 .ds 1
35
36 ;--------------------------------------------------------
37 ; absolute external ram data
38 ;--------------------------------------------------------
39 .area DABS (ABS)
40
41 ; default segment ordering for linker
42 .area HOME
43 .area GSINIT
44 .area GSFINAL
45 .area CONST
46 .area INITIALIZER
47 .area CODE
48
49 ;--------------------------------------------------------
50 ; interrupt vector
51 ;--------------------------------------------------------
52 .area HOME
000000 53 __interrupt_vect:
000000 82v00u00u00 54 int s_GSINIT ; reset
000004 82v00u00u00 55 int _TRAP_IRQHandler ; trap
000008 82 00 00 00 56 int 0x000000 ; int0
00000C 82v00u00u00 57 int _FLASH_IRQHandler ; int1
000010 82v00u00u00 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
000014 82v00u00u00 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
000018 82v00u00u00 60 int _RTC_CSSLSE_IRQHandler ; int4
00001C 82v00u00u00 61 int _EXTIE_F_PVD_IRQHandler ; int5
000020 82v00u00u00 62 int _EXTIB_G_IRQHandler ; int6
000024 82v00u00u00 63 int _EXTID_H_IRQHandler ; int7
000028 82v00u00u00 64 int _EXTI0_IRQHandler ; int8
00002C 82v00u00u00 65 int _EXTI1_IRQHandler ; int9
000030 82v00u00u00 66 int _EXTI2_IRQHandler ; int10
000034 82v00u00u00 67 int _EXTI3_IRQHandler ; int11
000038 82v00u00u00 68 int _EXTI4_IRQHandler ; int12
00003C 82v00u00u00 69 int _EXTI5_IRQHandler ; int13
000040 82v00u00u00 70 int _EXTI6_IRQHandler ; int14
000044 82v00u00u00 71 int _EXTI7_IRQHandler ; int15
000048 82v00u00u00 72 int _LCD_AES_IRQHandler ; int16
00004C 82v00u00u00 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
000050 82v00u00u00 74 int _ADC1_COMP_IRQHandler ; int18
000054 82v00u00u00 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
000058 82v00u00u00 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00005C 82v00u00u00 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
000060 82v00u00u00 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
000064 82v00u00u00 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
000068 82v00u00u00 80 int _TIM1_CC_IRQHandler ; int24
00006C 82v00u00u00 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
000070 82v00u00u00 82 int _SPI1_IRQHandler ; int26
000074 82v00u00u00 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
000078 82v00u00u00 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00007C 82v00u00u00 85 int _I2C1_SPI2_IRQHandler ; int29
86 ;--------------------------------------------------------
87 ; global & static initialisations
88 ;--------------------------------------------------------
89 .area HOME
90 .area GSINIT
91 .area GSFINAL
92 .area GSINIT
000000 CDr00r00 [ 4] 93 call ___sdcc_external_startup
000003 4D [ 1] 94 tnz a
000004 27 03 [ 1] 95 jreq __sdcc_init_data
000006 CCr00r80 [ 2] 96 jp __sdcc_program_startup
000009 97 __sdcc_init_data:
98 ; stm8_genXINIT() start
000009 AEr00r00 [ 2] 99 ldw x, #l_DATA
00000C 27 07 [ 1] 100 jreq 00002$
00000E 101 00001$:
00000E 72 4FuFFuFF [ 1] 102 clr (s_DATA - 1, x)
000012 5A [ 2] 103 decw x
000013 26 F9 [ 1] 104 jrne 00001$
000015 105 00002$:
000015 AEr00r00 [ 2] 106 ldw x, #l_INITIALIZER
000018 27 09 [ 1] 107 jreq 00004$
00001A 108 00003$:
00001A D6uFFuFF [ 1] 109 ld a, (s_INITIALIZER - 1, x)
00001D D7uFFuFF [ 1] 110 ld (s_INITIALIZED - 1, x), a
000020 5A [ 2] 111 decw x
000021 26 F7 [ 1] 112 jrne 00003$
000023 113 00004$:
114 ; stm8_genXINIT() end
115 .area GSFINAL
000000 CCr00r80 [ 2] 116 jp __sdcc_program_startup
117 ;--------------------------------------------------------
118 ; Home
119 ;--------------------------------------------------------
120 .area HOME
121 .area HOME
000080 122 __sdcc_program_startup:
000080 CCr00r00 [ 2] 123 jp _main
124 ; return from main will return to caller
125 ;--------------------------------------------------------
126 ; code
127 ;--------------------------------------------------------
128 .area CODE
129 ; ../src/main.c: 24: void main(void)
130 ; -----------------------------------------
131 ; function main
132 ; -----------------------------------------
000000 133 _main:
134 ; ../src/main.c: 27: Led_Init;
000000 4B C0 [ 1] 135 push #0xc0
000002 A6 10 [ 1] 136 ld a, #0x10
000004 AE 50 0A [ 2] 137 ldw x, #0x500a
000007 CDr00r00 [ 4] 138 call _GPIO_Init
139 ; ../src/main.c: 28: blink(1);
00000A 5F [ 1] 140 clrw x
00000B 5C [ 1] 141 incw x
00000C CDr00r34 [ 4] 142 call _blink
143 ; ../src/main.c: 29: USART_Config();
00000F CDr00r98 [ 4] 144 call _USART_Config
145 ; ../src/main.c: 30: println("Hello");
000012 AEr00r00 [ 2] 146 ldw x, #(___str_0+0)
000015 CDr00r90 [ 4] 147 call _println
148 ; ../src/main.c: 31: while (1);
000018 149 00102$:
000018 20 FE [ 2] 150 jra 00102$
151 ; ../src/main.c: 32: }
00001A 81 [ 4] 152 ret
153 ; ../src/main.c: 34: static void CLK_Config(void)
154 ; -----------------------------------------
155 ; function CLK_Config
156 ; -----------------------------------------
00001B 157 _CLK_Config:
158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
00001B A6 01 [ 1] 159 ld a, #0x01
00001D CDr00r00 [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
000020 A6 08 [ 1] 162 ld a, #0x08
000022 CDr00r00 [ 4] 163 call _CLK_SYSCLKSourceConfig
164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
000025 4F [ 1] 165 clr a
000026 CDr00r00 [ 4] 166 call _CLK_SYSCLKDivConfig
167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
000029 168 00101$:
000029 CDr00r00 [ 4] 169 call _CLK_GetSYSCLKSource
00002C A1 08 [ 1] 170 cp a, #0x08
00002E 26 F9 [ 1] 171 jrne 00101$
000030 81 [ 4] 172 ret
000031 20 F6 [ 2] 173 jra 00101$
174 ; ../src/main.c: 42: }
000033 81 [ 4] 175 ret
176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
177 ; -----------------------------------------
178 ; function blink
179 ; -----------------------------------------
000034 180 _blink:
000034 52 04 [ 2] 181 sub sp, #4
000036 1F 01 [ 2] 182 ldw (0x01, sp), x
183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
000038 5F [ 1] 184 clrw x
000039 1F 03 [ 2] 185 ldw (0x03, sp), x
00003B 186 00111$:
00003B 1E 03 [ 2] 187 ldw x, (0x03, sp)
00003D 13 01 [ 2] 188 cpw x, (0x01, sp)
00003F 22 31 [ 1] 189 jrugt 00113$
190 ; ../src/main.c: 46: Led_ON;
000041 A6 10 [ 1] 191 ld a, #0x10
000043 AE 50 0A [ 2] 192 ldw x, #0x500a
000046 CDr00r00 [ 4] 193 call _GPIO_SetBits
194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
000049 5F [ 1] 195 clrw x
00004A 196 00105$:
00004A 90 93 [ 1] 197 ldw y, x
00004C 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
000050 22 04 [ 1] 199 jrugt 00101$
000052 9D [ 1] 200 nop
000053 5C [ 1] 201 incw x
000054 20 F4 [ 2] 202 jra 00105$
000056 203 00101$:
204 ; ../src/main.c: 48: Led_OFF;
000056 A6 10 [ 1] 205 ld a, #0x10
000058 AE 50 0A [ 2] 206 ldw x, #0x500a
00005B CDr00r00 [ 4] 207 call _GPIO_ResetBits
208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
00005E 5F [ 1] 209 clrw x
00005F 210 00108$:
00005F 90 93 [ 1] 211 ldw y, x
000061 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
000065 22 04 [ 1] 213 jrugt 00112$
000067 9D [ 1] 214 nop
000068 5C [ 1] 215 incw x
000069 20 F4 [ 2] 216 jra 00108$
00006B 217 00112$:
218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
00006B 1E 03 [ 2] 219 ldw x, (0x03, sp)
00006D 5C [ 1] 220 incw x
00006E 1F 03 [ 2] 221 ldw (0x03, sp), x
000070 20 C9 [ 2] 222 jra 00111$
000072 223 00113$:
224 ; ../src/main.c: 51: }
000072 5B 04 [ 2] 225 addw sp, #4
000074 81 [ 4] 226 ret
227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
228 ; -----------------------------------------
229 ; function putchar
230 ; -----------------------------------------
000075 231 _putchar:
232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
000075 233 00101$:
000075 AE 52 30 [ 2] 234 ldw x, #0x5230
000078 88 [ 1] 235 push a
000079 F6 [ 1] 236 ld a, (x)
00007A 95 [ 1] 237 ld xh, a
00007B 84 [ 1] 238 pop a
00007C 5D [ 2] 239 tnzw x
00007D 2A F6 [ 1] 240 jrpl 00101$
241 ; ../src/main.c: 55: USART1->DR = Data;
00007F C7 52 31 [ 1] 242 ld 0x5231, a
243 ; ../src/main.c: 56: }
000082 81 [ 4] 244 ret
245 ; ../src/main.c: 58: static void print(const char* s){
246 ; -----------------------------------------
247 ; function print
248 ; -----------------------------------------
000083 249 _print:
250 ; ../src/main.c: 59: while (*s) {
000083 251 00101$:
000083 F6 [ 1] 252 ld a, (x)
000084 26 01 [ 1] 253 jrne 00121$
000086 81 [ 4] 254 ret
000087 255 00121$:
256 ; ../src/main.c: 60: putchar(*s++);
000087 5C [ 1] 257 incw x
000088 89 [ 2] 258 pushw x
000089 CDr00r75 [ 4] 259 call _putchar
00008C 85 [ 2] 260 popw x
00008D 20 F4 [ 2] 261 jra 00101$
262 ; ../src/main.c: 62: }
00008F 81 [ 4] 263 ret
264 ; ../src/main.c: 64: static void println(const char* s){
265 ; -----------------------------------------
266 ; function println
267 ; -----------------------------------------
000090 268 _println:
269 ; ../src/main.c: 65: print(s);
000090 CDr00r83 [ 4] 270 call _print
271 ; ../src/main.c: 66: putchar('\n');
000093 A6 0A [ 1] 272 ld a, #0x0a
273 ; ../src/main.c: 67: }
000095 CCr00r75 [ 2] 274 jp _putchar
275 ; ../src/main.c: 69: static void USART_Config(void)
276 ; -----------------------------------------
277 ; function USART_Config
278 ; -----------------------------------------
000098 279 _USART_Config:
280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
000098 C6 50 9E [ 1] 281 ld a, 0x509e
00009B A4 CF [ 1] 282 and a, #0xcf
00009D C7 50 9E [ 1] 283 ld 0x509e, a
284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
0000A0 72 18 50 9E [ 1] 285 bset 0x509e, #4
286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
0000A4 4B F0 [ 1] 287 push #0xf0
0000A6 A6 04 [ 1] 288 ld a, #0x04
0000A8 AE 50 00 [ 2] 289 ldw x, #0x5000
0000AB CDr00r00 [ 4] 290 call _GPIO_Init
291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
0000AE 4B 00 [ 1] 292 push #0x00
0000B0 A6 08 [ 1] 293 ld a, #0x08
0000B2 AE 50 00 [ 2] 294 ldw x, #0x5000
0000B5 CDr00r00 [ 4] 295 call _GPIO_Init
296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
0000B8 4B 01 [ 1] 297 push #0x01
0000BA A6 05 [ 1] 298 ld a, #0x05
0000BC CDr00r00 [ 4] 299 call _CLK_PeripheralClockConfig
300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
0000BF 4B 08 [ 1] 301 push #0x08
0000C1 4B 00 [ 1] 302 push #0x00
0000C3 4B 00 [ 1] 303 push #0x00
0000C5 4B 00 [ 1] 304 push #0x00
0000C7 4B 80 [ 1] 305 push #0x80
0000C9 4B 25 [ 1] 306 push #0x25
0000CB 5F [ 1] 307 clrw x
0000CC 89 [ 2] 308 pushw x
0000CD AE 52 30 [ 2] 309 ldw x, #0x5230
0000D0 CDr00r00 [ 4] 310 call _USART_Init
311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
0000D3 A6 01 [ 1] 312 ld a, #0x01
0000D5 AE 52 30 [ 2] 313 ldw x, #0x5230
314 ; ../src/main.c: 84: }
0000D8 CCr00r00 [ 2] 315 jp _USART_Cmd
316 .area CODE
317 .area CONST
318 .area CONST
000000 319 ___str_0:
000000 48 65 6C 6C 6F 320 .ascii "Hello"
000005 00 321 .db 0x00
322 .area CODE
323 .area INITIALIZER
324 .area CABS (ABS)

220
firmware/STM8L15X_LD/main.rel Normal file
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@@ -0,0 +1,220 @@
XH3
H C areas 31 global symbols
M main
S _GPIO_Init Ref000000
S _CLK_GetSYSCLKSource Ref000000
S _GPIO_ResetBits Ref000000
S _DMA1_CHANNEL0_1_IRQHandler Ref000000
S _SPI1_IRQHandler Ref000000
S _DMA1_CHANNEL2_3_IRQHandler Ref000000
S s_INITIALIZED Ref000000
S _EXTIB_G_IRQHandler Ref000000
S _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler Ref000000
S _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler Ref000000
S _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler Ref000000
S _EXTID_H_IRQHandler Ref000000
S l_INITIALIZER Ref000000
S _TIM2_CC_USART2_RX_IRQHandler Ref000000
S _EXTI0_IRQHandler Ref000000
S _EXTI1_IRQHandler Ref000000
S _I2C1_SPI2_IRQHandler Ref000000
S _USART1_RX_TIM5_CC_IRQHandler Ref000000
S _TIM3_CC_USART3_RX_IRQHandler Ref000000
S _EXTI2_IRQHandler Ref000000
S _EXTI3_IRQHandler Ref000000
S _EXTIE_F_PVD_IRQHandler Ref000000
S s_INITIALIZER Ref000000
S _EXTI4_IRQHandler Ref000000
S _FLASH_IRQHandler Ref000000
S _EXTI5_IRQHandler Ref000000
S _EXTI6_IRQHandler Ref000000
S _EXTI7_IRQHandler Ref000000
S .__.ABS. Def000000
S _TIM1_UPD_OVF_TRG_COM_IRQHandler Ref000000
S _TRAP_IRQHandler Ref000000
S s_GSINIT Ref000000
S _USART_Init Ref000000
S _USART_Cmd Ref000000
S _TIM4_UPD_OVF_TRG_IRQHandler Ref000000
S l_DATA Ref000000
S _CLK_PeripheralClockConfig Ref000000
S _TIM1_CC_IRQHandler Ref000000
S _CLK_SYSCLKSourceSwitchCmd Ref000000
S _CLK_SYSCLKDivConfig Ref000000
S _GPIO_SetBits Ref000000
S s_DATA Ref000000
S _SWITCH_CSS_BREAK_DAC_IRQHandler Ref000000
S ___sdcc_external_startup Ref000000
S _ADC1_COMP_IRQHandler Ref000000
S _LCD_AES_IRQHandler Ref000000
S _CLK_SYSCLKSourceConfig Ref000000
S _RTC_CSSLSE_IRQHandler Ref000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A SSEG size 1 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 83 flags 0 addr 0
A GSINIT size 23 flags 0 addr 0
A GSFINAL size 3 flags 0 addr 0
A CONST size 6 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size DB flags 0 addr 0
S _main Def000000
A CABS size 0 flags 8 addr 0
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 05
T 00 00 00 82 00 00 00 82 00 00 00 82 00 00 00 82
R 00 00 00 05 92 04 00 1F 92 08 00 1E
T 00 00 0D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 18 92 07 00 03
T 00 00 15 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 05 92 07 00 2F
T 00 00 1D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 15 92 07 00 07
T 00 00 25 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 0B 92 07 00 0E
T 00 00 2D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 0F 92 07 00 13
T 00 00 35 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 14 92 07 00 17
T 00 00 3D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 19 92 07 00 1A
T 00 00 45 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 1B 92 07 00 2D
T 00 00 4D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 2A 92 07 00 2C
T 00 00 55 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 08 92 07 00 0D
T 00 00 5D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 0A 92 07 00 12
T 00 00 65 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 1D 92 07 00 25
T 00 00 6D 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 22 92 07 00 04
T 00 00 75 00 00 00 82 00 00 00 82
R 00 00 00 05 92 03 00 09 92 07 00 11
T 00 00 7D 00 00 00
R 00 00 00 05 92 03 00 10
T 00 00 00 CD 00 00 4D 27 03 CC 00 80
R 00 00 00 06 02 04 00 2B 00 0A 00 05
T 00 00 09
R 00 00 00 06
T 00 00 09 AE 00 00 27 07
R 00 00 00 06 02 04 00 23
T 00 00 0E
R 00 00 00 06
T 00 00 0E 72 4F FF FF 5A 26 F9
R 00 00 00 06 12 05 00 29
T 00 00 15
R 00 00 00 06
T 00 00 15 AE 00 00 27 09
R 00 00 00 06 02 04 00 0C
T 00 00 1A
R 00 00 00 06
T 00 00 1A D6 FF FF D7 FF FF 5A 26 F7
R 00 00 00 06 12 04 00 16 12 07 00 06
T 00 00 23
R 00 00 00 06
T 00 00 00 CC 00 80
R 00 00 00 07 00 04 00 05
T 00 00 80
R 00 00 00 05
T 00 00 80 CC 00 00
R 00 00 00 05 00 04 00 0A
T 00 00 00
R 00 00 00 0A
T 00 00 00 4B C0 A6 10 AE 50 0A CD 00 00 5F 5C CD
R 00 00 00 0A 02 0B 00 00
T 00 00 0D 00 34 CD 00 98 AE
R 00 00 00 0A 00 03 00 0A 00 06 00 0A
T 00 00 13 00 00 CD 00 90
R 00 00 00 0A 00 03 00 08 00 06 00 0A
T 00 00 18
R 00 00 00 0A
T 00 00 18 20 FE 81
R 00 00 00 0A
T 00 00 1B
R 00 00 00 0A
T 00 00 1B A6 01 CD 00 00 A6 08 CD 00 00 4F CD
R 00 00 00 0A 02 06 00 26 02 0B 00 2E
T 00 00 27 00 00
R 00 00 00 0A 02 03 00 27
T 00 00 29
R 00 00 00 0A
T 00 00 29 CD 00 00 A1 08 26 F9 81 20 F6 81
R 00 00 00 0A 02 04 00 01
T 00 00 34
R 00 00 00 0A
T 00 00 34 52 04 1F 01 5F 1F 03
R 00 00 00 0A
T 00 00 3B
R 00 00 00 0A
T 00 00 3B 1E 03 13 01 22 31 A6 10 AE 50 0A CD
R 00 00 00 0A
T 00 00 47 00 00 5F
R 00 00 00 0A 02 03 00 28
T 00 00 4A
R 00 00 00 0A
T 00 00 4A 90 93 90 A3 0F A0 22 04 9D 5C 20 F4
R 00 00 00 0A
T 00 00 56
R 00 00 00 0A
T 00 00 56 A6 10 AE 50 0A CD 00 00 5F
R 00 00 00 0A 02 09 00 02
T 00 00 5F
R 00 00 00 0A
T 00 00 5F 90 93 90 A3 0F A0 22 04 9D 5C 20 F4
R 00 00 00 0A
T 00 00 6B
R 00 00 00 0A
T 00 00 6B 1E 03 5C 1F 03 20 C9
R 00 00 00 0A
T 00 00 72
R 00 00 00 0A
T 00 00 72 5B 04 81
R 00 00 00 0A
T 00 00 75
R 00 00 00 0A
T 00 00 75
R 00 00 00 0A
T 00 00 75 AE 52 30 88 F6 95 84 5D 2A F6 C7 52 31
R 00 00 00 0A
T 00 00 82 81
R 00 00 00 0A
T 00 00 83
R 00 00 00 0A
T 00 00 83
R 00 00 00 0A
T 00 00 83 F6 26 01 81
R 00 00 00 0A
T 00 00 87
R 00 00 00 0A
T 00 00 87 5C 89 CD 00 75 85 20 F4 81
R 00 00 00 0A 00 06 00 0A
T 00 00 90
R 00 00 00 0A
T 00 00 90 CD 00 83 A6 0A CC 00 75
R 00 00 00 0A 00 04 00 0A 00 09 00 0A
T 00 00 98
R 00 00 00 0A
T 00 00 98 C6 50 9E A4 CF C7 50 9E 72 18 50 9E 4B
R 00 00 00 0A
T 00 00 A5 F0 A6 04 AE 50 00 CD 00 00 4B 00 A6 08
R 00 00 00 0A 02 0A 00 00
T 00 00 B2 AE 50 00 CD 00 00 4B 01 A6 05 CD 00 00
R 00 00 00 0A 02 07 00 00 02 0E 00 24
T 00 00 BF 4B 08 4B 00 4B 00 4B 00 4B 80 4B 25 5F
R 00 00 00 0A
T 00 00 CC 89 AE 52 30 CD 00 00 A6 01 AE 52 30 CC
R 00 00 00 0A 02 08 00 20
T 00 00 D9 00 00
R 00 00 00 0A 02 03 00 21
T 00 00 00
R 00 00 00 08
T 00 00 00 48 65 6C 6C 6F 00
R 00 00 00 08

324
firmware/STM8L15X_LD/main.rst Normal file
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@@ -0,0 +1,324 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module main
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _main
11 .globl _USART_Cmd
12 .globl _USART_Init
13 .globl _GPIO_ResetBits
14 .globl _GPIO_SetBits
15 .globl _GPIO_Init
16 .globl _CLK_PeripheralClockConfig
17 .globl _CLK_SYSCLKSourceSwitchCmd
18 .globl _CLK_SYSCLKDivConfig
19 .globl _CLK_GetSYSCLKSource
20 .globl _CLK_SYSCLKSourceConfig
21 ;--------------------------------------------------------
22 ; ram data
23 ;--------------------------------------------------------
24 .area DATA
25 ;--------------------------------------------------------
26 ; ram data
27 ;--------------------------------------------------------
28 .area INITIALIZED
29 ;--------------------------------------------------------
30 ; Stack segment in internal ram
31 ;--------------------------------------------------------
32 .area SSEG
000001 33 __start__stack:
000001 34 .ds 1
35
36 ;--------------------------------------------------------
37 ; absolute external ram data
38 ;--------------------------------------------------------
39 .area DABS (ABS)
40
41 ; default segment ordering for linker
42 .area HOME
43 .area GSINIT
44 .area GSFINAL
45 .area CONST
46 .area INITIALIZER
47 .area CODE
48
49 ;--------------------------------------------------------
50 ; interrupt vector
51 ;--------------------------------------------------------
52 .area HOME
008000 53 __interrupt_vect:
008000 82 00 80 83 54 int s_GSINIT ; reset
008004 82 00 81 8F 55 int _TRAP_IRQHandler ; trap
008008 82 00 00 00 56 int 0x000000 ; int0
00800C 82 00 81 90 57 int _FLASH_IRQHandler ; int1
008010 82 00 81 91 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
008014 82 00 81 92 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
008018 82 00 81 93 60 int _RTC_CSSLSE_IRQHandler ; int4
00801C 82 00 81 94 61 int _EXTIE_F_PVD_IRQHandler ; int5
008020 82 00 81 95 62 int _EXTIB_G_IRQHandler ; int6
008024 82 00 81 96 63 int _EXTID_H_IRQHandler ; int7
008028 82 00 81 97 64 int _EXTI0_IRQHandler ; int8
00802C 82 00 81 98 65 int _EXTI1_IRQHandler ; int9
008030 82 00 81 99 66 int _EXTI2_IRQHandler ; int10
008034 82 00 81 9A 67 int _EXTI3_IRQHandler ; int11
008038 82 00 81 9B 68 int _EXTI4_IRQHandler ; int12
00803C 82 00 81 9C 69 int _EXTI5_IRQHandler ; int13
008040 82 00 81 9D 70 int _EXTI6_IRQHandler ; int14
008044 82 00 81 9E 71 int _EXTI7_IRQHandler ; int15
008048 82 00 81 9F 72 int _LCD_AES_IRQHandler ; int16
00804C 82 00 81 A0 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
008050 82 00 81 A1 74 int _ADC1_COMP_IRQHandler ; int18
008054 82 00 81 A2 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
008058 82 00 81 A3 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
00805C 82 00 81 A4 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
008060 82 00 81 A5 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
008064 82 00 81 A6 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
008068 82 00 81 A7 80 int _TIM1_CC_IRQHandler ; int24
00806C 82 00 81 A8 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
008070 82 00 81 A9 82 int _SPI1_IRQHandler ; int26
008074 82 00 81 AA 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
008078 82 00 81 AB 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
00807C 82 00 81 AC 85 int _I2C1_SPI2_IRQHandler ; int29
86 ;--------------------------------------------------------
87 ; global & static initialisations
88 ;--------------------------------------------------------
89 .area HOME
90 .area GSINIT
91 .area GSFINAL
92 .area GSINIT
008083 CD 92 B7 [ 4] 93 call ___sdcc_external_startup
008086 4D [ 1] 94 tnz a
008087 27 03 [ 1] 95 jreq __sdcc_init_data
008089 CC 80 80 [ 2] 96 jp __sdcc_program_startup
00808C 97 __sdcc_init_data:
98 ; stm8_genXINIT() start
00808C AE 00 00 [ 2] 99 ldw x, #l_DATA
00808F 27 07 [ 1] 100 jreq 00002$
008091 101 00001$:
008091 72 4F 00 00 [ 1] 102 clr (s_DATA - 1, x)
008095 5A [ 2] 103 decw x
008096 26 F9 [ 1] 104 jrne 00001$
008098 105 00002$:
008098 AE 00 00 [ 2] 106 ldw x, #l_INITIALIZER
00809B 27 09 [ 1] 107 jreq 00004$
00809D 108 00003$:
00809D D6 80 B3 [ 1] 109 ld a, (s_INITIALIZER - 1, x)
0080A0 D7 00 00 [ 1] 110 ld (s_INITIALIZED - 1, x), a
0080A3 5A [ 2] 111 decw x
0080A4 26 F7 [ 1] 112 jrne 00003$
0080A6 113 00004$:
114 ; stm8_genXINIT() end
115 .area GSFINAL
0080A6 CC 80 80 [ 2] 116 jp __sdcc_program_startup
117 ;--------------------------------------------------------
118 ; Home
119 ;--------------------------------------------------------
120 .area HOME
121 .area HOME
008080 122 __sdcc_program_startup:
008080 CC 80 B4 [ 2] 123 jp _main
124 ; return from main will return to caller
125 ;--------------------------------------------------------
126 ; code
127 ;--------------------------------------------------------
128 .area CODE
129 ; ../src/main.c: 24: void main(void)
130 ; -----------------------------------------
131 ; function main
132 ; -----------------------------------------
0080B4 133 _main:
134 ; ../src/main.c: 27: Led_Init;
0080B4 4B C0 [ 1] 135 push #0xc0
0080B6 A6 10 [ 1] 136 ld a, #0x10
0080B8 AE 50 0A [ 2] 137 ldw x, #0x500a
0080BB CD 88 28 [ 4] 138 call _GPIO_Init
139 ; ../src/main.c: 28: blink(1);
0080BE 5F [ 1] 140 clrw x
0080BF 5C [ 1] 141 incw x
0080C0 CD 80 E8 [ 4] 142 call _blink
143 ; ../src/main.c: 29: USART_Config();
0080C3 CD 81 4C [ 4] 144 call _USART_Config
145 ; ../src/main.c: 30: println("Hello");
0080C6 AE 80 A9 [ 2] 146 ldw x, #(___str_0+0)
0080C9 CD 81 44 [ 4] 147 call _println
148 ; ../src/main.c: 31: while (1);
0080CC 149 00102$:
0080CC 20 FE [ 2] 150 jra 00102$
151 ; ../src/main.c: 32: }
0080CE 81 [ 4] 152 ret
153 ; ../src/main.c: 34: static void CLK_Config(void)
154 ; -----------------------------------------
155 ; function CLK_Config
156 ; -----------------------------------------
0080CF 157 _CLK_Config:
158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
0080CF A6 01 [ 1] 159 ld a, #0x01
0080D1 CD 86 2D [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
0080D4 A6 08 [ 1] 162 ld a, #0x08
0080D6 CD 85 CE [ 4] 163 call _CLK_SYSCLKSourceConfig
164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
0080D9 4F [ 1] 165 clr a
0080DA CD 86 29 [ 4] 166 call _CLK_SYSCLKDivConfig
167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
0080DD 168 00101$:
0080DD CD 85 D2 [ 4] 169 call _CLK_GetSYSCLKSource
0080E0 A1 08 [ 1] 170 cp a, #0x08
0080E2 26 F9 [ 1] 171 jrne 00101$
0080E4 81 [ 4] 172 ret
0080E5 20 F6 [ 2] 173 jra 00101$
174 ; ../src/main.c: 42: }
0080E7 81 [ 4] 175 ret
176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
177 ; -----------------------------------------
178 ; function blink
179 ; -----------------------------------------
0080E8 180 _blink:
0080E8 52 04 [ 2] 181 sub sp, #4
0080EA 1F 01 [ 2] 182 ldw (0x01, sp), x
183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
0080EC 5F [ 1] 184 clrw x
0080ED 1F 03 [ 2] 185 ldw (0x03, sp), x
0080EF 186 00111$:
0080EF 1E 03 [ 2] 187 ldw x, (0x03, sp)
0080F1 13 01 [ 2] 188 cpw x, (0x01, sp)
0080F3 22 31 [ 1] 189 jrugt 00113$
190 ; ../src/main.c: 46: Led_ON;
0080F5 A6 10 [ 1] 191 ld a, #0x10
0080F7 AE 50 0A [ 2] 192 ldw x, #0x500a
0080FA CD 88 D6 [ 4] 193 call _GPIO_SetBits
194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
0080FD 5F [ 1] 195 clrw x
0080FE 196 00105$:
0080FE 90 93 [ 1] 197 ldw y, x
008100 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
008104 22 04 [ 1] 199 jrugt 00101$
008106 9D [ 1] 200 nop
008107 5C [ 1] 201 incw x
008108 20 F4 [ 2] 202 jra 00105$
00810A 203 00101$:
204 ; ../src/main.c: 48: Led_OFF;
00810A A6 10 [ 1] 205 ld a, #0x10
00810C AE 50 0A [ 2] 206 ldw x, #0x500a
00810F CD 88 DF [ 4] 207 call _GPIO_ResetBits
208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
008112 5F [ 1] 209 clrw x
008113 210 00108$:
008113 90 93 [ 1] 211 ldw y, x
008115 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
008119 22 04 [ 1] 213 jrugt 00112$
00811B 9D [ 1] 214 nop
00811C 5C [ 1] 215 incw x
00811D 20 F4 [ 2] 216 jra 00108$
00811F 217 00112$:
218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
00811F 1E 03 [ 2] 219 ldw x, (0x03, sp)
008121 5C [ 1] 220 incw x
008122 1F 03 [ 2] 221 ldw (0x03, sp), x
008124 20 C9 [ 2] 222 jra 00111$
008126 223 00113$:
224 ; ../src/main.c: 51: }
008126 5B 04 [ 2] 225 addw sp, #4
008128 81 [ 4] 226 ret
227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
228 ; -----------------------------------------
229 ; function putchar
230 ; -----------------------------------------
008129 231 _putchar:
232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
008129 233 00101$:
008129 AE 52 30 [ 2] 234 ldw x, #0x5230
00812C 88 [ 1] 235 push a
00812D F6 [ 1] 236 ld a, (x)
00812E 95 [ 1] 237 ld xh, a
00812F 84 [ 1] 238 pop a
008130 5D [ 2] 239 tnzw x
008131 2A F6 [ 1] 240 jrpl 00101$
241 ; ../src/main.c: 55: USART1->DR = Data;
008133 C7 52 31 [ 1] 242 ld 0x5231, a
243 ; ../src/main.c: 56: }
008136 81 [ 4] 244 ret
245 ; ../src/main.c: 58: static void print(const char* s){
246 ; -----------------------------------------
247 ; function print
248 ; -----------------------------------------
008137 249 _print:
250 ; ../src/main.c: 59: while (*s) {
008137 251 00101$:
008137 F6 [ 1] 252 ld a, (x)
008138 26 01 [ 1] 253 jrne 00121$
00813A 81 [ 4] 254 ret
00813B 255 00121$:
256 ; ../src/main.c: 60: putchar(*s++);
00813B 5C [ 1] 257 incw x
00813C 89 [ 2] 258 pushw x
00813D CD 81 29 [ 4] 259 call _putchar
008140 85 [ 2] 260 popw x
008141 20 F4 [ 2] 261 jra 00101$
262 ; ../src/main.c: 62: }
008143 81 [ 4] 263 ret
264 ; ../src/main.c: 64: static void println(const char* s){
265 ; -----------------------------------------
266 ; function println
267 ; -----------------------------------------
008144 268 _println:
269 ; ../src/main.c: 65: print(s);
008144 CD 81 37 [ 4] 270 call _print
271 ; ../src/main.c: 66: putchar('\n');
008147 A6 0A [ 1] 272 ld a, #0x0a
273 ; ../src/main.c: 67: }
008149 CC 81 29 [ 2] 274 jp _putchar
275 ; ../src/main.c: 69: static void USART_Config(void)
276 ; -----------------------------------------
277 ; function USART_Config
278 ; -----------------------------------------
00814C 279 _USART_Config:
280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
00814C C6 50 9E [ 1] 281 ld a, 0x509e
00814F A4 CF [ 1] 282 and a, #0xcf
008151 C7 50 9E [ 1] 283 ld 0x509e, a
284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
008154 72 18 50 9E [ 1] 285 bset 0x509e, #4
286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
008158 4B F0 [ 1] 287 push #0xf0
00815A A6 04 [ 1] 288 ld a, #0x04
00815C AE 50 00 [ 2] 289 ldw x, #0x5000
00815F CD 88 28 [ 4] 290 call _GPIO_Init
291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
008162 4B 00 [ 1] 292 push #0x00
008164 A6 08 [ 1] 293 ld a, #0x08
008166 AE 50 00 [ 2] 294 ldw x, #0x5000
008169 CD 88 28 [ 4] 295 call _GPIO_Init
296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
00816C 4B 01 [ 1] 297 push #0x01
00816E A6 05 [ 1] 298 ld a, #0x05
008170 CD 86 51 [ 4] 299 call _CLK_PeripheralClockConfig
300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
008173 4B 08 [ 1] 301 push #0x08
008175 4B 00 [ 1] 302 push #0x00
008177 4B 00 [ 1] 303 push #0x00
008179 4B 00 [ 1] 304 push #0x00
00817B 4B 80 [ 1] 305 push #0x80
00817D 4B 25 [ 1] 306 push #0x25
00817F 5F [ 1] 307 clrw x
008180 89 [ 2] 308 pushw x
008181 AE 52 30 [ 2] 309 ldw x, #0x5230
008184 CD 81 C4 [ 4] 310 call _USART_Init
311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
008187 A6 01 [ 1] 312 ld a, #0x01
008189 AE 52 30 [ 2] 313 ldw x, #0x5230
314 ; ../src/main.c: 84: }
00818C CC 82 7B [ 2] 315 jp _USART_Cmd
316 .area CODE
317 .area CONST
318 .area CONST
0080A9 319 ___str_0:
0080A9 48 65 6C 6C 6F 320 .ascii "Hello"
0080AE 00 321 .db 0x00
322 .area CODE
323 .area INITIALIZER
324 .area CABS (ABS)

92
firmware/STM8L15X_LD/main.sym Normal file
View File

@@ -0,0 +1,92 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
_ADC1_COMP_IRQHandler ****** GX
A _CLK_Config 00001B R
_CLK_GetSYSCLKSource ****** GX
_CLK_PeripheralClockConfig ****** GX
_CLK_SYSCLKDivConfig ****** GX
_CLK_SYSCLKSourceConfig ****** GX
_CLK_SYSCLKSourceSwitchCmd ****** GX
_DMA1_CHANNEL0_1_IRQHandler ****** GX
_DMA1_CHANNEL2_3_IRQHandler ****** GX
_EXTI0_IRQHandler ****** GX
_EXTI1_IRQHandler ****** GX
_EXTI2_IRQHandler ****** GX
_EXTI3_IRQHandler ****** GX
_EXTI4_IRQHandler ****** GX
_EXTI5_IRQHandler ****** GX
_EXTI6_IRQHandler ****** GX
_EXTI7_IRQHandler ****** GX
_EXTIB_G_IRQHandler ****** GX
_EXTID_H_IRQHandler ****** GX
_EXTIE_F_PVD_IRQHandler ****** GX
_FLASH_IRQHandler ****** GX
_GPIO_Init ****** GX
_GPIO_ResetBits ****** GX
_GPIO_SetBits ****** GX
_I2C1_SPI2_IRQHandler ****** GX
_LCD_AES_IRQHandler ****** GX
_RTC_CSSLSE_IRQHandler ****** GX
_SPI1_IRQHandler ****** GX
_SWITCH_CSS_BREAK_DAC_IRQHandler ****** GX
_TIM1_CC_IRQHandler ****** GX
_TIM1_UPD_OVF_TRG_COM_IRQHandler ****** GX
_TIM2_CC_USART2_RX_IRQHandler ****** GX
_TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ****** GX
_TIM3_CC_USART3_RX_IRQHandler ****** GX
_TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ****** GX
_TIM4_UPD_OVF_TRG_IRQHandler ****** GX
_TRAP_IRQHandler ****** GX
_USART1_RX_TIM5_CC_IRQHandler ****** GX
_USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ****** GX
_USART_Cmd ****** GX
A _USART_Config 000098 R
_USART_Init ****** GX
___sdcc_external_startup ****** GX
8 ___str_0 000000 R
5 __interrupt_vect 000000 R
6 __sdcc_init_data 000009 R
5 __sdcc_program_startup 000080 R
3 __start__stack 000000 R
A _blink 000034 R
A _main 000000 GR
A _print 000083 R
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Symbol Table
A _println 000090 R
A _putchar 000075 R
l_DATA ****** GX
l_INITIALIZER ****** GX
s_DATA ****** GX
s_GSINIT ****** GX
s_INITIALIZED ****** GX
s_INITIALIZER ****** GX
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 3
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 SSEG size 1 flags 0
4 DABS size 0 flags 8
5 HOME size 83 flags 0
6 GSINIT size 23 flags 0
7 GSFINAL size 3 flags 0
8 CONST size 6 flags 0
9 INITIALIZER size 0 flags 0
A CODE size DB flags 0
B CABS size 0 flags 8

823
firmware/STM8L15X_LD/stm8l15x_clk.asm Normal file
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@@ -0,0 +1,823 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ISO C Compiler
; Version 4.5.0 #15242 (Linux)
;--------------------------------------------------------
.module stm8l15x_clk
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _SYSDivFactor
.globl _CLK_DeInit
.globl _CLK_HSICmd
.globl _CLK_AdjustHSICalibrationValue
.globl _CLK_LSICmd
.globl _CLK_HSEConfig
.globl _CLK_LSEConfig
.globl _CLK_ClockSecuritySystemEnable
.globl _CLK_ClockSecuritySytemDeglitchCmd
.globl _CLK_CCOConfig
.globl _CLK_SYSCLKSourceConfig
.globl _CLK_GetSYSCLKSource
.globl _CLK_GetClockFreq
.globl _CLK_SYSCLKDivConfig
.globl _CLK_SYSCLKSourceSwitchCmd
.globl _CLK_RTCClockConfig
.globl _CLK_BEEPClockConfig
.globl _CLK_PeripheralClockConfig
.globl _CLK_LSEClockSecuritySystemEnable
.globl _CLK_RTCCLKSwitchOnLSEFailureEnable
.globl _CLK_HaltConfig
.globl _CLK_MainRegulatorCmd
.globl _CLK_ITConfig
.globl _CLK_GetFlagStatus
.globl _CLK_ClearFlag
.globl _CLK_GetITStatus
.globl _CLK_ClearITPendingBit
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area INITIALIZED
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area DABS (ABS)
; default segment ordering for linker
.area HOME
.area GSINIT
.area GSFINAL
.area CONST
.area INITIALIZER
.area CODE
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME
.area GSINIT
.area GSFINAL
.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME
.area HOME
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CODE
; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void)
; -----------------------------------------
; function CLK_DeInit
; -----------------------------------------
_CLK_DeInit:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE;
mov 0x50c2+0, #0x11
; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE;
mov 0x50c6+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE;
mov 0x50c1+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE;
mov 0x50cb+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE;
mov 0x50c8+0, #0x01
; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE;
mov 0x50c9+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
mov 0x50c0+0, #0x03
; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
mov 0x50c3+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
mov 0x50c4+0, #0x80
; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE;
mov 0x50d0+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE;
mov 0x50ca+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE;
mov 0x50c5+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
mov 0x50cd+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE;
mov 0x50cc+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE;
mov 0x50ce+0, #0x00
; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE;
mov 0x50cf+0, #0xb9
; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState)
; -----------------------------------------
; function CLK_HSICmd
; -----------------------------------------
_CLK_HSICmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
ld a, 0x50c2
; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
or a, #0x01
ld 0x50c2, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION);
and a, #0xfe
ld 0x50c2, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue)
; -----------------------------------------
; function CLK_AdjustHSICalibrationValue
; -----------------------------------------
_CLK_AdjustHSICalibrationValue:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC;
mov 0x50ce+0, #0xac
; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35;
mov 0x50ce+0, #0x35
; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue;
ld 0x50cd, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState)
; -----------------------------------------
; function CLK_LSICmd
; -----------------------------------------
_CLK_LSICmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
ld a, 0x50c2
; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
or a, #0x04
ld 0x50c2, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION);
and a, #0xfb
ld 0x50c2, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE)
; -----------------------------------------
; function CLK_HSEConfig
; -----------------------------------------
_CLK_HSEConfig:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON;
bres 0x50c6, #0
; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP;
bres 0x50c6, #4
; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE;
ld a, 0x50c6
or a, (0x01, sp)
ld 0x50c6, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE)
; -----------------------------------------
; function CLK_LSEConfig
; -----------------------------------------
_CLK_LSEConfig:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON;
bres 0x50c6, #2
; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP;
bres 0x50c6, #5
; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE;
ld a, 0x50c6
or a, (0x01, sp)
ld 0x50c6, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void)
; -----------------------------------------
; function CLK_ClockSecuritySystemEnable
; -----------------------------------------
_CLK_ClockSecuritySystemEnable:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN;
bset 0x50ca, #0
; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState)
; -----------------------------------------
; function CLK_ClockSecuritySytemDeglitchCmd
; -----------------------------------------
_CLK_ClockSecuritySytemDeglitchCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
ld a, 0x50ca
; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
or a, #0x10
ld 0x50ca, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON);
and a, #0xef
ld 0x50ca, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv)
; -----------------------------------------
; function CLK_CCOConfig
; -----------------------------------------
_CLK_CCOConfig:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv);
or a, (0x03, sp)
ld 0x50c5, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: }
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
; -----------------------------------------
; function CLK_SYSCLKSourceConfig
; -----------------------------------------
_CLK_SYSCLKSourceConfig:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource;
ld 0x50c8, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
; -----------------------------------------
; function CLK_GetSYSCLKSource
; -----------------------------------------
_CLK_GetSYSCLKSource:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
ld a, 0x50c7
; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void)
; -----------------------------------------
; function CLK_GetClockFreq
; -----------------------------------------
_CLK_GetClockFreq:
sub sp, #8
; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0;
clrw x
ldw (0x03, sp), x
ldw (0x01, sp), x
; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;
ld a, 0x50c7
; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI)
cp a, #0x01
jrne 00108$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE;
ldw x, #0x2400
ldw (0x03, sp), x
ldw x, #0x00f4
ldw (0x01, sp), x
jra 00109$
00108$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI)
cp a, #0x02
jrne 00105$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE;
ldw x, #0x9470
ldw (0x03, sp), x
clrw x
ldw (0x01, sp), x
jra 00109$
00105$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE)
cp a, #0x04
jrne 00109$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE;
ldw x, #0x2400
ldw (0x03, sp), x
ldw x, #0x00f4
ldw (0x01, sp), x
; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE;
00109$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
ld a, 0x50c0
and a, #0x07
; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp];
clrw x
ld xl, a
ld a, (_SYSDivFactor+0, x)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc;
clrw x
clr (0x05, sp)
push a
pushw x
clr a
push a
ldw x, (0x07, sp)
pushw x
ldw x, (0x07, sp)
pushw x
; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency);
call __divulong
; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: }
addw sp, #16
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
; -----------------------------------------
; function CLK_SYSCLKDivConfig
; -----------------------------------------
_CLK_SYSCLKDivConfig:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
ld 0x50c0, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
; -----------------------------------------
; function CLK_SYSCLKSourceSwitchCmd
; -----------------------------------------
_CLK_SYSCLKSourceSwitchCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
ld a, 0x50c9
; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
or a, #0x02
ld 0x50c9, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
and a, #0xfd
ld 0x50c9, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
; -----------------------------------------
; function CLK_RTCClockConfig
; -----------------------------------------
_CLK_RTCClockConfig:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
or a, (0x03, sp)
ld 0x50c1, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: }
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
; -----------------------------------------
; function CLK_BEEPClockConfig
; -----------------------------------------
_CLK_BEEPClockConfig:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);
ld 0x50cb, a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
; -----------------------------------------
; function CLK_PeripheralClockConfig
; -----------------------------------------
_CLK_PeripheralClockConfig:
pushw x
; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);
push a
and a, #0xf0
ld xl, a
pop a
ldw y, x
; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
and a, #0x0f
push a
ld a, #0x01
ld (0x02, sp), a
pop a
tnz a
jreq 00154$
00153$:
sll (0x01, sp)
dec a
jrne 00153$
00154$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
ld a, (0x01, sp)
cpl a
ld (0x02, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00)
ld a, xl
tnz a
jrne 00114$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
ld a, 0x50c3
; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE)
tnz (0x05, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
or a, (0x01, sp)
ld 0x50c3, a
jra 00116$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
and a, (0x02, sp)
ld 0x50c3, a
jra 00116$
00114$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10)
ld a, yl
cp a, #0x10
jrne 00111$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
ld a, 0x50c4
; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE)
tnz (0x05, sp)
jreq 00105$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
or a, (0x01, sp)
ld 0x50c4, a
jra 00116$
00105$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
and a, (0x02, sp)
ld 0x50c4, a
jra 00116$
00111$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
ld a, 0x50d0
; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE)
tnz (0x05, sp)
jreq 00108$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
or a, (0x01, sp)
ld 0x50d0, a
jra 00116$
00108$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
and a, (0x02, sp)
ld 0x50d0, a
00116$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: }
popw x
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void)
; -----------------------------------------
; function CLK_LSEClockSecuritySystemEnable
; -----------------------------------------
_CLK_LSEClockSecuritySystemEnable:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
bset 0x5190, #0
; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
; -----------------------------------------
; function CLK_RTCCLKSwitchOnLSEFailureEnable
; -----------------------------------------
_CLK_RTCCLKSwitchOnLSEFailureEnable:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
bset 0x5190, #1
; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
; -----------------------------------------
; function CLK_HaltConfig
; -----------------------------------------
_CLK_HaltConfig:
push a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
ldw x, #0x50c2
push a
ld a, (x)
ld (0x02, sp), a
pop a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE)
tnz (0x04, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
or a, (0x01, sp)
ld 0x50c2, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt);
cpl a
and a, (0x01, sp)
ld 0x50c2, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: }
pop a
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState)
; -----------------------------------------
; function CLK_MainRegulatorCmd
; -----------------------------------------
_CLK_MainRegulatorCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
ld a, 0x50cf
; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
and a, #0xfd
ld 0x50cf, a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF;
or a, #0x02
ld 0x50cf, a
00104$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
; -----------------------------------------
; function CLK_ITConfig
; -----------------------------------------
_CLK_ITConfig:
push a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
cp a, #0x1c
jrne 00154$
push a
ld a, #0x01
ld (0x02, sp), a
pop a
.byte 0xc5
00154$:
clr (0x01, sp)
00155$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
sub a, #0x2c
jrne 00157$
inc a
.byte 0x21
00157$:
clr a
00158$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE)
tnz (0x04, sp)
jreq 00114$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
tnz (0x01, sp)
jreq 00105$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN;
ld a, 0x50c9
or a, #0x04
ld 0x50c9, a
jra 00116$
00105$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
tnz a
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
ld a, 0x5190
or a, #0x04
ld 0x5190, a
jra 00116$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE;
ld a, 0x50ca
or a, #0x04
ld 0x50ca, a
jra 00116$
00114$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF)
tnz (0x01, sp)
jreq 00111$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
ld a, 0x50c9
and a, #0xfb
ld 0x50c9, a
jra 00116$
00111$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF)
tnz a
jreq 00108$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
ld a, 0x5190
and a, #0xfb
ld 0x5190, a
jra 00116$
00108$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
ld a, 0x50ca
and a, #0xfb
ld 0x50ca, a
00116$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: }
pop a
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
; -----------------------------------------
; function CLK_GetFlagStatus
; -----------------------------------------
_CLK_GetFlagStatus:
push a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
ld xl, a
and a, #0xf0
; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
push a
ld a, xl
and a, #0x0f
ld xl, a
pop a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */
tnz a
jrne 00123$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR;
ld a, 0x50c1
jra 00124$
00123$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */
cp a, #0x10
jrne 00120$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR;
ld a, 0x50c2
jra 00124$
00120$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */
cp a, #0x20
jrne 00117$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR;
ld a, 0x50c5
jra 00124$
00117$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */
cp a, #0x30
jrne 00114$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR;
ld a, 0x50c6
jra 00124$
00114$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */
cp a, #0x40
jrne 00111$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR;
ld a, 0x50c9
jra 00124$
00111$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */
cp a, #0x50
jrne 00108$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR;
ld a, 0x50ca
jra 00124$
00108$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */
cp a, #0x70
jrne 00105$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR;
ld a, 0x50cf
jra 00124$
00105$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
cp a, #0x80
jrne 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR;
ld a, 0x5190
jra 00124$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR;
ld a, 0x50cb
00124$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
push a
ld a, #0x01
ld (0x02, sp), a
ld a, xl
tnz a
jreq 00216$
00215$:
sll (0x02, sp)
dec a
jrne 00215$
00216$:
pop a
and a, (0x01, sp)
jreq 00126$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET;
ld a, #0x01
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET;
.byte 0x21
00126$:
clr a
00127$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus);
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: }
addw sp, #1
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void)
; -----------------------------------------
; function CLK_ClearFlag
; -----------------------------------------
_CLK_ClearFlag:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
bres 0x5190, #3
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: }
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
; -----------------------------------------
; function CLK_GetITStatus
; -----------------------------------------
_CLK_GetITStatus:
push a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF)
ld (0x01, sp), a
cp a, #0x1c
jrne 00114$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
ld a, 0x50c9
and a, (0x01, sp)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET;
sub a, #0x0c
jrne 00102$
inc a
jra 00115$
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET;
clr a
jra 00115$
00114$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF)
ld a, (0x01, sp)
cp a, #0x2c
jrne 00111$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
ld a, 0x5190
and a, (0x01, sp)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET;
sub a, #0x0c
jrne 00105$
inc a
jra 00115$
00105$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET;
clr a
jra 00115$
00111$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
ld a, 0x50ca
and a, (0x01, sp)
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET;
sub a, #0x0c
jrne 00108$
inc a
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET;
.byte 0x21
00108$:
clr a
00115$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus;
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: }
addw sp, #1
ret
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
; -----------------------------------------
; function CLK_ClearITPendingBit
; -----------------------------------------
_CLK_ClearITPendingBit:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
and a, #0xf0
cp a, #0x20
jrne 00102$
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
bres 0x5190, #3
ret
00102$:
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
bres 0x50c9, #3
; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: }
ret
.area CODE
.area CONST
.area CONST
_SYSDivFactor:
.db #0x01 ; 1
.db #0x02 ; 2
.db #0x04 ; 4
.db #0x08 ; 8
.db #0x10 ; 16
.area CODE
.area INITIALIZER
.area CABS (ABS)

823
firmware/STM8L15X_LD/stm8l15x_clk.lst Normal file
View File

@@ -0,0 +1,823 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_clk
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _SYSDivFactor
11 .globl _CLK_DeInit
12 .globl _CLK_HSICmd
13 .globl _CLK_AdjustHSICalibrationValue
14 .globl _CLK_LSICmd
15 .globl _CLK_HSEConfig
16 .globl _CLK_LSEConfig
17 .globl _CLK_ClockSecuritySystemEnable
18 .globl _CLK_ClockSecuritySytemDeglitchCmd
19 .globl _CLK_CCOConfig
20 .globl _CLK_SYSCLKSourceConfig
21 .globl _CLK_GetSYSCLKSource
22 .globl _CLK_GetClockFreq
23 .globl _CLK_SYSCLKDivConfig
24 .globl _CLK_SYSCLKSourceSwitchCmd
25 .globl _CLK_RTCClockConfig
26 .globl _CLK_BEEPClockConfig
27 .globl _CLK_PeripheralClockConfig
28 .globl _CLK_LSEClockSecuritySystemEnable
29 .globl _CLK_RTCCLKSwitchOnLSEFailureEnable
30 .globl _CLK_HaltConfig
31 .globl _CLK_MainRegulatorCmd
32 .globl _CLK_ITConfig
33 .globl _CLK_GetFlagStatus
34 .globl _CLK_ClearFlag
35 .globl _CLK_GetITStatus
36 .globl _CLK_ClearITPendingBit
37 ;--------------------------------------------------------
38 ; ram data
39 ;--------------------------------------------------------
40 .area DATA
41 ;--------------------------------------------------------
42 ; ram data
43 ;--------------------------------------------------------
44 .area INITIALIZED
45 ;--------------------------------------------------------
46 ; absolute external ram data
47 ;--------------------------------------------------------
48 .area DABS (ABS)
49
50 ; default segment ordering for linker
51 .area HOME
52 .area GSINIT
53 .area GSFINAL
54 .area CONST
55 .area INITIALIZER
56 .area CODE
57
58 ;--------------------------------------------------------
59 ; global & static initialisations
60 ;--------------------------------------------------------
61 .area HOME
62 .area GSINIT
63 .area GSFINAL
64 .area GSINIT
65 ;--------------------------------------------------------
66 ; Home
67 ;--------------------------------------------------------
68 .area HOME
69 .area HOME
70 ;--------------------------------------------------------
71 ; code
72 ;--------------------------------------------------------
73 .area CODE
74 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void)
75 ; -----------------------------------------
76 ; function CLK_DeInit
77 ; -----------------------------------------
000000 78 _CLK_DeInit:
79 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE;
000000 35 11 50 C2 [ 1] 80 mov 0x50c2+0, #0x11
81 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE;
000004 35 00 50 C6 [ 1] 82 mov 0x50c6+0, #0x00
83 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE;
000008 35 00 50 C1 [ 1] 84 mov 0x50c1+0, #0x00
85 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE;
00000C 35 00 50 CB [ 1] 86 mov 0x50cb+0, #0x00
87 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE;
000010 35 01 50 C8 [ 1] 88 mov 0x50c8+0, #0x01
89 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE;
000014 35 00 50 C9 [ 1] 90 mov 0x50c9+0, #0x00
91 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
000018 35 03 50 C0 [ 1] 92 mov 0x50c0+0, #0x03
93 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
00001C 35 00 50 C3 [ 1] 94 mov 0x50c3+0, #0x00
95 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
000020 35 80 50 C4 [ 1] 96 mov 0x50c4+0, #0x80
97 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE;
000024 35 00 50 D0 [ 1] 98 mov 0x50d0+0, #0x00
99 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE;
000028 35 00 50 CA [ 1] 100 mov 0x50ca+0, #0x00
101 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE;
00002C 35 00 50 C5 [ 1] 102 mov 0x50c5+0, #0x00
103 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
000030 35 00 50 CD [ 1] 104 mov 0x50cd+0, #0x00
105 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE;
000034 35 00 50 CC [ 1] 106 mov 0x50cc+0, #0x00
107 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE;
000038 35 00 50 CE [ 1] 108 mov 0x50ce+0, #0x00
109 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE;
00003C 35 B9 50 CF [ 1] 110 mov 0x50cf+0, #0xb9
111 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: }
000040 81 [ 4] 112 ret
113 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState)
114 ; -----------------------------------------
115 ; function CLK_HSICmd
116 ; -----------------------------------------
000041 117 _CLK_HSICmd:
000041 88 [ 1] 118 push a
000042 6B 01 [ 1] 119 ld (0x01, sp), a
120 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
000044 C6 50 C2 [ 1] 121 ld a, 0x50c2
122 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE)
000047 0D 01 [ 1] 123 tnz (0x01, sp)
000049 27 07 [ 1] 124 jreq 00102$
125 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
00004B AA 01 [ 1] 126 or a, #0x01
00004D C7 50 C2 [ 1] 127 ld 0x50c2, a
000050 20 05 [ 2] 128 jra 00104$
000052 129 00102$:
130 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION);
000052 A4 FE [ 1] 131 and a, #0xfe
000054 C7 50 C2 [ 1] 132 ld 0x50c2, a
000057 133 00104$:
134 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: }
000057 84 [ 1] 135 pop a
000058 81 [ 4] 136 ret
137 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue)
138 ; -----------------------------------------
139 ; function CLK_AdjustHSICalibrationValue
140 ; -----------------------------------------
000059 141 _CLK_AdjustHSICalibrationValue:
142 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC;
000059 35 AC 50 CE [ 1] 143 mov 0x50ce+0, #0xac
144 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35;
00005D 35 35 50 CE [ 1] 145 mov 0x50ce+0, #0x35
146 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue;
000061 C7 50 CD [ 1] 147 ld 0x50cd, a
148 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: }
000064 81 [ 4] 149 ret
150 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState)
151 ; -----------------------------------------
152 ; function CLK_LSICmd
153 ; -----------------------------------------
000065 154 _CLK_LSICmd:
000065 88 [ 1] 155 push a
000066 6B 01 [ 1] 156 ld (0x01, sp), a
157 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
000068 C6 50 C2 [ 1] 158 ld a, 0x50c2
159 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE)
00006B 0D 01 [ 1] 160 tnz (0x01, sp)
00006D 27 07 [ 1] 161 jreq 00102$
162 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
00006F AA 04 [ 1] 163 or a, #0x04
000071 C7 50 C2 [ 1] 164 ld 0x50c2, a
000074 20 05 [ 2] 165 jra 00104$
000076 166 00102$:
167 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION);
000076 A4 FB [ 1] 168 and a, #0xfb
000078 C7 50 C2 [ 1] 169 ld 0x50c2, a
00007B 170 00104$:
171 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: }
00007B 84 [ 1] 172 pop a
00007C 81 [ 4] 173 ret
174 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE)
175 ; -----------------------------------------
176 ; function CLK_HSEConfig
177 ; -----------------------------------------
00007D 178 _CLK_HSEConfig:
00007D 88 [ 1] 179 push a
00007E 6B 01 [ 1] 180 ld (0x01, sp), a
181 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON;
000080 72 11 50 C6 [ 1] 182 bres 0x50c6, #0
183 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP;
000084 72 19 50 C6 [ 1] 184 bres 0x50c6, #4
185 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE;
000088 C6 50 C6 [ 1] 186 ld a, 0x50c6
00008B 1A 01 [ 1] 187 or a, (0x01, sp)
00008D C7 50 C6 [ 1] 188 ld 0x50c6, a
189 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: }
000090 84 [ 1] 190 pop a
000091 81 [ 4] 191 ret
192 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE)
193 ; -----------------------------------------
194 ; function CLK_LSEConfig
195 ; -----------------------------------------
000092 196 _CLK_LSEConfig:
000092 88 [ 1] 197 push a
000093 6B 01 [ 1] 198 ld (0x01, sp), a
199 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON;
000095 72 15 50 C6 [ 1] 200 bres 0x50c6, #2
201 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP;
000099 72 1B 50 C6 [ 1] 202 bres 0x50c6, #5
203 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE;
00009D C6 50 C6 [ 1] 204 ld a, 0x50c6
0000A0 1A 01 [ 1] 205 or a, (0x01, sp)
0000A2 C7 50 C6 [ 1] 206 ld 0x50c6, a
207 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: }
0000A5 84 [ 1] 208 pop a
0000A6 81 [ 4] 209 ret
210 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void)
211 ; -----------------------------------------
212 ; function CLK_ClockSecuritySystemEnable
213 ; -----------------------------------------
0000A7 214 _CLK_ClockSecuritySystemEnable:
215 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN;
0000A7 72 10 50 CA [ 1] 216 bset 0x50ca, #0
217 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: }
0000AB 81 [ 4] 218 ret
219 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState)
220 ; -----------------------------------------
221 ; function CLK_ClockSecuritySytemDeglitchCmd
222 ; -----------------------------------------
0000AC 223 _CLK_ClockSecuritySytemDeglitchCmd:
0000AC 88 [ 1] 224 push a
0000AD 6B 01 [ 1] 225 ld (0x01, sp), a
226 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
0000AF C6 50 CA [ 1] 227 ld a, 0x50ca
228 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE)
0000B2 0D 01 [ 1] 229 tnz (0x01, sp)
0000B4 27 07 [ 1] 230 jreq 00102$
231 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
0000B6 AA 10 [ 1] 232 or a, #0x10
0000B8 C7 50 CA [ 1] 233 ld 0x50ca, a
0000BB 20 05 [ 2] 234 jra 00104$
0000BD 235 00102$:
236 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON);
0000BD A4 EF [ 1] 237 and a, #0xef
0000BF C7 50 CA [ 1] 238 ld 0x50ca, a
0000C2 239 00104$:
240 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: }
0000C2 84 [ 1] 241 pop a
0000C3 81 [ 4] 242 ret
243 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv)
244 ; -----------------------------------------
245 ; function CLK_CCOConfig
246 ; -----------------------------------------
0000C4 247 _CLK_CCOConfig:
248 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv);
0000C4 1A 03 [ 1] 249 or a, (0x03, sp)
0000C6 C7 50 C5 [ 1] 250 ld 0x50c5, a
251 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: }
0000C9 85 [ 2] 252 popw x
0000CA 84 [ 1] 253 pop a
0000CB FC [ 2] 254 jp (x)
255 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
256 ; -----------------------------------------
257 ; function CLK_SYSCLKSourceConfig
258 ; -----------------------------------------
0000CC 259 _CLK_SYSCLKSourceConfig:
260 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource;
0000CC C7 50 C8 [ 1] 261 ld 0x50c8, a
262 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: }
0000CF 81 [ 4] 263 ret
264 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
265 ; -----------------------------------------
266 ; function CLK_GetSYSCLKSource
267 ; -----------------------------------------
0000D0 268 _CLK_GetSYSCLKSource:
269 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
0000D0 C6 50 C7 [ 1] 270 ld a, 0x50c7
271 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: }
0000D3 81 [ 4] 272 ret
273 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void)
274 ; -----------------------------------------
275 ; function CLK_GetClockFreq
276 ; -----------------------------------------
0000D4 277 _CLK_GetClockFreq:
0000D4 52 08 [ 2] 278 sub sp, #8
279 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0;
0000D6 5F [ 1] 280 clrw x
0000D7 1F 03 [ 2] 281 ldw (0x03, sp), x
0000D9 1F 01 [ 2] 282 ldw (0x01, sp), x
283 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;
0000DB C6 50 C7 [ 1] 284 ld a, 0x50c7
285 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI)
0000DE A1 01 [ 1] 286 cp a, #0x01
0000E0 26 0C [ 1] 287 jrne 00108$
288 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE;
0000E2 AE 24 00 [ 2] 289 ldw x, #0x2400
0000E5 1F 03 [ 2] 290 ldw (0x03, sp), x
0000E7 AE 00 F4 [ 2] 291 ldw x, #0x00f4
0000EA 1F 01 [ 2] 292 ldw (0x01, sp), x
0000EC 20 1C [ 2] 293 jra 00109$
0000EE 294 00108$:
295 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI)
0000EE A1 02 [ 1] 296 cp a, #0x02
0000F0 26 0A [ 1] 297 jrne 00105$
298 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE;
0000F2 AE 94 70 [ 2] 299 ldw x, #0x9470
0000F5 1F 03 [ 2] 300 ldw (0x03, sp), x
0000F7 5F [ 1] 301 clrw x
0000F8 1F 01 [ 2] 302 ldw (0x01, sp), x
0000FA 20 0E [ 2] 303 jra 00109$
0000FC 304 00105$:
305 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE)
0000FC A1 04 [ 1] 306 cp a, #0x04
0000FE 26 0A [ 1] 307 jrne 00109$
308 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE;
000100 AE 24 00 [ 2] 309 ldw x, #0x2400
000103 1F 03 [ 2] 310 ldw (0x03, sp), x
000105 AE 00 F4 [ 2] 311 ldw x, #0x00f4
000108 1F 01 [ 2] 312 ldw (0x01, sp), x
313 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE;
00010A 314 00109$:
315 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
00010A C6 50 C0 [ 1] 316 ld a, 0x50c0
00010D A4 07 [ 1] 317 and a, #0x07
318 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp];
00010F 5F [ 1] 319 clrw x
000110 97 [ 1] 320 ld xl, a
000111 D6u00u00 [ 1] 321 ld a, (_SYSDivFactor+0, x)
322 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc;
000114 5F [ 1] 323 clrw x
000115 0F 05 [ 1] 324 clr (0x05, sp)
000117 88 [ 1] 325 push a
000118 89 [ 2] 326 pushw x
000119 4F [ 1] 327 clr a
00011A 88 [ 1] 328 push a
00011B 1E 07 [ 2] 329 ldw x, (0x07, sp)
00011D 89 [ 2] 330 pushw x
00011E 1E 07 [ 2] 331 ldw x, (0x07, sp)
000120 89 [ 2] 332 pushw x
333 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency);
000121 CDr00r00 [ 4] 334 call __divulong
335 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: }
000124 5B 10 [ 2] 336 addw sp, #16
000126 81 [ 4] 337 ret
338 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
339 ; -----------------------------------------
340 ; function CLK_SYSCLKDivConfig
341 ; -----------------------------------------
000127 342 _CLK_SYSCLKDivConfig:
343 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
000127 C7 50 C0 [ 1] 344 ld 0x50c0, a
345 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: }
00012A 81 [ 4] 346 ret
347 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
348 ; -----------------------------------------
349 ; function CLK_SYSCLKSourceSwitchCmd
350 ; -----------------------------------------
00012B 351 _CLK_SYSCLKSourceSwitchCmd:
00012B 88 [ 1] 352 push a
00012C 6B 01 [ 1] 353 ld (0x01, sp), a
354 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
00012E C6 50 C9 [ 1] 355 ld a, 0x50c9
356 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE)
000131 0D 01 [ 1] 357 tnz (0x01, sp)
000133 27 07 [ 1] 358 jreq 00102$
359 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
000135 AA 02 [ 1] 360 or a, #0x02
000137 C7 50 C9 [ 1] 361 ld 0x50c9, a
00013A 20 05 [ 2] 362 jra 00104$
00013C 363 00102$:
364 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
00013C A4 FD [ 1] 365 and a, #0xfd
00013E C7 50 C9 [ 1] 366 ld 0x50c9, a
000141 367 00104$:
368 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: }
000141 84 [ 1] 369 pop a
000142 81 [ 4] 370 ret
371 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
372 ; -----------------------------------------
373 ; function CLK_RTCClockConfig
374 ; -----------------------------------------
000143 375 _CLK_RTCClockConfig:
376 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
000143 1A 03 [ 1] 377 or a, (0x03, sp)
000145 C7 50 C1 [ 1] 378 ld 0x50c1, a
379 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: }
000148 85 [ 2] 380 popw x
000149 84 [ 1] 381 pop a
00014A FC [ 2] 382 jp (x)
383 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
384 ; -----------------------------------------
385 ; function CLK_BEEPClockConfig
386 ; -----------------------------------------
00014B 387 _CLK_BEEPClockConfig:
388 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);
00014B C7 50 CB [ 1] 389 ld 0x50cb, a
390 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: }
00014E 81 [ 4] 391 ret
392 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
393 ; -----------------------------------------
394 ; function CLK_PeripheralClockConfig
395 ; -----------------------------------------
00014F 396 _CLK_PeripheralClockConfig:
00014F 89 [ 2] 397 pushw x
398 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);
000150 88 [ 1] 399 push a
000151 A4 F0 [ 1] 400 and a, #0xf0
000153 97 [ 1] 401 ld xl, a
000154 84 [ 1] 402 pop a
000155 90 93 [ 1] 403 ldw y, x
404 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
000157 A4 0F [ 1] 405 and a, #0x0f
000159 88 [ 1] 406 push a
00015A A6 01 [ 1] 407 ld a, #0x01
00015C 6B 02 [ 1] 408 ld (0x02, sp), a
00015E 84 [ 1] 409 pop a
00015F 4D [ 1] 410 tnz a
000160 27 05 [ 1] 411 jreq 00154$
000162 412 00153$:
000162 08 01 [ 1] 413 sll (0x01, sp)
000164 4A [ 1] 414 dec a
000165 26 FB [ 1] 415 jrne 00153$
000167 416 00154$:
417 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
000167 7B 01 [ 1] 418 ld a, (0x01, sp)
000169 43 [ 1] 419 cpl a
00016A 6B 02 [ 1] 420 ld (0x02, sp), a
421 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00)
00016C 9F [ 1] 422 ld a, xl
00016D 4D [ 1] 423 tnz a
00016E 26 15 [ 1] 424 jrne 00114$
425 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
000170 C6 50 C3 [ 1] 426 ld a, 0x50c3
427 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE)
000173 0D 05 [ 1] 428 tnz (0x05, sp)
000175 27 07 [ 1] 429 jreq 00102$
430 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
000177 1A 01 [ 1] 431 or a, (0x01, sp)
000179 C7 50 C3 [ 1] 432 ld 0x50c3, a
00017C 20 35 [ 2] 433 jra 00116$
00017E 434 00102$:
435 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
00017E 14 02 [ 1] 436 and a, (0x02, sp)
000180 C7 50 C3 [ 1] 437 ld 0x50c3, a
000183 20 2E [ 2] 438 jra 00116$
000185 439 00114$:
440 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10)
000185 90 9F [ 1] 441 ld a, yl
000187 A1 10 [ 1] 442 cp a, #0x10
000189 26 15 [ 1] 443 jrne 00111$
444 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
00018B C6 50 C4 [ 1] 445 ld a, 0x50c4
446 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE)
00018E 0D 05 [ 1] 447 tnz (0x05, sp)
000190 27 07 [ 1] 448 jreq 00105$
449 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
000192 1A 01 [ 1] 450 or a, (0x01, sp)
000194 C7 50 C4 [ 1] 451 ld 0x50c4, a
000197 20 1A [ 2] 452 jra 00116$
000199 453 00105$:
454 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
000199 14 02 [ 1] 455 and a, (0x02, sp)
00019B C7 50 C4 [ 1] 456 ld 0x50c4, a
00019E 20 13 [ 2] 457 jra 00116$
0001A0 458 00111$:
459 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
0001A0 C6 50 D0 [ 1] 460 ld a, 0x50d0
461 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE)
0001A3 0D 05 [ 1] 462 tnz (0x05, sp)
0001A5 27 07 [ 1] 463 jreq 00108$
464 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
0001A7 1A 01 [ 1] 465 or a, (0x01, sp)
0001A9 C7 50 D0 [ 1] 466 ld 0x50d0, a
0001AC 20 05 [ 2] 467 jra 00116$
0001AE 468 00108$:
469 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
0001AE 14 02 [ 1] 470 and a, (0x02, sp)
0001B0 C7 50 D0 [ 1] 471 ld 0x50d0, a
0001B3 472 00116$:
473 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: }
0001B3 85 [ 2] 474 popw x
0001B4 85 [ 2] 475 popw x
0001B5 84 [ 1] 476 pop a
0001B6 FC [ 2] 477 jp (x)
478 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void)
479 ; -----------------------------------------
480 ; function CLK_LSEClockSecuritySystemEnable
481 ; -----------------------------------------
0001B7 482 _CLK_LSEClockSecuritySystemEnable:
483 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
0001B7 72 10 51 90 [ 1] 484 bset 0x5190, #0
485 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: }
0001BB 81 [ 4] 486 ret
487 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
488 ; -----------------------------------------
489 ; function CLK_RTCCLKSwitchOnLSEFailureEnable
490 ; -----------------------------------------
0001BC 491 _CLK_RTCCLKSwitchOnLSEFailureEnable:
492 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
0001BC 72 12 51 90 [ 1] 493 bset 0x5190, #1
494 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: }
0001C0 81 [ 4] 495 ret
496 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
497 ; -----------------------------------------
498 ; function CLK_HaltConfig
499 ; -----------------------------------------
0001C1 500 _CLK_HaltConfig:
0001C1 88 [ 1] 501 push a
502 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
0001C2 AE 50 C2 [ 2] 503 ldw x, #0x50c2
0001C5 88 [ 1] 504 push a
0001C6 F6 [ 1] 505 ld a, (x)
0001C7 6B 02 [ 1] 506 ld (0x02, sp), a
0001C9 84 [ 1] 507 pop a
508 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE)
0001CA 0D 04 [ 1] 509 tnz (0x04, sp)
0001CC 27 07 [ 1] 510 jreq 00102$
511 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
0001CE 1A 01 [ 1] 512 or a, (0x01, sp)
0001D0 C7 50 C2 [ 1] 513 ld 0x50c2, a
0001D3 20 06 [ 2] 514 jra 00104$
0001D5 515 00102$:
516 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt);
0001D5 43 [ 1] 517 cpl a
0001D6 14 01 [ 1] 518 and a, (0x01, sp)
0001D8 C7 50 C2 [ 1] 519 ld 0x50c2, a
0001DB 520 00104$:
521 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: }
0001DB 84 [ 1] 522 pop a
0001DC 85 [ 2] 523 popw x
0001DD 84 [ 1] 524 pop a
0001DE FC [ 2] 525 jp (x)
526 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState)
527 ; -----------------------------------------
528 ; function CLK_MainRegulatorCmd
529 ; -----------------------------------------
0001DF 530 _CLK_MainRegulatorCmd:
0001DF 88 [ 1] 531 push a
0001E0 6B 01 [ 1] 532 ld (0x01, sp), a
533 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
0001E2 C6 50 CF [ 1] 534 ld a, 0x50cf
535 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE)
0001E5 0D 01 [ 1] 536 tnz (0x01, sp)
0001E7 27 07 [ 1] 537 jreq 00102$
538 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
0001E9 A4 FD [ 1] 539 and a, #0xfd
0001EB C7 50 CF [ 1] 540 ld 0x50cf, a
0001EE 20 05 [ 2] 541 jra 00104$
0001F0 542 00102$:
543 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF;
0001F0 AA 02 [ 1] 544 or a, #0x02
0001F2 C7 50 CF [ 1] 545 ld 0x50cf, a
0001F5 546 00104$:
547 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: }
0001F5 84 [ 1] 548 pop a
0001F6 81 [ 4] 549 ret
550 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
551 ; -----------------------------------------
552 ; function CLK_ITConfig
553 ; -----------------------------------------
0001F7 554 _CLK_ITConfig:
0001F7 88 [ 1] 555 push a
556 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
0001F8 A1 1C [ 1] 557 cp a, #0x1c
0001FA 26 07 [ 1] 558 jrne 00154$
0001FC 88 [ 1] 559 push a
0001FD A6 01 [ 1] 560 ld a, #0x01
0001FF 6B 02 [ 1] 561 ld (0x02, sp), a
000201 84 [ 1] 562 pop a
000202 C5 563 .byte 0xc5
000203 564 00154$:
000203 0F 01 [ 1] 565 clr (0x01, sp)
000205 566 00155$:
567 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
000205 A0 2C [ 1] 568 sub a, #0x2c
000207 26 02 [ 1] 569 jrne 00157$
000209 4C [ 1] 570 inc a
00020A 21 571 .byte 0x21
00020B 572 00157$:
00020B 4F [ 1] 573 clr a
00020C 574 00158$:
575 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE)
00020C 0D 04 [ 1] 576 tnz (0x04, sp)
00020E 27 25 [ 1] 577 jreq 00114$
578 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
000210 0D 01 [ 1] 579 tnz (0x01, sp)
000212 27 0A [ 1] 580 jreq 00105$
581 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN;
000214 C6 50 C9 [ 1] 582 ld a, 0x50c9
000217 AA 04 [ 1] 583 or a, #0x04
000219 C7 50 C9 [ 1] 584 ld 0x50c9, a
00021C 20 3A [ 2] 585 jra 00116$
00021E 586 00105$:
587 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
00021E 4D [ 1] 588 tnz a
00021F 27 0A [ 1] 589 jreq 00102$
590 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
000221 C6 51 90 [ 1] 591 ld a, 0x5190
000224 AA 04 [ 1] 592 or a, #0x04
000226 C7 51 90 [ 1] 593 ld 0x5190, a
000229 20 2D [ 2] 594 jra 00116$
00022B 595 00102$:
596 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE;
00022B C6 50 CA [ 1] 597 ld a, 0x50ca
00022E AA 04 [ 1] 598 or a, #0x04
000230 C7 50 CA [ 1] 599 ld 0x50ca, a
000233 20 23 [ 2] 600 jra 00116$
000235 601 00114$:
602 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF)
000235 0D 01 [ 1] 603 tnz (0x01, sp)
000237 27 0A [ 1] 604 jreq 00111$
605 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
000239 C6 50 C9 [ 1] 606 ld a, 0x50c9
00023C A4 FB [ 1] 607 and a, #0xfb
00023E C7 50 C9 [ 1] 608 ld 0x50c9, a
000241 20 15 [ 2] 609 jra 00116$
000243 610 00111$:
611 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF)
000243 4D [ 1] 612 tnz a
000244 27 0A [ 1] 613 jreq 00108$
614 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
000246 C6 51 90 [ 1] 615 ld a, 0x5190
000249 A4 FB [ 1] 616 and a, #0xfb
00024B C7 51 90 [ 1] 617 ld 0x5190, a
00024E 20 08 [ 2] 618 jra 00116$
000250 619 00108$:
620 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
000250 C6 50 CA [ 1] 621 ld a, 0x50ca
000253 A4 FB [ 1] 622 and a, #0xfb
000255 C7 50 CA [ 1] 623 ld 0x50ca, a
000258 624 00116$:
625 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: }
000258 84 [ 1] 626 pop a
000259 85 [ 2] 627 popw x
00025A 84 [ 1] 628 pop a
00025B FC [ 2] 629 jp (x)
630 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
631 ; -----------------------------------------
632 ; function CLK_GetFlagStatus
633 ; -----------------------------------------
00025C 634 _CLK_GetFlagStatus:
00025C 88 [ 1] 635 push a
636 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
00025D 97 [ 1] 637 ld xl, a
00025E A4 F0 [ 1] 638 and a, #0xf0
639 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
000260 88 [ 1] 640 push a
000261 9F [ 1] 641 ld a, xl
000262 A4 0F [ 1] 642 and a, #0x0f
000264 97 [ 1] 643 ld xl, a
000265 84 [ 1] 644 pop a
645 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */
000266 4D [ 1] 646 tnz a
000267 26 05 [ 1] 647 jrne 00123$
648 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR;
000269 C6 50 C1 [ 1] 649 ld a, 0x50c1
00026C 20 42 [ 2] 650 jra 00124$
00026E 651 00123$:
652 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */
00026E A1 10 [ 1] 653 cp a, #0x10
000270 26 05 [ 1] 654 jrne 00120$
655 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR;
000272 C6 50 C2 [ 1] 656 ld a, 0x50c2
000275 20 39 [ 2] 657 jra 00124$
000277 658 00120$:
659 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */
000277 A1 20 [ 1] 660 cp a, #0x20
000279 26 05 [ 1] 661 jrne 00117$
662 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR;
00027B C6 50 C5 [ 1] 663 ld a, 0x50c5
00027E 20 30 [ 2] 664 jra 00124$
000280 665 00117$:
666 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */
000280 A1 30 [ 1] 667 cp a, #0x30
000282 26 05 [ 1] 668 jrne 00114$
669 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR;
000284 C6 50 C6 [ 1] 670 ld a, 0x50c6
000287 20 27 [ 2] 671 jra 00124$
000289 672 00114$:
673 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */
000289 A1 40 [ 1] 674 cp a, #0x40
00028B 26 05 [ 1] 675 jrne 00111$
676 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR;
00028D C6 50 C9 [ 1] 677 ld a, 0x50c9
000290 20 1E [ 2] 678 jra 00124$
000292 679 00111$:
680 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */
000292 A1 50 [ 1] 681 cp a, #0x50
000294 26 05 [ 1] 682 jrne 00108$
683 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR;
000296 C6 50 CA [ 1] 684 ld a, 0x50ca
000299 20 15 [ 2] 685 jra 00124$
00029B 686 00108$:
687 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */
00029B A1 70 [ 1] 688 cp a, #0x70
00029D 26 05 [ 1] 689 jrne 00105$
690 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR;
00029F C6 50 CF [ 1] 691 ld a, 0x50cf
0002A2 20 0C [ 2] 692 jra 00124$
0002A4 693 00105$:
694 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
0002A4 A1 80 [ 1] 695 cp a, #0x80
0002A6 26 05 [ 1] 696 jrne 00102$
697 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR;
0002A8 C6 51 90 [ 1] 698 ld a, 0x5190
0002AB 20 03 [ 2] 699 jra 00124$
0002AD 700 00102$:
701 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR;
0002AD C6 50 CB [ 1] 702 ld a, 0x50cb
0002B0 703 00124$:
704 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
0002B0 88 [ 1] 705 push a
0002B1 A6 01 [ 1] 706 ld a, #0x01
0002B3 6B 02 [ 1] 707 ld (0x02, sp), a
0002B5 9F [ 1] 708 ld a, xl
0002B6 4D [ 1] 709 tnz a
0002B7 27 05 [ 1] 710 jreq 00216$
0002B9 711 00215$:
0002B9 08 02 [ 1] 712 sll (0x02, sp)
0002BB 4A [ 1] 713 dec a
0002BC 26 FB [ 1] 714 jrne 00215$
0002BE 715 00216$:
0002BE 84 [ 1] 716 pop a
0002BF 14 01 [ 1] 717 and a, (0x01, sp)
0002C1 27 03 [ 1] 718 jreq 00126$
719 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET;
0002C3 A6 01 [ 1] 720 ld a, #0x01
721 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET;
0002C5 21 722 .byte 0x21
0002C6 723 00126$:
0002C6 4F [ 1] 724 clr a
0002C7 725 00127$:
726 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus);
727 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: }
0002C7 5B 01 [ 2] 728 addw sp, #1
0002C9 81 [ 4] 729 ret
730 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void)
731 ; -----------------------------------------
732 ; function CLK_ClearFlag
733 ; -----------------------------------------
0002CA 734 _CLK_ClearFlag:
735 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
0002CA 72 17 51 90 [ 1] 736 bres 0x5190, #3
737 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: }
0002CE 81 [ 4] 738 ret
739 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
740 ; -----------------------------------------
741 ; function CLK_GetITStatus
742 ; -----------------------------------------
0002CF 743 _CLK_GetITStatus:
0002CF 88 [ 1] 744 push a
745 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF)
0002D0 6B 01 [ 1] 746 ld (0x01, sp), a
0002D2 A1 1C [ 1] 747 cp a, #0x1c
0002D4 26 0F [ 1] 748 jrne 00114$
749 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
0002D6 C6 50 C9 [ 1] 750 ld a, 0x50c9
0002D9 14 01 [ 1] 751 and a, (0x01, sp)
752 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET;
0002DB A0 0C [ 1] 753 sub a, #0x0c
0002DD 26 03 [ 1] 754 jrne 00102$
0002DF 4C [ 1] 755 inc a
0002E0 20 24 [ 2] 756 jra 00115$
0002E2 757 00102$:
758 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET;
0002E2 4F [ 1] 759 clr a
0002E3 20 21 [ 2] 760 jra 00115$
0002E5 761 00114$:
762 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF)
0002E5 7B 01 [ 1] 763 ld a, (0x01, sp)
0002E7 A1 2C [ 1] 764 cp a, #0x2c
0002E9 26 0F [ 1] 765 jrne 00111$
766 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
0002EB C6 51 90 [ 1] 767 ld a, 0x5190
0002EE 14 01 [ 1] 768 and a, (0x01, sp)
769 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET;
0002F0 A0 0C [ 1] 770 sub a, #0x0c
0002F2 26 03 [ 1] 771 jrne 00105$
0002F4 4C [ 1] 772 inc a
0002F5 20 0F [ 2] 773 jra 00115$
0002F7 774 00105$:
775 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET;
0002F7 4F [ 1] 776 clr a
0002F8 20 0C [ 2] 777 jra 00115$
0002FA 778 00111$:
779 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
0002FA C6 50 CA [ 1] 780 ld a, 0x50ca
0002FD 14 01 [ 1] 781 and a, (0x01, sp)
782 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET;
0002FF A0 0C [ 1] 783 sub a, #0x0c
000301 26 02 [ 1] 784 jrne 00108$
000303 4C [ 1] 785 inc a
786 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET;
000304 21 787 .byte 0x21
000305 788 00108$:
000305 4F [ 1] 789 clr a
000306 790 00115$:
791 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus;
792 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: }
000306 5B 01 [ 2] 793 addw sp, #1
000308 81 [ 4] 794 ret
795 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
796 ; -----------------------------------------
797 ; function CLK_ClearITPendingBit
798 ; -----------------------------------------
000309 799 _CLK_ClearITPendingBit:
800 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
000309 A4 F0 [ 1] 801 and a, #0xf0
00030B A1 20 [ 1] 802 cp a, #0x20
00030D 26 05 [ 1] 803 jrne 00102$
804 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
00030F 72 17 51 90 [ 1] 805 bres 0x5190, #3
000313 81 [ 4] 806 ret
000314 807 00102$:
808 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
000314 72 17 50 C9 [ 1] 809 bres 0x50c9, #3
810 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: }
000318 81 [ 4] 811 ret
812 .area CODE
813 .area CONST
814 .area CONST
000000 815 _SYSDivFactor:
000000 01 816 .db #0x01 ; 1
000001 02 817 .db #0x02 ; 2
000002 04 818 .db #0x04 ; 4
000003 08 819 .db #0x08 ; 8
000004 10 820 .db #0x10 ; 16
821 .area CODE
822 .area INITIALIZER
823 .area CABS (ABS)

417
firmware/STM8L15X_LD/stm8l15x_clk.rel Normal file
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XH3
H B areas 1D global symbols
M stm8l15x_clk
S .__.ABS. Def000000
S __divulong Ref000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 5 flags 0 addr 0
S _SYSDivFactor Def000000
A INITIALIZER size 0 flags 0 addr 0
A CODE size 319 flags 0 addr 0
S _CLK_ClearITPendingBit Def000309
S _CLK_GetSYSCLKSource Def0000D0
S _CLK_RTCClockConfig Def000143
S _CLK_CCOConfig Def0000C4
S _CLK_ITConfig Def0001F7
S _CLK_LSEClockSecuritySystemEnable Def0001B7
S _CLK_AdjustHSICalibrationValue Def000059
S _CLK_HSEConfig Def00007D
S _CLK_HSICmd Def000041
S _CLK_LSEConfig Def000092
S _CLK_LSICmd Def000065
S _CLK_DeInit Def000000
S _CLK_GetITStatus Def0002CF
S _CLK_MainRegulatorCmd Def0001DF
S _CLK_PeripheralClockConfig Def00014F
S _CLK_ClockSecuritySytemDeglitchCmd Def0000AC
S _CLK_SYSCLKSourceSwitchCmd Def00012B
S _CLK_ClockSecuritySystemEnable Def0000A7
S _CLK_SYSCLKDivConfig Def000127
S _CLK_GetClockFreq Def0000D4
S _CLK_GetFlagStatus Def00025C
S _CLK_BEEPClockConfig Def00014B
S _CLK_HaltConfig Def0001C1
S _CLK_SYSCLKSourceConfig Def0000CC
S _CLK_ClearFlag Def0002CA
S _CLK_RTCCLKSwitchOnLSEFailureEnable Def0001BC
A CABS size 0 flags 8 addr 0
T 00 00 00
R 00 00 00 09
T 00 00 00 35 11 50 C2 35 00 50 C6 35 00 50 C1 35
R 00 00 00 09
T 00 00 0D 00 50 CB 35 01 50 C8 35 00 50 C9 35 03
R 00 00 00 09
T 00 00 1A 50 C0 35 00 50 C3 35 80 50 C4 35 00
R 00 00 00 09
T 00 00 26 50 D0 35 00 50 CA 35 00 50 C5 35 00
R 00 00 00 09
T 00 00 32 50 CD 35 00 50 CC 35 00 50 CE 35 B9
R 00 00 00 09
T 00 00 3E 50 CF 81
R 00 00 00 09
T 00 00 41
R 00 00 00 09
T 00 00 41 88 6B 01 C6 50 C2 0D 01 27 07 AA 01 C7
R 00 00 00 09
T 00 00 4E 50 C2 20 05
R 00 00 00 09
T 00 00 52
R 00 00 00 09
T 00 00 52 A4 FE C7 50 C2
R 00 00 00 09
T 00 00 57
R 00 00 00 09
T 00 00 57 84 81
R 00 00 00 09
T 00 00 59
R 00 00 00 09
T 00 00 59 35 AC 50 CE 35 35 50 CE C7 50 CD 81
R 00 00 00 09
T 00 00 65
R 00 00 00 09
T 00 00 65 88 6B 01 C6 50 C2 0D 01 27 07 AA 04 C7
R 00 00 00 09
T 00 00 72 50 C2 20 05
R 00 00 00 09
T 00 00 76
R 00 00 00 09
T 00 00 76 A4 FB C7 50 C2
R 00 00 00 09
T 00 00 7B
R 00 00 00 09
T 00 00 7B 84 81
R 00 00 00 09
T 00 00 7D
R 00 00 00 09
T 00 00 7D 88 6B 01 72 11 50 C6 72 19 50 C6 C6
R 00 00 00 09
T 00 00 89 50 C6 1A 01 C7 50 C6 84 81
R 00 00 00 09
T 00 00 92
R 00 00 00 09
T 00 00 92 88 6B 01 72 15 50 C6 72 1B 50 C6 C6
R 00 00 00 09
T 00 00 9E 50 C6 1A 01 C7 50 C6 84 81
R 00 00 00 09
T 00 00 A7
R 00 00 00 09
T 00 00 A7 72 10 50 CA 81
R 00 00 00 09
T 00 00 AC
R 00 00 00 09
T 00 00 AC 88 6B 01 C6 50 CA 0D 01 27 07 AA 10 C7
R 00 00 00 09
T 00 00 B9 50 CA 20 05
R 00 00 00 09
T 00 00 BD
R 00 00 00 09
T 00 00 BD A4 EF C7 50 CA
R 00 00 00 09
T 00 00 C2
R 00 00 00 09
T 00 00 C2 84 81
R 00 00 00 09
T 00 00 C4
R 00 00 00 09
T 00 00 C4 1A 03 C7 50 C5 85 84 FC
R 00 00 00 09
T 00 00 CC
R 00 00 00 09
T 00 00 CC C7 50 C8 81
R 00 00 00 09
T 00 00 D0
R 00 00 00 09
T 00 00 D0 C6 50 C7 81
R 00 00 00 09
T 00 00 D4
R 00 00 00 09
T 00 00 D4 52 08 5F 1F 03 1F 01 C6 50 C7 A1 01 26
R 00 00 00 09
T 00 00 E1 0C AE 24 00 1F 03 AE 00 F4 1F 01 20 1C
R 00 00 00 09
T 00 00 EE
R 00 00 00 09
T 00 00 EE A1 02 26 0A AE 94 70 1F 03 5F 1F 01 20
R 00 00 00 09
T 00 00 FB 0E
R 00 00 00 09
T 00 00 FC
R 00 00 00 09
T 00 00 FC A1 04 26 0A AE 24 00 1F 03 AE 00 F4 1F
R 00 00 00 09
T 00 01 09 01
R 00 00 00 09
T 00 01 0A
R 00 00 00 09
T 00 01 0A C6 50 C0 A4 07 5F 97 D6 00 00 5F 0F 05
R 00 00 00 09 10 0B 00 07
T 00 01 17 88 89 4F 88 1E 07 89 1E 07 89 CD 00 00
R 00 00 00 09 02 0E 00 01
T 00 01 24 5B 10 81
R 00 00 00 09
T 00 01 27
R 00 00 00 09
T 00 01 27 C7 50 C0 81
R 00 00 00 09
T 00 01 2B
R 00 00 00 09
T 00 01 2B 88 6B 01 C6 50 C9 0D 01 27 07 AA 02 C7
R 00 00 00 09
T 00 01 38 50 C9 20 05
R 00 00 00 09
T 00 01 3C
R 00 00 00 09
T 00 01 3C A4 FD C7 50 C9
R 00 00 00 09
T 00 01 41
R 00 00 00 09
T 00 01 41 84 81
R 00 00 00 09
T 00 01 43
R 00 00 00 09
T 00 01 43 1A 03 C7 50 C1 85 84 FC
R 00 00 00 09
T 00 01 4B
R 00 00 00 09
T 00 01 4B C7 50 CB 81
R 00 00 00 09
T 00 01 4F
R 00 00 00 09
T 00 01 4F 89 88 A4 F0 97 84 90 93 A4 0F 88 A6 01
R 00 00 00 09
T 00 01 5C 6B 02 84 4D 27 05
R 00 00 00 09
T 00 01 62
R 00 00 00 09
T 00 01 62 08 01 4A 26 FB
R 00 00 00 09
T 00 01 67
R 00 00 00 09
T 00 01 67 7B 01 43 6B 02 9F 4D 26 15 C6 50 C3 0D
R 00 00 00 09
T 00 01 74 05 27 07 1A 01 C7 50 C3 20 35
R 00 00 00 09
T 00 01 7E
R 00 00 00 09
T 00 01 7E 14 02 C7 50 C3 20 2E
R 00 00 00 09
T 00 01 85
R 00 00 00 09
T 00 01 85 90 9F A1 10 26 15 C6 50 C4 0D 05 27 07
R 00 00 00 09
T 00 01 92 1A 01 C7 50 C4 20 1A
R 00 00 00 09
T 00 01 99
R 00 00 00 09
T 00 01 99 14 02 C7 50 C4 20 13
R 00 00 00 09
T 00 01 A0
R 00 00 00 09
T 00 01 A0 C6 50 D0 0D 05 27 07 1A 01 C7 50 D0 20
R 00 00 00 09
T 00 01 AD 05
R 00 00 00 09
T 00 01 AE
R 00 00 00 09
T 00 01 AE 14 02 C7 50 D0
R 00 00 00 09
T 00 01 B3
R 00 00 00 09
T 00 01 B3 85 85 84 FC
R 00 00 00 09
T 00 01 B7
R 00 00 00 09
T 00 01 B7 72 10 51 90 81
R 00 00 00 09
T 00 01 BC
R 00 00 00 09
T 00 01 BC 72 12 51 90 81
R 00 00 00 09
T 00 01 C1
R 00 00 00 09
T 00 01 C1 88 AE 50 C2 88 F6 6B 02 84 0D 04 27 07
R 00 00 00 09
T 00 01 CE 1A 01 C7 50 C2 20 06
R 00 00 00 09
T 00 01 D5
R 00 00 00 09
T 00 01 D5 43 14 01 C7 50 C2
R 00 00 00 09
T 00 01 DB
R 00 00 00 09
T 00 01 DB 84 85 84 FC
R 00 00 00 09
T 00 01 DF
R 00 00 00 09
T 00 01 DF 88 6B 01 C6 50 CF 0D 01 27 07 A4 FD C7
R 00 00 00 09
T 00 01 EC 50 CF 20 05
R 00 00 00 09
T 00 01 F0
R 00 00 00 09
T 00 01 F0 AA 02 C7 50 CF
R 00 00 00 09
T 00 01 F5
R 00 00 00 09
T 00 01 F5 84 81
R 00 00 00 09
T 00 01 F7
R 00 00 00 09
T 00 01 F7 88 A1 1C 26 07 88 A6 01 6B 02 84 C5
R 00 00 00 09
T 00 02 03
R 00 00 00 09
T 00 02 03 0F 01
R 00 00 00 09
T 00 02 05
R 00 00 00 09
T 00 02 05 A0 2C 26 02 4C 21
R 00 00 00 09
T 00 02 0B
R 00 00 00 09
T 00 02 0B 4F
R 00 00 00 09
T 00 02 0C
R 00 00 00 09
T 00 02 0C 0D 04 27 25 0D 01 27 0A C6 50 C9 AA 04
R 00 00 00 09
T 00 02 19 C7 50 C9 20 3A
R 00 00 00 09
T 00 02 1E
R 00 00 00 09
T 00 02 1E 4D 27 0A C6 51 90 AA 04 C7 51 90 20 2D
R 00 00 00 09
T 00 02 2B
R 00 00 00 09
T 00 02 2B C6 50 CA AA 04 C7 50 CA 20 23
R 00 00 00 09
T 00 02 35
R 00 00 00 09
T 00 02 35 0D 01 27 0A C6 50 C9 A4 FB C7 50 C9 20
R 00 00 00 09
T 00 02 42 15
R 00 00 00 09
T 00 02 43
R 00 00 00 09
T 00 02 43 4D 27 0A C6 51 90 A4 FB C7 51 90 20 08
R 00 00 00 09
T 00 02 50
R 00 00 00 09
T 00 02 50 C6 50 CA A4 FB C7 50 CA
R 00 00 00 09
T 00 02 58
R 00 00 00 09
T 00 02 58 84 85 84 FC
R 00 00 00 09
T 00 02 5C
R 00 00 00 09
T 00 02 5C 88 97 A4 F0 88 9F A4 0F 97 84 4D 26 05
R 00 00 00 09
T 00 02 69 C6 50 C1 20 42
R 00 00 00 09
T 00 02 6E
R 00 00 00 09
T 00 02 6E A1 10 26 05 C6 50 C2 20 39
R 00 00 00 09
T 00 02 77
R 00 00 00 09
T 00 02 77 A1 20 26 05 C6 50 C5 20 30
R 00 00 00 09
T 00 02 80
R 00 00 00 09
T 00 02 80 A1 30 26 05 C6 50 C6 20 27
R 00 00 00 09
T 00 02 89
R 00 00 00 09
T 00 02 89 A1 40 26 05 C6 50 C9 20 1E
R 00 00 00 09
T 00 02 92
R 00 00 00 09
T 00 02 92 A1 50 26 05 C6 50 CA 20 15
R 00 00 00 09
T 00 02 9B
R 00 00 00 09
T 00 02 9B A1 70 26 05 C6 50 CF 20 0C
R 00 00 00 09
T 00 02 A4
R 00 00 00 09
T 00 02 A4 A1 80 26 05 C6 51 90 20 03
R 00 00 00 09
T 00 02 AD
R 00 00 00 09
T 00 02 AD C6 50 CB
R 00 00 00 09
T 00 02 B0
R 00 00 00 09
T 00 02 B0 88 A6 01 6B 02 9F 4D 27 05
R 00 00 00 09
T 00 02 B9
R 00 00 00 09
T 00 02 B9 08 02 4A 26 FB
R 00 00 00 09
T 00 02 BE
R 00 00 00 09
T 00 02 BE 84 14 01 27 03 A6 01 21
R 00 00 00 09
T 00 02 C6
R 00 00 00 09
T 00 02 C6 4F
R 00 00 00 09
T 00 02 C7
R 00 00 00 09
T 00 02 C7 5B 01 81
R 00 00 00 09
T 00 02 CA
R 00 00 00 09
T 00 02 CA 72 17 51 90 81
R 00 00 00 09
T 00 02 CF
R 00 00 00 09
T 00 02 CF 88 6B 01 A1 1C 26 0F C6 50 C9 14 01 A0
R 00 00 00 09
T 00 02 DC 0C 26 03 4C 20 24
R 00 00 00 09
T 00 02 E2
R 00 00 00 09
T 00 02 E2 4F 20 21
R 00 00 00 09
T 00 02 E5
R 00 00 00 09
T 00 02 E5 7B 01 A1 2C 26 0F C6 51 90 14 01 A0 0C
R 00 00 00 09
T 00 02 F2 26 03 4C 20 0F
R 00 00 00 09
T 00 02 F7
R 00 00 00 09
T 00 02 F7 4F 20 0C
R 00 00 00 09
T 00 02 FA
R 00 00 00 09
T 00 02 FA C6 50 CA 14 01 A0 0C 26 02 4C 21
R 00 00 00 09
T 00 03 05
R 00 00 00 09
T 00 03 05 4F
R 00 00 00 09
T 00 03 06
R 00 00 00 09
T 00 03 06 5B 01 81
R 00 00 00 09
T 00 03 09
R 00 00 00 09
T 00 03 09 A4 F0 A1 20 26 05 72 17 51 90 81
R 00 00 00 09
T 00 03 14
R 00 00 00 09
T 00 03 14 72 17 50 C9 81
R 00 00 00 09
T 00 00 00
R 00 00 00 07
T 00 00 00 01 02 04 08 10
R 00 00 00 07

823
firmware/STM8L15X_LD/stm8l15x_clk.rst Normal file
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@@ -0,0 +1,823 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_clk
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _SYSDivFactor
11 .globl _CLK_DeInit
12 .globl _CLK_HSICmd
13 .globl _CLK_AdjustHSICalibrationValue
14 .globl _CLK_LSICmd
15 .globl _CLK_HSEConfig
16 .globl _CLK_LSEConfig
17 .globl _CLK_ClockSecuritySystemEnable
18 .globl _CLK_ClockSecuritySytemDeglitchCmd
19 .globl _CLK_CCOConfig
20 .globl _CLK_SYSCLKSourceConfig
21 .globl _CLK_GetSYSCLKSource
22 .globl _CLK_GetClockFreq
23 .globl _CLK_SYSCLKDivConfig
24 .globl _CLK_SYSCLKSourceSwitchCmd
25 .globl _CLK_RTCClockConfig
26 .globl _CLK_BEEPClockConfig
27 .globl _CLK_PeripheralClockConfig
28 .globl _CLK_LSEClockSecuritySystemEnable
29 .globl _CLK_RTCCLKSwitchOnLSEFailureEnable
30 .globl _CLK_HaltConfig
31 .globl _CLK_MainRegulatorCmd
32 .globl _CLK_ITConfig
33 .globl _CLK_GetFlagStatus
34 .globl _CLK_ClearFlag
35 .globl _CLK_GetITStatus
36 .globl _CLK_ClearITPendingBit
37 ;--------------------------------------------------------
38 ; ram data
39 ;--------------------------------------------------------
40 .area DATA
41 ;--------------------------------------------------------
42 ; ram data
43 ;--------------------------------------------------------
44 .area INITIALIZED
45 ;--------------------------------------------------------
46 ; absolute external ram data
47 ;--------------------------------------------------------
48 .area DABS (ABS)
49
50 ; default segment ordering for linker
51 .area HOME
52 .area GSINIT
53 .area GSFINAL
54 .area CONST
55 .area INITIALIZER
56 .area CODE
57
58 ;--------------------------------------------------------
59 ; global & static initialisations
60 ;--------------------------------------------------------
61 .area HOME
62 .area GSINIT
63 .area GSFINAL
64 .area GSINIT
65 ;--------------------------------------------------------
66 ; Home
67 ;--------------------------------------------------------
68 .area HOME
69 .area HOME
70 ;--------------------------------------------------------
71 ; code
72 ;--------------------------------------------------------
73 .area CODE
74 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void)
75 ; -----------------------------------------
76 ; function CLK_DeInit
77 ; -----------------------------------------
008502 78 _CLK_DeInit:
79 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE;
008502 35 11 50 C2 [ 1] 80 mov 0x50c2+0, #0x11
81 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE;
008506 35 00 50 C6 [ 1] 82 mov 0x50c6+0, #0x00
83 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE;
00850A 35 00 50 C1 [ 1] 84 mov 0x50c1+0, #0x00
85 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE;
00850E 35 00 50 CB [ 1] 86 mov 0x50cb+0, #0x00
87 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE;
008512 35 01 50 C8 [ 1] 88 mov 0x50c8+0, #0x01
89 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE;
008516 35 00 50 C9 [ 1] 90 mov 0x50c9+0, #0x00
91 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
00851A 35 03 50 C0 [ 1] 92 mov 0x50c0+0, #0x03
93 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
00851E 35 00 50 C3 [ 1] 94 mov 0x50c3+0, #0x00
95 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
008522 35 80 50 C4 [ 1] 96 mov 0x50c4+0, #0x80
97 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE;
008526 35 00 50 D0 [ 1] 98 mov 0x50d0+0, #0x00
99 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE;
00852A 35 00 50 CA [ 1] 100 mov 0x50ca+0, #0x00
101 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE;
00852E 35 00 50 C5 [ 1] 102 mov 0x50c5+0, #0x00
103 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
008532 35 00 50 CD [ 1] 104 mov 0x50cd+0, #0x00
105 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE;
008536 35 00 50 CC [ 1] 106 mov 0x50cc+0, #0x00
107 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE;
00853A 35 00 50 CE [ 1] 108 mov 0x50ce+0, #0x00
109 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE;
00853E 35 B9 50 CF [ 1] 110 mov 0x50cf+0, #0xb9
111 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: }
008542 81 [ 4] 112 ret
113 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState)
114 ; -----------------------------------------
115 ; function CLK_HSICmd
116 ; -----------------------------------------
008543 117 _CLK_HSICmd:
008543 88 [ 1] 118 push a
008544 6B 01 [ 1] 119 ld (0x01, sp), a
120 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
008546 C6 50 C2 [ 1] 121 ld a, 0x50c2
122 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE)
008549 0D 01 [ 1] 123 tnz (0x01, sp)
00854B 27 07 [ 1] 124 jreq 00102$
125 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
00854D AA 01 [ 1] 126 or a, #0x01
00854F C7 50 C2 [ 1] 127 ld 0x50c2, a
008552 20 05 [ 2] 128 jra 00104$
008554 129 00102$:
130 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION);
008554 A4 FE [ 1] 131 and a, #0xfe
008556 C7 50 C2 [ 1] 132 ld 0x50c2, a
008559 133 00104$:
134 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: }
008559 84 [ 1] 135 pop a
00855A 81 [ 4] 136 ret
137 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue)
138 ; -----------------------------------------
139 ; function CLK_AdjustHSICalibrationValue
140 ; -----------------------------------------
00855B 141 _CLK_AdjustHSICalibrationValue:
142 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC;
00855B 35 AC 50 CE [ 1] 143 mov 0x50ce+0, #0xac
144 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35;
00855F 35 35 50 CE [ 1] 145 mov 0x50ce+0, #0x35
146 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue;
008563 C7 50 CD [ 1] 147 ld 0x50cd, a
148 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: }
008566 81 [ 4] 149 ret
150 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState)
151 ; -----------------------------------------
152 ; function CLK_LSICmd
153 ; -----------------------------------------
008567 154 _CLK_LSICmd:
008567 88 [ 1] 155 push a
008568 6B 01 [ 1] 156 ld (0x01, sp), a
157 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
00856A C6 50 C2 [ 1] 158 ld a, 0x50c2
159 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE)
00856D 0D 01 [ 1] 160 tnz (0x01, sp)
00856F 27 07 [ 1] 161 jreq 00102$
162 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
008571 AA 04 [ 1] 163 or a, #0x04
008573 C7 50 C2 [ 1] 164 ld 0x50c2, a
008576 20 05 [ 2] 165 jra 00104$
008578 166 00102$:
167 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION);
008578 A4 FB [ 1] 168 and a, #0xfb
00857A C7 50 C2 [ 1] 169 ld 0x50c2, a
00857D 170 00104$:
171 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: }
00857D 84 [ 1] 172 pop a
00857E 81 [ 4] 173 ret
174 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE)
175 ; -----------------------------------------
176 ; function CLK_HSEConfig
177 ; -----------------------------------------
00857F 178 _CLK_HSEConfig:
00857F 88 [ 1] 179 push a
008580 6B 01 [ 1] 180 ld (0x01, sp), a
181 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON;
008582 72 11 50 C6 [ 1] 182 bres 0x50c6, #0
183 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP;
008586 72 19 50 C6 [ 1] 184 bres 0x50c6, #4
185 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE;
00858A C6 50 C6 [ 1] 186 ld a, 0x50c6
00858D 1A 01 [ 1] 187 or a, (0x01, sp)
00858F C7 50 C6 [ 1] 188 ld 0x50c6, a
189 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: }
008592 84 [ 1] 190 pop a
008593 81 [ 4] 191 ret
192 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE)
193 ; -----------------------------------------
194 ; function CLK_LSEConfig
195 ; -----------------------------------------
008594 196 _CLK_LSEConfig:
008594 88 [ 1] 197 push a
008595 6B 01 [ 1] 198 ld (0x01, sp), a
199 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON;
008597 72 15 50 C6 [ 1] 200 bres 0x50c6, #2
201 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP;
00859B 72 1B 50 C6 [ 1] 202 bres 0x50c6, #5
203 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE;
00859F C6 50 C6 [ 1] 204 ld a, 0x50c6
0085A2 1A 01 [ 1] 205 or a, (0x01, sp)
0085A4 C7 50 C6 [ 1] 206 ld 0x50c6, a
207 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: }
0085A7 84 [ 1] 208 pop a
0085A8 81 [ 4] 209 ret
210 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void)
211 ; -----------------------------------------
212 ; function CLK_ClockSecuritySystemEnable
213 ; -----------------------------------------
0085A9 214 _CLK_ClockSecuritySystemEnable:
215 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN;
0085A9 72 10 50 CA [ 1] 216 bset 0x50ca, #0
217 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: }
0085AD 81 [ 4] 218 ret
219 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState)
220 ; -----------------------------------------
221 ; function CLK_ClockSecuritySytemDeglitchCmd
222 ; -----------------------------------------
0085AE 223 _CLK_ClockSecuritySytemDeglitchCmd:
0085AE 88 [ 1] 224 push a
0085AF 6B 01 [ 1] 225 ld (0x01, sp), a
226 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
0085B1 C6 50 CA [ 1] 227 ld a, 0x50ca
228 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE)
0085B4 0D 01 [ 1] 229 tnz (0x01, sp)
0085B6 27 07 [ 1] 230 jreq 00102$
231 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
0085B8 AA 10 [ 1] 232 or a, #0x10
0085BA C7 50 CA [ 1] 233 ld 0x50ca, a
0085BD 20 05 [ 2] 234 jra 00104$
0085BF 235 00102$:
236 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON);
0085BF A4 EF [ 1] 237 and a, #0xef
0085C1 C7 50 CA [ 1] 238 ld 0x50ca, a
0085C4 239 00104$:
240 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: }
0085C4 84 [ 1] 241 pop a
0085C5 81 [ 4] 242 ret
243 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv)
244 ; -----------------------------------------
245 ; function CLK_CCOConfig
246 ; -----------------------------------------
0085C6 247 _CLK_CCOConfig:
248 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv);
0085C6 1A 03 [ 1] 249 or a, (0x03, sp)
0085C8 C7 50 C5 [ 1] 250 ld 0x50c5, a
251 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: }
0085CB 85 [ 2] 252 popw x
0085CC 84 [ 1] 253 pop a
0085CD FC [ 2] 254 jp (x)
255 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
256 ; -----------------------------------------
257 ; function CLK_SYSCLKSourceConfig
258 ; -----------------------------------------
0085CE 259 _CLK_SYSCLKSourceConfig:
260 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource;
0085CE C7 50 C8 [ 1] 261 ld 0x50c8, a
262 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: }
0085D1 81 [ 4] 263 ret
264 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
265 ; -----------------------------------------
266 ; function CLK_GetSYSCLKSource
267 ; -----------------------------------------
0085D2 268 _CLK_GetSYSCLKSource:
269 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
0085D2 C6 50 C7 [ 1] 270 ld a, 0x50c7
271 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: }
0085D5 81 [ 4] 272 ret
273 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void)
274 ; -----------------------------------------
275 ; function CLK_GetClockFreq
276 ; -----------------------------------------
0085D6 277 _CLK_GetClockFreq:
0085D6 52 08 [ 2] 278 sub sp, #8
279 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0;
0085D8 5F [ 1] 280 clrw x
0085D9 1F 03 [ 2] 281 ldw (0x03, sp), x
0085DB 1F 01 [ 2] 282 ldw (0x01, sp), x
283 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;
0085DD C6 50 C7 [ 1] 284 ld a, 0x50c7
285 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI)
0085E0 A1 01 [ 1] 286 cp a, #0x01
0085E2 26 0C [ 1] 287 jrne 00108$
288 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE;
0085E4 AE 24 00 [ 2] 289 ldw x, #0x2400
0085E7 1F 03 [ 2] 290 ldw (0x03, sp), x
0085E9 AE 00 F4 [ 2] 291 ldw x, #0x00f4
0085EC 1F 01 [ 2] 292 ldw (0x01, sp), x
0085EE 20 1C [ 2] 293 jra 00109$
0085F0 294 00108$:
295 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI)
0085F0 A1 02 [ 1] 296 cp a, #0x02
0085F2 26 0A [ 1] 297 jrne 00105$
298 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE;
0085F4 AE 94 70 [ 2] 299 ldw x, #0x9470
0085F7 1F 03 [ 2] 300 ldw (0x03, sp), x
0085F9 5F [ 1] 301 clrw x
0085FA 1F 01 [ 2] 302 ldw (0x01, sp), x
0085FC 20 0E [ 2] 303 jra 00109$
0085FE 304 00105$:
305 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE)
0085FE A1 04 [ 1] 306 cp a, #0x04
008600 26 0A [ 1] 307 jrne 00109$
308 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE;
008602 AE 24 00 [ 2] 309 ldw x, #0x2400
008605 1F 03 [ 2] 310 ldw (0x03, sp), x
008607 AE 00 F4 [ 2] 311 ldw x, #0x00f4
00860A 1F 01 [ 2] 312 ldw (0x01, sp), x
313 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE;
00860C 314 00109$:
315 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
00860C C6 50 C0 [ 1] 316 ld a, 0x50c0
00860F A4 07 [ 1] 317 and a, #0x07
318 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp];
008611 5F [ 1] 319 clrw x
008612 97 [ 1] 320 ld xl, a
008613 D6 80 AF [ 1] 321 ld a, (_SYSDivFactor+0, x)
322 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc;
008616 5F [ 1] 323 clrw x
008617 0F 05 [ 1] 324 clr (0x05, sp)
008619 88 [ 1] 325 push a
00861A 89 [ 2] 326 pushw x
00861B 4F [ 1] 327 clr a
00861C 88 [ 1] 328 push a
00861D 1E 07 [ 2] 329 ldw x, (0x07, sp)
00861F 89 [ 2] 330 pushw x
008620 1E 07 [ 2] 331 ldw x, (0x07, sp)
008622 89 [ 2] 332 pushw x
333 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency);
008623 CD 92 5C [ 4] 334 call __divulong
335 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: }
008626 5B 10 [ 2] 336 addw sp, #16
008628 81 [ 4] 337 ret
338 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
339 ; -----------------------------------------
340 ; function CLK_SYSCLKDivConfig
341 ; -----------------------------------------
008629 342 _CLK_SYSCLKDivConfig:
343 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
008629 C7 50 C0 [ 1] 344 ld 0x50c0, a
345 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: }
00862C 81 [ 4] 346 ret
347 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
348 ; -----------------------------------------
349 ; function CLK_SYSCLKSourceSwitchCmd
350 ; -----------------------------------------
00862D 351 _CLK_SYSCLKSourceSwitchCmd:
00862D 88 [ 1] 352 push a
00862E 6B 01 [ 1] 353 ld (0x01, sp), a
354 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
008630 C6 50 C9 [ 1] 355 ld a, 0x50c9
356 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE)
008633 0D 01 [ 1] 357 tnz (0x01, sp)
008635 27 07 [ 1] 358 jreq 00102$
359 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
008637 AA 02 [ 1] 360 or a, #0x02
008639 C7 50 C9 [ 1] 361 ld 0x50c9, a
00863C 20 05 [ 2] 362 jra 00104$
00863E 363 00102$:
364 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
00863E A4 FD [ 1] 365 and a, #0xfd
008640 C7 50 C9 [ 1] 366 ld 0x50c9, a
008643 367 00104$:
368 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: }
008643 84 [ 1] 369 pop a
008644 81 [ 4] 370 ret
371 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
372 ; -----------------------------------------
373 ; function CLK_RTCClockConfig
374 ; -----------------------------------------
008645 375 _CLK_RTCClockConfig:
376 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
008645 1A 03 [ 1] 377 or a, (0x03, sp)
008647 C7 50 C1 [ 1] 378 ld 0x50c1, a
379 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: }
00864A 85 [ 2] 380 popw x
00864B 84 [ 1] 381 pop a
00864C FC [ 2] 382 jp (x)
383 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
384 ; -----------------------------------------
385 ; function CLK_BEEPClockConfig
386 ; -----------------------------------------
00864D 387 _CLK_BEEPClockConfig:
388 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);
00864D C7 50 CB [ 1] 389 ld 0x50cb, a
390 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: }
008650 81 [ 4] 391 ret
392 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
393 ; -----------------------------------------
394 ; function CLK_PeripheralClockConfig
395 ; -----------------------------------------
008651 396 _CLK_PeripheralClockConfig:
008651 89 [ 2] 397 pushw x
398 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);
008652 88 [ 1] 399 push a
008653 A4 F0 [ 1] 400 and a, #0xf0
008655 97 [ 1] 401 ld xl, a
008656 84 [ 1] 402 pop a
008657 90 93 [ 1] 403 ldw y, x
404 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
008659 A4 0F [ 1] 405 and a, #0x0f
00865B 88 [ 1] 406 push a
00865C A6 01 [ 1] 407 ld a, #0x01
00865E 6B 02 [ 1] 408 ld (0x02, sp), a
008660 84 [ 1] 409 pop a
008661 4D [ 1] 410 tnz a
008662 27 05 [ 1] 411 jreq 00154$
008664 412 00153$:
008664 08 01 [ 1] 413 sll (0x01, sp)
008666 4A [ 1] 414 dec a
008667 26 FB [ 1] 415 jrne 00153$
008669 416 00154$:
417 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
008669 7B 01 [ 1] 418 ld a, (0x01, sp)
00866B 43 [ 1] 419 cpl a
00866C 6B 02 [ 1] 420 ld (0x02, sp), a
421 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00)
00866E 9F [ 1] 422 ld a, xl
00866F 4D [ 1] 423 tnz a
008670 26 15 [ 1] 424 jrne 00114$
425 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
008672 C6 50 C3 [ 1] 426 ld a, 0x50c3
427 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE)
008675 0D 05 [ 1] 428 tnz (0x05, sp)
008677 27 07 [ 1] 429 jreq 00102$
430 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
008679 1A 01 [ 1] 431 or a, (0x01, sp)
00867B C7 50 C3 [ 1] 432 ld 0x50c3, a
00867E 20 35 [ 2] 433 jra 00116$
008680 434 00102$:
435 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
008680 14 02 [ 1] 436 and a, (0x02, sp)
008682 C7 50 C3 [ 1] 437 ld 0x50c3, a
008685 20 2E [ 2] 438 jra 00116$
008687 439 00114$:
440 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10)
008687 90 9F [ 1] 441 ld a, yl
008689 A1 10 [ 1] 442 cp a, #0x10
00868B 26 15 [ 1] 443 jrne 00111$
444 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
00868D C6 50 C4 [ 1] 445 ld a, 0x50c4
446 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE)
008690 0D 05 [ 1] 447 tnz (0x05, sp)
008692 27 07 [ 1] 448 jreq 00105$
449 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
008694 1A 01 [ 1] 450 or a, (0x01, sp)
008696 C7 50 C4 [ 1] 451 ld 0x50c4, a
008699 20 1A [ 2] 452 jra 00116$
00869B 453 00105$:
454 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
00869B 14 02 [ 1] 455 and a, (0x02, sp)
00869D C7 50 C4 [ 1] 456 ld 0x50c4, a
0086A0 20 13 [ 2] 457 jra 00116$
0086A2 458 00111$:
459 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
0086A2 C6 50 D0 [ 1] 460 ld a, 0x50d0
461 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE)
0086A5 0D 05 [ 1] 462 tnz (0x05, sp)
0086A7 27 07 [ 1] 463 jreq 00108$
464 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
0086A9 1A 01 [ 1] 465 or a, (0x01, sp)
0086AB C7 50 D0 [ 1] 466 ld 0x50d0, a
0086AE 20 05 [ 2] 467 jra 00116$
0086B0 468 00108$:
469 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
0086B0 14 02 [ 1] 470 and a, (0x02, sp)
0086B2 C7 50 D0 [ 1] 471 ld 0x50d0, a
0086B5 472 00116$:
473 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: }
0086B5 85 [ 2] 474 popw x
0086B6 85 [ 2] 475 popw x
0086B7 84 [ 1] 476 pop a
0086B8 FC [ 2] 477 jp (x)
478 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void)
479 ; -----------------------------------------
480 ; function CLK_LSEClockSecuritySystemEnable
481 ; -----------------------------------------
0086B9 482 _CLK_LSEClockSecuritySystemEnable:
483 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
0086B9 72 10 51 90 [ 1] 484 bset 0x5190, #0
485 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: }
0086BD 81 [ 4] 486 ret
487 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
488 ; -----------------------------------------
489 ; function CLK_RTCCLKSwitchOnLSEFailureEnable
490 ; -----------------------------------------
0086BE 491 _CLK_RTCCLKSwitchOnLSEFailureEnable:
492 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
0086BE 72 12 51 90 [ 1] 493 bset 0x5190, #1
494 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: }
0086C2 81 [ 4] 495 ret
496 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
497 ; -----------------------------------------
498 ; function CLK_HaltConfig
499 ; -----------------------------------------
0086C3 500 _CLK_HaltConfig:
0086C3 88 [ 1] 501 push a
502 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
0086C4 AE 50 C2 [ 2] 503 ldw x, #0x50c2
0086C7 88 [ 1] 504 push a
0086C8 F6 [ 1] 505 ld a, (x)
0086C9 6B 02 [ 1] 506 ld (0x02, sp), a
0086CB 84 [ 1] 507 pop a
508 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE)
0086CC 0D 04 [ 1] 509 tnz (0x04, sp)
0086CE 27 07 [ 1] 510 jreq 00102$
511 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
0086D0 1A 01 [ 1] 512 or a, (0x01, sp)
0086D2 C7 50 C2 [ 1] 513 ld 0x50c2, a
0086D5 20 06 [ 2] 514 jra 00104$
0086D7 515 00102$:
516 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt);
0086D7 43 [ 1] 517 cpl a
0086D8 14 01 [ 1] 518 and a, (0x01, sp)
0086DA C7 50 C2 [ 1] 519 ld 0x50c2, a
0086DD 520 00104$:
521 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: }
0086DD 84 [ 1] 522 pop a
0086DE 85 [ 2] 523 popw x
0086DF 84 [ 1] 524 pop a
0086E0 FC [ 2] 525 jp (x)
526 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState)
527 ; -----------------------------------------
528 ; function CLK_MainRegulatorCmd
529 ; -----------------------------------------
0086E1 530 _CLK_MainRegulatorCmd:
0086E1 88 [ 1] 531 push a
0086E2 6B 01 [ 1] 532 ld (0x01, sp), a
533 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
0086E4 C6 50 CF [ 1] 534 ld a, 0x50cf
535 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE)
0086E7 0D 01 [ 1] 536 tnz (0x01, sp)
0086E9 27 07 [ 1] 537 jreq 00102$
538 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
0086EB A4 FD [ 1] 539 and a, #0xfd
0086ED C7 50 CF [ 1] 540 ld 0x50cf, a
0086F0 20 05 [ 2] 541 jra 00104$
0086F2 542 00102$:
543 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF;
0086F2 AA 02 [ 1] 544 or a, #0x02
0086F4 C7 50 CF [ 1] 545 ld 0x50cf, a
0086F7 546 00104$:
547 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: }
0086F7 84 [ 1] 548 pop a
0086F8 81 [ 4] 549 ret
550 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
551 ; -----------------------------------------
552 ; function CLK_ITConfig
553 ; -----------------------------------------
0086F9 554 _CLK_ITConfig:
0086F9 88 [ 1] 555 push a
556 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
0086FA A1 1C [ 1] 557 cp a, #0x1c
0086FC 26 07 [ 1] 558 jrne 00154$
0086FE 88 [ 1] 559 push a
0086FF A6 01 [ 1] 560 ld a, #0x01
008701 6B 02 [ 1] 561 ld (0x02, sp), a
008703 84 [ 1] 562 pop a
008704 C5 563 .byte 0xc5
008705 564 00154$:
008705 0F 01 [ 1] 565 clr (0x01, sp)
008707 566 00155$:
567 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
008707 A0 2C [ 1] 568 sub a, #0x2c
008709 26 02 [ 1] 569 jrne 00157$
00870B 4C [ 1] 570 inc a
00870C 21 571 .byte 0x21
00870D 572 00157$:
00870D 4F [ 1] 573 clr a
00870E 574 00158$:
575 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE)
00870E 0D 04 [ 1] 576 tnz (0x04, sp)
008710 27 25 [ 1] 577 jreq 00114$
578 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
008712 0D 01 [ 1] 579 tnz (0x01, sp)
008714 27 0A [ 1] 580 jreq 00105$
581 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN;
008716 C6 50 C9 [ 1] 582 ld a, 0x50c9
008719 AA 04 [ 1] 583 or a, #0x04
00871B C7 50 C9 [ 1] 584 ld 0x50c9, a
00871E 20 3A [ 2] 585 jra 00116$
008720 586 00105$:
587 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
008720 4D [ 1] 588 tnz a
008721 27 0A [ 1] 589 jreq 00102$
590 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
008723 C6 51 90 [ 1] 591 ld a, 0x5190
008726 AA 04 [ 1] 592 or a, #0x04
008728 C7 51 90 [ 1] 593 ld 0x5190, a
00872B 20 2D [ 2] 594 jra 00116$
00872D 595 00102$:
596 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE;
00872D C6 50 CA [ 1] 597 ld a, 0x50ca
008730 AA 04 [ 1] 598 or a, #0x04
008732 C7 50 CA [ 1] 599 ld 0x50ca, a
008735 20 23 [ 2] 600 jra 00116$
008737 601 00114$:
602 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF)
008737 0D 01 [ 1] 603 tnz (0x01, sp)
008739 27 0A [ 1] 604 jreq 00111$
605 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
00873B C6 50 C9 [ 1] 606 ld a, 0x50c9
00873E A4 FB [ 1] 607 and a, #0xfb
008740 C7 50 C9 [ 1] 608 ld 0x50c9, a
008743 20 15 [ 2] 609 jra 00116$
008745 610 00111$:
611 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF)
008745 4D [ 1] 612 tnz a
008746 27 0A [ 1] 613 jreq 00108$
614 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
008748 C6 51 90 [ 1] 615 ld a, 0x5190
00874B A4 FB [ 1] 616 and a, #0xfb
00874D C7 51 90 [ 1] 617 ld 0x5190, a
008750 20 08 [ 2] 618 jra 00116$
008752 619 00108$:
620 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
008752 C6 50 CA [ 1] 621 ld a, 0x50ca
008755 A4 FB [ 1] 622 and a, #0xfb
008757 C7 50 CA [ 1] 623 ld 0x50ca, a
00875A 624 00116$:
625 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: }
00875A 84 [ 1] 626 pop a
00875B 85 [ 2] 627 popw x
00875C 84 [ 1] 628 pop a
00875D FC [ 2] 629 jp (x)
630 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
631 ; -----------------------------------------
632 ; function CLK_GetFlagStatus
633 ; -----------------------------------------
00875E 634 _CLK_GetFlagStatus:
00875E 88 [ 1] 635 push a
636 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
00875F 97 [ 1] 637 ld xl, a
008760 A4 F0 [ 1] 638 and a, #0xf0
639 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
008762 88 [ 1] 640 push a
008763 9F [ 1] 641 ld a, xl
008764 A4 0F [ 1] 642 and a, #0x0f
008766 97 [ 1] 643 ld xl, a
008767 84 [ 1] 644 pop a
645 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */
008768 4D [ 1] 646 tnz a
008769 26 05 [ 1] 647 jrne 00123$
648 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR;
00876B C6 50 C1 [ 1] 649 ld a, 0x50c1
00876E 20 42 [ 2] 650 jra 00124$
008770 651 00123$:
652 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */
008770 A1 10 [ 1] 653 cp a, #0x10
008772 26 05 [ 1] 654 jrne 00120$
655 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR;
008774 C6 50 C2 [ 1] 656 ld a, 0x50c2
008777 20 39 [ 2] 657 jra 00124$
008779 658 00120$:
659 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */
008779 A1 20 [ 1] 660 cp a, #0x20
00877B 26 05 [ 1] 661 jrne 00117$
662 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR;
00877D C6 50 C5 [ 1] 663 ld a, 0x50c5
008780 20 30 [ 2] 664 jra 00124$
008782 665 00117$:
666 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */
008782 A1 30 [ 1] 667 cp a, #0x30
008784 26 05 [ 1] 668 jrne 00114$
669 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR;
008786 C6 50 C6 [ 1] 670 ld a, 0x50c6
008789 20 27 [ 2] 671 jra 00124$
00878B 672 00114$:
673 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */
00878B A1 40 [ 1] 674 cp a, #0x40
00878D 26 05 [ 1] 675 jrne 00111$
676 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR;
00878F C6 50 C9 [ 1] 677 ld a, 0x50c9
008792 20 1E [ 2] 678 jra 00124$
008794 679 00111$:
680 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */
008794 A1 50 [ 1] 681 cp a, #0x50
008796 26 05 [ 1] 682 jrne 00108$
683 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR;
008798 C6 50 CA [ 1] 684 ld a, 0x50ca
00879B 20 15 [ 2] 685 jra 00124$
00879D 686 00108$:
687 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */
00879D A1 70 [ 1] 688 cp a, #0x70
00879F 26 05 [ 1] 689 jrne 00105$
690 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR;
0087A1 C6 50 CF [ 1] 691 ld a, 0x50cf
0087A4 20 0C [ 2] 692 jra 00124$
0087A6 693 00105$:
694 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
0087A6 A1 80 [ 1] 695 cp a, #0x80
0087A8 26 05 [ 1] 696 jrne 00102$
697 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR;
0087AA C6 51 90 [ 1] 698 ld a, 0x5190
0087AD 20 03 [ 2] 699 jra 00124$
0087AF 700 00102$:
701 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR;
0087AF C6 50 CB [ 1] 702 ld a, 0x50cb
0087B2 703 00124$:
704 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
0087B2 88 [ 1] 705 push a
0087B3 A6 01 [ 1] 706 ld a, #0x01
0087B5 6B 02 [ 1] 707 ld (0x02, sp), a
0087B7 9F [ 1] 708 ld a, xl
0087B8 4D [ 1] 709 tnz a
0087B9 27 05 [ 1] 710 jreq 00216$
0087BB 711 00215$:
0087BB 08 02 [ 1] 712 sll (0x02, sp)
0087BD 4A [ 1] 713 dec a
0087BE 26 FB [ 1] 714 jrne 00215$
0087C0 715 00216$:
0087C0 84 [ 1] 716 pop a
0087C1 14 01 [ 1] 717 and a, (0x01, sp)
0087C3 27 03 [ 1] 718 jreq 00126$
719 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET;
0087C5 A6 01 [ 1] 720 ld a, #0x01
721 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET;
0087C7 21 722 .byte 0x21
0087C8 723 00126$:
0087C8 4F [ 1] 724 clr a
0087C9 725 00127$:
726 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus);
727 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: }
0087C9 5B 01 [ 2] 728 addw sp, #1
0087CB 81 [ 4] 729 ret
730 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void)
731 ; -----------------------------------------
732 ; function CLK_ClearFlag
733 ; -----------------------------------------
0087CC 734 _CLK_ClearFlag:
735 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
0087CC 72 17 51 90 [ 1] 736 bres 0x5190, #3
737 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: }
0087D0 81 [ 4] 738 ret
739 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
740 ; -----------------------------------------
741 ; function CLK_GetITStatus
742 ; -----------------------------------------
0087D1 743 _CLK_GetITStatus:
0087D1 88 [ 1] 744 push a
745 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF)
0087D2 6B 01 [ 1] 746 ld (0x01, sp), a
0087D4 A1 1C [ 1] 747 cp a, #0x1c
0087D6 26 0F [ 1] 748 jrne 00114$
749 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
0087D8 C6 50 C9 [ 1] 750 ld a, 0x50c9
0087DB 14 01 [ 1] 751 and a, (0x01, sp)
752 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET;
0087DD A0 0C [ 1] 753 sub a, #0x0c
0087DF 26 03 [ 1] 754 jrne 00102$
0087E1 4C [ 1] 755 inc a
0087E2 20 24 [ 2] 756 jra 00115$
0087E4 757 00102$:
758 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET;
0087E4 4F [ 1] 759 clr a
0087E5 20 21 [ 2] 760 jra 00115$
0087E7 761 00114$:
762 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF)
0087E7 7B 01 [ 1] 763 ld a, (0x01, sp)
0087E9 A1 2C [ 1] 764 cp a, #0x2c
0087EB 26 0F [ 1] 765 jrne 00111$
766 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
0087ED C6 51 90 [ 1] 767 ld a, 0x5190
0087F0 14 01 [ 1] 768 and a, (0x01, sp)
769 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET;
0087F2 A0 0C [ 1] 770 sub a, #0x0c
0087F4 26 03 [ 1] 771 jrne 00105$
0087F6 4C [ 1] 772 inc a
0087F7 20 0F [ 2] 773 jra 00115$
0087F9 774 00105$:
775 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET;
0087F9 4F [ 1] 776 clr a
0087FA 20 0C [ 2] 777 jra 00115$
0087FC 778 00111$:
779 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
0087FC C6 50 CA [ 1] 780 ld a, 0x50ca
0087FF 14 01 [ 1] 781 and a, (0x01, sp)
782 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET;
008801 A0 0C [ 1] 783 sub a, #0x0c
008803 26 02 [ 1] 784 jrne 00108$
008805 4C [ 1] 785 inc a
786 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET;
008806 21 787 .byte 0x21
008807 788 00108$:
008807 4F [ 1] 789 clr a
008808 790 00115$:
791 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus;
792 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: }
008808 5B 01 [ 2] 793 addw sp, #1
00880A 81 [ 4] 794 ret
795 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
796 ; -----------------------------------------
797 ; function CLK_ClearITPendingBit
798 ; -----------------------------------------
00880B 799 _CLK_ClearITPendingBit:
800 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
00880B A4 F0 [ 1] 801 and a, #0xf0
00880D A1 20 [ 1] 802 cp a, #0x20
00880F 26 05 [ 1] 803 jrne 00102$
804 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
008811 72 17 51 90 [ 1] 805 bres 0x5190, #3
008815 81 [ 4] 806 ret
008816 807 00102$:
808 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
008816 72 17 50 C9 [ 1] 809 bres 0x50c9, #3
810 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: }
00881A 81 [ 4] 811 ret
812 .area CODE
813 .area CONST
814 .area CONST
0080AF 815 _SYSDivFactor:
0080AF 01 816 .db #0x01 ; 1
0080B0 02 817 .db #0x02 ; 2
0080B1 04 818 .db #0x04 ; 4
0080B2 08 819 .db #0x08 ; 8
0080B3 10 820 .db #0x10 ; 16
821 .area CODE
822 .area INITIALIZER
823 .area CABS (ABS)

56
firmware/STM8L15X_LD/stm8l15x_clk.sym Normal file
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@@ -0,0 +1,56 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
9 _CLK_AdjustHSICalibrationValue 000059 GR
9 _CLK_BEEPClockConfig 00014B GR
9 _CLK_CCOConfig 0000C4 GR
9 _CLK_ClearFlag 0002CA GR
9 _CLK_ClearITPendingBit 000309 GR
9 _CLK_ClockSecuritySystemEnable 0000A7 GR
9 _CLK_ClockSecuritySytemDeglitchCmd 0000AC GR
9 _CLK_DeInit 000000 GR
9 _CLK_GetClockFreq 0000D4 GR
9 _CLK_GetFlagStatus 00025C GR
9 _CLK_GetITStatus 0002CF GR
9 _CLK_GetSYSCLKSource 0000D0 GR
9 _CLK_HSEConfig 00007D GR
9 _CLK_HSICmd 000041 GR
9 _CLK_HaltConfig 0001C1 GR
9 _CLK_ITConfig 0001F7 GR
9 _CLK_LSEClockSecuritySystemEnable 0001B7 GR
9 _CLK_LSEConfig 000092 GR
9 _CLK_LSICmd 000065 GR
9 _CLK_MainRegulatorCmd 0001DF GR
9 _CLK_PeripheralClockConfig 00014F GR
9 _CLK_RTCCLKSwitchOnLSEFailureEnable 0001BC GR
9 _CLK_RTCClockConfig 000143 GR
9 _CLK_SYSCLKDivConfig 000127 GR
9 _CLK_SYSCLKSourceConfig 0000CC GR
9 _CLK_SYSCLKSourceSwitchCmd 00012B GR
7 _SYSDivFactor 000000 GR
__divulong ****** GX
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 DABS size 0 flags 8
4 HOME size 0 flags 0
5 GSINIT size 0 flags 0
6 GSFINAL size 0 flags 0
7 CONST size 5 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size 319 flags 0
A CABS size 0 flags 8

349
firmware/STM8L15X_LD/stm8l15x_gpio.asm Normal file
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;--------------------------------------------------------
; File Created by SDCC : free open source ISO C Compiler
; Version 4.5.0 #15242 (Linux)
;--------------------------------------------------------
.module stm8l15x_gpio
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _GPIO_DeInit
.globl _GPIO_Init
.globl _GPIO_ExternalPullUpConfig
.globl _GPIO_Write
.globl _GPIO_WriteBit
.globl _GPIO_SetBits
.globl _GPIO_ResetBits
.globl _GPIO_ToggleBits
.globl _GPIO_ReadInputData
.globl _GPIO_ReadOutputData
.globl _GPIO_ReadInputDataBit
.globl _GPIO_ReadOutputDataBit
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area INITIALIZED
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area DABS (ABS)
; default segment ordering for linker
.area HOME
.area GSINIT
.area GSFINAL
.area CONST
.area INITIALIZER
.area CODE
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME
.area GSINIT
.area GSFINAL
.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME
.area HOME
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CODE
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 96: void GPIO_DeInit(GPIO_TypeDef* GPIOx)
; -----------------------------------------
; function GPIO_DeInit
; -----------------------------------------
_GPIO_DeInit:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 98: GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
ldw y, x
clr (0x0004, x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 99: GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
clr (y)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 100: GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
ldw x, y
clr (0x02, x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 101: GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
ldw x, y
clr (0x0003, x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 102: }
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 133: void GPIO_Init(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
; -----------------------------------------
; function GPIO_Init
; -----------------------------------------
_GPIO_Init:
sub sp, #8
ldw (0x07, sp), x
ld (0x06, sp), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
ldw x, (0x07, sp)
addw x, #0x0004
ldw (0x01, sp), x
ld a, (x)
push a
ld a, (0x07, sp)
cpl a
ld (0x04, sp), a
pop a
and a, (0x03, sp)
ldw x, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
ldw x, (0x07, sp)
incw x
incw x
ldw (0x04, sp), x
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 149: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x80) != (uint8_t)0x00) /* Output mode */
tnz (0x0b, sp)
jrpl 00105$
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
ldw x, (0x07, sp)
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 151: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x10) != (uint8_t)0x00) /* High level */
push a
ld a, (0x0c, sp)
bcp a, #0x10
pop a
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
or a, (0x06, sp)
ld (x), a
jra 00103$
00102$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 156: GPIOx->ODR &= (uint8_t)(~(GPIO_Pin));
and a, (0x03, sp)
ld (x), a
00103$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
ldw x, (0x04, sp)
ld a, (x)
or a, (0x06, sp)
ldw x, (0x04, sp)
ld (x), a
jra 00106$
00105$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 163: GPIOx->DDR &= (uint8_t)(~(GPIO_Pin));
ldw x, (0x04, sp)
ld a, (x)
and a, (0x03, sp)
ldw x, (0x04, sp)
ld (x), a
00106$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
ldw x, (0x07, sp)
addw x, #0x0003
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 170: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x40) != (uint8_t)0x00) /* Pull-Up or Push-Pull */
push a
ld a, (0x0c, sp)
bcp a, #0x40
pop a
jreq 00108$
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
or a, (0x06, sp)
ld (x), a
jra 00109$
00108$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 175: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
and a, (0x03, sp)
ld (x), a
00109$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
ldw x, (0x01, sp)
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 182: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x20) != (uint8_t)0x00) /* Interrupt or Slow slope */
push a
ld a, (0x0c, sp)
bcp a, #0x20
pop a
jreq 00111$
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 184: GPIOx->CR2 |= GPIO_Pin;
or a, (0x06, sp)
ldw x, (0x01, sp)
ld (x), a
jra 00113$
00111$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 187: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
and a, (0x03, sp)
ldw x, (0x01, sp)
ld (x), a
00113$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 190: }
addw sp, #8
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 209: void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, FunctionalState NewState)
; -----------------------------------------
; function GPIO_ExternalPullUpConfig
; -----------------------------------------
_GPIO_ExternalPullUpConfig:
push a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
addw x, #0x0003
push a
ld a, (x)
ld (0x02, sp), a
pop a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 215: if (NewState != DISABLE) /* External Pull-Up Set*/
tnz (0x04, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
or a, (0x01, sp)
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 220: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
cpl a
and a, (0x01, sp)
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 222: }
pop a
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 248: void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t GPIO_PortVal)
; -----------------------------------------
; function GPIO_Write
; -----------------------------------------
_GPIO_Write:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 250: GPIOx->ODR = GPIO_PortVal;
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 251: }
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 270: void GPIO_WriteBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction GPIO_BitVal)
; -----------------------------------------
; function GPIO_WriteBit
; -----------------------------------------
_GPIO_WriteBit:
push a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
push a
ld a, (x)
ld (0x02, sp), a
pop a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 276: if (GPIO_BitVal != RESET)
tnz (0x04, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
or a, (0x01, sp)
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 283: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
cpl a
and a, (0x01, sp)
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 285: }
pop a
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 303: void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
; -----------------------------------------
; function GPIO_SetBits
; -----------------------------------------
_GPIO_SetBits:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 305: GPIOx->ODR |= GPIO_Pin;
ld a, (x)
or a, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 306: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 324: void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
; -----------------------------------------
; function GPIO_ResetBits
; -----------------------------------------
_GPIO_ResetBits:
push a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 326: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
push a
ld a, (x)
ld (0x02, sp), a
pop a
cpl a
and a, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 327: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 336: void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
; -----------------------------------------
; function GPIO_ToggleBits
; -----------------------------------------
_GPIO_ToggleBits:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 338: GPIOx->ODR ^= GPIO_Pin;
ld a, (x)
xor a, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 339: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 347: uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
; -----------------------------------------
; function GPIO_ReadInputData
; -----------------------------------------
_GPIO_ReadInputData:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 349: return ((uint8_t)GPIOx->IDR);
ld a, (0x1, x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 350: }
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 358: uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
; -----------------------------------------
; function GPIO_ReadOutputData
; -----------------------------------------
_GPIO_ReadOutputData:
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 360: return ((uint8_t)GPIOx->ODR);
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 361: }
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 378: BitStatus GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
; -----------------------------------------
; function GPIO_ReadInputDataBit
; -----------------------------------------
_GPIO_ReadInputDataBit:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 380: return ((BitStatus)(GPIOx->IDR & (uint8_t)GPIO_Pin));
ld a, (0x1, x)
and a, (0x01, sp)
neg a
clr a
rlc a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 381: }
addw sp, #1
ret
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 389: BitStatus GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
; -----------------------------------------
; function GPIO_ReadOutputDataBit
; -----------------------------------------
_GPIO_ReadOutputDataBit:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 391: return ((BitStatus)(GPIOx->ODR & (uint8_t)GPIO_Pin));
ld a, (x)
and a, (0x01, sp)
neg a
clr a
rlc a
; ../inc/stm8l151x/src/stm8l15x_gpio.c: 392: }
addw sp, #1
ret
.area CODE
.area CONST
.area INITIALIZER
.area CABS (ABS)

349
firmware/STM8L15X_LD/stm8l15x_gpio.lst Normal file
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1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_gpio
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _GPIO_DeInit
11 .globl _GPIO_Init
12 .globl _GPIO_ExternalPullUpConfig
13 .globl _GPIO_Write
14 .globl _GPIO_WriteBit
15 .globl _GPIO_SetBits
16 .globl _GPIO_ResetBits
17 .globl _GPIO_ToggleBits
18 .globl _GPIO_ReadInputData
19 .globl _GPIO_ReadOutputData
20 .globl _GPIO_ReadInputDataBit
21 .globl _GPIO_ReadOutputDataBit
22 ;--------------------------------------------------------
23 ; ram data
24 ;--------------------------------------------------------
25 .area DATA
26 ;--------------------------------------------------------
27 ; ram data
28 ;--------------------------------------------------------
29 .area INITIALIZED
30 ;--------------------------------------------------------
31 ; absolute external ram data
32 ;--------------------------------------------------------
33 .area DABS (ABS)
34
35 ; default segment ordering for linker
36 .area HOME
37 .area GSINIT
38 .area GSFINAL
39 .area CONST
40 .area INITIALIZER
41 .area CODE
42
43 ;--------------------------------------------------------
44 ; global & static initialisations
45 ;--------------------------------------------------------
46 .area HOME
47 .area GSINIT
48 .area GSFINAL
49 .area GSINIT
50 ;--------------------------------------------------------
51 ; Home
52 ;--------------------------------------------------------
53 .area HOME
54 .area HOME
55 ;--------------------------------------------------------
56 ; code
57 ;--------------------------------------------------------
58 .area CODE
59 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 96: void GPIO_DeInit(GPIO_TypeDef* GPIOx)
60 ; -----------------------------------------
61 ; function GPIO_DeInit
62 ; -----------------------------------------
000000 63 _GPIO_DeInit:
64 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 98: GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
000000 90 93 [ 1] 65 ldw y, x
000002 6F 04 [ 1] 66 clr (0x0004, x)
67 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 99: GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
000004 90 7F [ 1] 68 clr (y)
69 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 100: GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
000006 93 [ 1] 70 ldw x, y
000007 6F 02 [ 1] 71 clr (0x02, x)
72 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 101: GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
000009 93 [ 1] 73 ldw x, y
00000A 6F 03 [ 1] 74 clr (0x0003, x)
75 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 102: }
00000C 81 [ 4] 76 ret
77 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 133: void GPIO_Init(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
78 ; -----------------------------------------
79 ; function GPIO_Init
80 ; -----------------------------------------
00000D 81 _GPIO_Init:
00000D 52 08 [ 2] 82 sub sp, #8
00000F 1F 07 [ 2] 83 ldw (0x07, sp), x
000011 6B 06 [ 1] 84 ld (0x06, sp), a
85 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
000013 1E 07 [ 2] 86 ldw x, (0x07, sp)
000015 1C 00 04 [ 2] 87 addw x, #0x0004
000018 1F 01 [ 2] 88 ldw (0x01, sp), x
00001A F6 [ 1] 89 ld a, (x)
00001B 88 [ 1] 90 push a
00001C 7B 07 [ 1] 91 ld a, (0x07, sp)
00001E 43 [ 1] 92 cpl a
00001F 6B 04 [ 1] 93 ld (0x04, sp), a
000021 84 [ 1] 94 pop a
000022 14 03 [ 1] 95 and a, (0x03, sp)
000024 1E 01 [ 2] 96 ldw x, (0x01, sp)
000026 F7 [ 1] 97 ld (x), a
98 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
000027 1E 07 [ 2] 99 ldw x, (0x07, sp)
000029 5C [ 1] 100 incw x
00002A 5C [ 1] 101 incw x
00002B 1F 04 [ 2] 102 ldw (0x04, sp), x
103 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 149: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x80) != (uint8_t)0x00) /* Output mode */
00002D 0D 0B [ 1] 104 tnz (0x0b, sp)
00002F 2A 1D [ 1] 105 jrpl 00105$
106 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
000031 1E 07 [ 2] 107 ldw x, (0x07, sp)
000033 F6 [ 1] 108 ld a, (x)
109 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 151: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x10) != (uint8_t)0x00) /* High level */
000034 88 [ 1] 110 push a
000035 7B 0C [ 1] 111 ld a, (0x0c, sp)
000037 A5 10 [ 1] 112 bcp a, #0x10
000039 84 [ 1] 113 pop a
00003A 27 05 [ 1] 114 jreq 00102$
115 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
00003C 1A 06 [ 1] 116 or a, (0x06, sp)
00003E F7 [ 1] 117 ld (x), a
00003F 20 03 [ 2] 118 jra 00103$
000041 119 00102$:
120 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 156: GPIOx->ODR &= (uint8_t)(~(GPIO_Pin));
000041 14 03 [ 1] 121 and a, (0x03, sp)
000043 F7 [ 1] 122 ld (x), a
000044 123 00103$:
124 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
000044 1E 04 [ 2] 125 ldw x, (0x04, sp)
000046 F6 [ 1] 126 ld a, (x)
000047 1A 06 [ 1] 127 or a, (0x06, sp)
000049 1E 04 [ 2] 128 ldw x, (0x04, sp)
00004B F7 [ 1] 129 ld (x), a
00004C 20 08 [ 2] 130 jra 00106$
00004E 131 00105$:
132 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 163: GPIOx->DDR &= (uint8_t)(~(GPIO_Pin));
00004E 1E 04 [ 2] 133 ldw x, (0x04, sp)
000050 F6 [ 1] 134 ld a, (x)
000051 14 03 [ 1] 135 and a, (0x03, sp)
000053 1E 04 [ 2] 136 ldw x, (0x04, sp)
000055 F7 [ 1] 137 ld (x), a
000056 138 00106$:
139 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
000056 1E 07 [ 2] 140 ldw x, (0x07, sp)
000058 1C 00 03 [ 2] 141 addw x, #0x0003
00005B F6 [ 1] 142 ld a, (x)
143 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 170: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x40) != (uint8_t)0x00) /* Pull-Up or Push-Pull */
00005C 88 [ 1] 144 push a
00005D 7B 0C [ 1] 145 ld a, (0x0c, sp)
00005F A5 40 [ 1] 146 bcp a, #0x40
000061 84 [ 1] 147 pop a
000062 27 05 [ 1] 148 jreq 00108$
149 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
000064 1A 06 [ 1] 150 or a, (0x06, sp)
000066 F7 [ 1] 151 ld (x), a
000067 20 03 [ 2] 152 jra 00109$
000069 153 00108$:
154 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 175: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
000069 14 03 [ 1] 155 and a, (0x03, sp)
00006B F7 [ 1] 156 ld (x), a
00006C 157 00109$:
158 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
00006C 1E 01 [ 2] 159 ldw x, (0x01, sp)
00006E F6 [ 1] 160 ld a, (x)
161 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 182: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x20) != (uint8_t)0x00) /* Interrupt or Slow slope */
00006F 88 [ 1] 162 push a
000070 7B 0C [ 1] 163 ld a, (0x0c, sp)
000072 A5 20 [ 1] 164 bcp a, #0x20
000074 84 [ 1] 165 pop a
000075 27 07 [ 1] 166 jreq 00111$
167 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 184: GPIOx->CR2 |= GPIO_Pin;
000077 1A 06 [ 1] 168 or a, (0x06, sp)
000079 1E 01 [ 2] 169 ldw x, (0x01, sp)
00007B F7 [ 1] 170 ld (x), a
00007C 20 05 [ 2] 171 jra 00113$
00007E 172 00111$:
173 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 187: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
00007E 14 03 [ 1] 174 and a, (0x03, sp)
000080 1E 01 [ 2] 175 ldw x, (0x01, sp)
000082 F7 [ 1] 176 ld (x), a
000083 177 00113$:
178 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 190: }
000083 5B 08 [ 2] 179 addw sp, #8
000085 85 [ 2] 180 popw x
000086 84 [ 1] 181 pop a
000087 FC [ 2] 182 jp (x)
183 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 209: void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, FunctionalState NewState)
184 ; -----------------------------------------
185 ; function GPIO_ExternalPullUpConfig
186 ; -----------------------------------------
000088 187 _GPIO_ExternalPullUpConfig:
000088 88 [ 1] 188 push a
189 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
000089 1C 00 03 [ 2] 190 addw x, #0x0003
00008C 88 [ 1] 191 push a
00008D F6 [ 1] 192 ld a, (x)
00008E 6B 02 [ 1] 193 ld (0x02, sp), a
000090 84 [ 1] 194 pop a
195 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 215: if (NewState != DISABLE) /* External Pull-Up Set*/
000091 0D 04 [ 1] 196 tnz (0x04, sp)
000093 27 05 [ 1] 197 jreq 00102$
198 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
000095 1A 01 [ 1] 199 or a, (0x01, sp)
000097 F7 [ 1] 200 ld (x), a
000098 20 04 [ 2] 201 jra 00104$
00009A 202 00102$:
203 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 220: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
00009A 43 [ 1] 204 cpl a
00009B 14 01 [ 1] 205 and a, (0x01, sp)
00009D F7 [ 1] 206 ld (x), a
00009E 207 00104$:
208 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 222: }
00009E 84 [ 1] 209 pop a
00009F 85 [ 2] 210 popw x
0000A0 84 [ 1] 211 pop a
0000A1 FC [ 2] 212 jp (x)
213 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 248: void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t GPIO_PortVal)
214 ; -----------------------------------------
215 ; function GPIO_Write
216 ; -----------------------------------------
0000A2 217 _GPIO_Write:
218 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 250: GPIOx->ODR = GPIO_PortVal;
0000A2 F7 [ 1] 219 ld (x), a
220 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 251: }
0000A3 81 [ 4] 221 ret
222 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 270: void GPIO_WriteBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction GPIO_BitVal)
223 ; -----------------------------------------
224 ; function GPIO_WriteBit
225 ; -----------------------------------------
0000A4 226 _GPIO_WriteBit:
0000A4 88 [ 1] 227 push a
228 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
0000A5 88 [ 1] 229 push a
0000A6 F6 [ 1] 230 ld a, (x)
0000A7 6B 02 [ 1] 231 ld (0x02, sp), a
0000A9 84 [ 1] 232 pop a
233 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 276: if (GPIO_BitVal != RESET)
0000AA 0D 04 [ 1] 234 tnz (0x04, sp)
0000AC 27 05 [ 1] 235 jreq 00102$
236 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
0000AE 1A 01 [ 1] 237 or a, (0x01, sp)
0000B0 F7 [ 1] 238 ld (x), a
0000B1 20 04 [ 2] 239 jra 00104$
0000B3 240 00102$:
241 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 283: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
0000B3 43 [ 1] 242 cpl a
0000B4 14 01 [ 1] 243 and a, (0x01, sp)
0000B6 F7 [ 1] 244 ld (x), a
0000B7 245 00104$:
246 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 285: }
0000B7 84 [ 1] 247 pop a
0000B8 85 [ 2] 248 popw x
0000B9 84 [ 1] 249 pop a
0000BA FC [ 2] 250 jp (x)
251 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 303: void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
252 ; -----------------------------------------
253 ; function GPIO_SetBits
254 ; -----------------------------------------
0000BB 255 _GPIO_SetBits:
0000BB 88 [ 1] 256 push a
0000BC 6B 01 [ 1] 257 ld (0x01, sp), a
258 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 305: GPIOx->ODR |= GPIO_Pin;
0000BE F6 [ 1] 259 ld a, (x)
0000BF 1A 01 [ 1] 260 or a, (0x01, sp)
0000C1 F7 [ 1] 261 ld (x), a
262 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 306: }
0000C2 84 [ 1] 263 pop a
0000C3 81 [ 4] 264 ret
265 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 324: void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
266 ; -----------------------------------------
267 ; function GPIO_ResetBits
268 ; -----------------------------------------
0000C4 269 _GPIO_ResetBits:
0000C4 88 [ 1] 270 push a
271 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 326: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
0000C5 88 [ 1] 272 push a
0000C6 F6 [ 1] 273 ld a, (x)
0000C7 6B 02 [ 1] 274 ld (0x02, sp), a
0000C9 84 [ 1] 275 pop a
0000CA 43 [ 1] 276 cpl a
0000CB 14 01 [ 1] 277 and a, (0x01, sp)
0000CD F7 [ 1] 278 ld (x), a
279 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 327: }
0000CE 84 [ 1] 280 pop a
0000CF 81 [ 4] 281 ret
282 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 336: void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
283 ; -----------------------------------------
284 ; function GPIO_ToggleBits
285 ; -----------------------------------------
0000D0 286 _GPIO_ToggleBits:
0000D0 88 [ 1] 287 push a
0000D1 6B 01 [ 1] 288 ld (0x01, sp), a
289 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 338: GPIOx->ODR ^= GPIO_Pin;
0000D3 F6 [ 1] 290 ld a, (x)
0000D4 18 01 [ 1] 291 xor a, (0x01, sp)
0000D6 F7 [ 1] 292 ld (x), a
293 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 339: }
0000D7 84 [ 1] 294 pop a
0000D8 81 [ 4] 295 ret
296 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 347: uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
297 ; -----------------------------------------
298 ; function GPIO_ReadInputData
299 ; -----------------------------------------
0000D9 300 _GPIO_ReadInputData:
301 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 349: return ((uint8_t)GPIOx->IDR);
0000D9 E6 01 [ 1] 302 ld a, (0x1, x)
303 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 350: }
0000DB 81 [ 4] 304 ret
305 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 358: uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
306 ; -----------------------------------------
307 ; function GPIO_ReadOutputData
308 ; -----------------------------------------
0000DC 309 _GPIO_ReadOutputData:
310 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 360: return ((uint8_t)GPIOx->ODR);
0000DC F6 [ 1] 311 ld a, (x)
312 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 361: }
0000DD 81 [ 4] 313 ret
314 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 378: BitStatus GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
315 ; -----------------------------------------
316 ; function GPIO_ReadInputDataBit
317 ; -----------------------------------------
0000DE 318 _GPIO_ReadInputDataBit:
0000DE 88 [ 1] 319 push a
0000DF 6B 01 [ 1] 320 ld (0x01, sp), a
321 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 380: return ((BitStatus)(GPIOx->IDR & (uint8_t)GPIO_Pin));
0000E1 E6 01 [ 1] 322 ld a, (0x1, x)
0000E3 14 01 [ 1] 323 and a, (0x01, sp)
0000E5 40 [ 1] 324 neg a
0000E6 4F [ 1] 325 clr a
0000E7 49 [ 1] 326 rlc a
327 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 381: }
0000E8 5B 01 [ 2] 328 addw sp, #1
0000EA 81 [ 4] 329 ret
330 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 389: BitStatus GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
331 ; -----------------------------------------
332 ; function GPIO_ReadOutputDataBit
333 ; -----------------------------------------
0000EB 334 _GPIO_ReadOutputDataBit:
0000EB 88 [ 1] 335 push a
0000EC 6B 01 [ 1] 336 ld (0x01, sp), a
337 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 391: return ((BitStatus)(GPIOx->ODR & (uint8_t)GPIO_Pin));
0000EE F6 [ 1] 338 ld a, (x)
0000EF 14 01 [ 1] 339 and a, (0x01, sp)
0000F1 40 [ 1] 340 neg a
0000F2 4F [ 1] 341 clr a
0000F3 49 [ 1] 342 rlc a
343 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 392: }
0000F4 5B 01 [ 2] 344 addw sp, #1
0000F6 81 [ 4] 345 ret
346 .area CODE
347 .area CONST
348 .area INITIALIZER
349 .area CABS (ABS)

137
firmware/STM8L15X_LD/stm8l15x_gpio.rel Normal file
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XH3
H B areas D global symbols
M stm8l15x_gpio
S .__.ABS. Def000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size F7 flags 0 addr 0
S _GPIO_Init Def00000D
S _GPIO_ResetBits Def0000C4
S _GPIO_ReadInputDataBit Def0000DE
S _GPIO_ReadOutputDataBit Def0000EB
S _GPIO_WriteBit Def0000A4
S _GPIO_ToggleBits Def0000D0
S _GPIO_ExternalPullUpConfig Def000088
S _GPIO_DeInit Def000000
S _GPIO_SetBits Def0000BB
S _GPIO_ReadInputData Def0000D9
S _GPIO_ReadOutputData Def0000DC
S _GPIO_Write Def0000A2
A CABS size 0 flags 8 addr 0
T 00 00 00
R 00 00 00 09
T 00 00 00 90 93 6F 04 90 7F 93 6F 02 93 6F 03 81
R 00 00 00 09
T 00 00 0D
R 00 00 00 09
T 00 00 0D 52 08 1F 07 6B 06 1E 07 1C 00 04 1F 01
R 00 00 00 09
T 00 00 1A F6 88 7B 07 43 6B 04 84 14 03 1E 01 F7
R 00 00 00 09
T 00 00 27 1E 07 5C 5C 1F 04 0D 0B 2A 1D 1E 07 F6
R 00 00 00 09
T 00 00 34 88 7B 0C A5 10 84 27 05 1A 06 F7 20 03
R 00 00 00 09
T 00 00 41
R 00 00 00 09
T 00 00 41 14 03 F7
R 00 00 00 09
T 00 00 44
R 00 00 00 09
T 00 00 44 1E 04 F6 1A 06 1E 04 F7 20 08
R 00 00 00 09
T 00 00 4E
R 00 00 00 09
T 00 00 4E 1E 04 F6 14 03 1E 04 F7
R 00 00 00 09
T 00 00 56
R 00 00 00 09
T 00 00 56 1E 07 1C 00 03 F6 88 7B 0C A5 40 84 27
R 00 00 00 09
T 00 00 63 05 1A 06 F7 20 03
R 00 00 00 09
T 00 00 69
R 00 00 00 09
T 00 00 69 14 03 F7
R 00 00 00 09
T 00 00 6C
R 00 00 00 09
T 00 00 6C 1E 01 F6 88 7B 0C A5 20 84 27 07 1A 06
R 00 00 00 09
T 00 00 79 1E 01 F7 20 05
R 00 00 00 09
T 00 00 7E
R 00 00 00 09
T 00 00 7E 14 03 1E 01 F7
R 00 00 00 09
T 00 00 83
R 00 00 00 09
T 00 00 83 5B 08 85 84 FC
R 00 00 00 09
T 00 00 88
R 00 00 00 09
T 00 00 88 88 1C 00 03 88 F6 6B 02 84 0D 04 27 05
R 00 00 00 09
T 00 00 95 1A 01 F7 20 04
R 00 00 00 09
T 00 00 9A
R 00 00 00 09
T 00 00 9A 43 14 01 F7
R 00 00 00 09
T 00 00 9E
R 00 00 00 09
T 00 00 9E 84 85 84 FC
R 00 00 00 09
T 00 00 A2
R 00 00 00 09
T 00 00 A2 F7 81
R 00 00 00 09
T 00 00 A4
R 00 00 00 09
T 00 00 A4 88 88 F6 6B 02 84 0D 04 27 05 1A 01 F7
R 00 00 00 09
T 00 00 B1 20 04
R 00 00 00 09
T 00 00 B3
R 00 00 00 09
T 00 00 B3 43 14 01 F7
R 00 00 00 09
T 00 00 B7
R 00 00 00 09
T 00 00 B7 84 85 84 FC
R 00 00 00 09
T 00 00 BB
R 00 00 00 09
T 00 00 BB 88 6B 01 F6 1A 01 F7 84 81
R 00 00 00 09
T 00 00 C4
R 00 00 00 09
T 00 00 C4 88 88 F6 6B 02 84 43 14 01 F7 84 81
R 00 00 00 09
T 00 00 D0
R 00 00 00 09
T 00 00 D0 88 6B 01 F6 18 01 F7 84 81
R 00 00 00 09
T 00 00 D9
R 00 00 00 09
T 00 00 D9 E6 01 81
R 00 00 00 09
T 00 00 DC
R 00 00 00 09
T 00 00 DC F6 81
R 00 00 00 09
T 00 00 DE
R 00 00 00 09
T 00 00 DE 88 6B 01 E6 01 14 01 40 4F 49 5B 01 81
R 00 00 00 09
T 00 00 EB
R 00 00 00 09
T 00 00 EB 88 6B 01 F6 14 01 40 4F 49 5B 01 81
R 00 00 00 09

349
firmware/STM8L15X_LD/stm8l15x_gpio.rst Normal file
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1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_gpio
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _GPIO_DeInit
11 .globl _GPIO_Init
12 .globl _GPIO_ExternalPullUpConfig
13 .globl _GPIO_Write
14 .globl _GPIO_WriteBit
15 .globl _GPIO_SetBits
16 .globl _GPIO_ResetBits
17 .globl _GPIO_ToggleBits
18 .globl _GPIO_ReadInputData
19 .globl _GPIO_ReadOutputData
20 .globl _GPIO_ReadInputDataBit
21 .globl _GPIO_ReadOutputDataBit
22 ;--------------------------------------------------------
23 ; ram data
24 ;--------------------------------------------------------
25 .area DATA
26 ;--------------------------------------------------------
27 ; ram data
28 ;--------------------------------------------------------
29 .area INITIALIZED
30 ;--------------------------------------------------------
31 ; absolute external ram data
32 ;--------------------------------------------------------
33 .area DABS (ABS)
34
35 ; default segment ordering for linker
36 .area HOME
37 .area GSINIT
38 .area GSFINAL
39 .area CONST
40 .area INITIALIZER
41 .area CODE
42
43 ;--------------------------------------------------------
44 ; global & static initialisations
45 ;--------------------------------------------------------
46 .area HOME
47 .area GSINIT
48 .area GSFINAL
49 .area GSINIT
50 ;--------------------------------------------------------
51 ; Home
52 ;--------------------------------------------------------
53 .area HOME
54 .area HOME
55 ;--------------------------------------------------------
56 ; code
57 ;--------------------------------------------------------
58 .area CODE
59 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 96: void GPIO_DeInit(GPIO_TypeDef* GPIOx)
60 ; -----------------------------------------
61 ; function GPIO_DeInit
62 ; -----------------------------------------
00881B 63 _GPIO_DeInit:
64 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 98: GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
00881B 90 93 [ 1] 65 ldw y, x
00881D 6F 04 [ 1] 66 clr (0x0004, x)
67 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 99: GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
00881F 90 7F [ 1] 68 clr (y)
69 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 100: GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
008821 93 [ 1] 70 ldw x, y
008822 6F 02 [ 1] 71 clr (0x02, x)
72 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 101: GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
008824 93 [ 1] 73 ldw x, y
008825 6F 03 [ 1] 74 clr (0x0003, x)
75 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 102: }
008827 81 [ 4] 76 ret
77 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 133: void GPIO_Init(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
78 ; -----------------------------------------
79 ; function GPIO_Init
80 ; -----------------------------------------
008828 81 _GPIO_Init:
008828 52 08 [ 2] 82 sub sp, #8
00882A 1F 07 [ 2] 83 ldw (0x07, sp), x
00882C 6B 06 [ 1] 84 ld (0x06, sp), a
85 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
00882E 1E 07 [ 2] 86 ldw x, (0x07, sp)
008830 1C 00 04 [ 2] 87 addw x, #0x0004
008833 1F 01 [ 2] 88 ldw (0x01, sp), x
008835 F6 [ 1] 89 ld a, (x)
008836 88 [ 1] 90 push a
008837 7B 07 [ 1] 91 ld a, (0x07, sp)
008839 43 [ 1] 92 cpl a
00883A 6B 04 [ 1] 93 ld (0x04, sp), a
00883C 84 [ 1] 94 pop a
00883D 14 03 [ 1] 95 and a, (0x03, sp)
00883F 1E 01 [ 2] 96 ldw x, (0x01, sp)
008841 F7 [ 1] 97 ld (x), a
98 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
008842 1E 07 [ 2] 99 ldw x, (0x07, sp)
008844 5C [ 1] 100 incw x
008845 5C [ 1] 101 incw x
008846 1F 04 [ 2] 102 ldw (0x04, sp), x
103 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 149: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x80) != (uint8_t)0x00) /* Output mode */
008848 0D 0B [ 1] 104 tnz (0x0b, sp)
00884A 2A 1D [ 1] 105 jrpl 00105$
106 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
00884C 1E 07 [ 2] 107 ldw x, (0x07, sp)
00884E F6 [ 1] 108 ld a, (x)
109 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 151: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x10) != (uint8_t)0x00) /* High level */
00884F 88 [ 1] 110 push a
008850 7B 0C [ 1] 111 ld a, (0x0c, sp)
008852 A5 10 [ 1] 112 bcp a, #0x10
008854 84 [ 1] 113 pop a
008855 27 05 [ 1] 114 jreq 00102$
115 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 153: GPIOx->ODR |= GPIO_Pin;
008857 1A 06 [ 1] 116 or a, (0x06, sp)
008859 F7 [ 1] 117 ld (x), a
00885A 20 03 [ 2] 118 jra 00103$
00885C 119 00102$:
120 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 156: GPIOx->ODR &= (uint8_t)(~(GPIO_Pin));
00885C 14 03 [ 1] 121 and a, (0x03, sp)
00885E F7 [ 1] 122 ld (x), a
00885F 123 00103$:
124 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 159: GPIOx->DDR |= GPIO_Pin;
00885F 1E 04 [ 2] 125 ldw x, (0x04, sp)
008861 F6 [ 1] 126 ld a, (x)
008862 1A 06 [ 1] 127 or a, (0x06, sp)
008864 1E 04 [ 2] 128 ldw x, (0x04, sp)
008866 F7 [ 1] 129 ld (x), a
008867 20 08 [ 2] 130 jra 00106$
008869 131 00105$:
132 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 163: GPIOx->DDR &= (uint8_t)(~(GPIO_Pin));
008869 1E 04 [ 2] 133 ldw x, (0x04, sp)
00886B F6 [ 1] 134 ld a, (x)
00886C 14 03 [ 1] 135 and a, (0x03, sp)
00886E 1E 04 [ 2] 136 ldw x, (0x04, sp)
008870 F7 [ 1] 137 ld (x), a
008871 138 00106$:
139 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
008871 1E 07 [ 2] 140 ldw x, (0x07, sp)
008873 1C 00 03 [ 2] 141 addw x, #0x0003
008876 F6 [ 1] 142 ld a, (x)
143 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 170: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x40) != (uint8_t)0x00) /* Pull-Up or Push-Pull */
008877 88 [ 1] 144 push a
008878 7B 0C [ 1] 145 ld a, (0x0c, sp)
00887A A5 40 [ 1] 146 bcp a, #0x40
00887C 84 [ 1] 147 pop a
00887D 27 05 [ 1] 148 jreq 00108$
149 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 172: GPIOx->CR1 |= GPIO_Pin;
00887F 1A 06 [ 1] 150 or a, (0x06, sp)
008881 F7 [ 1] 151 ld (x), a
008882 20 03 [ 2] 152 jra 00109$
008884 153 00108$:
154 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 175: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
008884 14 03 [ 1] 155 and a, (0x03, sp)
008886 F7 [ 1] 156 ld (x), a
008887 157 00109$:
158 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 143: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
008887 1E 01 [ 2] 159 ldw x, (0x01, sp)
008889 F6 [ 1] 160 ld a, (x)
161 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 182: if ((((uint8_t)(GPIO_Mode)) & (uint8_t)0x20) != (uint8_t)0x00) /* Interrupt or Slow slope */
00888A 88 [ 1] 162 push a
00888B 7B 0C [ 1] 163 ld a, (0x0c, sp)
00888D A5 20 [ 1] 164 bcp a, #0x20
00888F 84 [ 1] 165 pop a
008890 27 07 [ 1] 166 jreq 00111$
167 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 184: GPIOx->CR2 |= GPIO_Pin;
008892 1A 06 [ 1] 168 or a, (0x06, sp)
008894 1E 01 [ 2] 169 ldw x, (0x01, sp)
008896 F7 [ 1] 170 ld (x), a
008897 20 05 [ 2] 171 jra 00113$
008899 172 00111$:
173 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 187: GPIOx->CR2 &= (uint8_t)(~(GPIO_Pin));
008899 14 03 [ 1] 174 and a, (0x03, sp)
00889B 1E 01 [ 2] 175 ldw x, (0x01, sp)
00889D F7 [ 1] 176 ld (x), a
00889E 177 00113$:
178 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 190: }
00889E 5B 08 [ 2] 179 addw sp, #8
0088A0 85 [ 2] 180 popw x
0088A1 84 [ 1] 181 pop a
0088A2 FC [ 2] 182 jp (x)
183 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 209: void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin, FunctionalState NewState)
184 ; -----------------------------------------
185 ; function GPIO_ExternalPullUpConfig
186 ; -----------------------------------------
0088A3 187 _GPIO_ExternalPullUpConfig:
0088A3 88 [ 1] 188 push a
189 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
0088A4 1C 00 03 [ 2] 190 addw x, #0x0003
0088A7 88 [ 1] 191 push a
0088A8 F6 [ 1] 192 ld a, (x)
0088A9 6B 02 [ 1] 193 ld (0x02, sp), a
0088AB 84 [ 1] 194 pop a
195 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 215: if (NewState != DISABLE) /* External Pull-Up Set*/
0088AC 0D 04 [ 1] 196 tnz (0x04, sp)
0088AE 27 05 [ 1] 197 jreq 00102$
198 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 217: GPIOx->CR1 |= GPIO_Pin;
0088B0 1A 01 [ 1] 199 or a, (0x01, sp)
0088B2 F7 [ 1] 200 ld (x), a
0088B3 20 04 [ 2] 201 jra 00104$
0088B5 202 00102$:
203 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 220: GPIOx->CR1 &= (uint8_t)(~(GPIO_Pin));
0088B5 43 [ 1] 204 cpl a
0088B6 14 01 [ 1] 205 and a, (0x01, sp)
0088B8 F7 [ 1] 206 ld (x), a
0088B9 207 00104$:
208 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 222: }
0088B9 84 [ 1] 209 pop a
0088BA 85 [ 2] 210 popw x
0088BB 84 [ 1] 211 pop a
0088BC FC [ 2] 212 jp (x)
213 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 248: void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t GPIO_PortVal)
214 ; -----------------------------------------
215 ; function GPIO_Write
216 ; -----------------------------------------
0088BD 217 _GPIO_Write:
218 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 250: GPIOx->ODR = GPIO_PortVal;
0088BD F7 [ 1] 219 ld (x), a
220 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 251: }
0088BE 81 [ 4] 221 ret
222 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 270: void GPIO_WriteBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction GPIO_BitVal)
223 ; -----------------------------------------
224 ; function GPIO_WriteBit
225 ; -----------------------------------------
0088BF 226 _GPIO_WriteBit:
0088BF 88 [ 1] 227 push a
228 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
0088C0 88 [ 1] 229 push a
0088C1 F6 [ 1] 230 ld a, (x)
0088C2 6B 02 [ 1] 231 ld (0x02, sp), a
0088C4 84 [ 1] 232 pop a
233 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 276: if (GPIO_BitVal != RESET)
0088C5 0D 04 [ 1] 234 tnz (0x04, sp)
0088C7 27 05 [ 1] 235 jreq 00102$
236 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 278: GPIOx->ODR |= GPIO_Pin;
0088C9 1A 01 [ 1] 237 or a, (0x01, sp)
0088CB F7 [ 1] 238 ld (x), a
0088CC 20 04 [ 2] 239 jra 00104$
0088CE 240 00102$:
241 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 283: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
0088CE 43 [ 1] 242 cpl a
0088CF 14 01 [ 1] 243 and a, (0x01, sp)
0088D1 F7 [ 1] 244 ld (x), a
0088D2 245 00104$:
246 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 285: }
0088D2 84 [ 1] 247 pop a
0088D3 85 [ 2] 248 popw x
0088D4 84 [ 1] 249 pop a
0088D5 FC [ 2] 250 jp (x)
251 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 303: void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
252 ; -----------------------------------------
253 ; function GPIO_SetBits
254 ; -----------------------------------------
0088D6 255 _GPIO_SetBits:
0088D6 88 [ 1] 256 push a
0088D7 6B 01 [ 1] 257 ld (0x01, sp), a
258 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 305: GPIOx->ODR |= GPIO_Pin;
0088D9 F6 [ 1] 259 ld a, (x)
0088DA 1A 01 [ 1] 260 or a, (0x01, sp)
0088DC F7 [ 1] 261 ld (x), a
262 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 306: }
0088DD 84 [ 1] 263 pop a
0088DE 81 [ 4] 264 ret
265 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 324: void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
266 ; -----------------------------------------
267 ; function GPIO_ResetBits
268 ; -----------------------------------------
0088DF 269 _GPIO_ResetBits:
0088DF 88 [ 1] 270 push a
271 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 326: GPIOx->ODR &= (uint8_t)(~GPIO_Pin);
0088E0 88 [ 1] 272 push a
0088E1 F6 [ 1] 273 ld a, (x)
0088E2 6B 02 [ 1] 274 ld (0x02, sp), a
0088E4 84 [ 1] 275 pop a
0088E5 43 [ 1] 276 cpl a
0088E6 14 01 [ 1] 277 and a, (0x01, sp)
0088E8 F7 [ 1] 278 ld (x), a
279 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 327: }
0088E9 84 [ 1] 280 pop a
0088EA 81 [ 4] 281 ret
282 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 336: void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
283 ; -----------------------------------------
284 ; function GPIO_ToggleBits
285 ; -----------------------------------------
0088EB 286 _GPIO_ToggleBits:
0088EB 88 [ 1] 287 push a
0088EC 6B 01 [ 1] 288 ld (0x01, sp), a
289 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 338: GPIOx->ODR ^= GPIO_Pin;
0088EE F6 [ 1] 290 ld a, (x)
0088EF 18 01 [ 1] 291 xor a, (0x01, sp)
0088F1 F7 [ 1] 292 ld (x), a
293 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 339: }
0088F2 84 [ 1] 294 pop a
0088F3 81 [ 4] 295 ret
296 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 347: uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
297 ; -----------------------------------------
298 ; function GPIO_ReadInputData
299 ; -----------------------------------------
0088F4 300 _GPIO_ReadInputData:
301 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 349: return ((uint8_t)GPIOx->IDR);
0088F4 E6 01 [ 1] 302 ld a, (0x1, x)
303 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 350: }
0088F6 81 [ 4] 304 ret
305 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 358: uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
306 ; -----------------------------------------
307 ; function GPIO_ReadOutputData
308 ; -----------------------------------------
0088F7 309 _GPIO_ReadOutputData:
310 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 360: return ((uint8_t)GPIOx->ODR);
0088F7 F6 [ 1] 311 ld a, (x)
312 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 361: }
0088F8 81 [ 4] 313 ret
314 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 378: BitStatus GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
315 ; -----------------------------------------
316 ; function GPIO_ReadInputDataBit
317 ; -----------------------------------------
0088F9 318 _GPIO_ReadInputDataBit:
0088F9 88 [ 1] 319 push a
0088FA 6B 01 [ 1] 320 ld (0x01, sp), a
321 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 380: return ((BitStatus)(GPIOx->IDR & (uint8_t)GPIO_Pin));
0088FC E6 01 [ 1] 322 ld a, (0x1, x)
0088FE 14 01 [ 1] 323 and a, (0x01, sp)
008900 40 [ 1] 324 neg a
008901 4F [ 1] 325 clr a
008902 49 [ 1] 326 rlc a
327 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 381: }
008903 5B 01 [ 2] 328 addw sp, #1
008905 81 [ 4] 329 ret
330 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 389: BitStatus GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
331 ; -----------------------------------------
332 ; function GPIO_ReadOutputDataBit
333 ; -----------------------------------------
008906 334 _GPIO_ReadOutputDataBit:
008906 88 [ 1] 335 push a
008907 6B 01 [ 1] 336 ld (0x01, sp), a
337 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 391: return ((BitStatus)(GPIOx->ODR & (uint8_t)GPIO_Pin));
008909 F6 [ 1] 338 ld a, (x)
00890A 14 01 [ 1] 339 and a, (0x01, sp)
00890C 40 [ 1] 340 neg a
00890D 4F [ 1] 341 clr a
00890E 49 [ 1] 342 rlc a
343 ; ../inc/stm8l151x/src/stm8l15x_gpio.c: 392: }
00890F 5B 01 [ 2] 344 addw sp, #1
008911 81 [ 4] 345 ret
346 .area CODE
347 .area CONST
348 .area INITIALIZER
349 .area CABS (ABS)

40
firmware/STM8L15X_LD/stm8l15x_gpio.sym Normal file
View File

@@ -0,0 +1,40 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
9 _GPIO_DeInit 000000 GR
9 _GPIO_ExternalPullUpConfig 000088 GR
9 _GPIO_Init 00000D GR
9 _GPIO_ReadInputData 0000D9 GR
9 _GPIO_ReadInputDataBit 0000DE GR
9 _GPIO_ReadOutputData 0000DC GR
9 _GPIO_ReadOutputDataBit 0000EB GR
9 _GPIO_ResetBits 0000C4 GR
9 _GPIO_SetBits 0000BB GR
9 _GPIO_ToggleBits 0000D0 GR
9 _GPIO_Write 0000A2 GR
9 _GPIO_WriteBit 0000A4 GR
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 DABS size 0 flags 8
4 HOME size 0 flags 0
5 GSINIT size 0 flags 0
6 GSFINAL size 0 flags 0
7 CONST size 0 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size F7 flags 0
A CABS size 0 flags 8

290
firmware/STM8L15X_LD/stm8l15x_it.asm Normal file
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@@ -0,0 +1,290 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ISO C Compiler
; Version 4.5.0 #15242 (Linux)
;--------------------------------------------------------
.module stm8l15x_it
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _TRAP_IRQHandler
.globl _FLASH_IRQHandler
.globl _DMA1_CHANNEL0_1_IRQHandler
.globl _DMA1_CHANNEL2_3_IRQHandler
.globl _RTC_CSSLSE_IRQHandler
.globl _EXTIE_F_PVD_IRQHandler
.globl _EXTIB_G_IRQHandler
.globl _EXTID_H_IRQHandler
.globl _EXTI0_IRQHandler
.globl _EXTI1_IRQHandler
.globl _EXTI2_IRQHandler
.globl _EXTI3_IRQHandler
.globl _EXTI4_IRQHandler
.globl _EXTI5_IRQHandler
.globl _EXTI6_IRQHandler
.globl _EXTI7_IRQHandler
.globl _LCD_AES_IRQHandler
.globl _SWITCH_CSS_BREAK_DAC_IRQHandler
.globl _ADC1_COMP_IRQHandler
.globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
.globl _TIM2_CC_USART2_RX_IRQHandler
.globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
.globl _TIM3_CC_USART3_RX_IRQHandler
.globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
.globl _TIM1_CC_IRQHandler
.globl _TIM4_UPD_OVF_TRG_IRQHandler
.globl _SPI1_IRQHandler
.globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
.globl _USART1_RX_TIM5_CC_IRQHandler
.globl _I2C1_SPI2_IRQHandler
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area INITIALIZED
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area DABS (ABS)
; default segment ordering for linker
.area HOME
.area GSINIT
.area GSFINAL
.area CONST
.area INITIALIZER
.area CODE
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME
.area GSINIT
.area GSFINAL
.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME
.area HOME
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CODE
; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
; -----------------------------------------
; function TRAP_IRQHandler
; -----------------------------------------
_TRAP_IRQHandler:
; ../src/stm8l15x_it.c: 72: }
iret
; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
; -----------------------------------------
; function FLASH_IRQHandler
; -----------------------------------------
_FLASH_IRQHandler:
; ../src/stm8l15x_it.c: 83: }
iret
; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
; -----------------------------------------
; function DMA1_CHANNEL0_1_IRQHandler
; -----------------------------------------
_DMA1_CHANNEL0_1_IRQHandler:
; ../src/stm8l15x_it.c: 94: }
iret
; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
; -----------------------------------------
; function DMA1_CHANNEL2_3_IRQHandler
; -----------------------------------------
_DMA1_CHANNEL2_3_IRQHandler:
; ../src/stm8l15x_it.c: 105: }
iret
; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
; -----------------------------------------
; function RTC_CSSLSE_IRQHandler
; -----------------------------------------
_RTC_CSSLSE_IRQHandler:
; ../src/stm8l15x_it.c: 116: }
iret
; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
; -----------------------------------------
; function EXTIE_F_PVD_IRQHandler
; -----------------------------------------
_EXTIE_F_PVD_IRQHandler:
; ../src/stm8l15x_it.c: 127: }
iret
; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
; -----------------------------------------
; function EXTIB_G_IRQHandler
; -----------------------------------------
_EXTIB_G_IRQHandler:
; ../src/stm8l15x_it.c: 139: }
iret
; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
; -----------------------------------------
; function EXTID_H_IRQHandler
; -----------------------------------------
_EXTID_H_IRQHandler:
; ../src/stm8l15x_it.c: 151: }
iret
; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
; -----------------------------------------
; function EXTI0_IRQHandler
; -----------------------------------------
_EXTI0_IRQHandler:
; ../src/stm8l15x_it.c: 163: }
iret
; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
; -----------------------------------------
; function EXTI1_IRQHandler
; -----------------------------------------
_EXTI1_IRQHandler:
; ../src/stm8l15x_it.c: 175: }
iret
; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
; -----------------------------------------
; function EXTI2_IRQHandler
; -----------------------------------------
_EXTI2_IRQHandler:
; ../src/stm8l15x_it.c: 187: }
iret
; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
; -----------------------------------------
; function EXTI3_IRQHandler
; -----------------------------------------
_EXTI3_IRQHandler:
; ../src/stm8l15x_it.c: 199: }
iret
; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
; -----------------------------------------
; function EXTI4_IRQHandler
; -----------------------------------------
_EXTI4_IRQHandler:
; ../src/stm8l15x_it.c: 211: }
iret
; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
; -----------------------------------------
; function EXTI5_IRQHandler
; -----------------------------------------
_EXTI5_IRQHandler:
; ../src/stm8l15x_it.c: 223: }
iret
; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
; -----------------------------------------
; function EXTI6_IRQHandler
; -----------------------------------------
_EXTI6_IRQHandler:
; ../src/stm8l15x_it.c: 235: }
iret
; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
; -----------------------------------------
; function EXTI7_IRQHandler
; -----------------------------------------
_EXTI7_IRQHandler:
; ../src/stm8l15x_it.c: 247: }
iret
; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
; -----------------------------------------
; function LCD_AES_IRQHandler
; -----------------------------------------
_LCD_AES_IRQHandler:
; ../src/stm8l15x_it.c: 258: }
iret
; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
; -----------------------------------------
; function SWITCH_CSS_BREAK_DAC_IRQHandler
; -----------------------------------------
_SWITCH_CSS_BREAK_DAC_IRQHandler:
; ../src/stm8l15x_it.c: 269: }
iret
; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
; -----------------------------------------
; function ADC1_COMP_IRQHandler
; -----------------------------------------
_ADC1_COMP_IRQHandler:
; ../src/stm8l15x_it.c: 281: }
iret
; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
; -----------------------------------------
; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
; -----------------------------------------
_TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
; ../src/stm8l15x_it.c: 293: }
iret
; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
; -----------------------------------------
; function TIM2_CC_USART2_RX_IRQHandler
; -----------------------------------------
_TIM2_CC_USART2_RX_IRQHandler:
; ../src/stm8l15x_it.c: 305: }
iret
; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
; -----------------------------------------
; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
; -----------------------------------------
_TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
; ../src/stm8l15x_it.c: 318: }
iret
; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
; -----------------------------------------
; function TIM3_CC_USART3_RX_IRQHandler
; -----------------------------------------
_TIM3_CC_USART3_RX_IRQHandler:
; ../src/stm8l15x_it.c: 329: }
iret
; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
; -----------------------------------------
; function TIM1_UPD_OVF_TRG_COM_IRQHandler
; -----------------------------------------
_TIM1_UPD_OVF_TRG_COM_IRQHandler:
; ../src/stm8l15x_it.c: 340: }
iret
; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
; -----------------------------------------
; function TIM1_CC_IRQHandler
; -----------------------------------------
_TIM1_CC_IRQHandler:
; ../src/stm8l15x_it.c: 351: }
iret
; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
; -----------------------------------------
; function TIM4_UPD_OVF_TRG_IRQHandler
; -----------------------------------------
_TIM4_UPD_OVF_TRG_IRQHandler:
; ../src/stm8l15x_it.c: 363: }
iret
; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
; -----------------------------------------
; function SPI1_IRQHandler
; -----------------------------------------
_SPI1_IRQHandler:
; ../src/stm8l15x_it.c: 374: }
iret
; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
; -----------------------------------------
; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
; -----------------------------------------
_USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
; ../src/stm8l15x_it.c: 386: }
iret
; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
; -----------------------------------------
; function USART1_RX_TIM5_CC_IRQHandler
; -----------------------------------------
_USART1_RX_TIM5_CC_IRQHandler:
; ../src/stm8l15x_it.c: 398: }
iret
; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
; -----------------------------------------
; function I2C1_SPI2_IRQHandler
; -----------------------------------------
_I2C1_SPI2_IRQHandler:
; ../src/stm8l15x_it.c: 410: }
iret
.area CODE
.area CONST
.area INITIALIZER
.area CABS (ABS)

290
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1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_it
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _TRAP_IRQHandler
11 .globl _FLASH_IRQHandler
12 .globl _DMA1_CHANNEL0_1_IRQHandler
13 .globl _DMA1_CHANNEL2_3_IRQHandler
14 .globl _RTC_CSSLSE_IRQHandler
15 .globl _EXTIE_F_PVD_IRQHandler
16 .globl _EXTIB_G_IRQHandler
17 .globl _EXTID_H_IRQHandler
18 .globl _EXTI0_IRQHandler
19 .globl _EXTI1_IRQHandler
20 .globl _EXTI2_IRQHandler
21 .globl _EXTI3_IRQHandler
22 .globl _EXTI4_IRQHandler
23 .globl _EXTI5_IRQHandler
24 .globl _EXTI6_IRQHandler
25 .globl _EXTI7_IRQHandler
26 .globl _LCD_AES_IRQHandler
27 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
28 .globl _ADC1_COMP_IRQHandler
29 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
30 .globl _TIM2_CC_USART2_RX_IRQHandler
31 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
32 .globl _TIM3_CC_USART3_RX_IRQHandler
33 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
34 .globl _TIM1_CC_IRQHandler
35 .globl _TIM4_UPD_OVF_TRG_IRQHandler
36 .globl _SPI1_IRQHandler
37 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
38 .globl _USART1_RX_TIM5_CC_IRQHandler
39 .globl _I2C1_SPI2_IRQHandler
40 ;--------------------------------------------------------
41 ; ram data
42 ;--------------------------------------------------------
43 .area DATA
44 ;--------------------------------------------------------
45 ; ram data
46 ;--------------------------------------------------------
47 .area INITIALIZED
48 ;--------------------------------------------------------
49 ; absolute external ram data
50 ;--------------------------------------------------------
51 .area DABS (ABS)
52
53 ; default segment ordering for linker
54 .area HOME
55 .area GSINIT
56 .area GSFINAL
57 .area CONST
58 .area INITIALIZER
59 .area CODE
60
61 ;--------------------------------------------------------
62 ; global & static initialisations
63 ;--------------------------------------------------------
64 .area HOME
65 .area GSINIT
66 .area GSFINAL
67 .area GSINIT
68 ;--------------------------------------------------------
69 ; Home
70 ;--------------------------------------------------------
71 .area HOME
72 .area HOME
73 ;--------------------------------------------------------
74 ; code
75 ;--------------------------------------------------------
76 .area CODE
77 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
78 ; -----------------------------------------
79 ; function TRAP_IRQHandler
80 ; -----------------------------------------
000000 81 _TRAP_IRQHandler:
82 ; ../src/stm8l15x_it.c: 72: }
000000 80 [11] 83 iret
84 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
85 ; -----------------------------------------
86 ; function FLASH_IRQHandler
87 ; -----------------------------------------
000001 88 _FLASH_IRQHandler:
89 ; ../src/stm8l15x_it.c: 83: }
000001 80 [11] 90 iret
91 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
92 ; -----------------------------------------
93 ; function DMA1_CHANNEL0_1_IRQHandler
94 ; -----------------------------------------
000002 95 _DMA1_CHANNEL0_1_IRQHandler:
96 ; ../src/stm8l15x_it.c: 94: }
000002 80 [11] 97 iret
98 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
99 ; -----------------------------------------
100 ; function DMA1_CHANNEL2_3_IRQHandler
101 ; -----------------------------------------
000003 102 _DMA1_CHANNEL2_3_IRQHandler:
103 ; ../src/stm8l15x_it.c: 105: }
000003 80 [11] 104 iret
105 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
106 ; -----------------------------------------
107 ; function RTC_CSSLSE_IRQHandler
108 ; -----------------------------------------
000004 109 _RTC_CSSLSE_IRQHandler:
110 ; ../src/stm8l15x_it.c: 116: }
000004 80 [11] 111 iret
112 ; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
113 ; -----------------------------------------
114 ; function EXTIE_F_PVD_IRQHandler
115 ; -----------------------------------------
000005 116 _EXTIE_F_PVD_IRQHandler:
117 ; ../src/stm8l15x_it.c: 127: }
000005 80 [11] 118 iret
119 ; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
120 ; -----------------------------------------
121 ; function EXTIB_G_IRQHandler
122 ; -----------------------------------------
000006 123 _EXTIB_G_IRQHandler:
124 ; ../src/stm8l15x_it.c: 139: }
000006 80 [11] 125 iret
126 ; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
127 ; -----------------------------------------
128 ; function EXTID_H_IRQHandler
129 ; -----------------------------------------
000007 130 _EXTID_H_IRQHandler:
131 ; ../src/stm8l15x_it.c: 151: }
000007 80 [11] 132 iret
133 ; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
134 ; -----------------------------------------
135 ; function EXTI0_IRQHandler
136 ; -----------------------------------------
000008 137 _EXTI0_IRQHandler:
138 ; ../src/stm8l15x_it.c: 163: }
000008 80 [11] 139 iret
140 ; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
141 ; -----------------------------------------
142 ; function EXTI1_IRQHandler
143 ; -----------------------------------------
000009 144 _EXTI1_IRQHandler:
145 ; ../src/stm8l15x_it.c: 175: }
000009 80 [11] 146 iret
147 ; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
148 ; -----------------------------------------
149 ; function EXTI2_IRQHandler
150 ; -----------------------------------------
00000A 151 _EXTI2_IRQHandler:
152 ; ../src/stm8l15x_it.c: 187: }
00000A 80 [11] 153 iret
154 ; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
155 ; -----------------------------------------
156 ; function EXTI3_IRQHandler
157 ; -----------------------------------------
00000B 158 _EXTI3_IRQHandler:
159 ; ../src/stm8l15x_it.c: 199: }
00000B 80 [11] 160 iret
161 ; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
162 ; -----------------------------------------
163 ; function EXTI4_IRQHandler
164 ; -----------------------------------------
00000C 165 _EXTI4_IRQHandler:
166 ; ../src/stm8l15x_it.c: 211: }
00000C 80 [11] 167 iret
168 ; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
169 ; -----------------------------------------
170 ; function EXTI5_IRQHandler
171 ; -----------------------------------------
00000D 172 _EXTI5_IRQHandler:
173 ; ../src/stm8l15x_it.c: 223: }
00000D 80 [11] 174 iret
175 ; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
176 ; -----------------------------------------
177 ; function EXTI6_IRQHandler
178 ; -----------------------------------------
00000E 179 _EXTI6_IRQHandler:
180 ; ../src/stm8l15x_it.c: 235: }
00000E 80 [11] 181 iret
182 ; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
183 ; -----------------------------------------
184 ; function EXTI7_IRQHandler
185 ; -----------------------------------------
00000F 186 _EXTI7_IRQHandler:
187 ; ../src/stm8l15x_it.c: 247: }
00000F 80 [11] 188 iret
189 ; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
190 ; -----------------------------------------
191 ; function LCD_AES_IRQHandler
192 ; -----------------------------------------
000010 193 _LCD_AES_IRQHandler:
194 ; ../src/stm8l15x_it.c: 258: }
000010 80 [11] 195 iret
196 ; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
197 ; -----------------------------------------
198 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
199 ; -----------------------------------------
000011 200 _SWITCH_CSS_BREAK_DAC_IRQHandler:
201 ; ../src/stm8l15x_it.c: 269: }
000011 80 [11] 202 iret
203 ; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
204 ; -----------------------------------------
205 ; function ADC1_COMP_IRQHandler
206 ; -----------------------------------------
000012 207 _ADC1_COMP_IRQHandler:
208 ; ../src/stm8l15x_it.c: 281: }
000012 80 [11] 209 iret
210 ; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
211 ; -----------------------------------------
212 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
213 ; -----------------------------------------
000013 214 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
215 ; ../src/stm8l15x_it.c: 293: }
000013 80 [11] 216 iret
217 ; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
218 ; -----------------------------------------
219 ; function TIM2_CC_USART2_RX_IRQHandler
220 ; -----------------------------------------
000014 221 _TIM2_CC_USART2_RX_IRQHandler:
222 ; ../src/stm8l15x_it.c: 305: }
000014 80 [11] 223 iret
224 ; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
225 ; -----------------------------------------
226 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
227 ; -----------------------------------------
000015 228 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
229 ; ../src/stm8l15x_it.c: 318: }
000015 80 [11] 230 iret
231 ; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
232 ; -----------------------------------------
233 ; function TIM3_CC_USART3_RX_IRQHandler
234 ; -----------------------------------------
000016 235 _TIM3_CC_USART3_RX_IRQHandler:
236 ; ../src/stm8l15x_it.c: 329: }
000016 80 [11] 237 iret
238 ; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
239 ; -----------------------------------------
240 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
241 ; -----------------------------------------
000017 242 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
243 ; ../src/stm8l15x_it.c: 340: }
000017 80 [11] 244 iret
245 ; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
246 ; -----------------------------------------
247 ; function TIM1_CC_IRQHandler
248 ; -----------------------------------------
000018 249 _TIM1_CC_IRQHandler:
250 ; ../src/stm8l15x_it.c: 351: }
000018 80 [11] 251 iret
252 ; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
253 ; -----------------------------------------
254 ; function TIM4_UPD_OVF_TRG_IRQHandler
255 ; -----------------------------------------
000019 256 _TIM4_UPD_OVF_TRG_IRQHandler:
257 ; ../src/stm8l15x_it.c: 363: }
000019 80 [11] 258 iret
259 ; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
260 ; -----------------------------------------
261 ; function SPI1_IRQHandler
262 ; -----------------------------------------
00001A 263 _SPI1_IRQHandler:
264 ; ../src/stm8l15x_it.c: 374: }
00001A 80 [11] 265 iret
266 ; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
267 ; -----------------------------------------
268 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
269 ; -----------------------------------------
00001B 270 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
271 ; ../src/stm8l15x_it.c: 386: }
00001B 80 [11] 272 iret
273 ; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
274 ; -----------------------------------------
275 ; function USART1_RX_TIM5_CC_IRQHandler
276 ; -----------------------------------------
00001C 277 _USART1_RX_TIM5_CC_IRQHandler:
278 ; ../src/stm8l15x_it.c: 398: }
00001C 80 [11] 279 iret
280 ; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
281 ; -----------------------------------------
282 ; function I2C1_SPI2_IRQHandler
283 ; -----------------------------------------
00001D 284 _I2C1_SPI2_IRQHandler:
285 ; ../src/stm8l15x_it.c: 410: }
00001D 80 [11] 286 iret
287 .area CODE
288 .area CONST
289 .area INITIALIZER
290 .area CABS (ABS)

165
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XH3
H B areas 1F global symbols
M stm8l15x_it
S .__.ABS. Def000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size 1E flags 0 addr 0
S _DMA1_CHANNEL0_1_IRQHandler Def000002
S _SPI1_IRQHandler Def00001A
S _DMA1_CHANNEL2_3_IRQHandler Def000003
S _EXTIB_G_IRQHandler Def000006
S _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler Def000013
S _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler Def00001B
S _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler Def000015
S _EXTID_H_IRQHandler Def000007
S _TIM2_CC_USART2_RX_IRQHandler Def000014
S _EXTI0_IRQHandler Def000008
S _EXTI1_IRQHandler Def000009
S _I2C1_SPI2_IRQHandler Def00001D
S _USART1_RX_TIM5_CC_IRQHandler Def00001C
S _TIM3_CC_USART3_RX_IRQHandler Def000016
S _EXTI2_IRQHandler Def00000A
S _EXTI3_IRQHandler Def00000B
S _EXTIE_F_PVD_IRQHandler Def000005
S _EXTI4_IRQHandler Def00000C
S _FLASH_IRQHandler Def000001
S _EXTI5_IRQHandler Def00000D
S _EXTI6_IRQHandler Def00000E
S _EXTI7_IRQHandler Def00000F
S _TIM1_UPD_OVF_TRG_COM_IRQHandler Def000017
S _TRAP_IRQHandler Def000000
S _TIM4_UPD_OVF_TRG_IRQHandler Def000019
S _TIM1_CC_IRQHandler Def000018
S _SWITCH_CSS_BREAK_DAC_IRQHandler Def000011
S _ADC1_COMP_IRQHandler Def000012
S _LCD_AES_IRQHandler Def000010
S _RTC_CSSLSE_IRQHandler Def000004
A CABS size 0 flags 8 addr 0
T 00 00 00
R 00 00 00 09
T 00 00 00 80
R 00 00 00 09
T 00 00 01
R 00 00 00 09
T 00 00 01 80
R 00 00 00 09
T 00 00 02
R 00 00 00 09
T 00 00 02 80
R 00 00 00 09
T 00 00 03
R 00 00 00 09
T 00 00 03 80
R 00 00 00 09
T 00 00 04
R 00 00 00 09
T 00 00 04 80
R 00 00 00 09
T 00 00 05
R 00 00 00 09
T 00 00 05 80
R 00 00 00 09
T 00 00 06
R 00 00 00 09
T 00 00 06 80
R 00 00 00 09
T 00 00 07
R 00 00 00 09
T 00 00 07 80
R 00 00 00 09
T 00 00 08
R 00 00 00 09
T 00 00 08 80
R 00 00 00 09
T 00 00 09
R 00 00 00 09
T 00 00 09 80
R 00 00 00 09
T 00 00 0A
R 00 00 00 09
T 00 00 0A 80
R 00 00 00 09
T 00 00 0B
R 00 00 00 09
T 00 00 0B 80
R 00 00 00 09
T 00 00 0C
R 00 00 00 09
T 00 00 0C 80
R 00 00 00 09
T 00 00 0D
R 00 00 00 09
T 00 00 0D 80
R 00 00 00 09
T 00 00 0E
R 00 00 00 09
T 00 00 0E 80
R 00 00 00 09
T 00 00 0F
R 00 00 00 09
T 00 00 0F 80
R 00 00 00 09
T 00 00 10
R 00 00 00 09
T 00 00 10 80
R 00 00 00 09
T 00 00 11
R 00 00 00 09
T 00 00 11 80
R 00 00 00 09
T 00 00 12
R 00 00 00 09
T 00 00 12 80
R 00 00 00 09
T 00 00 13
R 00 00 00 09
T 00 00 13 80
R 00 00 00 09
T 00 00 14
R 00 00 00 09
T 00 00 14 80
R 00 00 00 09
T 00 00 15
R 00 00 00 09
T 00 00 15 80
R 00 00 00 09
T 00 00 16
R 00 00 00 09
T 00 00 16 80
R 00 00 00 09
T 00 00 17
R 00 00 00 09
T 00 00 17 80
R 00 00 00 09
T 00 00 18
R 00 00 00 09
T 00 00 18 80
R 00 00 00 09
T 00 00 19
R 00 00 00 09
T 00 00 19 80
R 00 00 00 09
T 00 00 1A
R 00 00 00 09
T 00 00 1A 80
R 00 00 00 09
T 00 00 1B
R 00 00 00 09
T 00 00 1B 80
R 00 00 00 09
T 00 00 1C
R 00 00 00 09
T 00 00 1C 80
R 00 00 00 09
T 00 00 1D
R 00 00 00 09
T 00 00 1D 80
R 00 00 00 09

290
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1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_it
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _TRAP_IRQHandler
11 .globl _FLASH_IRQHandler
12 .globl _DMA1_CHANNEL0_1_IRQHandler
13 .globl _DMA1_CHANNEL2_3_IRQHandler
14 .globl _RTC_CSSLSE_IRQHandler
15 .globl _EXTIE_F_PVD_IRQHandler
16 .globl _EXTIB_G_IRQHandler
17 .globl _EXTID_H_IRQHandler
18 .globl _EXTI0_IRQHandler
19 .globl _EXTI1_IRQHandler
20 .globl _EXTI2_IRQHandler
21 .globl _EXTI3_IRQHandler
22 .globl _EXTI4_IRQHandler
23 .globl _EXTI5_IRQHandler
24 .globl _EXTI6_IRQHandler
25 .globl _EXTI7_IRQHandler
26 .globl _LCD_AES_IRQHandler
27 .globl _SWITCH_CSS_BREAK_DAC_IRQHandler
28 .globl _ADC1_COMP_IRQHandler
29 .globl _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
30 .globl _TIM2_CC_USART2_RX_IRQHandler
31 .globl _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
32 .globl _TIM3_CC_USART3_RX_IRQHandler
33 .globl _TIM1_UPD_OVF_TRG_COM_IRQHandler
34 .globl _TIM1_CC_IRQHandler
35 .globl _TIM4_UPD_OVF_TRG_IRQHandler
36 .globl _SPI1_IRQHandler
37 .globl _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
38 .globl _USART1_RX_TIM5_CC_IRQHandler
39 .globl _I2C1_SPI2_IRQHandler
40 ;--------------------------------------------------------
41 ; ram data
42 ;--------------------------------------------------------
43 .area DATA
44 ;--------------------------------------------------------
45 ; ram data
46 ;--------------------------------------------------------
47 .area INITIALIZED
48 ;--------------------------------------------------------
49 ; absolute external ram data
50 ;--------------------------------------------------------
51 .area DABS (ABS)
52
53 ; default segment ordering for linker
54 .area HOME
55 .area GSINIT
56 .area GSFINAL
57 .area CONST
58 .area INITIALIZER
59 .area CODE
60
61 ;--------------------------------------------------------
62 ; global & static initialisations
63 ;--------------------------------------------------------
64 .area HOME
65 .area GSINIT
66 .area GSFINAL
67 .area GSINIT
68 ;--------------------------------------------------------
69 ; Home
70 ;--------------------------------------------------------
71 .area HOME
72 .area HOME
73 ;--------------------------------------------------------
74 ; code
75 ;--------------------------------------------------------
76 .area CODE
77 ; ../src/stm8l15x_it.c: 67: INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
78 ; -----------------------------------------
79 ; function TRAP_IRQHandler
80 ; -----------------------------------------
00818F 81 _TRAP_IRQHandler:
82 ; ../src/stm8l15x_it.c: 72: }
00818F 80 [11] 83 iret
84 ; ../src/stm8l15x_it.c: 78: INTERRUPT_HANDLER(FLASH_IRQHandler,1)
85 ; -----------------------------------------
86 ; function FLASH_IRQHandler
87 ; -----------------------------------------
008190 88 _FLASH_IRQHandler:
89 ; ../src/stm8l15x_it.c: 83: }
008190 80 [11] 90 iret
91 ; ../src/stm8l15x_it.c: 89: INTERRUPT_HANDLER(DMA1_CHANNEL0_1_IRQHandler,2)
92 ; -----------------------------------------
93 ; function DMA1_CHANNEL0_1_IRQHandler
94 ; -----------------------------------------
008191 95 _DMA1_CHANNEL0_1_IRQHandler:
96 ; ../src/stm8l15x_it.c: 94: }
008191 80 [11] 97 iret
98 ; ../src/stm8l15x_it.c: 100: INTERRUPT_HANDLER(DMA1_CHANNEL2_3_IRQHandler,3)
99 ; -----------------------------------------
100 ; function DMA1_CHANNEL2_3_IRQHandler
101 ; -----------------------------------------
008192 102 _DMA1_CHANNEL2_3_IRQHandler:
103 ; ../src/stm8l15x_it.c: 105: }
008192 80 [11] 104 iret
105 ; ../src/stm8l15x_it.c: 111: INTERRUPT_HANDLER(RTC_CSSLSE_IRQHandler,4)
106 ; -----------------------------------------
107 ; function RTC_CSSLSE_IRQHandler
108 ; -----------------------------------------
008193 109 _RTC_CSSLSE_IRQHandler:
110 ; ../src/stm8l15x_it.c: 116: }
008193 80 [11] 111 iret
112 ; ../src/stm8l15x_it.c: 122: INTERRUPT_HANDLER(EXTIE_F_PVD_IRQHandler,5)
113 ; -----------------------------------------
114 ; function EXTIE_F_PVD_IRQHandler
115 ; -----------------------------------------
008194 116 _EXTIE_F_PVD_IRQHandler:
117 ; ../src/stm8l15x_it.c: 127: }
008194 80 [11] 118 iret
119 ; ../src/stm8l15x_it.c: 134: INTERRUPT_HANDLER(EXTIB_G_IRQHandler,6)
120 ; -----------------------------------------
121 ; function EXTIB_G_IRQHandler
122 ; -----------------------------------------
008195 123 _EXTIB_G_IRQHandler:
124 ; ../src/stm8l15x_it.c: 139: }
008195 80 [11] 125 iret
126 ; ../src/stm8l15x_it.c: 146: INTERRUPT_HANDLER(EXTID_H_IRQHandler,7)
127 ; -----------------------------------------
128 ; function EXTID_H_IRQHandler
129 ; -----------------------------------------
008196 130 _EXTID_H_IRQHandler:
131 ; ../src/stm8l15x_it.c: 151: }
008196 80 [11] 132 iret
133 ; ../src/stm8l15x_it.c: 158: INTERRUPT_HANDLER(EXTI0_IRQHandler,8)
134 ; -----------------------------------------
135 ; function EXTI0_IRQHandler
136 ; -----------------------------------------
008197 137 _EXTI0_IRQHandler:
138 ; ../src/stm8l15x_it.c: 163: }
008197 80 [11] 139 iret
140 ; ../src/stm8l15x_it.c: 170: INTERRUPT_HANDLER(EXTI1_IRQHandler,9)
141 ; -----------------------------------------
142 ; function EXTI1_IRQHandler
143 ; -----------------------------------------
008198 144 _EXTI1_IRQHandler:
145 ; ../src/stm8l15x_it.c: 175: }
008198 80 [11] 146 iret
147 ; ../src/stm8l15x_it.c: 182: INTERRUPT_HANDLER(EXTI2_IRQHandler,10)
148 ; -----------------------------------------
149 ; function EXTI2_IRQHandler
150 ; -----------------------------------------
008199 151 _EXTI2_IRQHandler:
152 ; ../src/stm8l15x_it.c: 187: }
008199 80 [11] 153 iret
154 ; ../src/stm8l15x_it.c: 194: INTERRUPT_HANDLER(EXTI3_IRQHandler,11)
155 ; -----------------------------------------
156 ; function EXTI3_IRQHandler
157 ; -----------------------------------------
00819A 158 _EXTI3_IRQHandler:
159 ; ../src/stm8l15x_it.c: 199: }
00819A 80 [11] 160 iret
161 ; ../src/stm8l15x_it.c: 206: INTERRUPT_HANDLER(EXTI4_IRQHandler,12)
162 ; -----------------------------------------
163 ; function EXTI4_IRQHandler
164 ; -----------------------------------------
00819B 165 _EXTI4_IRQHandler:
166 ; ../src/stm8l15x_it.c: 211: }
00819B 80 [11] 167 iret
168 ; ../src/stm8l15x_it.c: 218: INTERRUPT_HANDLER(EXTI5_IRQHandler,13)
169 ; -----------------------------------------
170 ; function EXTI5_IRQHandler
171 ; -----------------------------------------
00819C 172 _EXTI5_IRQHandler:
173 ; ../src/stm8l15x_it.c: 223: }
00819C 80 [11] 174 iret
175 ; ../src/stm8l15x_it.c: 230: INTERRUPT_HANDLER(EXTI6_IRQHandler,14)
176 ; -----------------------------------------
177 ; function EXTI6_IRQHandler
178 ; -----------------------------------------
00819D 179 _EXTI6_IRQHandler:
180 ; ../src/stm8l15x_it.c: 235: }
00819D 80 [11] 181 iret
182 ; ../src/stm8l15x_it.c: 242: INTERRUPT_HANDLER(EXTI7_IRQHandler,15)
183 ; -----------------------------------------
184 ; function EXTI7_IRQHandler
185 ; -----------------------------------------
00819E 186 _EXTI7_IRQHandler:
187 ; ../src/stm8l15x_it.c: 247: }
00819E 80 [11] 188 iret
189 ; ../src/stm8l15x_it.c: 253: INTERRUPT_HANDLER(LCD_AES_IRQHandler,16)
190 ; -----------------------------------------
191 ; function LCD_AES_IRQHandler
192 ; -----------------------------------------
00819F 193 _LCD_AES_IRQHandler:
194 ; ../src/stm8l15x_it.c: 258: }
00819F 80 [11] 195 iret
196 ; ../src/stm8l15x_it.c: 264: INTERRUPT_HANDLER(SWITCH_CSS_BREAK_DAC_IRQHandler,17)
197 ; -----------------------------------------
198 ; function SWITCH_CSS_BREAK_DAC_IRQHandler
199 ; -----------------------------------------
0081A0 200 _SWITCH_CSS_BREAK_DAC_IRQHandler:
201 ; ../src/stm8l15x_it.c: 269: }
0081A0 80 [11] 202 iret
203 ; ../src/stm8l15x_it.c: 276: INTERRUPT_HANDLER(ADC1_COMP_IRQHandler,18)
204 ; -----------------------------------------
205 ; function ADC1_COMP_IRQHandler
206 ; -----------------------------------------
0081A1 207 _ADC1_COMP_IRQHandler:
208 ; ../src/stm8l15x_it.c: 281: }
0081A1 80 [11] 209 iret
210 ; ../src/stm8l15x_it.c: 288: INTERRUPT_HANDLER(TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler,19)
211 ; -----------------------------------------
212 ; function TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler
213 ; -----------------------------------------
0081A2 214 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler:
215 ; ../src/stm8l15x_it.c: 293: }
0081A2 80 [11] 216 iret
217 ; ../src/stm8l15x_it.c: 300: INTERRUPT_HANDLER(TIM2_CC_USART2_RX_IRQHandler,20)
218 ; -----------------------------------------
219 ; function TIM2_CC_USART2_RX_IRQHandler
220 ; -----------------------------------------
0081A3 221 _TIM2_CC_USART2_RX_IRQHandler:
222 ; ../src/stm8l15x_it.c: 305: }
0081A3 80 [11] 223 iret
224 ; ../src/stm8l15x_it.c: 313: INTERRUPT_HANDLER(TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler,21)
225 ; -----------------------------------------
226 ; function TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler
227 ; -----------------------------------------
0081A4 228 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler:
229 ; ../src/stm8l15x_it.c: 318: }
0081A4 80 [11] 230 iret
231 ; ../src/stm8l15x_it.c: 324: INTERRUPT_HANDLER(TIM3_CC_USART3_RX_IRQHandler,22)
232 ; -----------------------------------------
233 ; function TIM3_CC_USART3_RX_IRQHandler
234 ; -----------------------------------------
0081A5 235 _TIM3_CC_USART3_RX_IRQHandler:
236 ; ../src/stm8l15x_it.c: 329: }
0081A5 80 [11] 237 iret
238 ; ../src/stm8l15x_it.c: 335: INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_COM_IRQHandler,23)
239 ; -----------------------------------------
240 ; function TIM1_UPD_OVF_TRG_COM_IRQHandler
241 ; -----------------------------------------
0081A6 242 _TIM1_UPD_OVF_TRG_COM_IRQHandler:
243 ; ../src/stm8l15x_it.c: 340: }
0081A6 80 [11] 244 iret
245 ; ../src/stm8l15x_it.c: 346: INTERRUPT_HANDLER(TIM1_CC_IRQHandler,24)
246 ; -----------------------------------------
247 ; function TIM1_CC_IRQHandler
248 ; -----------------------------------------
0081A7 249 _TIM1_CC_IRQHandler:
250 ; ../src/stm8l15x_it.c: 351: }
0081A7 80 [11] 251 iret
252 ; ../src/stm8l15x_it.c: 358: INTERRUPT_HANDLER(TIM4_UPD_OVF_TRG_IRQHandler,25)
253 ; -----------------------------------------
254 ; function TIM4_UPD_OVF_TRG_IRQHandler
255 ; -----------------------------------------
0081A8 256 _TIM4_UPD_OVF_TRG_IRQHandler:
257 ; ../src/stm8l15x_it.c: 363: }
0081A8 80 [11] 258 iret
259 ; ../src/stm8l15x_it.c: 369: INTERRUPT_HANDLER(SPI1_IRQHandler,26)
260 ; -----------------------------------------
261 ; function SPI1_IRQHandler
262 ; -----------------------------------------
0081A9 263 _SPI1_IRQHandler:
264 ; ../src/stm8l15x_it.c: 374: }
0081A9 80 [11] 265 iret
266 ; ../src/stm8l15x_it.c: 381: INTERRUPT_HANDLER(USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler,27)
267 ; -----------------------------------------
268 ; function USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler
269 ; -----------------------------------------
0081AA 270 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler:
271 ; ../src/stm8l15x_it.c: 386: }
0081AA 80 [11] 272 iret
273 ; ../src/stm8l15x_it.c: 393: INTERRUPT_HANDLER(USART1_RX_TIM5_CC_IRQHandler,28)
274 ; -----------------------------------------
275 ; function USART1_RX_TIM5_CC_IRQHandler
276 ; -----------------------------------------
0081AB 277 _USART1_RX_TIM5_CC_IRQHandler:
278 ; ../src/stm8l15x_it.c: 398: }
0081AB 80 [11] 279 iret
280 ; ../src/stm8l15x_it.c: 405: INTERRUPT_HANDLER(I2C1_SPI2_IRQHandler,29)
281 ; -----------------------------------------
282 ; function I2C1_SPI2_IRQHandler
283 ; -----------------------------------------
0081AC 284 _I2C1_SPI2_IRQHandler:
285 ; ../src/stm8l15x_it.c: 410: }
0081AC 80 [11] 286 iret
287 .area CODE
288 .area CONST
289 .area INITIALIZER
290 .area CABS (ABS)

58
firmware/STM8L15X_LD/stm8l15x_it.sym Normal file
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ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
9 _ADC1_COMP_IRQHandler 000012 GR
9 _DMA1_CHANNEL0_1_IRQHandler 000002 GR
9 _DMA1_CHANNEL2_3_IRQHandler 000003 GR
9 _EXTI0_IRQHandler 000008 GR
9 _EXTI1_IRQHandler 000009 GR
9 _EXTI2_IRQHandler 00000A GR
9 _EXTI3_IRQHandler 00000B GR
9 _EXTI4_IRQHandler 00000C GR
9 _EXTI5_IRQHandler 00000D GR
9 _EXTI6_IRQHandler 00000E GR
9 _EXTI7_IRQHandler 00000F GR
9 _EXTIB_G_IRQHandler 000006 GR
9 _EXTID_H_IRQHandler 000007 GR
9 _EXTIE_F_PVD_IRQHandler 000005 GR
9 _FLASH_IRQHandler 000001 GR
9 _I2C1_SPI2_IRQHandler 00001D GR
9 _LCD_AES_IRQHandler 000010 GR
9 _RTC_CSSLSE_IRQHandler 000004 GR
9 _SPI1_IRQHandler 00001A GR
9 _SWITCH_CSS_BREAK_DAC_IRQHandler 000011 GR
9 _TIM1_CC_IRQHandler 000018 GR
9 _TIM1_UPD_OVF_TRG_COM_IRQHandler 000017 GR
9 _TIM2_CC_USART2_RX_IRQHandler 000014 GR
9 _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler 000013 GR
9 _TIM3_CC_USART3_RX_IRQHandler 000016 GR
9 _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler 000015 GR
9 _TIM4_UPD_OVF_TRG_IRQHandler 000019 GR
9 _TRAP_IRQHandler 000000 GR
9 _USART1_RX_TIM5_CC_IRQHandler 00001C GR
9 _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler 00001B GR
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 DABS size 0 flags 8
4 HOME size 0 flags 0
5 GSINIT size 0 flags 0
6 GSFINAL size 0 flags 0
7 CONST size 0 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size 1E flags 0
A CABS size 0 flags 8

1969
firmware/STM8L15X_LD/stm8l15x_rtc.asm Normal file
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File diff suppressed because it is too large Load Diff

1969
firmware/STM8L15X_LD/stm8l15x_rtc.lst Normal file
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File diff suppressed because it is too large Load Diff

793
firmware/STM8L15X_LD/stm8l15x_rtc.rel Normal file
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XH3
H B areas 2B global symbols
M stm8l15x_rtc
S .__.ABS. Def000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size 94A flags 0 addr 0
S _RTC_SetWakeUpCounter Def00064B
S _RTC_SetAlarm Def0003DF
S _RTC_StructInit Def000114
S _RTC_TamperPinsPrechargeDuration Def000831
S _RTC_GetFlagStatus Def0008C4
S _RTC_GetStoreOperation Def0006D3
S _RTC_GetDate Def000386
S _RTC_ClearFlag Def0008E9
S _RTC_WakeUpCmd Def00066E
S _RTC_WaitForSynchro Def00015B
S _RTC_TamperFilterConfig Def0007EF
S _RTC_GetSubSecond Def0002BA
S _RTC_OutputConfig Def0006D9
S _RTC_ClearITPendingBit Def00091A
S _RTC_TimeStructInit Def00025B
S _RTC_SetDate Def0002CB
S _RTC_SmoothCalibConfig Def00073B
S _RTC_BypassShadowCmd Def0001AB
S _RTC_GetTime Def000268
S _RTC_ITConfig Def00087C
S _RTC_ExitInitMode Def000156
S _RTC_TamperLevelConfig Def0007C5
S _RTC_SynchroShiftConfig Def000700
S _RTC_SetTime Def0001CF
S _RTC_TamperCmd Def000852
S _RTC_DeInit Def000000
S _RTC_CalibOutputCmd Def0007A1
S _RTC_GetITStatus Def0008F6
S _RTC_AlarmCmd Def0005A3
S _RTC_CalibOutputConfig Def00077D
S _RTC_AlarmStructInit Def0004D7
S _RTC_WriteProtectionCmd Def000124
S _RTC_TamperSamplingFreqConfig Def000810
S _RTC_AlarmSubSecondConfig Def0005EB
S _RTC_GetWakeUpCounter Def000660
S _RTC_GetAlarm Def0004F1
S _RTC_WakeUpClockConfig Def000626
S _RTC_RatioCmd Def000187
S _RTC_DayLightSavingConfig Def0006AC
S _RTC_Init Def0000CB
S _RTC_DateStructInit Def000372
S _RTC_EnterInitMode Def000135
A CABS size 0 flags 8 addr 0
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R 00 00 00 09
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T 00 00 0D 06 4F 35 FF 51 59 81
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R 00 00 00 09
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R 00 00 00 09
T 00 00 69
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T 00 00 69 35 00 51 48 35 FF 51 54 35 FF 51 55 35
R 00 00 00 09
T 00 00 76 00 51 5C 35 00 51 5D 35 00 51 5E 35 00
R 00 00 00 09
T 00 00 83 51 5F 35 00 51 64 35 00 51 65 35 00
R 00 00 00 09
T 00 00 8F 51 66 35 00 51 4C 35 00 51 4D 72 03
R 00 00 00 09
T 00 00 9B 51 4C 0E 5F
R 00 00 00 09
T 00 00 9F
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T 00 00 9F 72 03 51 4C 08 A3 FF FF 27 03 5C 20 F3
R 00 00 00 09
T 00 00 AC
R 00 00 00 09
T 00 00 AC 72 02 51 4C 14 35 00 51 6A 35 00 51 6B
R 00 00 00 09
T 00 00 B9 CD 01 5B 4D 26 03 4F 20 04
R 00 00 00 09 00 04 00 09
T 00 00 C2
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T 00 00 C2 A6 01 21
R 00 00 00 09
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T 00 00 C5 4F
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R 00 00 00 09
T 00 00 CB
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R 00 00 00 09 00 03 00 09
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R 00 00 00 09
T 00 00 ED 01 C7 51 48 1E 02 5C 5C E6 01 F6 C7
R 00 00 00 09
T 00 00 F9 51 50 E6 01 C7 51 51 1E 02 E6 01 C7
R 00 00 00 09
T 00 01 05 51 52 72 1F 51 4C A6 01
R 00 00 00 09
T 00 01 0D
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T 00 01 0D 35 FF 51 59 5B 03 81
R 00 00 00 09
T 00 01 14
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T 00 01 14 51 90 7F 93 5C A6 7F F7 93 90 AE 00 FF
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R 00 00 00 09
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R 00 00 00 09
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R 00 00 00 09
T 00 04 86 09 23 6B 08 1E 09 F6 1A 08 6B 0A 1E 05
R 00 00 00 09 00 03 00 09
T 00 04 93 F6 48 48 A4 80 1A 0A 6B 0A 1E 0B F6 CD
R 00 00 00 09
T 00 04 A0 09 23 6B 0C 1E 0D F6 1A 0C 6B 0E 1E 05
R 00 00 00 09 00 03 00 09
T 00 04 AD F6 48 48 48 A4 80 1A 0E
R 00 00 00 09
T 00 04 B5
R 00 00 00 09
T 00 04 B5 AE 51 5C 88 7B 10 F7 84 AE 51 5D 88 7B
R 00 00 00 09
T 00 04 C2 11 F7 84 AE 51 5E 88 7B 0B F7 84 C7
R 00 00 00 09
T 00 04 CE 51 5F 35 FF 51 59 5B 11 81
R 00 00 00 09
T 00 04 D7
R 00 00 00 09
T 00 04 D7 90 93 6F 03 90 7F 93 6F 01 93 6F 02 93
R 00 00 00 09
T 00 04 E4 6F 05 A6 01 90 E7 06 A6 F0 90 E7 04 81
R 00 00 00 09
T 00 04 F1
R 00 00 00 09
T 00 04 F1 52 0B 6B 0B 1F 09 C6 51 5C 6B 08 C6
R 00 00 00 09
T 00 04 FD 51 5D 6B 01 C6 51 5E 6B 02 C6 51 5F 6B
R 00 00 00 09
T 00 05 0A 03 1E 09 5C 5C 1F 04 7B 08 A4 7F 1E 04
R 00 00 00 09
T 00 05 17 F7 7B 08 A4 80 6B 08 1E 09 5C 1F 06 7B
R 00 00 00 09
T 00 05 24 01 A4 7F 1E 06 F7 7B 01 A4 80 44 1A 08
R 00 00 00 09
T 00 05 31 6B 08 16 09 7B 02 A4 3F 90 F7 1E 09 1C
R 00 00 00 09
T 00 05 3E 00 03 7B 02 A4 40 F7 7B 02 A4 80 44 44
R 00 00 00 09
T 00 05 4B 1A 08 6B 08 1E 09 1C 00 06 1F 01 7B 03
R 00 00 00 09
T 00 05 58 A4 3F 1E 01 F7 1E 09 1C 00 05 7B 03 A4
R 00 00 00 09
T 00 05 65 40 F7 7B 03 A4 80 44 44 44 1A 08 1E 09
R 00 00 00 09
T 00 05 72 1C 00 04 F7 0D 0B 26 26 90 F6 90 89 CD
R 00 00 00 09
T 00 05 7F 09 36 90 85 90 F7 1E 06 F6 CD 09 36 1E
R 00 00 00 09 00 03 00 09 00 0D 00 09
T 00 05 8C 06 F7 1E 04 F6 CD 09 36 1E 04 F7 1E 01
R 00 00 00 09 00 09 00 09
T 00 05 99 F6 CD 09 36 1E 01 F7
R 00 00 00 09 00 05 00 09
T 00 05 A0
R 00 00 00 09
T 00 05 A0 5B 0B 81
R 00 00 00 09
T 00 05 A3
R 00 00 00 09
T 00 05 A3 52 03 6B 03 5F 1F 01 35 CA 51 59 35 53
R 00 00 00 09
T 00 05 B0 51 59 C6 51 49 0D 03 27 09 AA 01 C7
R 00 00 00 09
T 00 05 BC 51 49 A6 01 20 22
R 00 00 00 09
T 00 05 C2
R 00 00 00 09
T 00 05 C2 A4 FE C7 51 49 C6 51 4C A4 01
R 00 00 00 09
T 00 05 CC
R 00 00 00 09
T 00 05 CC 1E 01 5C 27 0A 4D 26 07 1E 01 5C 1F 01
R 00 00 00 09
T 00 05 D9 20 F1
R 00 00 00 09
T 00 05 DB
R 00 00 00 09
T 00 05 DB 72 00 51 4C 02 4F C5
R 00 00 00 09
T 00 05 E2
R 00 00 00 09
T 00 05 E2 A6 01
R 00 00 00 09
T 00 05 E4
R 00 00 00 09
T 00 05 E4 35 FF 51 59 5B 03 81
R 00 00 00 09
T 00 05 EB
R 00 00 00 09
T 00 05 EB 89 6B 02 35 CA 51 59 35 53 51 59 72 0C
R 00 00 00 09
T 00 05 F8 51 4C 24 C6 51 49 AA 01 6B 01 72 11
R 00 00 00 09
T 00 06 04 51 49 9E C7 51 64 9F C7 51 65 AE 51 66
R 00 00 00 09
T 00 06 11 7B 02 F7 C6 51 49 1A 01 C7 51 49 A6 01
R 00 00 00 09
T 00 06 1E 21
R 00 00 00 09
T 00 06 1F
R 00 00 00 09
T 00 06 1F 4F
R 00 00 00 09
T 00 06 20
R 00 00 00 09
T 00 06 20 35 FF 51 59 85 81
R 00 00 00 09
T 00 06 26
R 00 00 00 09
T 00 06 26 88 6B 01 35 CA 51 59 35 53 51 59 72 15
R 00 00 00 09
T 00 06 33 51 49 C6 51 48 A4 F8 C7 51 48 C6 51 48
R 00 00 00 09
T 00 06 40 1A 01 C7 51 48 35 FF 51 59 84 81
R 00 00 00 09
T 00 06 4B
R 00 00 00 09
T 00 06 4B 35 CA 51 59 35 53 51 59 9E C7 51 54 9F
R 00 00 00 09
T 00 06 58 C7 51 55 35 FF 51 59 81
R 00 00 00 09
T 00 06 60
R 00 00 00 09
T 00 06 60 89 C6 51 54 95 0F 02 C6 51 55 97 5B 02
R 00 00 00 09
T 00 06 6D 81
R 00 00 00 09
T 00 06 6E
R 00 00 00 09
T 00 06 6E 88 6B 01 35 CA 51 59 35 53 51 59 C6
R 00 00 00 09
T 00 06 7A 51 49 0D 01 27 09 AA 04 C7 51 49 A6 01
R 00 00 00 09
T 00 06 87 20 1C
R 00 00 00 09
T 00 06 89
R 00 00 00 09
T 00 06 89 A4 FB C7 51 49 5F
R 00 00 00 09
T 00 06 8F
R 00 00 00 09
T 00 06 8F 72 04 51 4C 08 A3 FF FF 27 03 5C 20 F3
R 00 00 00 09
T 00 06 9C
R 00 00 00 09
T 00 06 9C 72 04 51 4C 02 4F C5
R 00 00 00 09
T 00 06 A3
R 00 00 00 09
T 00 06 A3 A6 01
R 00 00 00 09
T 00 06 A5
R 00 00 00 09
T 00 06 A5 35 FF 51 59 5B 01 81
R 00 00 00 09
T 00 06 AC
R 00 00 00 09
T 00 06 AC 88 97 35 CA 51 59 35 53 51 59 C6 51 4A
R 00 00 00 09
T 00 06 B9 A4 FB C7 51 4A C6 51 4A 6B 01 9F 1A 04
R 00 00 00 09
T 00 06 C6 1A 01 C7 51 4A 35 FF 51 59 84 85 84 FC
R 00 00 00 09
T 00 06 D3
R 00 00 00 09
T 00 06 D3 C6 51 4A A4 04 81
R 00 00 00 09
T 00 06 D9
R 00 00 00 09
T 00 06 D9 88 97 35 CA 51 59 35 53 51 59 C6 51 4A
R 00 00 00 09
T 00 06 E6 A4 8F C7 51 4A C6 51 4A 6B 01 9F 1A 04
R 00 00 00 09
T 00 06 F3 1A 01 C7 51 4A 35 FF 51 59 84 85 84 FC
R 00 00 00 09
T 00 07 00
R 00 00 00 09
T 00 07 00 88 6B 01 51 35 CA 51 59 35 53 51 59 72
R 00 00 00 09
T 00 07 0D 07 51 4C 0E 5F
R 00 00 00 09
T 00 07 12
R 00 00 00 09
T 00 07 12 72 07 51 4C 08 A3 FF FF 27 03 5C 20 F3
R 00 00 00 09
T 00 07 1F
R 00 00 00 09
T 00 07 1F 72 06 51 4C 0F 90 9E 1A 01 C7 51 5A 90
R 00 00 00 09
T 00 07 2C 9F C7 51 5B A6 01 21
R 00 00 00 09
T 00 07 33
R 00 00 00 09
T 00 07 33 4F
R 00 00 00 09
T 00 07 34
R 00 00 00 09
T 00 07 34 35 FF 51 59 5B 01 81
R 00 00 00 09
T 00 07 3B
R 00 00 00 09
T 00 07 3B 88 90 97 35 CA 51 59 35 53 51 59 72 03
R 00 00 00 09
T 00 07 48 51 4C 0E 5F
R 00 00 00 09
T 00 07 4C
R 00 00 00 09
T 00 07 4C 72 03 51 4C 08 A3 FF FF 27 03 5C 20 F3
R 00 00 00 09
T 00 07 59
R 00 00 00 09
T 00 07 59 72 02 51 4C 15 90 9F 1A 04 6B 01 7B 05
R 00 00 00 09
T 00 07 66 1A 01 C7 51 6A 7B 06 C7 51 6B A6 01 21
R 00 00 00 09
T 00 07 73
R 00 00 00 09
T 00 07 73 4F
R 00 00 00 09
T 00 07 74
R 00 00 00 09
T 00 07 74 35 FF 51 59 1E 02 5B 06 FC
R 00 00 00 09
T 00 07 7D
R 00 00 00 09
T 00 07 7D 88 6B 01 35 CA 51 59 35 53 51 59 C6
R 00 00 00 09
T 00 07 89 51 4A 0D 01 27 07 AA 08 C7 51 4A 20 05
R 00 00 00 09
T 00 07 96
R 00 00 00 09
T 00 07 96 A4 F7 C7 51 4A
R 00 00 00 09
T 00 07 9B
R 00 00 00 09
T 00 07 9B 35 FF 51 59 84 81
R 00 00 00 09
T 00 07 A1
R 00 00 00 09
T 00 07 A1 88 6B 01 35 CA 51 59 35 53 51 59 C6
R 00 00 00 09
T 00 07 AD 51 4A 0D 01 27 07 AA 80 C7 51 4A 20 05
R 00 00 00 09
T 00 07 BA
R 00 00 00 09
T 00 07 BA A4 7F C7 51 4A
R 00 00 00 09
T 00 07 BF
R 00 00 00 09
T 00 07 BF 35 FF 51 59 84 81
R 00 00 00 09
T 00 07 C5
R 00 00 00 09
T 00 07 C5 88 97 35 CA 51 59 35 53 51 59 C6 51 6C
R 00 00 00 09
T 00 07 D2 6B 01 9F 48 0D 04 27 07 1A 01 C7 51 6C
R 00 00 00 09
T 00 07 DF 20 06
R 00 00 00 09
T 00 07 E1
R 00 00 00 09
T 00 07 E1 43 14 01 C7 51 6C
R 00 00 00 09
T 00 07 E7
R 00 00 00 09
T 00 07 E7 35 FF 51 59 84 85 84 FC
R 00 00 00 09
T 00 07 EF
R 00 00 00 09
T 00 07 EF 88 6B 01 35 CA 51 59 35 53 51 59 C6
R 00 00 00 09
T 00 07 FB 51 6D A4 E7 C7 51 6D C6 51 6D 1A 01 C7
R 00 00 00 09
T 00 08 08 51 6D 35 FF 51 59 84 81
R 00 00 00 09
T 00 08 10
R 00 00 00 09
T 00 08 10 88 6B 01 35 CA 51 59 35 53 51 59 C6
R 00 00 00 09
T 00 08 1C 51 6D A4 F8 C7 51 6D C6 51 6D 1A 01 C7
R 00 00 00 09
T 00 08 29 51 6D 35 FF 51 59 84 81
R 00 00 00 09
T 00 08 31
R 00 00 00 09
T 00 08 31 88 6B 01 35 CA 51 59 35 53 51 59 C6
R 00 00 00 09
T 00 08 3D 51 6D A4 1F C7 51 6D C6 51 6D 1A 01 C7
R 00 00 00 09
T 00 08 4A 51 6D 35 FF 51 59 84 81
R 00 00 00 09
T 00 08 52
R 00 00 00 09
T 00 08 52 88 35 CA 51 59 35 53 51 59 AE 51 6C 88
R 00 00 00 09
T 00 08 5F F6 6B 02 84 0D 04 27 07 1A 01 C7 51 6C
R 00 00 00 09
T 00 08 6C 20 06
R 00 00 00 09
T 00 08 6E
R 00 00 00 09
T 00 08 6E 43 14 01 C7 51 6C
R 00 00 00 09
T 00 08 74
R 00 00 00 09
T 00 08 74 35 FF 51 59 84 85 84 FC
R 00 00 00 09
T 00 08 7C
R 00 00 00 09
T 00 08 7C 52 03 6B 03 35 CA 51 59 35 53 51 59 C6
R 00 00 00 09
T 00 08 89 51 49 6B 02 9F A4 F0 88 9F A4 01 6B 02
R 00 00 00 09
T 00 08 96 84 0D 03 27 0F 1A 02 C7 51 49 C6 51 6C
R 00 00 00 09
T 00 08 A3 1A 01 C7 51 6C 20 13
R 00 00 00 09
T 00 08 AA
R 00 00 00 09
T 00 08 AA 43 14 02 C7 51 49 C6 51 6C 6B 02 7B 01
R 00 00 00 09
T 00 08 B7 43 14 02 C7 51 6C
R 00 00 00 09
T 00 08 BD
R 00 00 00 09
T 00 08 BD 35 FF 51 59 5B 03 81
R 00 00 00 09
T 00 08 C4
R 00 00 00 09
T 00 08 C4 52 06 C6 51 4C 90 97 0F 02 C6 51 4D 0F
R 00 00 00 09
T 00 08 D1 03 6B 06 61 6B 05 61 9F 14 06 02 14 05
R 00 00 00 09
T 00 08 DE 95 5D 27 03 A6 01 21
R 00 00 00 09
T 00 08 E5
R 00 00 00 09
T 00 08 E5 4F
R 00 00 00 09
T 00 08 E6
R 00 00 00 09
T 00 08 E6 5B 06 81
R 00 00 00 09
T 00 08 E9
R 00 00 00 09
T 00 08 E9 9F 43 C7 51 4D 9E 43 A4 7F C7 51 4C 81
R 00 00 00 09
T 00 08 F6
R 00 00 00 09
T 00 08 F6 88 C6 51 49 6B 01 9F 14 01 6B 01 C6
R 00 00 00 09
T 00 09 02 51 4D 54 54 54 54 89 14 02 85 0D 01 27
R 00 00 00 09
T 00 09 0F 06 4D 27 03 A6 01 21
R 00 00 00 09
T 00 09 16
R 00 00 00 09
T 00 09 16 4F
R 00 00 00 09
T 00 09 17
R 00 00 00 09
T 00 09 17 5B 01 81
R 00 00 00 09
T 00 09 1A
R 00 00 00 09
T 00 09 1A A6 10 62 9F 43 C7 51 4D 81
R 00 00 00 09
T 00 09 23
R 00 00 00 09
T 00 09 23 5F
R 00 00 00 09
T 00 09 24
R 00 00 00 09
T 00 09 24 A1 0A 25 05 5C A0 0A 20 F7
R 00 00 00 09
T 00 09 2D
R 00 00 00 09
T 00 09 2D 58 58 58 58 89 1A 02 85 81
R 00 00 00 09
T 00 09 36
R 00 00 00 09
T 00 09 36 90 97 A4 F0 4E A4 0F 97 A6 0A 42 90 9F
R 00 00 00 09
T 00 09 43 A4 0F 89 1B 02 85 81
R 00 00 00 09

1969
firmware/STM8L15X_LD/stm8l15x_rtc.rst Normal file
View File

File diff suppressed because it is too large Load Diff

71
firmware/STM8L15X_LD/stm8l15x_rtc.sym Normal file
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@@ -0,0 +1,71 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
9 _Bcd2ToByte 000936 R
9 _ByteToBcd2 000923 R
9 _RTC_AlarmCmd 0005A3 GR
9 _RTC_AlarmStructInit 0004D7 GR
9 _RTC_AlarmSubSecondConfig 0005EB GR
9 _RTC_BypassShadowCmd 0001AB GR
9 _RTC_CalibOutputCmd 0007A1 GR
9 _RTC_CalibOutputConfig 00077D GR
9 _RTC_ClearFlag 0008E9 GR
9 _RTC_ClearITPendingBit 00091A GR
9 _RTC_DateStructInit 000372 GR
9 _RTC_DayLightSavingConfig 0006AC GR
9 _RTC_DeInit 000000 GR
9 _RTC_EnterInitMode 000135 GR
9 _RTC_ExitInitMode 000156 GR
9 _RTC_GetAlarm 0004F1 GR
9 _RTC_GetDate 000386 GR
9 _RTC_GetFlagStatus 0008C4 GR
9 _RTC_GetITStatus 0008F6 GR
9 _RTC_GetStoreOperation 0006D3 GR
9 _RTC_GetSubSecond 0002BA GR
9 _RTC_GetTime 000268 GR
9 _RTC_GetWakeUpCounter 000660 GR
9 _RTC_ITConfig 00087C GR
9 _RTC_Init 0000CB GR
9 _RTC_OutputConfig 0006D9 GR
9 _RTC_RatioCmd 000187 GR
9 _RTC_SetAlarm 0003DF GR
9 _RTC_SetDate 0002CB GR
9 _RTC_SetTime 0001CF GR
9 _RTC_SetWakeUpCounter 00064B GR
9 _RTC_SmoothCalibConfig 00073B GR
9 _RTC_StructInit 000114 GR
9 _RTC_SynchroShiftConfig 000700 GR
9 _RTC_TamperCmd 000852 GR
9 _RTC_TamperFilterConfig 0007EF GR
9 _RTC_TamperLevelConfig 0007C5 GR
9 _RTC_TamperPinsPrechargeDuration 000831 GR
9 _RTC_TamperSamplingFreqConfig 000810 GR
9 _RTC_TimeStructInit 00025B GR
9 _RTC_WaitForSynchro 00015B GR
9 _RTC_WakeUpClockConfig 000626 GR
9 _RTC_WakeUpCmd 00066E GR
9 _RTC_WriteProtectionCmd 000124 GR
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 DABS size 0 flags 8
4 HOME size 0 flags 0
5 GSINIT size 0 flags 0
6 GSFINAL size 0 flags 0
7 CONST size 0 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size 94A flags 0
A CABS size 0 flags 8

899
firmware/STM8L15X_LD/stm8l15x_usart.asm Normal file
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@@ -0,0 +1,899 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ISO C Compiler
; Version 4.5.0 #15242 (Linux)
;--------------------------------------------------------
.module stm8l15x_usart
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _CLK_GetClockFreq
.globl _USART_DeInit
.globl _USART_Init
.globl _USART_ClockInit
.globl _USART_Cmd
.globl _USART_SetPrescaler
.globl _USART_SendBreak
.globl _USART_ReceiveData8
.globl _USART_ReceiveData9
.globl _USART_SendData8
.globl _USART_SendData9
.globl _USART_ReceiverWakeUpCmd
.globl _USART_SetAddress
.globl _USART_WakeUpConfig
.globl _USART_HalfDuplexCmd
.globl _USART_SmartCardCmd
.globl _USART_SmartCardNACKCmd
.globl _USART_SetGuardTime
.globl _USART_IrDAConfig
.globl _USART_IrDACmd
.globl _USART_DMACmd
.globl _USART_ITConfig
.globl _USART_GetFlagStatus
.globl _USART_ClearFlag
.globl _USART_GetITStatus
.globl _USART_ClearITPendingBit
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area INITIALIZED
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area DABS (ABS)
; default segment ordering for linker
.area HOME
.area GSINIT
.area GSFINAL
.area CONST
.area INITIALIZER
.area CODE
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME
.area GSINIT
.area GSFINAL
.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME
.area HOME
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CODE
; ../inc/stm8l151x/src/stm8l15x_usart.c: 148: void USART_DeInit(USART_TypeDef* USARTx)
; -----------------------------------------
; function USART_DeInit
; -----------------------------------------
_USART_DeInit:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 154: (void) USARTx->DR;
ldw y, x
ld a, (0x1, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 156: USARTx->BRR2 = USART_BRR2_RESET_VALUE; /* Set USART_BRR2 to reset value 0x00 */
ldw x, y
clr (0x0003, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 157: USARTx->BRR1 = USART_BRR1_RESET_VALUE; /* Set USART_BRR1 to reset value 0x00 */
ldw x, y
clr (0x02, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 159: USARTx->CR1 = USART_CR1_RESET_VALUE; /* Set USART_CR1 to reset value 0x00 */
ldw x, y
clr (0x0004, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 160: USARTx->CR2 = USART_CR2_RESET_VALUE; /* Set USART_CR2 to reset value 0x00 */
ldw x, y
clr (0x0005, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 161: USARTx->CR3 = USART_CR3_RESET_VALUE; /* Set USART_CR3 to reset value 0x00 */
ldw x, y
clr (0x0006, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 162: USARTx->CR4 = USART_CR4_RESET_VALUE; /* Set USART_CR4 to reset value 0x00 */
ldw x, y
clr (0x0007, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 163: }
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 192: void USART_Init(USART_TypeDef* USARTx, uint32_t BaudRate, USART_WordLength_TypeDef
; -----------------------------------------
; function USART_Init
; -----------------------------------------
_USART_Init:
sub sp, #11
; ../inc/stm8l151x/src/stm8l15x_usart.c: 210: USARTx->CR1 &= (uint8_t)(~(USART_CR1_PCEN | USART_CR1_PS | USART_CR1_M));
ldw (0x0a, sp), x
addw x, #0x0004
ld a, (x)
and a, #0xe9
ld (0x09, sp), a
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 213: USARTx->CR1 |= (uint8_t)((uint8_t)USART_WordLength | (uint8_t)USART_Parity);
ld a, (0x12, sp)
or a, (0x14, sp)
or a, (0x09, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 216: USARTx->CR3 &= (uint8_t)(~USART_CR3_STOP);
ldw x, (0x0a, sp)
addw x, #0x0006
ld a, (x)
and a, #0xcf
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 218: USARTx->CR3 |= (uint8_t)USART_StopBits;
or a, (0x13, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 221: USARTx->BRR1 &= (uint8_t)(~USART_BRR1_DIVM);
ldw x, (0x0a, sp)
incw x
incw x
ldw (0x01, sp), x
ld a, (x)
ldw x, (0x01, sp)
clr (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 223: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVM);
ldw x, (0x0a, sp)
addw x, #0x0003
ldw (0x03, sp), x
ld a, (x)
and a, #0x0f
ldw x, (0x03, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 225: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVF);
ldw x, (0x03, sp)
clr (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 227: BaudRate_Mantissa = (uint32_t)(CLK_GetClockFreq() / BaudRate );
call _CLK_GetClockFreq
ldw (0x08, sp), x
ldw x, (0x10, sp)
pushw x
ldw x, (0x10, sp)
pushw x
ldw x, (0x0c, sp)
pushw x
pushw y
; ../inc/stm8l151x/src/stm8l15x_usart.c: 229: USARTx->BRR2 = (uint8_t)((BaudRate_Mantissa >> (uint8_t)8) & (uint8_t)0xF0);
call __divulong
addw sp, #8
ldw (0x05, sp), y
ld a, xh
and a, #0xf0
ld (0x09, sp), a
ldw y, (0x03, sp)
ld a, (0x09, sp)
ld (y), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 231: USARTx->BRR2 |= (uint8_t)(BaudRate_Mantissa & (uint8_t)0x0F);
ld a, xl
and a, #0x0f
or a, (0x09, sp)
ldw y, (0x03, sp)
ld (y), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 233: USARTx->BRR1 = (uint8_t)(BaudRate_Mantissa >> (uint8_t)4);
ld a, #0x10
div x, a
ld a, xl
ldw x, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 236: USARTx->CR2 &= (uint8_t)~(USART_CR2_TEN | USART_CR2_REN);
ldw x, (0x0a, sp)
addw x, #0x0005
ld a, (x)
and a, #0xf3
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 238: USARTx->CR2 |= (uint8_t)USART_Mode;
or a, (0x15, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 239: }
ldw x, (12, sp)
addw sp, #21
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 264: void USART_ClockInit(USART_TypeDef* USARTx, USART_Clock_TypeDef USART_Clock,
; -----------------------------------------
; function USART_ClockInit
; -----------------------------------------
_USART_ClockInit:
sub sp, #5
ld (0x05, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
addw x, #0x0006
ldw (0x01, sp), x
ld a, (x)
and a, #0xf8
ld (0x03, sp), a
ldw x, (0x01, sp)
ld a, (0x03, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 277: USARTx->CR3 |= (uint8_t)((uint8_t)((uint8_t)(USART_CPOL | (uint8_t)USART_CPHA ) | USART_LastBit));
ld a, (0x08, sp)
or a, (0x09, sp)
ld (0x04, sp), a
ld a, (0x0a, sp)
or a, (0x04, sp)
or a, (0x03, sp)
ldw x, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
ldw x, (0x01, sp)
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 279: if (USART_Clock != USART_Clock_Disable)
tnz (0x05, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 281: USARTx->CR3 |= (uint8_t)(USART_CR3_CLKEN); /* Set the Clock Enable bit */
or a, #0x08
ldw x, (0x01, sp)
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 285: USARTx->CR3 &= (uint8_t)(~USART_CR3_CLKEN); /* Clear the Clock Enable bit */
and a, #0xf7
ldw x, (0x01, sp)
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 287: }
ldw x, (6, sp)
addw sp, #10
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 296: void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
; -----------------------------------------
; function USART_Cmd
; -----------------------------------------
_USART_Cmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
addw x, #0x0004
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 298: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
and a, #0xdf
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 304: USARTx->CR1 |= USART_CR1_USARTD; /**< USART Disable (for low power consumption) */
or a, #0x20
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 306: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 329: void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
; -----------------------------------------
; function USART_SetPrescaler
; -----------------------------------------
_USART_SetPrescaler:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 332: USARTx->PSCR = USART_Prescaler;
addw x, #0x000a
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 333: }
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 340: void USART_SendBreak(USART_TypeDef* USARTx)
; -----------------------------------------
; function USART_SendBreak
; -----------------------------------------
_USART_SendBreak:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 342: USARTx->CR2 |= USART_CR2_SBK;
addw x, #0x0005
ld a, (x)
or a, #0x01
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 343: }
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 382: uint8_t USART_ReceiveData8(USART_TypeDef* USARTx)
; -----------------------------------------
; function USART_ReceiveData8
; -----------------------------------------
_USART_ReceiveData8:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 384: return USARTx->DR;
ld a, (0x1, x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 385: }
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 392: uint16_t USART_ReceiveData9(USART_TypeDef* USARTx)
; -----------------------------------------
; function USART_ReceiveData9
; -----------------------------------------
_USART_ReceiveData9:
pushw x
; ../inc/stm8l151x/src/stm8l15x_usart.c: 396: temp = ((uint16_t)(((uint16_t)((uint16_t)USARTx->CR1 & (uint16_t)USART_CR1_R8)) << 1));
ldw y, x
ld a, (0x4, x)
and a, #0x80
ld xl, a
clr a
ld xh, a
sllw x
ldw (0x01, sp), x
; ../inc/stm8l151x/src/stm8l15x_usart.c: 397: return (uint16_t)( ((uint16_t)((uint16_t)USARTx->DR) | temp) & ((uint16_t)0x01FF));
ld a, (0x1, y)
or a, (0x02, sp)
ld xl, a
ld a, (0x01, sp)
and a, #0x01
ld xh, a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 398: }
addw sp, #2
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 405: void USART_SendData8(USART_TypeDef* USARTx, uint8_t Data)
; -----------------------------------------
; function USART_SendData8
; -----------------------------------------
_USART_SendData8:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 408: USARTx->DR = Data;
incw x
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 409: }
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 418: void USART_SendData9(USART_TypeDef* USARTx, uint16_t Data)
; -----------------------------------------
; function USART_SendData9
; -----------------------------------------
_USART_SendData9:
sub sp, #3
; ../inc/stm8l151x/src/stm8l15x_usart.c: 423: USARTx->CR1 &= ((uint8_t)~USART_CR1_T8);
ldw (0x02, sp), x
addw x, #0x0004
ld a, (x)
and a, #0xbf
ld (0x01, sp), a
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 426: USARTx->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & USART_CR1_T8);
ldw y, (0x06, sp)
srlw y
srlw y
ld a, yl
and a, #0x40
or a, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 429: USARTx->DR = (uint8_t)(Data);
ldw x, (0x02, sp)
incw x
ld a, (0x07, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 430: }
ldw x, (4, sp)
addw sp, #7
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 473: void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
; -----------------------------------------
; function USART_ReceiverWakeUpCmd
; -----------------------------------------
_USART_ReceiverWakeUpCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
addw x, #0x0005
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 477: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
or a, #0x02
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 485: USARTx->CR2 &= ((uint8_t)~USART_CR2_RWU);
and a, #0xfd
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 487: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 496: void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
; -----------------------------------------
; function USART_SetAddress
; -----------------------------------------
_USART_SetAddress:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 502: USARTx->CR4 &= ((uint8_t)~USART_CR4_ADD);
addw x, #0x0007
ld a, (x)
and a, #0xf0
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 504: USARTx->CR4 |= USART_Address;
or a, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 505: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 515: void USART_WakeUpConfig(USART_TypeDef* USARTx, USART_WakeUp_TypeDef USART_WakeUp)
; -----------------------------------------
; function USART_WakeUpConfig
; -----------------------------------------
_USART_WakeUpConfig:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 519: USARTx->CR1 &= ((uint8_t)~USART_CR1_WAKE);
addw x, #0x0004
ld a, (x)
and a, #0xf7
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 520: USARTx->CR1 |= (uint8_t)USART_WakeUp;
or a, (0x01, sp)
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 521: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 566: void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
; -----------------------------------------
; function USART_HalfDuplexCmd
; -----------------------------------------
_USART_HalfDuplexCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
addw x, #0x0008
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 570: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
or a, #0x08
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 576: USARTx->CR5 &= (uint8_t)~USART_CR5_HDSEL; /**< USART Half Duplex Disable */
and a, #0xf7
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 578: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 644: void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
; -----------------------------------------
; function USART_SmartCardCmd
; -----------------------------------------
_USART_SmartCardCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
addw x, #0x0008
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 648: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
or a, #0x20
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 656: USARTx->CR5 &= ((uint8_t)(~USART_CR5_SCEN));
and a, #0xdf
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 658: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 667: void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
; -----------------------------------------
; function USART_SmartCardNACKCmd
; -----------------------------------------
_USART_SmartCardNACKCmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
addw x, #0x0008
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 671: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
or a, #0x10
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 679: USARTx->CR5 &= ((uint8_t)~(USART_CR5_NACK));
and a, #0xef
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 681: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 690: void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
; -----------------------------------------
; function USART_SetGuardTime
; -----------------------------------------
_USART_SetGuardTime:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 693: USARTx->GTR = USART_GuardTime;
addw x, #0x0009
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 694: }
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 751: void USART_IrDAConfig(USART_TypeDef* USARTx, USART_IrDAMode_TypeDef USART_IrDAMode)
; -----------------------------------------
; function USART_IrDAConfig
; -----------------------------------------
_USART_IrDAConfig:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
addw x, #0x0008
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 755: if (USART_IrDAMode != USART_IrDAMode_Normal)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
or a, #0x04
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 761: USARTx->CR5 &= ((uint8_t)~USART_CR5_IRLP);
and a, #0xfb
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 763: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 772: void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
; -----------------------------------------
; function USART_IrDACmd
; -----------------------------------------
_USART_IrDACmd:
push a
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
addw x, #0x0008
ld a, (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 778: if (NewState != DISABLE)
tnz (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
or a, #0x02
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 786: USARTx->CR5 &= ((uint8_t)~USART_CR5_IREN);
and a, #0xfd
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 788: }
pop a
ret
; ../inc/stm8l151x/src/stm8l15x_usart.c: 818: void USART_DMACmd(USART_TypeDef* USARTx, USART_DMAReq_TypeDef USART_DMAReq,
; -----------------------------------------
; function USART_DMACmd
; -----------------------------------------
_USART_DMACmd:
push a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
addw x, #0x0008
push a
ld a, (x)
ld (0x02, sp), a
pop a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 825: if (NewState != DISABLE)
tnz (0x04, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
or a, (0x01, sp)
ld (x), a
jra 00104$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 835: USARTx->CR5 &= (uint8_t)~USART_DMAReq;
cpl a
and a, (0x01, sp)
ld (x), a
00104$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 837: }
pop a
popw x
pop a
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 939: void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState NewState)
; -----------------------------------------
; function USART_ITConfig
; -----------------------------------------
_USART_ITConfig:
sub sp, #9
ldw (0x08, sp), x
; ../inc/stm8l151x/src/stm8l15x_usart.c: 946: usartreg = (uint8_t)((uint16_t)USART_IT >> 0x08);
ldw x, (0x0c, sp)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 948: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
ld a, (0x0d, sp)
and a, #0x0f
push a
ld a, #0x01
ld (0x08, sp), a
pop a
tnz a
jreq 00154$
00153$:
sll (0x07, sp)
dec a
jrne 00153$
00154$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
ld a, xh
dec a
jrne 00156$
ld a, #0x01
ld (0x01, sp), a
.byte 0xc5
00156$:
clr (0x01, sp)
00157$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
ldw y, (0x08, sp)
addw y, #0x0004
ldw (0x02, sp), y
; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
ld a, xh
sub a, #0x05
jrne 00159$
inc a
ld (0x04, sp), a
.byte 0xc5
00159$:
clr (0x04, sp)
00160$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
ldw x, (0x08, sp)
addw x, #0x0008
ldw (0x05, sp), x
; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
ldw x, (0x08, sp)
addw x, #0x0005
; ../inc/stm8l151x/src/stm8l15x_usart.c: 950: if (NewState != DISABLE)
tnz (0x0e, sp)
jreq 00114$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
tnz (0x01, sp)
jreq 00105$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
ldw x, (0x02, sp)
ld a, (x)
or a, (0x07, sp)
ldw x, (0x02, sp)
ld (x), a
jra 00116$
00105$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
tnz (0x04, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
ldw x, (0x05, sp)
ld a, (x)
or a, (0x07, sp)
ldw x, (0x05, sp)
ld (x), a
jra 00116$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
ld a, (x)
or a, (0x07, sp)
ld (x), a
jra 00116$
00114$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
cpl (0x07, sp)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 970: if (usartreg == 0x01)
tnz (0x01, sp)
jreq 00111$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
ldw x, (0x02, sp)
ld a, (x)
and a, (0x07, sp)
ldw x, (0x02, sp)
ld (x), a
jra 00116$
00111$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 974: else if (usartreg == 0x05)
tnz (0x04, sp)
jreq 00108$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 976: USARTx->CR5 &= (uint8_t)(~itpos);
ldw x, (0x05, sp)
ld a, (x)
and a, (0x07, sp)
ldw x, (0x05, sp)
ld (x), a
jra 00116$
00108$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 981: USARTx->CR2 &= (uint8_t)(~itpos);
ld a, (x)
and a, (0x07, sp)
ld (x), a
00116$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 984: }
ldw x, (10, sp)
addw sp, #14
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1002: FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
; -----------------------------------------
; function USART_GetFlagStatus
; -----------------------------------------
_USART_GetFlagStatus:
push a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
ldw y, (0x04, sp)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
ld a, (0x05, sp)
ld (0x01, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
cpw y, #0x0101
jrne 00108$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
ld a, (0x5, x)
and a, (0x01, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1014: status = SET;
ld a, #0x01
jra 00109$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1019: status = RESET;
clr a
jra 00109$
00108$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1024: if ((USARTx->SR & (uint8_t)USART_FLAG) != (uint8_t)0x00)
ld a, (x)
and a, (0x01, sp)
jreq 00105$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1027: status = SET;
ld a, #0x01
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1032: status = RESET;
.byte 0x21
00105$:
clr a
00109$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1036: return status;
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1037: }
ldw x, (2, sp)
addw sp, #5
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1060: void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
; -----------------------------------------
; function USART_ClearFlag
; -----------------------------------------
_USART_ClearFlag:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1065: USARTx->SR = (uint8_t)((uint16_t)~((uint16_t)USART_FLAG));
ldw y, (0x03, sp)
cplw y
ld a, yl
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1066: }
ldw x, (1, sp)
addw sp, #4
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1083: ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
; -----------------------------------------
; function USART_GetITStatus
; -----------------------------------------
_USART_GetITStatus:
sub sp, #9
ldw (0x08, sp), x
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1096: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
ld a, (0x0d, sp)
ld xl, a
and a, #0x0f
push a
ld a, #0x01
ld (0x04, sp), a
pop a
tnz a
jreq 00179$
00178$:
sll (0x03, sp)
dec a
jrne 00178$
00179$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1098: itmask1 = (uint8_t)((uint8_t)USART_IT >> (uint8_t)4);
ld a, xl
swap a
and a, #0x0f
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1100: itmask2 = (uint8_t)((uint8_t)1 << itmask1);
push a
ld a, #0x01
ld (0x08, sp), a
pop a
tnz a
jreq 00181$
00180$:
sll (0x07, sp)
dec a
jrne 00180$
00181$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
ldw y, (0x0c, sp)
ldw (0x01, sp), y
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
ldw y, (0x08, sp)
ldw (0x04, sp), y
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
ldw x, (0x01, sp)
cpw x, #0x0100
jrne 00118$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1106: enablestatus = (uint8_t)((uint8_t)USARTx->CR1 & itmask2);
ldw y, (0x08, sp)
ldw (0x01, sp), y
ldw x, y
ld a, (0x4, x)
and a, (0x07, sp)
ld (0x07, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
ldw x, (0x04, sp)
ld a, (x)
and a, (0x03, sp)
jreq 00102$
tnz (0x07, sp)
jreq 00102$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1112: pendingbitstatus = SET;
ld a, #0x01
jra 00119$
00102$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1117: pendingbitstatus = RESET;
clr a
jra 00119$
00118$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
ldw x, (0x08, sp)
ld a, (0x5, x)
and a, (0x07, sp)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1121: else if (USART_IT == USART_IT_OR)
ldw x, (0x01, sp)
cpw x, #0x0235
jrne 00115$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
ld (0x06, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1127: temp = (uint8_t)(USARTx->CR5 & USART_CR5_EIE);
ldw x, (0x08, sp)
ld a, (0x8, x)
and a, #0x01
ld (0x07, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1129: if (( (USARTx->SR & itpos) != 0x00) && ((enablestatus || temp)))
ldw x, (0x04, sp)
ld a, (x)
and a, (0x03, sp)
jreq 00106$
tnz (0x06, sp)
jrne 00105$
tnz (0x07, sp)
jreq 00106$
00105$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1132: pendingbitstatus = SET;
ld a, #0x01
jra 00119$
00106$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1137: pendingbitstatus = RESET;
clr a
jra 00119$
00115$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1144: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
ld (0x07, sp), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1146: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
ldw x, (0x04, sp)
ld a, (x)
and a, (0x03, sp)
jreq 00111$
tnz (0x07, sp)
jreq 00111$
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1149: pendingbitstatus = SET;
ld a, #0x01
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1154: pendingbitstatus = RESET;
.byte 0x21
00111$:
clr a
00119$:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1159: return pendingbitstatus;
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1160: }
ldw x, (10, sp)
addw sp, #13
jp (x)
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1183: void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
; -----------------------------------------
; function USART_ClearITPendingBit
; -----------------------------------------
_USART_ClearITPendingBit:
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1188: USARTx->SR &= (uint8_t)(~USART_SR_TC);
ld a, (x)
and a, #0xbf
ld (x), a
; ../inc/stm8l151x/src/stm8l15x_usart.c: 1189: }
ldw x, (1, sp)
addw sp, #4
jp (x)
.area CODE
.area CONST
.area INITIALIZER
.area CABS (ABS)

899
firmware/STM8L15X_LD/stm8l15x_usart.lst Normal file
View File

@@ -0,0 +1,899 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_usart
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _CLK_GetClockFreq
11 .globl _USART_DeInit
12 .globl _USART_Init
13 .globl _USART_ClockInit
14 .globl _USART_Cmd
15 .globl _USART_SetPrescaler
16 .globl _USART_SendBreak
17 .globl _USART_ReceiveData8
18 .globl _USART_ReceiveData9
19 .globl _USART_SendData8
20 .globl _USART_SendData9
21 .globl _USART_ReceiverWakeUpCmd
22 .globl _USART_SetAddress
23 .globl _USART_WakeUpConfig
24 .globl _USART_HalfDuplexCmd
25 .globl _USART_SmartCardCmd
26 .globl _USART_SmartCardNACKCmd
27 .globl _USART_SetGuardTime
28 .globl _USART_IrDAConfig
29 .globl _USART_IrDACmd
30 .globl _USART_DMACmd
31 .globl _USART_ITConfig
32 .globl _USART_GetFlagStatus
33 .globl _USART_ClearFlag
34 .globl _USART_GetITStatus
35 .globl _USART_ClearITPendingBit
36 ;--------------------------------------------------------
37 ; ram data
38 ;--------------------------------------------------------
39 .area DATA
40 ;--------------------------------------------------------
41 ; ram data
42 ;--------------------------------------------------------
43 .area INITIALIZED
44 ;--------------------------------------------------------
45 ; absolute external ram data
46 ;--------------------------------------------------------
47 .area DABS (ABS)
48
49 ; default segment ordering for linker
50 .area HOME
51 .area GSINIT
52 .area GSFINAL
53 .area CONST
54 .area INITIALIZER
55 .area CODE
56
57 ;--------------------------------------------------------
58 ; global & static initialisations
59 ;--------------------------------------------------------
60 .area HOME
61 .area GSINIT
62 .area GSFINAL
63 .area GSINIT
64 ;--------------------------------------------------------
65 ; Home
66 ;--------------------------------------------------------
67 .area HOME
68 .area HOME
69 ;--------------------------------------------------------
70 ; code
71 ;--------------------------------------------------------
72 .area CODE
73 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 148: void USART_DeInit(USART_TypeDef* USARTx)
74 ; -----------------------------------------
75 ; function USART_DeInit
76 ; -----------------------------------------
000000 77 _USART_DeInit:
78 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 154: (void) USARTx->DR;
000000 90 93 [ 1] 79 ldw y, x
000002 E6 01 [ 1] 80 ld a, (0x1, x)
81 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 156: USARTx->BRR2 = USART_BRR2_RESET_VALUE; /* Set USART_BRR2 to reset value 0x00 */
000004 93 [ 1] 82 ldw x, y
000005 6F 03 [ 1] 83 clr (0x0003, x)
84 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 157: USARTx->BRR1 = USART_BRR1_RESET_VALUE; /* Set USART_BRR1 to reset value 0x00 */
000007 93 [ 1] 85 ldw x, y
000008 6F 02 [ 1] 86 clr (0x02, x)
87 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 159: USARTx->CR1 = USART_CR1_RESET_VALUE; /* Set USART_CR1 to reset value 0x00 */
00000A 93 [ 1] 88 ldw x, y
00000B 6F 04 [ 1] 89 clr (0x0004, x)
90 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 160: USARTx->CR2 = USART_CR2_RESET_VALUE; /* Set USART_CR2 to reset value 0x00 */
00000D 93 [ 1] 91 ldw x, y
00000E 6F 05 [ 1] 92 clr (0x0005, x)
93 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 161: USARTx->CR3 = USART_CR3_RESET_VALUE; /* Set USART_CR3 to reset value 0x00 */
000010 93 [ 1] 94 ldw x, y
000011 6F 06 [ 1] 95 clr (0x0006, x)
96 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 162: USARTx->CR4 = USART_CR4_RESET_VALUE; /* Set USART_CR4 to reset value 0x00 */
000013 93 [ 1] 97 ldw x, y
000014 6F 07 [ 1] 98 clr (0x0007, x)
99 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 163: }
000016 81 [ 4] 100 ret
101 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 192: void USART_Init(USART_TypeDef* USARTx, uint32_t BaudRate, USART_WordLength_TypeDef
102 ; -----------------------------------------
103 ; function USART_Init
104 ; -----------------------------------------
000017 105 _USART_Init:
000017 52 0B [ 2] 106 sub sp, #11
107 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 210: USARTx->CR1 &= (uint8_t)(~(USART_CR1_PCEN | USART_CR1_PS | USART_CR1_M));
000019 1F 0A [ 2] 108 ldw (0x0a, sp), x
00001B 1C 00 04 [ 2] 109 addw x, #0x0004
00001E F6 [ 1] 110 ld a, (x)
00001F A4 E9 [ 1] 111 and a, #0xe9
000021 6B 09 [ 1] 112 ld (0x09, sp), a
000023 F7 [ 1] 113 ld (x), a
114 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 213: USARTx->CR1 |= (uint8_t)((uint8_t)USART_WordLength | (uint8_t)USART_Parity);
000024 7B 12 [ 1] 115 ld a, (0x12, sp)
000026 1A 14 [ 1] 116 or a, (0x14, sp)
000028 1A 09 [ 1] 117 or a, (0x09, sp)
00002A F7 [ 1] 118 ld (x), a
119 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 216: USARTx->CR3 &= (uint8_t)(~USART_CR3_STOP);
00002B 1E 0A [ 2] 120 ldw x, (0x0a, sp)
00002D 1C 00 06 [ 2] 121 addw x, #0x0006
000030 F6 [ 1] 122 ld a, (x)
000031 A4 CF [ 1] 123 and a, #0xcf
000033 F7 [ 1] 124 ld (x), a
125 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 218: USARTx->CR3 |= (uint8_t)USART_StopBits;
000034 1A 13 [ 1] 126 or a, (0x13, sp)
000036 F7 [ 1] 127 ld (x), a
128 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 221: USARTx->BRR1 &= (uint8_t)(~USART_BRR1_DIVM);
000037 1E 0A [ 2] 129 ldw x, (0x0a, sp)
000039 5C [ 1] 130 incw x
00003A 5C [ 1] 131 incw x
00003B 1F 01 [ 2] 132 ldw (0x01, sp), x
00003D F6 [ 1] 133 ld a, (x)
00003E 1E 01 [ 2] 134 ldw x, (0x01, sp)
000040 7F [ 1] 135 clr (x)
136 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 223: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVM);
000041 1E 0A [ 2] 137 ldw x, (0x0a, sp)
000043 1C 00 03 [ 2] 138 addw x, #0x0003
000046 1F 03 [ 2] 139 ldw (0x03, sp), x
000048 F6 [ 1] 140 ld a, (x)
000049 A4 0F [ 1] 141 and a, #0x0f
00004B 1E 03 [ 2] 142 ldw x, (0x03, sp)
00004D F7 [ 1] 143 ld (x), a
144 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 225: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVF);
00004E 1E 03 [ 2] 145 ldw x, (0x03, sp)
000050 7F [ 1] 146 clr (x)
147 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 227: BaudRate_Mantissa = (uint32_t)(CLK_GetClockFreq() / BaudRate );
000051 CDr00r00 [ 4] 148 call _CLK_GetClockFreq
000054 1F 08 [ 2] 149 ldw (0x08, sp), x
000056 1E 10 [ 2] 150 ldw x, (0x10, sp)
000058 89 [ 2] 151 pushw x
000059 1E 10 [ 2] 152 ldw x, (0x10, sp)
00005B 89 [ 2] 153 pushw x
00005C 1E 0C [ 2] 154 ldw x, (0x0c, sp)
00005E 89 [ 2] 155 pushw x
00005F 90 89 [ 2] 156 pushw y
157 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 229: USARTx->BRR2 = (uint8_t)((BaudRate_Mantissa >> (uint8_t)8) & (uint8_t)0xF0);
000061 CDr00r00 [ 4] 158 call __divulong
000064 5B 08 [ 2] 159 addw sp, #8
000066 17 05 [ 2] 160 ldw (0x05, sp), y
000068 9E [ 1] 161 ld a, xh
000069 A4 F0 [ 1] 162 and a, #0xf0
00006B 6B 09 [ 1] 163 ld (0x09, sp), a
00006D 16 03 [ 2] 164 ldw y, (0x03, sp)
00006F 7B 09 [ 1] 165 ld a, (0x09, sp)
000071 90 F7 [ 1] 166 ld (y), a
167 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 231: USARTx->BRR2 |= (uint8_t)(BaudRate_Mantissa & (uint8_t)0x0F);
000073 9F [ 1] 168 ld a, xl
000074 A4 0F [ 1] 169 and a, #0x0f
000076 1A 09 [ 1] 170 or a, (0x09, sp)
000078 16 03 [ 2] 171 ldw y, (0x03, sp)
00007A 90 F7 [ 1] 172 ld (y), a
173 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 233: USARTx->BRR1 = (uint8_t)(BaudRate_Mantissa >> (uint8_t)4);
00007C A6 10 [ 1] 174 ld a, #0x10
00007E 62 [ 2] 175 div x, a
00007F 9F [ 1] 176 ld a, xl
000080 1E 01 [ 2] 177 ldw x, (0x01, sp)
000082 F7 [ 1] 178 ld (x), a
179 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 236: USARTx->CR2 &= (uint8_t)~(USART_CR2_TEN | USART_CR2_REN);
000083 1E 0A [ 2] 180 ldw x, (0x0a, sp)
000085 1C 00 05 [ 2] 181 addw x, #0x0005
000088 F6 [ 1] 182 ld a, (x)
000089 A4 F3 [ 1] 183 and a, #0xf3
00008B F7 [ 1] 184 ld (x), a
185 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 238: USARTx->CR2 |= (uint8_t)USART_Mode;
00008C 1A 15 [ 1] 186 or a, (0x15, sp)
00008E F7 [ 1] 187 ld (x), a
188 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 239: }
00008F 1E 0C [ 2] 189 ldw x, (12, sp)
000091 5B 15 [ 2] 190 addw sp, #21
000093 FC [ 2] 191 jp (x)
192 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 264: void USART_ClockInit(USART_TypeDef* USARTx, USART_Clock_TypeDef USART_Clock,
193 ; -----------------------------------------
194 ; function USART_ClockInit
195 ; -----------------------------------------
000094 196 _USART_ClockInit:
000094 52 05 [ 2] 197 sub sp, #5
000096 6B 05 [ 1] 198 ld (0x05, sp), a
199 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
000098 1C 00 06 [ 2] 200 addw x, #0x0006
00009B 1F 01 [ 2] 201 ldw (0x01, sp), x
00009D F6 [ 1] 202 ld a, (x)
00009E A4 F8 [ 1] 203 and a, #0xf8
0000A0 6B 03 [ 1] 204 ld (0x03, sp), a
0000A2 1E 01 [ 2] 205 ldw x, (0x01, sp)
0000A4 7B 03 [ 1] 206 ld a, (0x03, sp)
0000A6 F7 [ 1] 207 ld (x), a
208 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 277: USARTx->CR3 |= (uint8_t)((uint8_t)((uint8_t)(USART_CPOL | (uint8_t)USART_CPHA ) | USART_LastBit));
0000A7 7B 08 [ 1] 209 ld a, (0x08, sp)
0000A9 1A 09 [ 1] 210 or a, (0x09, sp)
0000AB 6B 04 [ 1] 211 ld (0x04, sp), a
0000AD 7B 0A [ 1] 212 ld a, (0x0a, sp)
0000AF 1A 04 [ 1] 213 or a, (0x04, sp)
0000B1 1A 03 [ 1] 214 or a, (0x03, sp)
0000B3 1E 01 [ 2] 215 ldw x, (0x01, sp)
0000B5 F7 [ 1] 216 ld (x), a
217 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
0000B6 1E 01 [ 2] 218 ldw x, (0x01, sp)
0000B8 F6 [ 1] 219 ld a, (x)
220 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 279: if (USART_Clock != USART_Clock_Disable)
0000B9 0D 05 [ 1] 221 tnz (0x05, sp)
0000BB 27 07 [ 1] 222 jreq 00102$
223 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 281: USARTx->CR3 |= (uint8_t)(USART_CR3_CLKEN); /* Set the Clock Enable bit */
0000BD AA 08 [ 1] 224 or a, #0x08
0000BF 1E 01 [ 2] 225 ldw x, (0x01, sp)
0000C1 F7 [ 1] 226 ld (x), a
0000C2 20 05 [ 2] 227 jra 00104$
0000C4 228 00102$:
229 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 285: USARTx->CR3 &= (uint8_t)(~USART_CR3_CLKEN); /* Clear the Clock Enable bit */
0000C4 A4 F7 [ 1] 230 and a, #0xf7
0000C6 1E 01 [ 2] 231 ldw x, (0x01, sp)
0000C8 F7 [ 1] 232 ld (x), a
0000C9 233 00104$:
234 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 287: }
0000C9 1E 06 [ 2] 235 ldw x, (6, sp)
0000CB 5B 0A [ 2] 236 addw sp, #10
0000CD FC [ 2] 237 jp (x)
238 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 296: void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
239 ; -----------------------------------------
240 ; function USART_Cmd
241 ; -----------------------------------------
0000CE 242 _USART_Cmd:
0000CE 88 [ 1] 243 push a
0000CF 6B 01 [ 1] 244 ld (0x01, sp), a
245 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
0000D1 1C 00 04 [ 2] 246 addw x, #0x0004
0000D4 F6 [ 1] 247 ld a, (x)
248 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 298: if (NewState != DISABLE)
0000D5 0D 01 [ 1] 249 tnz (0x01, sp)
0000D7 27 05 [ 1] 250 jreq 00102$
251 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
0000D9 A4 DF [ 1] 252 and a, #0xdf
0000DB F7 [ 1] 253 ld (x), a
0000DC 20 03 [ 2] 254 jra 00104$
0000DE 255 00102$:
256 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 304: USARTx->CR1 |= USART_CR1_USARTD; /**< USART Disable (for low power consumption) */
0000DE AA 20 [ 1] 257 or a, #0x20
0000E0 F7 [ 1] 258 ld (x), a
0000E1 259 00104$:
260 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 306: }
0000E1 84 [ 1] 261 pop a
0000E2 81 [ 4] 262 ret
263 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 329: void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
264 ; -----------------------------------------
265 ; function USART_SetPrescaler
266 ; -----------------------------------------
0000E3 267 _USART_SetPrescaler:
268 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 332: USARTx->PSCR = USART_Prescaler;
0000E3 1C 00 0A [ 2] 269 addw x, #0x000a
0000E6 F7 [ 1] 270 ld (x), a
271 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 333: }
0000E7 81 [ 4] 272 ret
273 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 340: void USART_SendBreak(USART_TypeDef* USARTx)
274 ; -----------------------------------------
275 ; function USART_SendBreak
276 ; -----------------------------------------
0000E8 277 _USART_SendBreak:
278 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 342: USARTx->CR2 |= USART_CR2_SBK;
0000E8 1C 00 05 [ 2] 279 addw x, #0x0005
0000EB F6 [ 1] 280 ld a, (x)
0000EC AA 01 [ 1] 281 or a, #0x01
0000EE F7 [ 1] 282 ld (x), a
283 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 343: }
0000EF 81 [ 4] 284 ret
285 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 382: uint8_t USART_ReceiveData8(USART_TypeDef* USARTx)
286 ; -----------------------------------------
287 ; function USART_ReceiveData8
288 ; -----------------------------------------
0000F0 289 _USART_ReceiveData8:
290 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 384: return USARTx->DR;
0000F0 E6 01 [ 1] 291 ld a, (0x1, x)
292 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 385: }
0000F2 81 [ 4] 293 ret
294 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 392: uint16_t USART_ReceiveData9(USART_TypeDef* USARTx)
295 ; -----------------------------------------
296 ; function USART_ReceiveData9
297 ; -----------------------------------------
0000F3 298 _USART_ReceiveData9:
0000F3 89 [ 2] 299 pushw x
300 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 396: temp = ((uint16_t)(((uint16_t)((uint16_t)USARTx->CR1 & (uint16_t)USART_CR1_R8)) << 1));
0000F4 90 93 [ 1] 301 ldw y, x
0000F6 E6 04 [ 1] 302 ld a, (0x4, x)
0000F8 A4 80 [ 1] 303 and a, #0x80
0000FA 97 [ 1] 304 ld xl, a
0000FB 4F [ 1] 305 clr a
0000FC 95 [ 1] 306 ld xh, a
0000FD 58 [ 2] 307 sllw x
0000FE 1F 01 [ 2] 308 ldw (0x01, sp), x
309 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 397: return (uint16_t)( ((uint16_t)((uint16_t)USARTx->DR) | temp) & ((uint16_t)0x01FF));
000100 90 E6 01 [ 1] 310 ld a, (0x1, y)
000103 1A 02 [ 1] 311 or a, (0x02, sp)
000105 97 [ 1] 312 ld xl, a
000106 7B 01 [ 1] 313 ld a, (0x01, sp)
000108 A4 01 [ 1] 314 and a, #0x01
00010A 95 [ 1] 315 ld xh, a
316 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 398: }
00010B 5B 02 [ 2] 317 addw sp, #2
00010D 81 [ 4] 318 ret
319 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 405: void USART_SendData8(USART_TypeDef* USARTx, uint8_t Data)
320 ; -----------------------------------------
321 ; function USART_SendData8
322 ; -----------------------------------------
00010E 323 _USART_SendData8:
324 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 408: USARTx->DR = Data;
00010E 5C [ 1] 325 incw x
00010F F7 [ 1] 326 ld (x), a
327 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 409: }
000110 81 [ 4] 328 ret
329 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 418: void USART_SendData9(USART_TypeDef* USARTx, uint16_t Data)
330 ; -----------------------------------------
331 ; function USART_SendData9
332 ; -----------------------------------------
000111 333 _USART_SendData9:
000111 52 03 [ 2] 334 sub sp, #3
335 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 423: USARTx->CR1 &= ((uint8_t)~USART_CR1_T8);
000113 1F 02 [ 2] 336 ldw (0x02, sp), x
000115 1C 00 04 [ 2] 337 addw x, #0x0004
000118 F6 [ 1] 338 ld a, (x)
000119 A4 BF [ 1] 339 and a, #0xbf
00011B 6B 01 [ 1] 340 ld (0x01, sp), a
00011D F7 [ 1] 341 ld (x), a
342 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 426: USARTx->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & USART_CR1_T8);
00011E 16 06 [ 2] 343 ldw y, (0x06, sp)
000120 90 54 [ 2] 344 srlw y
000122 90 54 [ 2] 345 srlw y
000124 90 9F [ 1] 346 ld a, yl
000126 A4 40 [ 1] 347 and a, #0x40
000128 1A 01 [ 1] 348 or a, (0x01, sp)
00012A F7 [ 1] 349 ld (x), a
350 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 429: USARTx->DR = (uint8_t)(Data);
00012B 1E 02 [ 2] 351 ldw x, (0x02, sp)
00012D 5C [ 1] 352 incw x
00012E 7B 07 [ 1] 353 ld a, (0x07, sp)
000130 F7 [ 1] 354 ld (x), a
355 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 430: }
000131 1E 04 [ 2] 356 ldw x, (4, sp)
000133 5B 07 [ 2] 357 addw sp, #7
000135 FC [ 2] 358 jp (x)
359 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 473: void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
360 ; -----------------------------------------
361 ; function USART_ReceiverWakeUpCmd
362 ; -----------------------------------------
000136 363 _USART_ReceiverWakeUpCmd:
000136 88 [ 1] 364 push a
000137 6B 01 [ 1] 365 ld (0x01, sp), a
366 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
000139 1C 00 05 [ 2] 367 addw x, #0x0005
00013C F6 [ 1] 368 ld a, (x)
369 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 477: if (NewState != DISABLE)
00013D 0D 01 [ 1] 370 tnz (0x01, sp)
00013F 27 05 [ 1] 371 jreq 00102$
372 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
000141 AA 02 [ 1] 373 or a, #0x02
000143 F7 [ 1] 374 ld (x), a
000144 20 03 [ 2] 375 jra 00104$
000146 376 00102$:
377 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 485: USARTx->CR2 &= ((uint8_t)~USART_CR2_RWU);
000146 A4 FD [ 1] 378 and a, #0xfd
000148 F7 [ 1] 379 ld (x), a
000149 380 00104$:
381 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 487: }
000149 84 [ 1] 382 pop a
00014A 81 [ 4] 383 ret
384 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 496: void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
385 ; -----------------------------------------
386 ; function USART_SetAddress
387 ; -----------------------------------------
00014B 388 _USART_SetAddress:
00014B 88 [ 1] 389 push a
00014C 6B 01 [ 1] 390 ld (0x01, sp), a
391 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 502: USARTx->CR4 &= ((uint8_t)~USART_CR4_ADD);
00014E 1C 00 07 [ 2] 392 addw x, #0x0007
000151 F6 [ 1] 393 ld a, (x)
000152 A4 F0 [ 1] 394 and a, #0xf0
000154 F7 [ 1] 395 ld (x), a
396 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 504: USARTx->CR4 |= USART_Address;
000155 1A 01 [ 1] 397 or a, (0x01, sp)
000157 F7 [ 1] 398 ld (x), a
399 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 505: }
000158 84 [ 1] 400 pop a
000159 81 [ 4] 401 ret
402 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 515: void USART_WakeUpConfig(USART_TypeDef* USARTx, USART_WakeUp_TypeDef USART_WakeUp)
403 ; -----------------------------------------
404 ; function USART_WakeUpConfig
405 ; -----------------------------------------
00015A 406 _USART_WakeUpConfig:
00015A 88 [ 1] 407 push a
00015B 6B 01 [ 1] 408 ld (0x01, sp), a
409 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 519: USARTx->CR1 &= ((uint8_t)~USART_CR1_WAKE);
00015D 1C 00 04 [ 2] 410 addw x, #0x0004
000160 F6 [ 1] 411 ld a, (x)
000161 A4 F7 [ 1] 412 and a, #0xf7
000163 F7 [ 1] 413 ld (x), a
414 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 520: USARTx->CR1 |= (uint8_t)USART_WakeUp;
000164 1A 01 [ 1] 415 or a, (0x01, sp)
000166 F7 [ 1] 416 ld (x), a
417 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 521: }
000167 84 [ 1] 418 pop a
000168 81 [ 4] 419 ret
420 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 566: void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
421 ; -----------------------------------------
422 ; function USART_HalfDuplexCmd
423 ; -----------------------------------------
000169 424 _USART_HalfDuplexCmd:
000169 88 [ 1] 425 push a
00016A 6B 01 [ 1] 426 ld (0x01, sp), a
427 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
00016C 1C 00 08 [ 2] 428 addw x, #0x0008
00016F F6 [ 1] 429 ld a, (x)
430 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 570: if (NewState != DISABLE)
000170 0D 01 [ 1] 431 tnz (0x01, sp)
000172 27 05 [ 1] 432 jreq 00102$
433 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
000174 AA 08 [ 1] 434 or a, #0x08
000176 F7 [ 1] 435 ld (x), a
000177 20 03 [ 2] 436 jra 00104$
000179 437 00102$:
438 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 576: USARTx->CR5 &= (uint8_t)~USART_CR5_HDSEL; /**< USART Half Duplex Disable */
000179 A4 F7 [ 1] 439 and a, #0xf7
00017B F7 [ 1] 440 ld (x), a
00017C 441 00104$:
442 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 578: }
00017C 84 [ 1] 443 pop a
00017D 81 [ 4] 444 ret
445 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 644: void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
446 ; -----------------------------------------
447 ; function USART_SmartCardCmd
448 ; -----------------------------------------
00017E 449 _USART_SmartCardCmd:
00017E 88 [ 1] 450 push a
00017F 6B 01 [ 1] 451 ld (0x01, sp), a
452 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
000181 1C 00 08 [ 2] 453 addw x, #0x0008
000184 F6 [ 1] 454 ld a, (x)
455 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 648: if (NewState != DISABLE)
000185 0D 01 [ 1] 456 tnz (0x01, sp)
000187 27 05 [ 1] 457 jreq 00102$
458 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
000189 AA 20 [ 1] 459 or a, #0x20
00018B F7 [ 1] 460 ld (x), a
00018C 20 03 [ 2] 461 jra 00104$
00018E 462 00102$:
463 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 656: USARTx->CR5 &= ((uint8_t)(~USART_CR5_SCEN));
00018E A4 DF [ 1] 464 and a, #0xdf
000190 F7 [ 1] 465 ld (x), a
000191 466 00104$:
467 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 658: }
000191 84 [ 1] 468 pop a
000192 81 [ 4] 469 ret
470 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 667: void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
471 ; -----------------------------------------
472 ; function USART_SmartCardNACKCmd
473 ; -----------------------------------------
000193 474 _USART_SmartCardNACKCmd:
000193 88 [ 1] 475 push a
000194 6B 01 [ 1] 476 ld (0x01, sp), a
477 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
000196 1C 00 08 [ 2] 478 addw x, #0x0008
000199 F6 [ 1] 479 ld a, (x)
480 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 671: if (NewState != DISABLE)
00019A 0D 01 [ 1] 481 tnz (0x01, sp)
00019C 27 05 [ 1] 482 jreq 00102$
483 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
00019E AA 10 [ 1] 484 or a, #0x10
0001A0 F7 [ 1] 485 ld (x), a
0001A1 20 03 [ 2] 486 jra 00104$
0001A3 487 00102$:
488 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 679: USARTx->CR5 &= ((uint8_t)~(USART_CR5_NACK));
0001A3 A4 EF [ 1] 489 and a, #0xef
0001A5 F7 [ 1] 490 ld (x), a
0001A6 491 00104$:
492 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 681: }
0001A6 84 [ 1] 493 pop a
0001A7 81 [ 4] 494 ret
495 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 690: void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
496 ; -----------------------------------------
497 ; function USART_SetGuardTime
498 ; -----------------------------------------
0001A8 499 _USART_SetGuardTime:
500 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 693: USARTx->GTR = USART_GuardTime;
0001A8 1C 00 09 [ 2] 501 addw x, #0x0009
0001AB F7 [ 1] 502 ld (x), a
503 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 694: }
0001AC 81 [ 4] 504 ret
505 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 751: void USART_IrDAConfig(USART_TypeDef* USARTx, USART_IrDAMode_TypeDef USART_IrDAMode)
506 ; -----------------------------------------
507 ; function USART_IrDAConfig
508 ; -----------------------------------------
0001AD 509 _USART_IrDAConfig:
0001AD 88 [ 1] 510 push a
0001AE 6B 01 [ 1] 511 ld (0x01, sp), a
512 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
0001B0 1C 00 08 [ 2] 513 addw x, #0x0008
0001B3 F6 [ 1] 514 ld a, (x)
515 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 755: if (USART_IrDAMode != USART_IrDAMode_Normal)
0001B4 0D 01 [ 1] 516 tnz (0x01, sp)
0001B6 27 05 [ 1] 517 jreq 00102$
518 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
0001B8 AA 04 [ 1] 519 or a, #0x04
0001BA F7 [ 1] 520 ld (x), a
0001BB 20 03 [ 2] 521 jra 00104$
0001BD 522 00102$:
523 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 761: USARTx->CR5 &= ((uint8_t)~USART_CR5_IRLP);
0001BD A4 FB [ 1] 524 and a, #0xfb
0001BF F7 [ 1] 525 ld (x), a
0001C0 526 00104$:
527 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 763: }
0001C0 84 [ 1] 528 pop a
0001C1 81 [ 4] 529 ret
530 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 772: void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
531 ; -----------------------------------------
532 ; function USART_IrDACmd
533 ; -----------------------------------------
0001C2 534 _USART_IrDACmd:
0001C2 88 [ 1] 535 push a
0001C3 6B 01 [ 1] 536 ld (0x01, sp), a
537 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
0001C5 1C 00 08 [ 2] 538 addw x, #0x0008
0001C8 F6 [ 1] 539 ld a, (x)
540 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 778: if (NewState != DISABLE)
0001C9 0D 01 [ 1] 541 tnz (0x01, sp)
0001CB 27 05 [ 1] 542 jreq 00102$
543 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
0001CD AA 02 [ 1] 544 or a, #0x02
0001CF F7 [ 1] 545 ld (x), a
0001D0 20 03 [ 2] 546 jra 00104$
0001D2 547 00102$:
548 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 786: USARTx->CR5 &= ((uint8_t)~USART_CR5_IREN);
0001D2 A4 FD [ 1] 549 and a, #0xfd
0001D4 F7 [ 1] 550 ld (x), a
0001D5 551 00104$:
552 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 788: }
0001D5 84 [ 1] 553 pop a
0001D6 81 [ 4] 554 ret
555 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 818: void USART_DMACmd(USART_TypeDef* USARTx, USART_DMAReq_TypeDef USART_DMAReq,
556 ; -----------------------------------------
557 ; function USART_DMACmd
558 ; -----------------------------------------
0001D7 559 _USART_DMACmd:
0001D7 88 [ 1] 560 push a
561 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
0001D8 1C 00 08 [ 2] 562 addw x, #0x0008
0001DB 88 [ 1] 563 push a
0001DC F6 [ 1] 564 ld a, (x)
0001DD 6B 02 [ 1] 565 ld (0x02, sp), a
0001DF 84 [ 1] 566 pop a
567 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 825: if (NewState != DISABLE)
0001E0 0D 04 [ 1] 568 tnz (0x04, sp)
0001E2 27 05 [ 1] 569 jreq 00102$
570 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
0001E4 1A 01 [ 1] 571 or a, (0x01, sp)
0001E6 F7 [ 1] 572 ld (x), a
0001E7 20 04 [ 2] 573 jra 00104$
0001E9 574 00102$:
575 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 835: USARTx->CR5 &= (uint8_t)~USART_DMAReq;
0001E9 43 [ 1] 576 cpl a
0001EA 14 01 [ 1] 577 and a, (0x01, sp)
0001EC F7 [ 1] 578 ld (x), a
0001ED 579 00104$:
580 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 837: }
0001ED 84 [ 1] 581 pop a
0001EE 85 [ 2] 582 popw x
0001EF 84 [ 1] 583 pop a
0001F0 FC [ 2] 584 jp (x)
585 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 939: void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState NewState)
586 ; -----------------------------------------
587 ; function USART_ITConfig
588 ; -----------------------------------------
0001F1 589 _USART_ITConfig:
0001F1 52 09 [ 2] 590 sub sp, #9
0001F3 1F 08 [ 2] 591 ldw (0x08, sp), x
592 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 946: usartreg = (uint8_t)((uint16_t)USART_IT >> 0x08);
0001F5 1E 0C [ 2] 593 ldw x, (0x0c, sp)
594 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 948: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
0001F7 7B 0D [ 1] 595 ld a, (0x0d, sp)
0001F9 A4 0F [ 1] 596 and a, #0x0f
0001FB 88 [ 1] 597 push a
0001FC A6 01 [ 1] 598 ld a, #0x01
0001FE 6B 08 [ 1] 599 ld (0x08, sp), a
000200 84 [ 1] 600 pop a
000201 4D [ 1] 601 tnz a
000202 27 05 [ 1] 602 jreq 00154$
000204 603 00153$:
000204 08 07 [ 1] 604 sll (0x07, sp)
000206 4A [ 1] 605 dec a
000207 26 FB [ 1] 606 jrne 00153$
000209 607 00154$:
608 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
000209 9E [ 1] 609 ld a, xh
00020A 4A [ 1] 610 dec a
00020B 26 05 [ 1] 611 jrne 00156$
00020D A6 01 [ 1] 612 ld a, #0x01
00020F 6B 01 [ 1] 613 ld (0x01, sp), a
000211 C5 614 .byte 0xc5
000212 615 00156$:
000212 0F 01 [ 1] 616 clr (0x01, sp)
000214 617 00157$:
618 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
000214 16 08 [ 2] 619 ldw y, (0x08, sp)
000216 72 A9 00 04 [ 2] 620 addw y, #0x0004
00021A 17 02 [ 2] 621 ldw (0x02, sp), y
622 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
00021C 9E [ 1] 623 ld a, xh
00021D A0 05 [ 1] 624 sub a, #0x05
00021F 26 04 [ 1] 625 jrne 00159$
000221 4C [ 1] 626 inc a
000222 6B 04 [ 1] 627 ld (0x04, sp), a
000224 C5 628 .byte 0xc5
000225 629 00159$:
000225 0F 04 [ 1] 630 clr (0x04, sp)
000227 631 00160$:
632 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
000227 1E 08 [ 2] 633 ldw x, (0x08, sp)
000229 1C 00 08 [ 2] 634 addw x, #0x0008
00022C 1F 05 [ 2] 635 ldw (0x05, sp), x
636 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
00022E 1E 08 [ 2] 637 ldw x, (0x08, sp)
000230 1C 00 05 [ 2] 638 addw x, #0x0005
639 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 950: if (NewState != DISABLE)
000233 0D 0E [ 1] 640 tnz (0x0e, sp)
000235 27 22 [ 1] 641 jreq 00114$
642 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
000237 0D 01 [ 1] 643 tnz (0x01, sp)
000239 27 0A [ 1] 644 jreq 00105$
645 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
00023B 1E 02 [ 2] 646 ldw x, (0x02, sp)
00023D F6 [ 1] 647 ld a, (x)
00023E 1A 07 [ 1] 648 or a, (0x07, sp)
000240 1E 02 [ 2] 649 ldw x, (0x02, sp)
000242 F7 [ 1] 650 ld (x), a
000243 20 36 [ 2] 651 jra 00116$
000245 652 00105$:
653 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
000245 0D 04 [ 1] 654 tnz (0x04, sp)
000247 27 0A [ 1] 655 jreq 00102$
656 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
000249 1E 05 [ 2] 657 ldw x, (0x05, sp)
00024B F6 [ 1] 658 ld a, (x)
00024C 1A 07 [ 1] 659 or a, (0x07, sp)
00024E 1E 05 [ 2] 660 ldw x, (0x05, sp)
000250 F7 [ 1] 661 ld (x), a
000251 20 28 [ 2] 662 jra 00116$
000253 663 00102$:
664 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
000253 F6 [ 1] 665 ld a, (x)
000254 1A 07 [ 1] 666 or a, (0x07, sp)
000256 F7 [ 1] 667 ld (x), a
000257 20 22 [ 2] 668 jra 00116$
000259 669 00114$:
670 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
000259 03 07 [ 1] 671 cpl (0x07, sp)
672 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 970: if (usartreg == 0x01)
00025B 0D 01 [ 1] 673 tnz (0x01, sp)
00025D 27 0A [ 1] 674 jreq 00111$
675 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
00025F 1E 02 [ 2] 676 ldw x, (0x02, sp)
000261 F6 [ 1] 677 ld a, (x)
000262 14 07 [ 1] 678 and a, (0x07, sp)
000264 1E 02 [ 2] 679 ldw x, (0x02, sp)
000266 F7 [ 1] 680 ld (x), a
000267 20 12 [ 2] 681 jra 00116$
000269 682 00111$:
683 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 974: else if (usartreg == 0x05)
000269 0D 04 [ 1] 684 tnz (0x04, sp)
00026B 27 0A [ 1] 685 jreq 00108$
686 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 976: USARTx->CR5 &= (uint8_t)(~itpos);
00026D 1E 05 [ 2] 687 ldw x, (0x05, sp)
00026F F6 [ 1] 688 ld a, (x)
000270 14 07 [ 1] 689 and a, (0x07, sp)
000272 1E 05 [ 2] 690 ldw x, (0x05, sp)
000274 F7 [ 1] 691 ld (x), a
000275 20 04 [ 2] 692 jra 00116$
000277 693 00108$:
694 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 981: USARTx->CR2 &= (uint8_t)(~itpos);
000277 F6 [ 1] 695 ld a, (x)
000278 14 07 [ 1] 696 and a, (0x07, sp)
00027A F7 [ 1] 697 ld (x), a
00027B 698 00116$:
699 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 984: }
00027B 1E 0A [ 2] 700 ldw x, (10, sp)
00027D 5B 0E [ 2] 701 addw sp, #14
00027F FC [ 2] 702 jp (x)
703 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1002: FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
704 ; -----------------------------------------
705 ; function USART_GetFlagStatus
706 ; -----------------------------------------
000280 707 _USART_GetFlagStatus:
000280 88 [ 1] 708 push a
709 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
000281 16 04 [ 2] 710 ldw y, (0x04, sp)
711 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
000283 7B 05 [ 1] 712 ld a, (0x05, sp)
000285 6B 01 [ 1] 713 ld (0x01, sp), a
714 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
000287 90 A3 01 01 [ 2] 715 cpw y, #0x0101
00028B 26 0D [ 1] 716 jrne 00108$
717 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
00028D E6 05 [ 1] 718 ld a, (0x5, x)
00028F 14 01 [ 1] 719 and a, (0x01, sp)
000291 27 04 [ 1] 720 jreq 00102$
721 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1014: status = SET;
000293 A6 01 [ 1] 722 ld a, #0x01
000295 20 0C [ 2] 723 jra 00109$
000297 724 00102$:
725 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1019: status = RESET;
000297 4F [ 1] 726 clr a
000298 20 09 [ 2] 727 jra 00109$
00029A 728 00108$:
729 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1024: if ((USARTx->SR & (uint8_t)USART_FLAG) != (uint8_t)0x00)
00029A F6 [ 1] 730 ld a, (x)
00029B 14 01 [ 1] 731 and a, (0x01, sp)
00029D 27 03 [ 1] 732 jreq 00105$
733 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1027: status = SET;
00029F A6 01 [ 1] 734 ld a, #0x01
735 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1032: status = RESET;
0002A1 21 736 .byte 0x21
0002A2 737 00105$:
0002A2 4F [ 1] 738 clr a
0002A3 739 00109$:
740 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1036: return status;
741 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1037: }
0002A3 1E 02 [ 2] 742 ldw x, (2, sp)
0002A5 5B 05 [ 2] 743 addw sp, #5
0002A7 FC [ 2] 744 jp (x)
745 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1060: void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
746 ; -----------------------------------------
747 ; function USART_ClearFlag
748 ; -----------------------------------------
0002A8 749 _USART_ClearFlag:
750 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1065: USARTx->SR = (uint8_t)((uint16_t)~((uint16_t)USART_FLAG));
0002A8 16 03 [ 2] 751 ldw y, (0x03, sp)
0002AA 90 53 [ 2] 752 cplw y
0002AC 90 9F [ 1] 753 ld a, yl
0002AE F7 [ 1] 754 ld (x), a
755 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1066: }
0002AF 1E 01 [ 2] 756 ldw x, (1, sp)
0002B1 5B 04 [ 2] 757 addw sp, #4
0002B3 FC [ 2] 758 jp (x)
759 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1083: ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
760 ; -----------------------------------------
761 ; function USART_GetITStatus
762 ; -----------------------------------------
0002B4 763 _USART_GetITStatus:
0002B4 52 09 [ 2] 764 sub sp, #9
0002B6 1F 08 [ 2] 765 ldw (0x08, sp), x
766 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1096: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
0002B8 7B 0D [ 1] 767 ld a, (0x0d, sp)
0002BA 97 [ 1] 768 ld xl, a
0002BB A4 0F [ 1] 769 and a, #0x0f
0002BD 88 [ 1] 770 push a
0002BE A6 01 [ 1] 771 ld a, #0x01
0002C0 6B 04 [ 1] 772 ld (0x04, sp), a
0002C2 84 [ 1] 773 pop a
0002C3 4D [ 1] 774 tnz a
0002C4 27 05 [ 1] 775 jreq 00179$
0002C6 776 00178$:
0002C6 08 03 [ 1] 777 sll (0x03, sp)
0002C8 4A [ 1] 778 dec a
0002C9 26 FB [ 1] 779 jrne 00178$
0002CB 780 00179$:
781 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1098: itmask1 = (uint8_t)((uint8_t)USART_IT >> (uint8_t)4);
0002CB 9F [ 1] 782 ld a, xl
0002CC 4E [ 1] 783 swap a
0002CD A4 0F [ 1] 784 and a, #0x0f
785 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1100: itmask2 = (uint8_t)((uint8_t)1 << itmask1);
0002CF 88 [ 1] 786 push a
0002D0 A6 01 [ 1] 787 ld a, #0x01
0002D2 6B 08 [ 1] 788 ld (0x08, sp), a
0002D4 84 [ 1] 789 pop a
0002D5 4D [ 1] 790 tnz a
0002D6 27 05 [ 1] 791 jreq 00181$
0002D8 792 00180$:
0002D8 08 07 [ 1] 793 sll (0x07, sp)
0002DA 4A [ 1] 794 dec a
0002DB 26 FB [ 1] 795 jrne 00180$
0002DD 796 00181$:
797 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
0002DD 16 0C [ 2] 798 ldw y, (0x0c, sp)
0002DF 17 01 [ 2] 799 ldw (0x01, sp), y
800 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
0002E1 16 08 [ 2] 801 ldw y, (0x08, sp)
0002E3 17 04 [ 2] 802 ldw (0x04, sp), y
803 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
0002E5 1E 01 [ 2] 804 ldw x, (0x01, sp)
0002E7 A3 01 00 [ 2] 805 cpw x, #0x0100
0002EA 26 1D [ 1] 806 jrne 00118$
807 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1106: enablestatus = (uint8_t)((uint8_t)USARTx->CR1 & itmask2);
0002EC 16 08 [ 2] 808 ldw y, (0x08, sp)
0002EE 17 01 [ 2] 809 ldw (0x01, sp), y
0002F0 93 [ 1] 810 ldw x, y
0002F1 E6 04 [ 1] 811 ld a, (0x4, x)
0002F3 14 07 [ 1] 812 and a, (0x07, sp)
0002F5 6B 07 [ 1] 813 ld (0x07, sp), a
814 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
0002F7 1E 04 [ 2] 815 ldw x, (0x04, sp)
0002F9 F6 [ 1] 816 ld a, (x)
0002FA 14 03 [ 1] 817 and a, (0x03, sp)
0002FC 27 08 [ 1] 818 jreq 00102$
0002FE 0D 07 [ 1] 819 tnz (0x07, sp)
000300 27 04 [ 1] 820 jreq 00102$
821 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1112: pendingbitstatus = SET;
000302 A6 01 [ 1] 822 ld a, #0x01
000304 20 41 [ 2] 823 jra 00119$
000306 824 00102$:
825 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1117: pendingbitstatus = RESET;
000306 4F [ 1] 826 clr a
000307 20 3E [ 2] 827 jra 00119$
000309 828 00118$:
829 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
000309 1E 08 [ 2] 830 ldw x, (0x08, sp)
00030B E6 05 [ 1] 831 ld a, (0x5, x)
00030D 14 07 [ 1] 832 and a, (0x07, sp)
833 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1121: else if (USART_IT == USART_IT_OR)
00030F 1E 01 [ 2] 834 ldw x, (0x01, sp)
000311 A3 02 35 [ 2] 835 cpw x, #0x0235
000314 26 20 [ 1] 836 jrne 00115$
837 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
000316 6B 06 [ 1] 838 ld (0x06, sp), a
839 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1127: temp = (uint8_t)(USARTx->CR5 & USART_CR5_EIE);
000318 1E 08 [ 2] 840 ldw x, (0x08, sp)
00031A E6 08 [ 1] 841 ld a, (0x8, x)
00031C A4 01 [ 1] 842 and a, #0x01
00031E 6B 07 [ 1] 843 ld (0x07, sp), a
844 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1129: if (( (USARTx->SR & itpos) != 0x00) && ((enablestatus || temp)))
000320 1E 04 [ 2] 845 ldw x, (0x04, sp)
000322 F6 [ 1] 846 ld a, (x)
000323 14 03 [ 1] 847 and a, (0x03, sp)
000325 27 0C [ 1] 848 jreq 00106$
000327 0D 06 [ 1] 849 tnz (0x06, sp)
000329 26 04 [ 1] 850 jrne 00105$
00032B 0D 07 [ 1] 851 tnz (0x07, sp)
00032D 27 04 [ 1] 852 jreq 00106$
00032F 853 00105$:
854 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1132: pendingbitstatus = SET;
00032F A6 01 [ 1] 855 ld a, #0x01
000331 20 14 [ 2] 856 jra 00119$
000333 857 00106$:
858 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1137: pendingbitstatus = RESET;
000333 4F [ 1] 859 clr a
000334 20 11 [ 2] 860 jra 00119$
000336 861 00115$:
862 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1144: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
000336 6B 07 [ 1] 863 ld (0x07, sp), a
864 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1146: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
000338 1E 04 [ 2] 865 ldw x, (0x04, sp)
00033A F6 [ 1] 866 ld a, (x)
00033B 14 03 [ 1] 867 and a, (0x03, sp)
00033D 27 07 [ 1] 868 jreq 00111$
00033F 0D 07 [ 1] 869 tnz (0x07, sp)
000341 27 03 [ 1] 870 jreq 00111$
871 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1149: pendingbitstatus = SET;
000343 A6 01 [ 1] 872 ld a, #0x01
873 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1154: pendingbitstatus = RESET;
000345 21 874 .byte 0x21
000346 875 00111$:
000346 4F [ 1] 876 clr a
000347 877 00119$:
878 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1159: return pendingbitstatus;
879 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1160: }
000347 1E 0A [ 2] 880 ldw x, (10, sp)
000349 5B 0D [ 2] 881 addw sp, #13
00034B FC [ 2] 882 jp (x)
883 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1183: void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
884 ; -----------------------------------------
885 ; function USART_ClearITPendingBit
886 ; -----------------------------------------
00034C 887 _USART_ClearITPendingBit:
888 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1188: USARTx->SR &= (uint8_t)(~USART_SR_TC);
00034C F6 [ 1] 889 ld a, (x)
00034D A4 BF [ 1] 890 and a, #0xbf
00034F F7 [ 1] 891 ld (x), a
892 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1189: }
000350 1E 01 [ 2] 893 ldw x, (1, sp)
000352 5B 04 [ 2] 894 addw sp, #4
000354 FC [ 2] 895 jp (x)
896 .area CODE
897 .area CONST
898 .area INITIALIZER
899 .area CABS (ABS)

406
firmware/STM8L15X_LD/stm8l15x_usart.rel Normal file
View File

@@ -0,0 +1,406 @@
XH3
H B areas 1C global symbols
M stm8l15x_usart
S .__.ABS. Def000000
S __divulong Ref000000
S _CLK_GetClockFreq Ref000000
A _CODE size 0 flags 0 addr 0
A DATA size 0 flags 0 addr 0
A INITIALIZED size 0 flags 0 addr 0
A DABS size 0 flags 8 addr 0
A HOME size 0 flags 0 addr 0
A GSINIT size 0 flags 0 addr 0
A GSFINAL size 0 flags 0 addr 0
A CONST size 0 flags 0 addr 0
A INITIALIZER size 0 flags 0 addr 0
A CODE size 355 flags 0 addr 0
S _USART_ITConfig Def0001F1
S _USART_ReceiveData8 Def0000F0
S _USART_ReceiveData9 Def0000F3
S _USART_SendData8 Def00010E
S _USART_SendData9 Def000111
S _USART_DeInit Def000000
S _USART_ClockInit Def000094
S _USART_GetITStatus Def0002B4
S _USART_HalfDuplexCmd Def000169
S _USART_SetPrescaler Def0000E3
S _USART_IrDACmd Def0001C2
S _USART_Cmd Def0000CE
S _USART_Init Def000017
S _USART_SmartCardCmd Def00017E
S _USART_IrDAConfig Def0001AD
S _USART_ReceiverWakeUpCmd Def000136
S _USART_GetFlagStatus Def000280
S _USART_ClearFlag Def0002A8
S _USART_WakeUpConfig Def00015A
S _USART_DMACmd Def0001D7
S _USART_ClearITPendingBit Def00034C
S _USART_SetGuardTime Def0001A8
S _USART_SendBreak Def0000E8
S _USART_SmartCardNACKCmd Def000193
S _USART_SetAddress Def00014B
A CABS size 0 flags 8 addr 0
T 00 00 00
R 00 00 00 09
T 00 00 00 90 93 E6 01 93 6F 03 93 6F 02 93 6F 04
R 00 00 00 09
T 00 00 0D 93 6F 05 93 6F 06 93 6F 07 81
R 00 00 00 09
T 00 00 17
R 00 00 00 09
T 00 00 17 52 0B 1F 0A 1C 00 04 F6 A4 E9 6B 09 F7
R 00 00 00 09
T 00 00 24 7B 12 1A 14 1A 09 F7 1E 0A 1C 00 06 F6
R 00 00 00 09
T 00 00 31 A4 CF F7 1A 13 F7 1E 0A 5C 5C 1F 01 F6
R 00 00 00 09
T 00 00 3E 1E 01 7F 1E 0A 1C 00 03 1F 03 F6 A4 0F
R 00 00 00 09
T 00 00 4B 1E 03 F7 1E 03 7F CD 00 00 1F 08 1E 10
R 00 00 00 09 02 0A 00 02
T 00 00 58 89 1E 10 89 1E 0C 89 90 89 CD 00 00 5B
R 00 00 00 09 02 0D 00 01
T 00 00 65 08 17 05 9E A4 F0 6B 09 16 03 7B 09 90
R 00 00 00 09
T 00 00 72 F7 9F A4 0F 1A 09 16 03 90 F7 A6 10 62
R 00 00 00 09
T 00 00 7F 9F 1E 01 F7 1E 0A 1C 00 05 F6 A4 F3 F7
R 00 00 00 09
T 00 00 8C 1A 15 F7 1E 0C 5B 15 FC
R 00 00 00 09
T 00 00 94
R 00 00 00 09
T 00 00 94 52 05 6B 05 1C 00 06 1F 01 F6 A4 F8 6B
R 00 00 00 09
T 00 00 A1 03 1E 01 7B 03 F7 7B 08 1A 09 6B 04 7B
R 00 00 00 09
T 00 00 AE 0A 1A 04 1A 03 1E 01 F7 1E 01 F6 0D 05
R 00 00 00 09
T 00 00 BB 27 07 AA 08 1E 01 F7 20 05
R 00 00 00 09
T 00 00 C4
R 00 00 00 09
T 00 00 C4 A4 F7 1E 01 F7
R 00 00 00 09
T 00 00 C9
R 00 00 00 09
T 00 00 C9 1E 06 5B 0A FC
R 00 00 00 09
T 00 00 CE
R 00 00 00 09
T 00 00 CE 88 6B 01 1C 00 04 F6 0D 01 27 05 A4 DF
R 00 00 00 09
T 00 00 DB F7 20 03
R 00 00 00 09
T 00 00 DE
R 00 00 00 09
T 00 00 DE AA 20 F7
R 00 00 00 09
T 00 00 E1
R 00 00 00 09
T 00 00 E1 84 81
R 00 00 00 09
T 00 00 E3
R 00 00 00 09
T 00 00 E3 1C 00 0A F7 81
R 00 00 00 09
T 00 00 E8
R 00 00 00 09
T 00 00 E8 1C 00 05 F6 AA 01 F7 81
R 00 00 00 09
T 00 00 F0
R 00 00 00 09
T 00 00 F0 E6 01 81
R 00 00 00 09
T 00 00 F3
R 00 00 00 09
T 00 00 F3 89 90 93 E6 04 A4 80 97 4F 95 58 1F 01
R 00 00 00 09
T 00 01 00 90 E6 01 1A 02 97 7B 01 A4 01 95 5B 02
R 00 00 00 09
T 00 01 0D 81
R 00 00 00 09
T 00 01 0E
R 00 00 00 09
T 00 01 0E 5C F7 81
R 00 00 00 09
T 00 01 11
R 00 00 00 09
T 00 01 11 52 03 1F 02 1C 00 04 F6 A4 BF 6B 01 F7
R 00 00 00 09
T 00 01 1E 16 06 90 54 90 54 90 9F A4 40 1A 01 F7
R 00 00 00 09
T 00 01 2B 1E 02 5C 7B 07 F7 1E 04 5B 07 FC
R 00 00 00 09
T 00 01 36
R 00 00 00 09
T 00 01 36 88 6B 01 1C 00 05 F6 0D 01 27 05 AA 02
R 00 00 00 09
T 00 01 43 F7 20 03
R 00 00 00 09
T 00 01 46
R 00 00 00 09
T 00 01 46 A4 FD F7
R 00 00 00 09
T 00 01 49
R 00 00 00 09
T 00 01 49 84 81
R 00 00 00 09
T 00 01 4B
R 00 00 00 09
T 00 01 4B 88 6B 01 1C 00 07 F6 A4 F0 F7 1A 01 F7
R 00 00 00 09
T 00 01 58 84 81
R 00 00 00 09
T 00 01 5A
R 00 00 00 09
T 00 01 5A 88 6B 01 1C 00 04 F6 A4 F7 F7 1A 01 F7
R 00 00 00 09
T 00 01 67 84 81
R 00 00 00 09
T 00 01 69
R 00 00 00 09
T 00 01 69 88 6B 01 1C 00 08 F6 0D 01 27 05 AA 08
R 00 00 00 09
T 00 01 76 F7 20 03
R 00 00 00 09
T 00 01 79
R 00 00 00 09
T 00 01 79 A4 F7 F7
R 00 00 00 09
T 00 01 7C
R 00 00 00 09
T 00 01 7C 84 81
R 00 00 00 09
T 00 01 7E
R 00 00 00 09
T 00 01 7E 88 6B 01 1C 00 08 F6 0D 01 27 05 AA 20
R 00 00 00 09
T 00 01 8B F7 20 03
R 00 00 00 09
T 00 01 8E
R 00 00 00 09
T 00 01 8E A4 DF F7
R 00 00 00 09
T 00 01 91
R 00 00 00 09
T 00 01 91 84 81
R 00 00 00 09
T 00 01 93
R 00 00 00 09
T 00 01 93 88 6B 01 1C 00 08 F6 0D 01 27 05 AA 10
R 00 00 00 09
T 00 01 A0 F7 20 03
R 00 00 00 09
T 00 01 A3
R 00 00 00 09
T 00 01 A3 A4 EF F7
R 00 00 00 09
T 00 01 A6
R 00 00 00 09
T 00 01 A6 84 81
R 00 00 00 09
T 00 01 A8
R 00 00 00 09
T 00 01 A8 1C 00 09 F7 81
R 00 00 00 09
T 00 01 AD
R 00 00 00 09
T 00 01 AD 88 6B 01 1C 00 08 F6 0D 01 27 05 AA 04
R 00 00 00 09
T 00 01 BA F7 20 03
R 00 00 00 09
T 00 01 BD
R 00 00 00 09
T 00 01 BD A4 FB F7
R 00 00 00 09
T 00 01 C0
R 00 00 00 09
T 00 01 C0 84 81
R 00 00 00 09
T 00 01 C2
R 00 00 00 09
T 00 01 C2 88 6B 01 1C 00 08 F6 0D 01 27 05 AA 02
R 00 00 00 09
T 00 01 CF F7 20 03
R 00 00 00 09
T 00 01 D2
R 00 00 00 09
T 00 01 D2 A4 FD F7
R 00 00 00 09
T 00 01 D5
R 00 00 00 09
T 00 01 D5 84 81
R 00 00 00 09
T 00 01 D7
R 00 00 00 09
T 00 01 D7 88 1C 00 08 88 F6 6B 02 84 0D 04 27 05
R 00 00 00 09
T 00 01 E4 1A 01 F7 20 04
R 00 00 00 09
T 00 01 E9
R 00 00 00 09
T 00 01 E9 43 14 01 F7
R 00 00 00 09
T 00 01 ED
R 00 00 00 09
T 00 01 ED 84 85 84 FC
R 00 00 00 09
T 00 01 F1
R 00 00 00 09
T 00 01 F1 52 09 1F 08 1E 0C 7B 0D A4 0F 88 A6 01
R 00 00 00 09
T 00 01 FE 6B 08 84 4D 27 05
R 00 00 00 09
T 00 02 04
R 00 00 00 09
T 00 02 04 08 07 4A 26 FB
R 00 00 00 09
T 00 02 09
R 00 00 00 09
T 00 02 09 9E 4A 26 05 A6 01 6B 01 C5
R 00 00 00 09
T 00 02 12
R 00 00 00 09
T 00 02 12 0F 01
R 00 00 00 09
T 00 02 14
R 00 00 00 09
T 00 02 14 16 08 72 A9 00 04 17 02 9E A0 05 26 04
R 00 00 00 09
T 00 02 21 4C 6B 04 C5
R 00 00 00 09
T 00 02 25
R 00 00 00 09
T 00 02 25 0F 04
R 00 00 00 09
T 00 02 27
R 00 00 00 09
T 00 02 27 1E 08 1C 00 08 1F 05 1E 08 1C 00 05 0D
R 00 00 00 09
T 00 02 34 0E 27 22 0D 01 27 0A 1E 02 F6 1A 07 1E
R 00 00 00 09
T 00 02 41 02 F7 20 36
R 00 00 00 09
T 00 02 45
R 00 00 00 09
T 00 02 45 0D 04 27 0A 1E 05 F6 1A 07 1E 05 F7 20
R 00 00 00 09
T 00 02 52 28
R 00 00 00 09
T 00 02 53
R 00 00 00 09
T 00 02 53 F6 1A 07 F7 20 22
R 00 00 00 09
T 00 02 59
R 00 00 00 09
T 00 02 59 03 07 0D 01 27 0A 1E 02 F6 14 07 1E 02
R 00 00 00 09
T 00 02 66 F7 20 12
R 00 00 00 09
T 00 02 69
R 00 00 00 09
T 00 02 69 0D 04 27 0A 1E 05 F6 14 07 1E 05 F7 20
R 00 00 00 09
T 00 02 76 04
R 00 00 00 09
T 00 02 77
R 00 00 00 09
T 00 02 77 F6 14 07 F7
R 00 00 00 09
T 00 02 7B
R 00 00 00 09
T 00 02 7B 1E 0A 5B 0E FC
R 00 00 00 09
T 00 02 80
R 00 00 00 09
T 00 02 80 88 16 04 7B 05 6B 01 90 A3 01 01 26 0D
R 00 00 00 09
T 00 02 8D E6 05 14 01 27 04 A6 01 20 0C
R 00 00 00 09
T 00 02 97
R 00 00 00 09
T 00 02 97 4F 20 09
R 00 00 00 09
T 00 02 9A
R 00 00 00 09
T 00 02 9A F6 14 01 27 03 A6 01 21
R 00 00 00 09
T 00 02 A2
R 00 00 00 09
T 00 02 A2 4F
R 00 00 00 09
T 00 02 A3
R 00 00 00 09
T 00 02 A3 1E 02 5B 05 FC
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T 00 02 A8
R 00 00 00 09
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R 00 00 00 09
T 00 02 B4
R 00 00 00 09
T 00 02 B4 52 09 1F 08 7B 0D 97 A4 0F 88 A6 01 6B
R 00 00 00 09
T 00 02 C1 04 84 4D 27 05
R 00 00 00 09
T 00 02 C6
R 00 00 00 09
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R 00 00 00 09
T 00 02 CB
R 00 00 00 09
T 00 02 CB 9F 4E A4 0F 88 A6 01 6B 08 84 4D 27 05
R 00 00 00 09
T 00 02 D8
R 00 00 00 09
T 00 02 D8 08 07 4A 26 FB
R 00 00 00 09
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R 00 00 00 09
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R 00 00 00 09
T 00 02 EA 26 1D 16 08 17 01 93 E6 04 14 07 6B 07
R 00 00 00 09
T 00 02 F7 1E 04 F6 14 03 27 08 0D 07 27 04 A6 01
R 00 00 00 09
T 00 03 04 20 41
R 00 00 00 09
T 00 03 06
R 00 00 00 09
T 00 03 06 4F 20 3E
R 00 00 00 09
T 00 03 09
R 00 00 00 09
T 00 03 09 1E 08 E6 05 14 07 1E 01 A3 02 35 26 20
R 00 00 00 09
T 00 03 16 6B 06 1E 08 E6 08 A4 01 6B 07 1E 04 F6
R 00 00 00 09
T 00 03 23 14 03 27 0C 0D 06 26 04 0D 07 27 04
R 00 00 00 09
T 00 03 2F
R 00 00 00 09
T 00 03 2F A6 01 20 14
R 00 00 00 09
T 00 03 33
R 00 00 00 09
T 00 03 33 4F 20 11
R 00 00 00 09
T 00 03 36
R 00 00 00 09
T 00 03 36 6B 07 1E 04 F6 14 03 27 07 0D 07 27 03
R 00 00 00 09
T 00 03 43 A6 01 21
R 00 00 00 09
T 00 03 46
R 00 00 00 09
T 00 03 46 4F
R 00 00 00 09
T 00 03 47
R 00 00 00 09
T 00 03 47 1E 0A 5B 0D FC
R 00 00 00 09
T 00 03 4C
R 00 00 00 09
T 00 03 4C F6 A4 BF F7 1E 01 5B 04 FC
R 00 00 00 09

899
firmware/STM8L15X_LD/stm8l15x_usart.rst Normal file
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1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ISO C Compiler
3 ; Version 4.5.0 #15242 (Linux)
4 ;--------------------------------------------------------
5 .module stm8l15x_usart
6
7 ;--------------------------------------------------------
8 ; Public variables in this module
9 ;--------------------------------------------------------
10 .globl _CLK_GetClockFreq
11 .globl _USART_DeInit
12 .globl _USART_Init
13 .globl _USART_ClockInit
14 .globl _USART_Cmd
15 .globl _USART_SetPrescaler
16 .globl _USART_SendBreak
17 .globl _USART_ReceiveData8
18 .globl _USART_ReceiveData9
19 .globl _USART_SendData8
20 .globl _USART_SendData9
21 .globl _USART_ReceiverWakeUpCmd
22 .globl _USART_SetAddress
23 .globl _USART_WakeUpConfig
24 .globl _USART_HalfDuplexCmd
25 .globl _USART_SmartCardCmd
26 .globl _USART_SmartCardNACKCmd
27 .globl _USART_SetGuardTime
28 .globl _USART_IrDAConfig
29 .globl _USART_IrDACmd
30 .globl _USART_DMACmd
31 .globl _USART_ITConfig
32 .globl _USART_GetFlagStatus
33 .globl _USART_ClearFlag
34 .globl _USART_GetITStatus
35 .globl _USART_ClearITPendingBit
36 ;--------------------------------------------------------
37 ; ram data
38 ;--------------------------------------------------------
39 .area DATA
40 ;--------------------------------------------------------
41 ; ram data
42 ;--------------------------------------------------------
43 .area INITIALIZED
44 ;--------------------------------------------------------
45 ; absolute external ram data
46 ;--------------------------------------------------------
47 .area DABS (ABS)
48
49 ; default segment ordering for linker
50 .area HOME
51 .area GSINIT
52 .area GSFINAL
53 .area CONST
54 .area INITIALIZER
55 .area CODE
56
57 ;--------------------------------------------------------
58 ; global & static initialisations
59 ;--------------------------------------------------------
60 .area HOME
61 .area GSINIT
62 .area GSFINAL
63 .area GSINIT
64 ;--------------------------------------------------------
65 ; Home
66 ;--------------------------------------------------------
67 .area HOME
68 .area HOME
69 ;--------------------------------------------------------
70 ; code
71 ;--------------------------------------------------------
72 .area CODE
73 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 148: void USART_DeInit(USART_TypeDef* USARTx)
74 ; -----------------------------------------
75 ; function USART_DeInit
76 ; -----------------------------------------
0081AD 77 _USART_DeInit:
78 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 154: (void) USARTx->DR;
0081AD 90 93 [ 1] 79 ldw y, x
0081AF E6 01 [ 1] 80 ld a, (0x1, x)
81 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 156: USARTx->BRR2 = USART_BRR2_RESET_VALUE; /* Set USART_BRR2 to reset value 0x00 */
0081B1 93 [ 1] 82 ldw x, y
0081B2 6F 03 [ 1] 83 clr (0x0003, x)
84 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 157: USARTx->BRR1 = USART_BRR1_RESET_VALUE; /* Set USART_BRR1 to reset value 0x00 */
0081B4 93 [ 1] 85 ldw x, y
0081B5 6F 02 [ 1] 86 clr (0x02, x)
87 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 159: USARTx->CR1 = USART_CR1_RESET_VALUE; /* Set USART_CR1 to reset value 0x00 */
0081B7 93 [ 1] 88 ldw x, y
0081B8 6F 04 [ 1] 89 clr (0x0004, x)
90 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 160: USARTx->CR2 = USART_CR2_RESET_VALUE; /* Set USART_CR2 to reset value 0x00 */
0081BA 93 [ 1] 91 ldw x, y
0081BB 6F 05 [ 1] 92 clr (0x0005, x)
93 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 161: USARTx->CR3 = USART_CR3_RESET_VALUE; /* Set USART_CR3 to reset value 0x00 */
0081BD 93 [ 1] 94 ldw x, y
0081BE 6F 06 [ 1] 95 clr (0x0006, x)
96 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 162: USARTx->CR4 = USART_CR4_RESET_VALUE; /* Set USART_CR4 to reset value 0x00 */
0081C0 93 [ 1] 97 ldw x, y
0081C1 6F 07 [ 1] 98 clr (0x0007, x)
99 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 163: }
0081C3 81 [ 4] 100 ret
101 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 192: void USART_Init(USART_TypeDef* USARTx, uint32_t BaudRate, USART_WordLength_TypeDef
102 ; -----------------------------------------
103 ; function USART_Init
104 ; -----------------------------------------
0081C4 105 _USART_Init:
0081C4 52 0B [ 2] 106 sub sp, #11
107 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 210: USARTx->CR1 &= (uint8_t)(~(USART_CR1_PCEN | USART_CR1_PS | USART_CR1_M));
0081C6 1F 0A [ 2] 108 ldw (0x0a, sp), x
0081C8 1C 00 04 [ 2] 109 addw x, #0x0004
0081CB F6 [ 1] 110 ld a, (x)
0081CC A4 E9 [ 1] 111 and a, #0xe9
0081CE 6B 09 [ 1] 112 ld (0x09, sp), a
0081D0 F7 [ 1] 113 ld (x), a
114 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 213: USARTx->CR1 |= (uint8_t)((uint8_t)USART_WordLength | (uint8_t)USART_Parity);
0081D1 7B 12 [ 1] 115 ld a, (0x12, sp)
0081D3 1A 14 [ 1] 116 or a, (0x14, sp)
0081D5 1A 09 [ 1] 117 or a, (0x09, sp)
0081D7 F7 [ 1] 118 ld (x), a
119 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 216: USARTx->CR3 &= (uint8_t)(~USART_CR3_STOP);
0081D8 1E 0A [ 2] 120 ldw x, (0x0a, sp)
0081DA 1C 00 06 [ 2] 121 addw x, #0x0006
0081DD F6 [ 1] 122 ld a, (x)
0081DE A4 CF [ 1] 123 and a, #0xcf
0081E0 F7 [ 1] 124 ld (x), a
125 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 218: USARTx->CR3 |= (uint8_t)USART_StopBits;
0081E1 1A 13 [ 1] 126 or a, (0x13, sp)
0081E3 F7 [ 1] 127 ld (x), a
128 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 221: USARTx->BRR1 &= (uint8_t)(~USART_BRR1_DIVM);
0081E4 1E 0A [ 2] 129 ldw x, (0x0a, sp)
0081E6 5C [ 1] 130 incw x
0081E7 5C [ 1] 131 incw x
0081E8 1F 01 [ 2] 132 ldw (0x01, sp), x
0081EA F6 [ 1] 133 ld a, (x)
0081EB 1E 01 [ 2] 134 ldw x, (0x01, sp)
0081ED 7F [ 1] 135 clr (x)
136 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 223: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVM);
0081EE 1E 0A [ 2] 137 ldw x, (0x0a, sp)
0081F0 1C 00 03 [ 2] 138 addw x, #0x0003
0081F3 1F 03 [ 2] 139 ldw (0x03, sp), x
0081F5 F6 [ 1] 140 ld a, (x)
0081F6 A4 0F [ 1] 141 and a, #0x0f
0081F8 1E 03 [ 2] 142 ldw x, (0x03, sp)
0081FA F7 [ 1] 143 ld (x), a
144 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 225: USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVF);
0081FB 1E 03 [ 2] 145 ldw x, (0x03, sp)
0081FD 7F [ 1] 146 clr (x)
147 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 227: BaudRate_Mantissa = (uint32_t)(CLK_GetClockFreq() / BaudRate );
0081FE CD 85 D6 [ 4] 148 call _CLK_GetClockFreq
008201 1F 08 [ 2] 149 ldw (0x08, sp), x
008203 1E 10 [ 2] 150 ldw x, (0x10, sp)
008205 89 [ 2] 151 pushw x
008206 1E 10 [ 2] 152 ldw x, (0x10, sp)
008208 89 [ 2] 153 pushw x
008209 1E 0C [ 2] 154 ldw x, (0x0c, sp)
00820B 89 [ 2] 155 pushw x
00820C 90 89 [ 2] 156 pushw y
157 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 229: USARTx->BRR2 = (uint8_t)((BaudRate_Mantissa >> (uint8_t)8) & (uint8_t)0xF0);
00820E CD 92 5C [ 4] 158 call __divulong
008211 5B 08 [ 2] 159 addw sp, #8
008213 17 05 [ 2] 160 ldw (0x05, sp), y
008215 9E [ 1] 161 ld a, xh
008216 A4 F0 [ 1] 162 and a, #0xf0
008218 6B 09 [ 1] 163 ld (0x09, sp), a
00821A 16 03 [ 2] 164 ldw y, (0x03, sp)
00821C 7B 09 [ 1] 165 ld a, (0x09, sp)
00821E 90 F7 [ 1] 166 ld (y), a
167 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 231: USARTx->BRR2 |= (uint8_t)(BaudRate_Mantissa & (uint8_t)0x0F);
008220 9F [ 1] 168 ld a, xl
008221 A4 0F [ 1] 169 and a, #0x0f
008223 1A 09 [ 1] 170 or a, (0x09, sp)
008225 16 03 [ 2] 171 ldw y, (0x03, sp)
008227 90 F7 [ 1] 172 ld (y), a
173 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 233: USARTx->BRR1 = (uint8_t)(BaudRate_Mantissa >> (uint8_t)4);
008229 A6 10 [ 1] 174 ld a, #0x10
00822B 62 [ 2] 175 div x, a
00822C 9F [ 1] 176 ld a, xl
00822D 1E 01 [ 2] 177 ldw x, (0x01, sp)
00822F F7 [ 1] 178 ld (x), a
179 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 236: USARTx->CR2 &= (uint8_t)~(USART_CR2_TEN | USART_CR2_REN);
008230 1E 0A [ 2] 180 ldw x, (0x0a, sp)
008232 1C 00 05 [ 2] 181 addw x, #0x0005
008235 F6 [ 1] 182 ld a, (x)
008236 A4 F3 [ 1] 183 and a, #0xf3
008238 F7 [ 1] 184 ld (x), a
185 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 238: USARTx->CR2 |= (uint8_t)USART_Mode;
008239 1A 15 [ 1] 186 or a, (0x15, sp)
00823B F7 [ 1] 187 ld (x), a
188 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 239: }
00823C 1E 0C [ 2] 189 ldw x, (12, sp)
00823E 5B 15 [ 2] 190 addw sp, #21
008240 FC [ 2] 191 jp (x)
192 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 264: void USART_ClockInit(USART_TypeDef* USARTx, USART_Clock_TypeDef USART_Clock,
193 ; -----------------------------------------
194 ; function USART_ClockInit
195 ; -----------------------------------------
008241 196 _USART_ClockInit:
008241 52 05 [ 2] 197 sub sp, #5
008243 6B 05 [ 1] 198 ld (0x05, sp), a
199 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
008245 1C 00 06 [ 2] 200 addw x, #0x0006
008248 1F 01 [ 2] 201 ldw (0x01, sp), x
00824A F6 [ 1] 202 ld a, (x)
00824B A4 F8 [ 1] 203 and a, #0xf8
00824D 6B 03 [ 1] 204 ld (0x03, sp), a
00824F 1E 01 [ 2] 205 ldw x, (0x01, sp)
008251 7B 03 [ 1] 206 ld a, (0x03, sp)
008253 F7 [ 1] 207 ld (x), a
208 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 277: USARTx->CR3 |= (uint8_t)((uint8_t)((uint8_t)(USART_CPOL | (uint8_t)USART_CPHA ) | USART_LastBit));
008254 7B 08 [ 1] 209 ld a, (0x08, sp)
008256 1A 09 [ 1] 210 or a, (0x09, sp)
008258 6B 04 [ 1] 211 ld (0x04, sp), a
00825A 7B 0A [ 1] 212 ld a, (0x0a, sp)
00825C 1A 04 [ 1] 213 or a, (0x04, sp)
00825E 1A 03 [ 1] 214 or a, (0x03, sp)
008260 1E 01 [ 2] 215 ldw x, (0x01, sp)
008262 F7 [ 1] 216 ld (x), a
217 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 275: USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
008263 1E 01 [ 2] 218 ldw x, (0x01, sp)
008265 F6 [ 1] 219 ld a, (x)
220 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 279: if (USART_Clock != USART_Clock_Disable)
008266 0D 05 [ 1] 221 tnz (0x05, sp)
008268 27 07 [ 1] 222 jreq 00102$
223 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 281: USARTx->CR3 |= (uint8_t)(USART_CR3_CLKEN); /* Set the Clock Enable bit */
00826A AA 08 [ 1] 224 or a, #0x08
00826C 1E 01 [ 2] 225 ldw x, (0x01, sp)
00826E F7 [ 1] 226 ld (x), a
00826F 20 05 [ 2] 227 jra 00104$
008271 228 00102$:
229 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 285: USARTx->CR3 &= (uint8_t)(~USART_CR3_CLKEN); /* Clear the Clock Enable bit */
008271 A4 F7 [ 1] 230 and a, #0xf7
008273 1E 01 [ 2] 231 ldw x, (0x01, sp)
008275 F7 [ 1] 232 ld (x), a
008276 233 00104$:
234 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 287: }
008276 1E 06 [ 2] 235 ldw x, (6, sp)
008278 5B 0A [ 2] 236 addw sp, #10
00827A FC [ 2] 237 jp (x)
238 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 296: void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
239 ; -----------------------------------------
240 ; function USART_Cmd
241 ; -----------------------------------------
00827B 242 _USART_Cmd:
00827B 88 [ 1] 243 push a
00827C 6B 01 [ 1] 244 ld (0x01, sp), a
245 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
00827E 1C 00 04 [ 2] 246 addw x, #0x0004
008281 F6 [ 1] 247 ld a, (x)
248 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 298: if (NewState != DISABLE)
008282 0D 01 [ 1] 249 tnz (0x01, sp)
008284 27 05 [ 1] 250 jreq 00102$
251 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 300: USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
008286 A4 DF [ 1] 252 and a, #0xdf
008288 F7 [ 1] 253 ld (x), a
008289 20 03 [ 2] 254 jra 00104$
00828B 255 00102$:
256 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 304: USARTx->CR1 |= USART_CR1_USARTD; /**< USART Disable (for low power consumption) */
00828B AA 20 [ 1] 257 or a, #0x20
00828D F7 [ 1] 258 ld (x), a
00828E 259 00104$:
260 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 306: }
00828E 84 [ 1] 261 pop a
00828F 81 [ 4] 262 ret
263 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 329: void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
264 ; -----------------------------------------
265 ; function USART_SetPrescaler
266 ; -----------------------------------------
008290 267 _USART_SetPrescaler:
268 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 332: USARTx->PSCR = USART_Prescaler;
008290 1C 00 0A [ 2] 269 addw x, #0x000a
008293 F7 [ 1] 270 ld (x), a
271 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 333: }
008294 81 [ 4] 272 ret
273 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 340: void USART_SendBreak(USART_TypeDef* USARTx)
274 ; -----------------------------------------
275 ; function USART_SendBreak
276 ; -----------------------------------------
008295 277 _USART_SendBreak:
278 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 342: USARTx->CR2 |= USART_CR2_SBK;
008295 1C 00 05 [ 2] 279 addw x, #0x0005
008298 F6 [ 1] 280 ld a, (x)
008299 AA 01 [ 1] 281 or a, #0x01
00829B F7 [ 1] 282 ld (x), a
283 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 343: }
00829C 81 [ 4] 284 ret
285 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 382: uint8_t USART_ReceiveData8(USART_TypeDef* USARTx)
286 ; -----------------------------------------
287 ; function USART_ReceiveData8
288 ; -----------------------------------------
00829D 289 _USART_ReceiveData8:
290 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 384: return USARTx->DR;
00829D E6 01 [ 1] 291 ld a, (0x1, x)
292 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 385: }
00829F 81 [ 4] 293 ret
294 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 392: uint16_t USART_ReceiveData9(USART_TypeDef* USARTx)
295 ; -----------------------------------------
296 ; function USART_ReceiveData9
297 ; -----------------------------------------
0082A0 298 _USART_ReceiveData9:
0082A0 89 [ 2] 299 pushw x
300 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 396: temp = ((uint16_t)(((uint16_t)((uint16_t)USARTx->CR1 & (uint16_t)USART_CR1_R8)) << 1));
0082A1 90 93 [ 1] 301 ldw y, x
0082A3 E6 04 [ 1] 302 ld a, (0x4, x)
0082A5 A4 80 [ 1] 303 and a, #0x80
0082A7 97 [ 1] 304 ld xl, a
0082A8 4F [ 1] 305 clr a
0082A9 95 [ 1] 306 ld xh, a
0082AA 58 [ 2] 307 sllw x
0082AB 1F 01 [ 2] 308 ldw (0x01, sp), x
309 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 397: return (uint16_t)( ((uint16_t)((uint16_t)USARTx->DR) | temp) & ((uint16_t)0x01FF));
0082AD 90 E6 01 [ 1] 310 ld a, (0x1, y)
0082B0 1A 02 [ 1] 311 or a, (0x02, sp)
0082B2 97 [ 1] 312 ld xl, a
0082B3 7B 01 [ 1] 313 ld a, (0x01, sp)
0082B5 A4 01 [ 1] 314 and a, #0x01
0082B7 95 [ 1] 315 ld xh, a
316 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 398: }
0082B8 5B 02 [ 2] 317 addw sp, #2
0082BA 81 [ 4] 318 ret
319 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 405: void USART_SendData8(USART_TypeDef* USARTx, uint8_t Data)
320 ; -----------------------------------------
321 ; function USART_SendData8
322 ; -----------------------------------------
0082BB 323 _USART_SendData8:
324 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 408: USARTx->DR = Data;
0082BB 5C [ 1] 325 incw x
0082BC F7 [ 1] 326 ld (x), a
327 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 409: }
0082BD 81 [ 4] 328 ret
329 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 418: void USART_SendData9(USART_TypeDef* USARTx, uint16_t Data)
330 ; -----------------------------------------
331 ; function USART_SendData9
332 ; -----------------------------------------
0082BE 333 _USART_SendData9:
0082BE 52 03 [ 2] 334 sub sp, #3
335 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 423: USARTx->CR1 &= ((uint8_t)~USART_CR1_T8);
0082C0 1F 02 [ 2] 336 ldw (0x02, sp), x
0082C2 1C 00 04 [ 2] 337 addw x, #0x0004
0082C5 F6 [ 1] 338 ld a, (x)
0082C6 A4 BF [ 1] 339 and a, #0xbf
0082C8 6B 01 [ 1] 340 ld (0x01, sp), a
0082CA F7 [ 1] 341 ld (x), a
342 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 426: USARTx->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & USART_CR1_T8);
0082CB 16 06 [ 2] 343 ldw y, (0x06, sp)
0082CD 90 54 [ 2] 344 srlw y
0082CF 90 54 [ 2] 345 srlw y
0082D1 90 9F [ 1] 346 ld a, yl
0082D3 A4 40 [ 1] 347 and a, #0x40
0082D5 1A 01 [ 1] 348 or a, (0x01, sp)
0082D7 F7 [ 1] 349 ld (x), a
350 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 429: USARTx->DR = (uint8_t)(Data);
0082D8 1E 02 [ 2] 351 ldw x, (0x02, sp)
0082DA 5C [ 1] 352 incw x
0082DB 7B 07 [ 1] 353 ld a, (0x07, sp)
0082DD F7 [ 1] 354 ld (x), a
355 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 430: }
0082DE 1E 04 [ 2] 356 ldw x, (4, sp)
0082E0 5B 07 [ 2] 357 addw sp, #7
0082E2 FC [ 2] 358 jp (x)
359 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 473: void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
360 ; -----------------------------------------
361 ; function USART_ReceiverWakeUpCmd
362 ; -----------------------------------------
0082E3 363 _USART_ReceiverWakeUpCmd:
0082E3 88 [ 1] 364 push a
0082E4 6B 01 [ 1] 365 ld (0x01, sp), a
366 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
0082E6 1C 00 05 [ 2] 367 addw x, #0x0005
0082E9 F6 [ 1] 368 ld a, (x)
369 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 477: if (NewState != DISABLE)
0082EA 0D 01 [ 1] 370 tnz (0x01, sp)
0082EC 27 05 [ 1] 371 jreq 00102$
372 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 480: USARTx->CR2 |= USART_CR2_RWU;
0082EE AA 02 [ 1] 373 or a, #0x02
0082F0 F7 [ 1] 374 ld (x), a
0082F1 20 03 [ 2] 375 jra 00104$
0082F3 376 00102$:
377 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 485: USARTx->CR2 &= ((uint8_t)~USART_CR2_RWU);
0082F3 A4 FD [ 1] 378 and a, #0xfd
0082F5 F7 [ 1] 379 ld (x), a
0082F6 380 00104$:
381 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 487: }
0082F6 84 [ 1] 382 pop a
0082F7 81 [ 4] 383 ret
384 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 496: void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
385 ; -----------------------------------------
386 ; function USART_SetAddress
387 ; -----------------------------------------
0082F8 388 _USART_SetAddress:
0082F8 88 [ 1] 389 push a
0082F9 6B 01 [ 1] 390 ld (0x01, sp), a
391 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 502: USARTx->CR4 &= ((uint8_t)~USART_CR4_ADD);
0082FB 1C 00 07 [ 2] 392 addw x, #0x0007
0082FE F6 [ 1] 393 ld a, (x)
0082FF A4 F0 [ 1] 394 and a, #0xf0
008301 F7 [ 1] 395 ld (x), a
396 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 504: USARTx->CR4 |= USART_Address;
008302 1A 01 [ 1] 397 or a, (0x01, sp)
008304 F7 [ 1] 398 ld (x), a
399 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 505: }
008305 84 [ 1] 400 pop a
008306 81 [ 4] 401 ret
402 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 515: void USART_WakeUpConfig(USART_TypeDef* USARTx, USART_WakeUp_TypeDef USART_WakeUp)
403 ; -----------------------------------------
404 ; function USART_WakeUpConfig
405 ; -----------------------------------------
008307 406 _USART_WakeUpConfig:
008307 88 [ 1] 407 push a
008308 6B 01 [ 1] 408 ld (0x01, sp), a
409 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 519: USARTx->CR1 &= ((uint8_t)~USART_CR1_WAKE);
00830A 1C 00 04 [ 2] 410 addw x, #0x0004
00830D F6 [ 1] 411 ld a, (x)
00830E A4 F7 [ 1] 412 and a, #0xf7
008310 F7 [ 1] 413 ld (x), a
414 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 520: USARTx->CR1 |= (uint8_t)USART_WakeUp;
008311 1A 01 [ 1] 415 or a, (0x01, sp)
008313 F7 [ 1] 416 ld (x), a
417 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 521: }
008314 84 [ 1] 418 pop a
008315 81 [ 4] 419 ret
420 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 566: void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
421 ; -----------------------------------------
422 ; function USART_HalfDuplexCmd
423 ; -----------------------------------------
008316 424 _USART_HalfDuplexCmd:
008316 88 [ 1] 425 push a
008317 6B 01 [ 1] 426 ld (0x01, sp), a
427 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
008319 1C 00 08 [ 2] 428 addw x, #0x0008
00831C F6 [ 1] 429 ld a, (x)
430 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 570: if (NewState != DISABLE)
00831D 0D 01 [ 1] 431 tnz (0x01, sp)
00831F 27 05 [ 1] 432 jreq 00102$
433 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 572: USARTx->CR5 |= USART_CR5_HDSEL; /**< USART Half Duplex Enable */
008321 AA 08 [ 1] 434 or a, #0x08
008323 F7 [ 1] 435 ld (x), a
008324 20 03 [ 2] 436 jra 00104$
008326 437 00102$:
438 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 576: USARTx->CR5 &= (uint8_t)~USART_CR5_HDSEL; /**< USART Half Duplex Disable */
008326 A4 F7 [ 1] 439 and a, #0xf7
008328 F7 [ 1] 440 ld (x), a
008329 441 00104$:
442 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 578: }
008329 84 [ 1] 443 pop a
00832A 81 [ 4] 444 ret
445 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 644: void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
446 ; -----------------------------------------
447 ; function USART_SmartCardCmd
448 ; -----------------------------------------
00832B 449 _USART_SmartCardCmd:
00832B 88 [ 1] 450 push a
00832C 6B 01 [ 1] 451 ld (0x01, sp), a
452 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
00832E 1C 00 08 [ 2] 453 addw x, #0x0008
008331 F6 [ 1] 454 ld a, (x)
455 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 648: if (NewState != DISABLE)
008332 0D 01 [ 1] 456 tnz (0x01, sp)
008334 27 05 [ 1] 457 jreq 00102$
458 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 651: USARTx->CR5 |= USART_CR5_SCEN;
008336 AA 20 [ 1] 459 or a, #0x20
008338 F7 [ 1] 460 ld (x), a
008339 20 03 [ 2] 461 jra 00104$
00833B 462 00102$:
463 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 656: USARTx->CR5 &= ((uint8_t)(~USART_CR5_SCEN));
00833B A4 DF [ 1] 464 and a, #0xdf
00833D F7 [ 1] 465 ld (x), a
00833E 466 00104$:
467 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 658: }
00833E 84 [ 1] 468 pop a
00833F 81 [ 4] 469 ret
470 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 667: void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
471 ; -----------------------------------------
472 ; function USART_SmartCardNACKCmd
473 ; -----------------------------------------
008340 474 _USART_SmartCardNACKCmd:
008340 88 [ 1] 475 push a
008341 6B 01 [ 1] 476 ld (0x01, sp), a
477 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
008343 1C 00 08 [ 2] 478 addw x, #0x0008
008346 F6 [ 1] 479 ld a, (x)
480 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 671: if (NewState != DISABLE)
008347 0D 01 [ 1] 481 tnz (0x01, sp)
008349 27 05 [ 1] 482 jreq 00102$
483 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 674: USARTx->CR5 |= USART_CR5_NACK;
00834B AA 10 [ 1] 484 or a, #0x10
00834D F7 [ 1] 485 ld (x), a
00834E 20 03 [ 2] 486 jra 00104$
008350 487 00102$:
488 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 679: USARTx->CR5 &= ((uint8_t)~(USART_CR5_NACK));
008350 A4 EF [ 1] 489 and a, #0xef
008352 F7 [ 1] 490 ld (x), a
008353 491 00104$:
492 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 681: }
008353 84 [ 1] 493 pop a
008354 81 [ 4] 494 ret
495 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 690: void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
496 ; -----------------------------------------
497 ; function USART_SetGuardTime
498 ; -----------------------------------------
008355 499 _USART_SetGuardTime:
500 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 693: USARTx->GTR = USART_GuardTime;
008355 1C 00 09 [ 2] 501 addw x, #0x0009
008358 F7 [ 1] 502 ld (x), a
503 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 694: }
008359 81 [ 4] 504 ret
505 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 751: void USART_IrDAConfig(USART_TypeDef* USARTx, USART_IrDAMode_TypeDef USART_IrDAMode)
506 ; -----------------------------------------
507 ; function USART_IrDAConfig
508 ; -----------------------------------------
00835A 509 _USART_IrDAConfig:
00835A 88 [ 1] 510 push a
00835B 6B 01 [ 1] 511 ld (0x01, sp), a
512 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
00835D 1C 00 08 [ 2] 513 addw x, #0x0008
008360 F6 [ 1] 514 ld a, (x)
515 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 755: if (USART_IrDAMode != USART_IrDAMode_Normal)
008361 0D 01 [ 1] 516 tnz (0x01, sp)
008363 27 05 [ 1] 517 jreq 00102$
518 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 757: USARTx->CR5 |= USART_CR5_IRLP;
008365 AA 04 [ 1] 519 or a, #0x04
008367 F7 [ 1] 520 ld (x), a
008368 20 03 [ 2] 521 jra 00104$
00836A 522 00102$:
523 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 761: USARTx->CR5 &= ((uint8_t)~USART_CR5_IRLP);
00836A A4 FB [ 1] 524 and a, #0xfb
00836C F7 [ 1] 525 ld (x), a
00836D 526 00104$:
527 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 763: }
00836D 84 [ 1] 528 pop a
00836E 81 [ 4] 529 ret
530 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 772: void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
531 ; -----------------------------------------
532 ; function USART_IrDACmd
533 ; -----------------------------------------
00836F 534 _USART_IrDACmd:
00836F 88 [ 1] 535 push a
008370 6B 01 [ 1] 536 ld (0x01, sp), a
537 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
008372 1C 00 08 [ 2] 538 addw x, #0x0008
008375 F6 [ 1] 539 ld a, (x)
540 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 778: if (NewState != DISABLE)
008376 0D 01 [ 1] 541 tnz (0x01, sp)
008378 27 05 [ 1] 542 jreq 00102$
543 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 781: USARTx->CR5 |= USART_CR5_IREN;
00837A AA 02 [ 1] 544 or a, #0x02
00837C F7 [ 1] 545 ld (x), a
00837D 20 03 [ 2] 546 jra 00104$
00837F 547 00102$:
548 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 786: USARTx->CR5 &= ((uint8_t)~USART_CR5_IREN);
00837F A4 FD [ 1] 549 and a, #0xfd
008381 F7 [ 1] 550 ld (x), a
008382 551 00104$:
552 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 788: }
008382 84 [ 1] 553 pop a
008383 81 [ 4] 554 ret
555 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 818: void USART_DMACmd(USART_TypeDef* USARTx, USART_DMAReq_TypeDef USART_DMAReq,
556 ; -----------------------------------------
557 ; function USART_DMACmd
558 ; -----------------------------------------
008384 559 _USART_DMACmd:
008384 88 [ 1] 560 push a
561 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
008385 1C 00 08 [ 2] 562 addw x, #0x0008
008388 88 [ 1] 563 push a
008389 F6 [ 1] 564 ld a, (x)
00838A 6B 02 [ 1] 565 ld (0x02, sp), a
00838C 84 [ 1] 566 pop a
567 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 825: if (NewState != DISABLE)
00838D 0D 04 [ 1] 568 tnz (0x04, sp)
00838F 27 05 [ 1] 569 jreq 00102$
570 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 829: USARTx->CR5 |= (uint8_t) USART_DMAReq;
008391 1A 01 [ 1] 571 or a, (0x01, sp)
008393 F7 [ 1] 572 ld (x), a
008394 20 04 [ 2] 573 jra 00104$
008396 574 00102$:
575 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 835: USARTx->CR5 &= (uint8_t)~USART_DMAReq;
008396 43 [ 1] 576 cpl a
008397 14 01 [ 1] 577 and a, (0x01, sp)
008399 F7 [ 1] 578 ld (x), a
00839A 579 00104$:
580 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 837: }
00839A 84 [ 1] 581 pop a
00839B 85 [ 2] 582 popw x
00839C 84 [ 1] 583 pop a
00839D FC [ 2] 584 jp (x)
585 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 939: void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState NewState)
586 ; -----------------------------------------
587 ; function USART_ITConfig
588 ; -----------------------------------------
00839E 589 _USART_ITConfig:
00839E 52 09 [ 2] 590 sub sp, #9
0083A0 1F 08 [ 2] 591 ldw (0x08, sp), x
592 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 946: usartreg = (uint8_t)((uint16_t)USART_IT >> 0x08);
0083A2 1E 0C [ 2] 593 ldw x, (0x0c, sp)
594 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 948: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
0083A4 7B 0D [ 1] 595 ld a, (0x0d, sp)
0083A6 A4 0F [ 1] 596 and a, #0x0f
0083A8 88 [ 1] 597 push a
0083A9 A6 01 [ 1] 598 ld a, #0x01
0083AB 6B 08 [ 1] 599 ld (0x08, sp), a
0083AD 84 [ 1] 600 pop a
0083AE 4D [ 1] 601 tnz a
0083AF 27 05 [ 1] 602 jreq 00154$
0083B1 603 00153$:
0083B1 08 07 [ 1] 604 sll (0x07, sp)
0083B3 4A [ 1] 605 dec a
0083B4 26 FB [ 1] 606 jrne 00153$
0083B6 607 00154$:
608 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
0083B6 9E [ 1] 609 ld a, xh
0083B7 4A [ 1] 610 dec a
0083B8 26 05 [ 1] 611 jrne 00156$
0083BA A6 01 [ 1] 612 ld a, #0x01
0083BC 6B 01 [ 1] 613 ld (0x01, sp), a
0083BE C5 614 .byte 0xc5
0083BF 615 00156$:
0083BF 0F 01 [ 1] 616 clr (0x01, sp)
0083C1 617 00157$:
618 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
0083C1 16 08 [ 2] 619 ldw y, (0x08, sp)
0083C3 72 A9 00 04 [ 2] 620 addw y, #0x0004
0083C7 17 02 [ 2] 621 ldw (0x02, sp), y
622 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
0083C9 9E [ 1] 623 ld a, xh
0083CA A0 05 [ 1] 624 sub a, #0x05
0083CC 26 04 [ 1] 625 jrne 00159$
0083CE 4C [ 1] 626 inc a
0083CF 6B 04 [ 1] 627 ld (0x04, sp), a
0083D1 C5 628 .byte 0xc5
0083D2 629 00159$:
0083D2 0F 04 [ 1] 630 clr (0x04, sp)
0083D4 631 00160$:
632 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
0083D4 1E 08 [ 2] 633 ldw x, (0x08, sp)
0083D6 1C 00 08 [ 2] 634 addw x, #0x0008
0083D9 1F 05 [ 2] 635 ldw (0x05, sp), x
636 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
0083DB 1E 08 [ 2] 637 ldw x, (0x08, sp)
0083DD 1C 00 05 [ 2] 638 addw x, #0x0005
639 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 950: if (NewState != DISABLE)
0083E0 0D 0E [ 1] 640 tnz (0x0e, sp)
0083E2 27 22 [ 1] 641 jreq 00114$
642 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 953: if (usartreg == 0x01)
0083E4 0D 01 [ 1] 643 tnz (0x01, sp)
0083E6 27 0A [ 1] 644 jreq 00105$
645 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 955: USARTx->CR1 |= itpos;
0083E8 1E 02 [ 2] 646 ldw x, (0x02, sp)
0083EA F6 [ 1] 647 ld a, (x)
0083EB 1A 07 [ 1] 648 or a, (0x07, sp)
0083ED 1E 02 [ 2] 649 ldw x, (0x02, sp)
0083EF F7 [ 1] 650 ld (x), a
0083F0 20 36 [ 2] 651 jra 00116$
0083F2 652 00105$:
653 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 957: else if (usartreg == 0x05)
0083F2 0D 04 [ 1] 654 tnz (0x04, sp)
0083F4 27 0A [ 1] 655 jreq 00102$
656 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 959: USARTx->CR5 |= itpos;
0083F6 1E 05 [ 2] 657 ldw x, (0x05, sp)
0083F8 F6 [ 1] 658 ld a, (x)
0083F9 1A 07 [ 1] 659 or a, (0x07, sp)
0083FB 1E 05 [ 2] 660 ldw x, (0x05, sp)
0083FD F7 [ 1] 661 ld (x), a
0083FE 20 28 [ 2] 662 jra 00116$
008400 663 00102$:
664 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 964: USARTx->CR2 |= itpos;
008400 F6 [ 1] 665 ld a, (x)
008401 1A 07 [ 1] 666 or a, (0x07, sp)
008403 F7 [ 1] 667 ld (x), a
008404 20 22 [ 2] 668 jra 00116$
008406 669 00114$:
670 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
008406 03 07 [ 1] 671 cpl (0x07, sp)
672 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 970: if (usartreg == 0x01)
008408 0D 01 [ 1] 673 tnz (0x01, sp)
00840A 27 0A [ 1] 674 jreq 00111$
675 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 972: USARTx->CR1 &= (uint8_t)(~itpos);
00840C 1E 02 [ 2] 676 ldw x, (0x02, sp)
00840E F6 [ 1] 677 ld a, (x)
00840F 14 07 [ 1] 678 and a, (0x07, sp)
008411 1E 02 [ 2] 679 ldw x, (0x02, sp)
008413 F7 [ 1] 680 ld (x), a
008414 20 12 [ 2] 681 jra 00116$
008416 682 00111$:
683 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 974: else if (usartreg == 0x05)
008416 0D 04 [ 1] 684 tnz (0x04, sp)
008418 27 0A [ 1] 685 jreq 00108$
686 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 976: USARTx->CR5 &= (uint8_t)(~itpos);
00841A 1E 05 [ 2] 687 ldw x, (0x05, sp)
00841C F6 [ 1] 688 ld a, (x)
00841D 14 07 [ 1] 689 and a, (0x07, sp)
00841F 1E 05 [ 2] 690 ldw x, (0x05, sp)
008421 F7 [ 1] 691 ld (x), a
008422 20 04 [ 2] 692 jra 00116$
008424 693 00108$:
694 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 981: USARTx->CR2 &= (uint8_t)(~itpos);
008424 F6 [ 1] 695 ld a, (x)
008425 14 07 [ 1] 696 and a, (0x07, sp)
008427 F7 [ 1] 697 ld (x), a
008428 698 00116$:
699 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 984: }
008428 1E 0A [ 2] 700 ldw x, (10, sp)
00842A 5B 0E [ 2] 701 addw sp, #14
00842C FC [ 2] 702 jp (x)
703 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1002: FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
704 ; -----------------------------------------
705 ; function USART_GetFlagStatus
706 ; -----------------------------------------
00842D 707 _USART_GetFlagStatus:
00842D 88 [ 1] 708 push a
709 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
00842E 16 04 [ 2] 710 ldw y, (0x04, sp)
711 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
008430 7B 05 [ 1] 712 ld a, (0x05, sp)
008432 6B 01 [ 1] 713 ld (0x01, sp), a
714 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1009: if (USART_FLAG == USART_FLAG_SBK)
008434 90 A3 01 01 [ 2] 715 cpw y, #0x0101
008438 26 0D [ 1] 716 jrne 00108$
717 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1011: if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
00843A E6 05 [ 1] 718 ld a, (0x5, x)
00843C 14 01 [ 1] 719 and a, (0x01, sp)
00843E 27 04 [ 1] 720 jreq 00102$
721 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1014: status = SET;
008440 A6 01 [ 1] 722 ld a, #0x01
008442 20 0C [ 2] 723 jra 00109$
008444 724 00102$:
725 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1019: status = RESET;
008444 4F [ 1] 726 clr a
008445 20 09 [ 2] 727 jra 00109$
008447 728 00108$:
729 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1024: if ((USARTx->SR & (uint8_t)USART_FLAG) != (uint8_t)0x00)
008447 F6 [ 1] 730 ld a, (x)
008448 14 01 [ 1] 731 and a, (0x01, sp)
00844A 27 03 [ 1] 732 jreq 00105$
733 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1027: status = SET;
00844C A6 01 [ 1] 734 ld a, #0x01
735 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1032: status = RESET;
00844E 21 736 .byte 0x21
00844F 737 00105$:
00844F 4F [ 1] 738 clr a
008450 739 00109$:
740 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1036: return status;
741 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1037: }
008450 1E 02 [ 2] 742 ldw x, (2, sp)
008452 5B 05 [ 2] 743 addw sp, #5
008454 FC [ 2] 744 jp (x)
745 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1060: void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
746 ; -----------------------------------------
747 ; function USART_ClearFlag
748 ; -----------------------------------------
008455 749 _USART_ClearFlag:
750 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1065: USARTx->SR = (uint8_t)((uint16_t)~((uint16_t)USART_FLAG));
008455 16 03 [ 2] 751 ldw y, (0x03, sp)
008457 90 53 [ 2] 752 cplw y
008459 90 9F [ 1] 753 ld a, yl
00845B F7 [ 1] 754 ld (x), a
755 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1066: }
00845C 1E 01 [ 2] 756 ldw x, (1, sp)
00845E 5B 04 [ 2] 757 addw sp, #4
008460 FC [ 2] 758 jp (x)
759 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1083: ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
760 ; -----------------------------------------
761 ; function USART_GetITStatus
762 ; -----------------------------------------
008461 763 _USART_GetITStatus:
008461 52 09 [ 2] 764 sub sp, #9
008463 1F 08 [ 2] 765 ldw (0x08, sp), x
766 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1096: itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
008465 7B 0D [ 1] 767 ld a, (0x0d, sp)
008467 97 [ 1] 768 ld xl, a
008468 A4 0F [ 1] 769 and a, #0x0f
00846A 88 [ 1] 770 push a
00846B A6 01 [ 1] 771 ld a, #0x01
00846D 6B 04 [ 1] 772 ld (0x04, sp), a
00846F 84 [ 1] 773 pop a
008470 4D [ 1] 774 tnz a
008471 27 05 [ 1] 775 jreq 00179$
008473 776 00178$:
008473 08 03 [ 1] 777 sll (0x03, sp)
008475 4A [ 1] 778 dec a
008476 26 FB [ 1] 779 jrne 00178$
008478 780 00179$:
781 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1098: itmask1 = (uint8_t)((uint8_t)USART_IT >> (uint8_t)4);
008478 9F [ 1] 782 ld a, xl
008479 4E [ 1] 783 swap a
00847A A4 0F [ 1] 784 and a, #0x0f
785 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1100: itmask2 = (uint8_t)((uint8_t)1 << itmask1);
00847C 88 [ 1] 786 push a
00847D A6 01 [ 1] 787 ld a, #0x01
00847F 6B 08 [ 1] 788 ld (0x08, sp), a
008481 84 [ 1] 789 pop a
008482 4D [ 1] 790 tnz a
008483 27 05 [ 1] 791 jreq 00181$
008485 792 00180$:
008485 08 07 [ 1] 793 sll (0x07, sp)
008487 4A [ 1] 794 dec a
008488 26 FB [ 1] 795 jrne 00180$
00848A 796 00181$:
797 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
00848A 16 0C [ 2] 798 ldw y, (0x0c, sp)
00848C 17 01 [ 2] 799 ldw (0x01, sp), y
800 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
00848E 16 08 [ 2] 801 ldw y, (0x08, sp)
008490 17 04 [ 2] 802 ldw (0x04, sp), y
803 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1103: if (USART_IT == USART_IT_PE)
008492 1E 01 [ 2] 804 ldw x, (0x01, sp)
008494 A3 01 00 [ 2] 805 cpw x, #0x0100
008497 26 1D [ 1] 806 jrne 00118$
807 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1106: enablestatus = (uint8_t)((uint8_t)USARTx->CR1 & itmask2);
008499 16 08 [ 2] 808 ldw y, (0x08, sp)
00849B 17 01 [ 2] 809 ldw (0x01, sp), y
00849D 93 [ 1] 810 ldw x, y
00849E E6 04 [ 1] 811 ld a, (0x4, x)
0084A0 14 07 [ 1] 812 and a, (0x07, sp)
0084A2 6B 07 [ 1] 813 ld (0x07, sp), a
814 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1109: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
0084A4 1E 04 [ 2] 815 ldw x, (0x04, sp)
0084A6 F6 [ 1] 816 ld a, (x)
0084A7 14 03 [ 1] 817 and a, (0x03, sp)
0084A9 27 08 [ 1] 818 jreq 00102$
0084AB 0D 07 [ 1] 819 tnz (0x07, sp)
0084AD 27 04 [ 1] 820 jreq 00102$
821 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1112: pendingbitstatus = SET;
0084AF A6 01 [ 1] 822 ld a, #0x01
0084B1 20 41 [ 2] 823 jra 00119$
0084B3 824 00102$:
825 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1117: pendingbitstatus = RESET;
0084B3 4F [ 1] 826 clr a
0084B4 20 3E [ 2] 827 jra 00119$
0084B6 828 00118$:
829 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
0084B6 1E 08 [ 2] 830 ldw x, (0x08, sp)
0084B8 E6 05 [ 1] 831 ld a, (0x5, x)
0084BA 14 07 [ 1] 832 and a, (0x07, sp)
833 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1121: else if (USART_IT == USART_IT_OR)
0084BC 1E 01 [ 2] 834 ldw x, (0x01, sp)
0084BE A3 02 35 [ 2] 835 cpw x, #0x0235
0084C1 26 20 [ 1] 836 jrne 00115$
837 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1124: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
0084C3 6B 06 [ 1] 838 ld (0x06, sp), a
839 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1127: temp = (uint8_t)(USARTx->CR5 & USART_CR5_EIE);
0084C5 1E 08 [ 2] 840 ldw x, (0x08, sp)
0084C7 E6 08 [ 1] 841 ld a, (0x8, x)
0084C9 A4 01 [ 1] 842 and a, #0x01
0084CB 6B 07 [ 1] 843 ld (0x07, sp), a
844 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1129: if (( (USARTx->SR & itpos) != 0x00) && ((enablestatus || temp)))
0084CD 1E 04 [ 2] 845 ldw x, (0x04, sp)
0084CF F6 [ 1] 846 ld a, (x)
0084D0 14 03 [ 1] 847 and a, (0x03, sp)
0084D2 27 0C [ 1] 848 jreq 00106$
0084D4 0D 06 [ 1] 849 tnz (0x06, sp)
0084D6 26 04 [ 1] 850 jrne 00105$
0084D8 0D 07 [ 1] 851 tnz (0x07, sp)
0084DA 27 04 [ 1] 852 jreq 00106$
0084DC 853 00105$:
854 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1132: pendingbitstatus = SET;
0084DC A6 01 [ 1] 855 ld a, #0x01
0084DE 20 14 [ 2] 856 jra 00119$
0084E0 857 00106$:
858 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1137: pendingbitstatus = RESET;
0084E0 4F [ 1] 859 clr a
0084E1 20 11 [ 2] 860 jra 00119$
0084E3 861 00115$:
862 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1144: enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
0084E3 6B 07 [ 1] 863 ld (0x07, sp), a
864 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1146: if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
0084E5 1E 04 [ 2] 865 ldw x, (0x04, sp)
0084E7 F6 [ 1] 866 ld a, (x)
0084E8 14 03 [ 1] 867 and a, (0x03, sp)
0084EA 27 07 [ 1] 868 jreq 00111$
0084EC 0D 07 [ 1] 869 tnz (0x07, sp)
0084EE 27 03 [ 1] 870 jreq 00111$
871 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1149: pendingbitstatus = SET;
0084F0 A6 01 [ 1] 872 ld a, #0x01
873 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1154: pendingbitstatus = RESET;
0084F2 21 874 .byte 0x21
0084F3 875 00111$:
0084F3 4F [ 1] 876 clr a
0084F4 877 00119$:
878 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1159: return pendingbitstatus;
879 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1160: }
0084F4 1E 0A [ 2] 880 ldw x, (10, sp)
0084F6 5B 0D [ 2] 881 addw sp, #13
0084F8 FC [ 2] 882 jp (x)
883 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1183: void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
884 ; -----------------------------------------
885 ; function USART_ClearITPendingBit
886 ; -----------------------------------------
0084F9 887 _USART_ClearITPendingBit:
888 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1188: USARTx->SR &= (uint8_t)(~USART_SR_TC);
0084F9 F6 [ 1] 889 ld a, (x)
0084FA A4 BF [ 1] 890 and a, #0xbf
0084FC F7 [ 1] 891 ld (x), a
892 ; ../inc/stm8l151x/src/stm8l15x_usart.c: 1189: }
0084FD 1E 01 [ 2] 893 ldw x, (1, sp)
0084FF 5B 04 [ 2] 894 addw sp, #4
008501 FC [ 2] 895 jp (x)
896 .area CODE
897 .area CONST
898 .area INITIALIZER
899 .area CABS (ABS)

55
firmware/STM8L15X_LD/stm8l15x_usart.sym Normal file
View File

@@ -0,0 +1,55 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 1
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
_CLK_GetClockFreq ****** GX
9 _USART_ClearFlag 0002A8 GR
9 _USART_ClearITPendingBit 00034C GR
9 _USART_ClockInit 000094 GR
9 _USART_Cmd 0000CE GR
9 _USART_DMACmd 0001D7 GR
9 _USART_DeInit 000000 GR
9 _USART_GetFlagStatus 000280 GR
9 _USART_GetITStatus 0002B4 GR
9 _USART_HalfDuplexCmd 000169 GR
9 _USART_ITConfig 0001F1 GR
9 _USART_Init 000017 GR
9 _USART_IrDACmd 0001C2 GR
9 _USART_IrDAConfig 0001AD GR
9 _USART_ReceiveData8 0000F0 GR
9 _USART_ReceiveData9 0000F3 GR
9 _USART_ReceiverWakeUpCmd 000136 GR
9 _USART_SendBreak 0000E8 GR
9 _USART_SendData8 00010E GR
9 _USART_SendData9 000111 GR
9 _USART_SetAddress 00014B GR
9 _USART_SetGuardTime 0001A8 GR
9 _USART_SetPrescaler 0000E3 GR
9 _USART_SmartCardCmd 00017E GR
9 _USART_SmartCardNACKCmd 000193 GR
9 _USART_WakeUpConfig 00015A GR
__divulong ****** GX
ASxxxx Assembler V02.00 + NoICE + SDCC mods (STMicroelectronics STM8) Page 2
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 DATA size 0 flags 0
2 INITIALIZED size 0 flags 0
3 DABS size 0 flags 8
4 HOME size 0 flags 0
5 GSINIT size 0 flags 0
6 GSFINAL size 0 flags 0
7 CONST size 0 flags 0
8 INITIALIZER size 0 flags 0
9 CODE size 355 flags 0
A CABS size 0 flags 8