824 lines
59 KiB
ReStructuredText
824 lines
59 KiB
ReStructuredText
1 ;--------------------------------------------------------
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2 ; File Created by SDCC : free open source ISO C Compiler
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3 ; Version 4.5.0 #15242 (Linux)
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4 ;--------------------------------------------------------
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5 .module stm8l15x_clk
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6
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7 ;--------------------------------------------------------
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8 ; Public variables in this module
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9 ;--------------------------------------------------------
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10 .globl _SYSDivFactor
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11 .globl _CLK_DeInit
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12 .globl _CLK_HSICmd
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13 .globl _CLK_AdjustHSICalibrationValue
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14 .globl _CLK_LSICmd
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15 .globl _CLK_HSEConfig
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16 .globl _CLK_LSEConfig
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17 .globl _CLK_ClockSecuritySystemEnable
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18 .globl _CLK_ClockSecuritySytemDeglitchCmd
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19 .globl _CLK_CCOConfig
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20 .globl _CLK_SYSCLKSourceConfig
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21 .globl _CLK_GetSYSCLKSource
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22 .globl _CLK_GetClockFreq
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23 .globl _CLK_SYSCLKDivConfig
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24 .globl _CLK_SYSCLKSourceSwitchCmd
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25 .globl _CLK_RTCClockConfig
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26 .globl _CLK_BEEPClockConfig
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27 .globl _CLK_PeripheralClockConfig
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28 .globl _CLK_LSEClockSecuritySystemEnable
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29 .globl _CLK_RTCCLKSwitchOnLSEFailureEnable
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30 .globl _CLK_HaltConfig
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31 .globl _CLK_MainRegulatorCmd
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32 .globl _CLK_ITConfig
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33 .globl _CLK_GetFlagStatus
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34 .globl _CLK_ClearFlag
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35 .globl _CLK_GetITStatus
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36 .globl _CLK_ClearITPendingBit
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37 ;--------------------------------------------------------
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38 ; ram data
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39 ;--------------------------------------------------------
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40 .area DATA
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41 ;--------------------------------------------------------
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42 ; ram data
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43 ;--------------------------------------------------------
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44 .area INITIALIZED
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45 ;--------------------------------------------------------
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46 ; absolute external ram data
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47 ;--------------------------------------------------------
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48 .area DABS (ABS)
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49
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50 ; default segment ordering for linker
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51 .area HOME
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52 .area GSINIT
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53 .area GSFINAL
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54 .area CONST
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55 .area INITIALIZER
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56 .area CODE
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57
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58 ;--------------------------------------------------------
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59 ; global & static initialisations
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60 ;--------------------------------------------------------
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61 .area HOME
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62 .area GSINIT
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63 .area GSFINAL
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64 .area GSINIT
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65 ;--------------------------------------------------------
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66 ; Home
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67 ;--------------------------------------------------------
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68 .area HOME
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69 .area HOME
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70 ;--------------------------------------------------------
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71 ; code
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72 ;--------------------------------------------------------
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73 .area CODE
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74 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void)
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75 ; -----------------------------------------
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76 ; function CLK_DeInit
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77 ; -----------------------------------------
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008176 78 _CLK_DeInit:
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79 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE;
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008176 35 11 50 C2 [ 1] 80 mov 0x50c2+0, #0x11
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81 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE;
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00817A 35 00 50 C6 [ 1] 82 mov 0x50c6+0, #0x00
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83 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE;
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00817E 35 00 50 C1 [ 1] 84 mov 0x50c1+0, #0x00
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85 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE;
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008182 35 00 50 CB [ 1] 86 mov 0x50cb+0, #0x00
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87 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE;
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008186 35 01 50 C8 [ 1] 88 mov 0x50c8+0, #0x01
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89 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE;
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00818A 35 00 50 C9 [ 1] 90 mov 0x50c9+0, #0x00
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91 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE;
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00818E 35 03 50 C0 [ 1] 92 mov 0x50c0+0, #0x03
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93 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE;
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008192 35 00 50 C3 [ 1] 94 mov 0x50c3+0, #0x00
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95 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE;
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008196 35 80 50 C4 [ 1] 96 mov 0x50c4+0, #0x80
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97 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE;
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00819A 35 00 50 D0 [ 1] 98 mov 0x50d0+0, #0x00
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99 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE;
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00819E 35 00 50 CA [ 1] 100 mov 0x50ca+0, #0x00
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101 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE;
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0081A2 35 00 50 C5 [ 1] 102 mov 0x50c5+0, #0x00
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103 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE;
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0081A6 35 00 50 CD [ 1] 104 mov 0x50cd+0, #0x00
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105 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE;
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0081AA 35 00 50 CC [ 1] 106 mov 0x50cc+0, #0x00
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107 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE;
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0081AE 35 00 50 CE [ 1] 108 mov 0x50ce+0, #0x00
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109 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE;
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0081B2 35 B9 50 CF [ 1] 110 mov 0x50cf+0, #0xb9
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111 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: }
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0081B6 81 [ 4] 112 ret
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113 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState)
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114 ; -----------------------------------------
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115 ; function CLK_HSICmd
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116 ; -----------------------------------------
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0081B7 117 _CLK_HSICmd:
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0081B7 88 [ 1] 118 push a
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0081B8 6B 01 [ 1] 119 ld (0x01, sp), a
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120 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
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0081BA C6 50 C2 [ 1] 121 ld a, 0x50c2
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122 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE)
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0081BD 0D 01 [ 1] 123 tnz (0x01, sp)
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0081BF 27 07 [ 1] 124 jreq 00102$
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125 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION;
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0081C1 AA 01 [ 1] 126 or a, #0x01
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0081C3 C7 50 C2 [ 1] 127 ld 0x50c2, a
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0081C6 20 05 [ 2] 128 jra 00104$
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0081C8 129 00102$:
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130 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION);
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0081C8 A4 FE [ 1] 131 and a, #0xfe
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0081CA C7 50 C2 [ 1] 132 ld 0x50c2, a
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0081CD 133 00104$:
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134 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: }
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0081CD 84 [ 1] 135 pop a
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0081CE 81 [ 4] 136 ret
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137 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue)
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138 ; -----------------------------------------
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139 ; function CLK_AdjustHSICalibrationValue
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140 ; -----------------------------------------
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0081CF 141 _CLK_AdjustHSICalibrationValue:
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142 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC;
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0081CF 35 AC 50 CE [ 1] 143 mov 0x50ce+0, #0xac
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144 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35;
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0081D3 35 35 50 CE [ 1] 145 mov 0x50ce+0, #0x35
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146 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue;
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0081D7 C7 50 CD [ 1] 147 ld 0x50cd, a
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148 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: }
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0081DA 81 [ 4] 149 ret
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150 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState)
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151 ; -----------------------------------------
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152 ; function CLK_LSICmd
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153 ; -----------------------------------------
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0081DB 154 _CLK_LSICmd:
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0081DB 88 [ 1] 155 push a
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0081DC 6B 01 [ 1] 156 ld (0x01, sp), a
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157 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
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0081DE C6 50 C2 [ 1] 158 ld a, 0x50c2
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159 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE)
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0081E1 0D 01 [ 1] 160 tnz (0x01, sp)
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0081E3 27 07 [ 1] 161 jreq 00102$
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162 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION;
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0081E5 AA 04 [ 1] 163 or a, #0x04
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0081E7 C7 50 C2 [ 1] 164 ld 0x50c2, a
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0081EA 20 05 [ 2] 165 jra 00104$
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0081EC 166 00102$:
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167 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION);
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0081EC A4 FB [ 1] 168 and a, #0xfb
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0081EE C7 50 C2 [ 1] 169 ld 0x50c2, a
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0081F1 170 00104$:
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171 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: }
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0081F1 84 [ 1] 172 pop a
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0081F2 81 [ 4] 173 ret
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174 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE)
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175 ; -----------------------------------------
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176 ; function CLK_HSEConfig
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177 ; -----------------------------------------
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0081F3 178 _CLK_HSEConfig:
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0081F3 88 [ 1] 179 push a
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0081F4 6B 01 [ 1] 180 ld (0x01, sp), a
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181 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON;
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0081F6 72 11 50 C6 [ 1] 182 bres 0x50c6, #0
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183 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP;
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0081FA 72 19 50 C6 [ 1] 184 bres 0x50c6, #4
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185 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE;
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0081FE C6 50 C6 [ 1] 186 ld a, 0x50c6
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008201 1A 01 [ 1] 187 or a, (0x01, sp)
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008203 C7 50 C6 [ 1] 188 ld 0x50c6, a
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189 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: }
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008206 84 [ 1] 190 pop a
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008207 81 [ 4] 191 ret
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192 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE)
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193 ; -----------------------------------------
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194 ; function CLK_LSEConfig
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195 ; -----------------------------------------
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008208 196 _CLK_LSEConfig:
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008208 88 [ 1] 197 push a
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008209 6B 01 [ 1] 198 ld (0x01, sp), a
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199 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON;
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00820B 72 15 50 C6 [ 1] 200 bres 0x50c6, #2
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201 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP;
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00820F 72 1B 50 C6 [ 1] 202 bres 0x50c6, #5
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203 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE;
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008213 C6 50 C6 [ 1] 204 ld a, 0x50c6
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008216 1A 01 [ 1] 205 or a, (0x01, sp)
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008218 C7 50 C6 [ 1] 206 ld 0x50c6, a
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207 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: }
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00821B 84 [ 1] 208 pop a
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00821C 81 [ 4] 209 ret
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210 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void)
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211 ; -----------------------------------------
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212 ; function CLK_ClockSecuritySystemEnable
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213 ; -----------------------------------------
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00821D 214 _CLK_ClockSecuritySystemEnable:
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215 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN;
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00821D 72 10 50 CA [ 1] 216 bset 0x50ca, #0
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217 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: }
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008221 81 [ 4] 218 ret
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219 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState)
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220 ; -----------------------------------------
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221 ; function CLK_ClockSecuritySytemDeglitchCmd
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222 ; -----------------------------------------
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008222 223 _CLK_ClockSecuritySytemDeglitchCmd:
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008222 88 [ 1] 224 push a
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008223 6B 01 [ 1] 225 ld (0x01, sp), a
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226 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
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008225 C6 50 CA [ 1] 227 ld a, 0x50ca
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228 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE)
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008228 0D 01 [ 1] 229 tnz (0x01, sp)
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00822A 27 07 [ 1] 230 jreq 00102$
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231 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON;
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00822C AA 10 [ 1] 232 or a, #0x10
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00822E C7 50 CA [ 1] 233 ld 0x50ca, a
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008231 20 05 [ 2] 234 jra 00104$
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008233 235 00102$:
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236 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON);
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008233 A4 EF [ 1] 237 and a, #0xef
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008235 C7 50 CA [ 1] 238 ld 0x50ca, a
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008238 239 00104$:
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240 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: }
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008238 84 [ 1] 241 pop a
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008239 81 [ 4] 242 ret
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243 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv)
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244 ; -----------------------------------------
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245 ; function CLK_CCOConfig
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246 ; -----------------------------------------
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00823A 247 _CLK_CCOConfig:
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248 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv);
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00823A 1A 03 [ 1] 249 or a, (0x03, sp)
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00823C C7 50 C5 [ 1] 250 ld 0x50c5, a
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251 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: }
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00823F 85 [ 2] 252 popw x
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008240 84 [ 1] 253 pop a
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008241 FC [ 2] 254 jp (x)
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255 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
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256 ; -----------------------------------------
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257 ; function CLK_SYSCLKSourceConfig
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258 ; -----------------------------------------
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008242 259 _CLK_SYSCLKSourceConfig:
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260 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource;
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008242 C7 50 C8 [ 1] 261 ld 0x50c8, a
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262 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: }
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008245 81 [ 4] 263 ret
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264 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
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265 ; -----------------------------------------
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266 ; function CLK_GetSYSCLKSource
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267 ; -----------------------------------------
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008246 268 _CLK_GetSYSCLKSource:
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269 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
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008246 C6 50 C7 [ 1] 270 ld a, 0x50c7
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271 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: }
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008249 81 [ 4] 272 ret
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273 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void)
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274 ; -----------------------------------------
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275 ; function CLK_GetClockFreq
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276 ; -----------------------------------------
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00824A 277 _CLK_GetClockFreq:
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00824A 52 08 [ 2] 278 sub sp, #8
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279 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0;
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00824C 5F [ 1] 280 clrw x
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00824D 1F 03 [ 2] 281 ldw (0x03, sp), x
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00824F 1F 01 [ 2] 282 ldw (0x01, sp), x
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283 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;
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008251 C6 50 C7 [ 1] 284 ld a, 0x50c7
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285 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI)
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008254 A1 01 [ 1] 286 cp a, #0x01
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008256 26 0C [ 1] 287 jrne 00108$
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288 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE;
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008258 AE 24 00 [ 2] 289 ldw x, #0x2400
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00825B 1F 03 [ 2] 290 ldw (0x03, sp), x
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00825D AE 00 F4 [ 2] 291 ldw x, #0x00f4
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008260 1F 01 [ 2] 292 ldw (0x01, sp), x
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008262 20 1C [ 2] 293 jra 00109$
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008264 294 00108$:
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295 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI)
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008264 A1 02 [ 1] 296 cp a, #0x02
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008266 26 0A [ 1] 297 jrne 00105$
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298 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE;
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008268 AE 94 70 [ 2] 299 ldw x, #0x9470
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00826B 1F 03 [ 2] 300 ldw (0x03, sp), x
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00826D 5F [ 1] 301 clrw x
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00826E 1F 01 [ 2] 302 ldw (0x01, sp), x
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008270 20 0E [ 2] 303 jra 00109$
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008272 304 00105$:
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305 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE)
|
|
008272 A1 04 [ 1] 306 cp a, #0x04
|
|
008274 26 0A [ 1] 307 jrne 00109$
|
|
308 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE;
|
|
008276 AE 24 00 [ 2] 309 ldw x, #0x2400
|
|
008279 1F 03 [ 2] 310 ldw (0x03, sp), x
|
|
00827B AE 00 F4 [ 2] 311 ldw x, #0x00f4
|
|
00827E 1F 01 [ 2] 312 ldw (0x01, sp), x
|
|
313 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE;
|
|
008280 314 00109$:
|
|
315 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
|
|
008280 C6 50 C0 [ 1] 316 ld a, 0x50c0
|
|
008283 A4 07 [ 1] 317 and a, #0x07
|
|
318 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp];
|
|
008285 5F [ 1] 319 clrw x
|
|
008286 97 [ 1] 320 ld xl, a
|
|
008287 D6 80 A9 [ 1] 321 ld a, (_SYSDivFactor+0, x)
|
|
322 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc;
|
|
00828A 5F [ 1] 323 clrw x
|
|
00828B 0F 05 [ 1] 324 clr (0x05, sp)
|
|
00828D 88 [ 1] 325 push a
|
|
00828E 89 [ 2] 326 pushw x
|
|
00828F 4F [ 1] 327 clr a
|
|
008290 88 [ 1] 328 push a
|
|
008291 1E 07 [ 2] 329 ldw x, (0x07, sp)
|
|
008293 89 [ 2] 330 pushw x
|
|
008294 1E 07 [ 2] 331 ldw x, (0x07, sp)
|
|
008296 89 [ 2] 332 pushw x
|
|
333 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency);
|
|
008297 CD 8E D0 [ 4] 334 call __divulong
|
|
335 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: }
|
|
00829A 5B 10 [ 2] 336 addw sp, #16
|
|
00829C 81 [ 4] 337 ret
|
|
338 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
|
|
339 ; -----------------------------------------
|
|
340 ; function CLK_SYSCLKDivConfig
|
|
341 ; -----------------------------------------
|
|
00829D 342 _CLK_SYSCLKDivConfig:
|
|
343 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
|
|
00829D C7 50 C0 [ 1] 344 ld 0x50c0, a
|
|
345 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: }
|
|
0082A0 81 [ 4] 346 ret
|
|
347 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
|
|
348 ; -----------------------------------------
|
|
349 ; function CLK_SYSCLKSourceSwitchCmd
|
|
350 ; -----------------------------------------
|
|
0082A1 351 _CLK_SYSCLKSourceSwitchCmd:
|
|
0082A1 88 [ 1] 352 push a
|
|
0082A2 6B 01 [ 1] 353 ld (0x01, sp), a
|
|
354 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
|
|
0082A4 C6 50 C9 [ 1] 355 ld a, 0x50c9
|
|
356 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE)
|
|
0082A7 0D 01 [ 1] 357 tnz (0x01, sp)
|
|
0082A9 27 07 [ 1] 358 jreq 00102$
|
|
359 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN;
|
|
0082AB AA 02 [ 1] 360 or a, #0x02
|
|
0082AD C7 50 C9 [ 1] 361 ld 0x50c9, a
|
|
0082B0 20 05 [ 2] 362 jra 00104$
|
|
0082B2 363 00102$:
|
|
364 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
|
|
0082B2 A4 FD [ 1] 365 and a, #0xfd
|
|
0082B4 C7 50 C9 [ 1] 366 ld 0x50c9, a
|
|
0082B7 367 00104$:
|
|
368 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: }
|
|
0082B7 84 [ 1] 369 pop a
|
|
0082B8 81 [ 4] 370 ret
|
|
371 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
|
|
372 ; -----------------------------------------
|
|
373 ; function CLK_RTCClockConfig
|
|
374 ; -----------------------------------------
|
|
0082B9 375 _CLK_RTCClockConfig:
|
|
376 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
|
|
0082B9 1A 03 [ 1] 377 or a, (0x03, sp)
|
|
0082BB C7 50 C1 [ 1] 378 ld 0x50c1, a
|
|
379 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: }
|
|
0082BE 85 [ 2] 380 popw x
|
|
0082BF 84 [ 1] 381 pop a
|
|
0082C0 FC [ 2] 382 jp (x)
|
|
383 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
|
|
384 ; -----------------------------------------
|
|
385 ; function CLK_BEEPClockConfig
|
|
386 ; -----------------------------------------
|
|
0082C1 387 _CLK_BEEPClockConfig:
|
|
388 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);
|
|
0082C1 C7 50 CB [ 1] 389 ld 0x50cb, a
|
|
390 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: }
|
|
0082C4 81 [ 4] 391 ret
|
|
392 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
|
|
393 ; -----------------------------------------
|
|
394 ; function CLK_PeripheralClockConfig
|
|
395 ; -----------------------------------------
|
|
0082C5 396 _CLK_PeripheralClockConfig:
|
|
0082C5 89 [ 2] 397 pushw x
|
|
398 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);
|
|
0082C6 88 [ 1] 399 push a
|
|
0082C7 A4 F0 [ 1] 400 and a, #0xf0
|
|
0082C9 97 [ 1] 401 ld xl, a
|
|
0082CA 84 [ 1] 402 pop a
|
|
0082CB 90 93 [ 1] 403 ldw y, x
|
|
404 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
|
|
0082CD A4 0F [ 1] 405 and a, #0x0f
|
|
0082CF 88 [ 1] 406 push a
|
|
0082D0 A6 01 [ 1] 407 ld a, #0x01
|
|
0082D2 6B 02 [ 1] 408 ld (0x02, sp), a
|
|
0082D4 84 [ 1] 409 pop a
|
|
0082D5 4D [ 1] 410 tnz a
|
|
0082D6 27 05 [ 1] 411 jreq 00154$
|
|
0082D8 412 00153$:
|
|
0082D8 08 01 [ 1] 413 sll (0x01, sp)
|
|
0082DA 4A [ 1] 414 dec a
|
|
0082DB 26 FB [ 1] 415 jrne 00153$
|
|
0082DD 416 00154$:
|
|
417 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
|
|
0082DD 7B 01 [ 1] 418 ld a, (0x01, sp)
|
|
0082DF 43 [ 1] 419 cpl a
|
|
0082E0 6B 02 [ 1] 420 ld (0x02, sp), a
|
|
421 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00)
|
|
0082E2 9F [ 1] 422 ld a, xl
|
|
0082E3 4D [ 1] 423 tnz a
|
|
0082E4 26 15 [ 1] 424 jrne 00114$
|
|
425 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
|
|
0082E6 C6 50 C3 [ 1] 426 ld a, 0x50c3
|
|
427 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE)
|
|
0082E9 0D 05 [ 1] 428 tnz (0x05, sp)
|
|
0082EB 27 07 [ 1] 429 jreq 00102$
|
|
430 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
|
|
0082ED 1A 01 [ 1] 431 or a, (0x01, sp)
|
|
0082EF C7 50 C3 [ 1] 432 ld 0x50c3, a
|
|
0082F2 20 35 [ 2] 433 jra 00116$
|
|
0082F4 434 00102$:
|
|
435 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
|
|
0082F4 14 02 [ 1] 436 and a, (0x02, sp)
|
|
0082F6 C7 50 C3 [ 1] 437 ld 0x50c3, a
|
|
0082F9 20 2E [ 2] 438 jra 00116$
|
|
0082FB 439 00114$:
|
|
440 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10)
|
|
0082FB 90 9F [ 1] 441 ld a, yl
|
|
0082FD A1 10 [ 1] 442 cp a, #0x10
|
|
0082FF 26 15 [ 1] 443 jrne 00111$
|
|
444 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
|
|
008301 C6 50 C4 [ 1] 445 ld a, 0x50c4
|
|
446 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE)
|
|
008304 0D 05 [ 1] 447 tnz (0x05, sp)
|
|
008306 27 07 [ 1] 448 jreq 00105$
|
|
449 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
|
|
008308 1A 01 [ 1] 450 or a, (0x01, sp)
|
|
00830A C7 50 C4 [ 1] 451 ld 0x50c4, a
|
|
00830D 20 1A [ 2] 452 jra 00116$
|
|
00830F 453 00105$:
|
|
454 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
|
|
00830F 14 02 [ 1] 455 and a, (0x02, sp)
|
|
008311 C7 50 C4 [ 1] 456 ld 0x50c4, a
|
|
008314 20 13 [ 2] 457 jra 00116$
|
|
008316 458 00111$:
|
|
459 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
|
|
008316 C6 50 D0 [ 1] 460 ld a, 0x50d0
|
|
461 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE)
|
|
008319 0D 05 [ 1] 462 tnz (0x05, sp)
|
|
00831B 27 07 [ 1] 463 jreq 00108$
|
|
464 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
|
|
00831D 1A 01 [ 1] 465 or a, (0x01, sp)
|
|
00831F C7 50 D0 [ 1] 466 ld 0x50d0, a
|
|
008322 20 05 [ 2] 467 jra 00116$
|
|
008324 468 00108$:
|
|
469 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
|
|
008324 14 02 [ 1] 470 and a, (0x02, sp)
|
|
008326 C7 50 D0 [ 1] 471 ld 0x50d0, a
|
|
008329 472 00116$:
|
|
473 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: }
|
|
008329 85 [ 2] 474 popw x
|
|
00832A 85 [ 2] 475 popw x
|
|
00832B 84 [ 1] 476 pop a
|
|
00832C FC [ 2] 477 jp (x)
|
|
478 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void)
|
|
479 ; -----------------------------------------
|
|
480 ; function CLK_LSEClockSecuritySystemEnable
|
|
481 ; -----------------------------------------
|
|
00832D 482 _CLK_LSEClockSecuritySystemEnable:
|
|
483 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
|
|
00832D 72 10 51 90 [ 1] 484 bset 0x5190, #0
|
|
485 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: }
|
|
008331 81 [ 4] 486 ret
|
|
487 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
|
|
488 ; -----------------------------------------
|
|
489 ; function CLK_RTCCLKSwitchOnLSEFailureEnable
|
|
490 ; -----------------------------------------
|
|
008332 491 _CLK_RTCCLKSwitchOnLSEFailureEnable:
|
|
492 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
|
|
008332 72 12 51 90 [ 1] 493 bset 0x5190, #1
|
|
494 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: }
|
|
008336 81 [ 4] 495 ret
|
|
496 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
|
|
497 ; -----------------------------------------
|
|
498 ; function CLK_HaltConfig
|
|
499 ; -----------------------------------------
|
|
008337 500 _CLK_HaltConfig:
|
|
008337 88 [ 1] 501 push a
|
|
502 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
|
|
008338 AE 50 C2 [ 2] 503 ldw x, #0x50c2
|
|
00833B 88 [ 1] 504 push a
|
|
00833C F6 [ 1] 505 ld a, (x)
|
|
00833D 6B 02 [ 1] 506 ld (0x02, sp), a
|
|
00833F 84 [ 1] 507 pop a
|
|
508 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE)
|
|
008340 0D 04 [ 1] 509 tnz (0x04, sp)
|
|
008342 27 07 [ 1] 510 jreq 00102$
|
|
511 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt);
|
|
008344 1A 01 [ 1] 512 or a, (0x01, sp)
|
|
008346 C7 50 C2 [ 1] 513 ld 0x50c2, a
|
|
008349 20 06 [ 2] 514 jra 00104$
|
|
00834B 515 00102$:
|
|
516 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt);
|
|
00834B 43 [ 1] 517 cpl a
|
|
00834C 14 01 [ 1] 518 and a, (0x01, sp)
|
|
00834E C7 50 C2 [ 1] 519 ld 0x50c2, a
|
|
008351 520 00104$:
|
|
521 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: }
|
|
008351 84 [ 1] 522 pop a
|
|
008352 85 [ 2] 523 popw x
|
|
008353 84 [ 1] 524 pop a
|
|
008354 FC [ 2] 525 jp (x)
|
|
526 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState)
|
|
527 ; -----------------------------------------
|
|
528 ; function CLK_MainRegulatorCmd
|
|
529 ; -----------------------------------------
|
|
008355 530 _CLK_MainRegulatorCmd:
|
|
008355 88 [ 1] 531 push a
|
|
008356 6B 01 [ 1] 532 ld (0x01, sp), a
|
|
533 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
|
|
008358 C6 50 CF [ 1] 534 ld a, 0x50cf
|
|
535 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE)
|
|
00835B 0D 01 [ 1] 536 tnz (0x01, sp)
|
|
00835D 27 07 [ 1] 537 jreq 00102$
|
|
538 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
|
|
00835F A4 FD [ 1] 539 and a, #0xfd
|
|
008361 C7 50 CF [ 1] 540 ld 0x50cf, a
|
|
008364 20 05 [ 2] 541 jra 00104$
|
|
008366 542 00102$:
|
|
543 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF;
|
|
008366 AA 02 [ 1] 544 or a, #0x02
|
|
008368 C7 50 CF [ 1] 545 ld 0x50cf, a
|
|
00836B 546 00104$:
|
|
547 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: }
|
|
00836B 84 [ 1] 548 pop a
|
|
00836C 81 [ 4] 549 ret
|
|
550 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
|
|
551 ; -----------------------------------------
|
|
552 ; function CLK_ITConfig
|
|
553 ; -----------------------------------------
|
|
00836D 554 _CLK_ITConfig:
|
|
00836D 88 [ 1] 555 push a
|
|
556 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
|
|
00836E A1 1C [ 1] 557 cp a, #0x1c
|
|
008370 26 07 [ 1] 558 jrne 00154$
|
|
008372 88 [ 1] 559 push a
|
|
008373 A6 01 [ 1] 560 ld a, #0x01
|
|
008375 6B 02 [ 1] 561 ld (0x02, sp), a
|
|
008377 84 [ 1] 562 pop a
|
|
008378 C5 563 .byte 0xc5
|
|
008379 564 00154$:
|
|
008379 0F 01 [ 1] 565 clr (0x01, sp)
|
|
00837B 566 00155$:
|
|
567 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
|
|
00837B A0 2C [ 1] 568 sub a, #0x2c
|
|
00837D 26 02 [ 1] 569 jrne 00157$
|
|
00837F 4C [ 1] 570 inc a
|
|
008380 21 571 .byte 0x21
|
|
008381 572 00157$:
|
|
008381 4F [ 1] 573 clr a
|
|
008382 574 00158$:
|
|
575 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE)
|
|
008382 0D 04 [ 1] 576 tnz (0x04, sp)
|
|
008384 27 25 [ 1] 577 jreq 00114$
|
|
578 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF)
|
|
008386 0D 01 [ 1] 579 tnz (0x01, sp)
|
|
008388 27 0A [ 1] 580 jreq 00105$
|
|
581 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN;
|
|
00838A C6 50 C9 [ 1] 582 ld a, 0x50c9
|
|
00838D AA 04 [ 1] 583 or a, #0x04
|
|
00838F C7 50 C9 [ 1] 584 ld 0x50c9, a
|
|
008392 20 3A [ 2] 585 jra 00116$
|
|
008394 586 00105$:
|
|
587 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF)
|
|
008394 4D [ 1] 588 tnz a
|
|
008395 27 0A [ 1] 589 jreq 00102$
|
|
590 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
|
|
008397 C6 51 90 [ 1] 591 ld a, 0x5190
|
|
00839A AA 04 [ 1] 592 or a, #0x04
|
|
00839C C7 51 90 [ 1] 593 ld 0x5190, a
|
|
00839F 20 2D [ 2] 594 jra 00116$
|
|
0083A1 595 00102$:
|
|
596 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE;
|
|
0083A1 C6 50 CA [ 1] 597 ld a, 0x50ca
|
|
0083A4 AA 04 [ 1] 598 or a, #0x04
|
|
0083A6 C7 50 CA [ 1] 599 ld 0x50ca, a
|
|
0083A9 20 23 [ 2] 600 jra 00116$
|
|
0083AB 601 00114$:
|
|
602 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF)
|
|
0083AB 0D 01 [ 1] 603 tnz (0x01, sp)
|
|
0083AD 27 0A [ 1] 604 jreq 00111$
|
|
605 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
|
|
0083AF C6 50 C9 [ 1] 606 ld a, 0x50c9
|
|
0083B2 A4 FB [ 1] 607 and a, #0xfb
|
|
0083B4 C7 50 C9 [ 1] 608 ld 0x50c9, a
|
|
0083B7 20 15 [ 2] 609 jra 00116$
|
|
0083B9 610 00111$:
|
|
611 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF)
|
|
0083B9 4D [ 1] 612 tnz a
|
|
0083BA 27 0A [ 1] 613 jreq 00108$
|
|
614 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
|
|
0083BC C6 51 90 [ 1] 615 ld a, 0x5190
|
|
0083BF A4 FB [ 1] 616 and a, #0xfb
|
|
0083C1 C7 51 90 [ 1] 617 ld 0x5190, a
|
|
0083C4 20 08 [ 2] 618 jra 00116$
|
|
0083C6 619 00108$:
|
|
620 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
|
|
0083C6 C6 50 CA [ 1] 621 ld a, 0x50ca
|
|
0083C9 A4 FB [ 1] 622 and a, #0xfb
|
|
0083CB C7 50 CA [ 1] 623 ld 0x50ca, a
|
|
0083CE 624 00116$:
|
|
625 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: }
|
|
0083CE 84 [ 1] 626 pop a
|
|
0083CF 85 [ 2] 627 popw x
|
|
0083D0 84 [ 1] 628 pop a
|
|
0083D1 FC [ 2] 629 jp (x)
|
|
630 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
|
|
631 ; -----------------------------------------
|
|
632 ; function CLK_GetFlagStatus
|
|
633 ; -----------------------------------------
|
|
0083D2 634 _CLK_GetFlagStatus:
|
|
0083D2 88 [ 1] 635 push a
|
|
636 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
|
|
0083D3 97 [ 1] 637 ld xl, a
|
|
0083D4 A4 F0 [ 1] 638 and a, #0xf0
|
|
639 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
|
|
0083D6 88 [ 1] 640 push a
|
|
0083D7 9F [ 1] 641 ld a, xl
|
|
0083D8 A4 0F [ 1] 642 and a, #0x0f
|
|
0083DA 97 [ 1] 643 ld xl, a
|
|
0083DB 84 [ 1] 644 pop a
|
|
645 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */
|
|
0083DC 4D [ 1] 646 tnz a
|
|
0083DD 26 05 [ 1] 647 jrne 00123$
|
|
648 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR;
|
|
0083DF C6 50 C1 [ 1] 649 ld a, 0x50c1
|
|
0083E2 20 42 [ 2] 650 jra 00124$
|
|
0083E4 651 00123$:
|
|
652 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */
|
|
0083E4 A1 10 [ 1] 653 cp a, #0x10
|
|
0083E6 26 05 [ 1] 654 jrne 00120$
|
|
655 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR;
|
|
0083E8 C6 50 C2 [ 1] 656 ld a, 0x50c2
|
|
0083EB 20 39 [ 2] 657 jra 00124$
|
|
0083ED 658 00120$:
|
|
659 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */
|
|
0083ED A1 20 [ 1] 660 cp a, #0x20
|
|
0083EF 26 05 [ 1] 661 jrne 00117$
|
|
662 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR;
|
|
0083F1 C6 50 C5 [ 1] 663 ld a, 0x50c5
|
|
0083F4 20 30 [ 2] 664 jra 00124$
|
|
0083F6 665 00117$:
|
|
666 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */
|
|
0083F6 A1 30 [ 1] 667 cp a, #0x30
|
|
0083F8 26 05 [ 1] 668 jrne 00114$
|
|
669 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR;
|
|
0083FA C6 50 C6 [ 1] 670 ld a, 0x50c6
|
|
0083FD 20 27 [ 2] 671 jra 00124$
|
|
0083FF 672 00114$:
|
|
673 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */
|
|
0083FF A1 40 [ 1] 674 cp a, #0x40
|
|
008401 26 05 [ 1] 675 jrne 00111$
|
|
676 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR;
|
|
008403 C6 50 C9 [ 1] 677 ld a, 0x50c9
|
|
008406 20 1E [ 2] 678 jra 00124$
|
|
008408 679 00111$:
|
|
680 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */
|
|
008408 A1 50 [ 1] 681 cp a, #0x50
|
|
00840A 26 05 [ 1] 682 jrne 00108$
|
|
683 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR;
|
|
00840C C6 50 CA [ 1] 684 ld a, 0x50ca
|
|
00840F 20 15 [ 2] 685 jra 00124$
|
|
008411 686 00108$:
|
|
687 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */
|
|
008411 A1 70 [ 1] 688 cp a, #0x70
|
|
008413 26 05 [ 1] 689 jrne 00105$
|
|
690 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR;
|
|
008415 C6 50 CF [ 1] 691 ld a, 0x50cf
|
|
008418 20 0C [ 2] 692 jra 00124$
|
|
00841A 693 00105$:
|
|
694 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
|
|
00841A A1 80 [ 1] 695 cp a, #0x80
|
|
00841C 26 05 [ 1] 696 jrne 00102$
|
|
697 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR;
|
|
00841E C6 51 90 [ 1] 698 ld a, 0x5190
|
|
008421 20 03 [ 2] 699 jra 00124$
|
|
008423 700 00102$:
|
|
701 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR;
|
|
008423 C6 50 CB [ 1] 702 ld a, 0x50cb
|
|
008426 703 00124$:
|
|
704 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
|
|
008426 88 [ 1] 705 push a
|
|
008427 A6 01 [ 1] 706 ld a, #0x01
|
|
008429 6B 02 [ 1] 707 ld (0x02, sp), a
|
|
00842B 9F [ 1] 708 ld a, xl
|
|
00842C 4D [ 1] 709 tnz a
|
|
00842D 27 05 [ 1] 710 jreq 00216$
|
|
00842F 711 00215$:
|
|
00842F 08 02 [ 1] 712 sll (0x02, sp)
|
|
008431 4A [ 1] 713 dec a
|
|
008432 26 FB [ 1] 714 jrne 00215$
|
|
008434 715 00216$:
|
|
008434 84 [ 1] 716 pop a
|
|
008435 14 01 [ 1] 717 and a, (0x01, sp)
|
|
008437 27 03 [ 1] 718 jreq 00126$
|
|
719 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET;
|
|
008439 A6 01 [ 1] 720 ld a, #0x01
|
|
721 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET;
|
|
00843B 21 722 .byte 0x21
|
|
00843C 723 00126$:
|
|
00843C 4F [ 1] 724 clr a
|
|
00843D 725 00127$:
|
|
726 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus);
|
|
727 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: }
|
|
00843D 5B 01 [ 2] 728 addw sp, #1
|
|
00843F 81 [ 4] 729 ret
|
|
730 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void)
|
|
731 ; -----------------------------------------
|
|
732 ; function CLK_ClearFlag
|
|
733 ; -----------------------------------------
|
|
008440 734 _CLK_ClearFlag:
|
|
735 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
|
|
008440 72 17 51 90 [ 1] 736 bres 0x5190, #3
|
|
737 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: }
|
|
008444 81 [ 4] 738 ret
|
|
739 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
|
|
740 ; -----------------------------------------
|
|
741 ; function CLK_GetITStatus
|
|
742 ; -----------------------------------------
|
|
008445 743 _CLK_GetITStatus:
|
|
008445 88 [ 1] 744 push a
|
|
745 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF)
|
|
008446 6B 01 [ 1] 746 ld (0x01, sp), a
|
|
008448 A1 1C [ 1] 747 cp a, #0x1c
|
|
00844A 26 0F [ 1] 748 jrne 00114$
|
|
749 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
|
|
00844C C6 50 C9 [ 1] 750 ld a, 0x50c9
|
|
00844F 14 01 [ 1] 751 and a, (0x01, sp)
|
|
752 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET;
|
|
008451 A0 0C [ 1] 753 sub a, #0x0c
|
|
008453 26 03 [ 1] 754 jrne 00102$
|
|
008455 4C [ 1] 755 inc a
|
|
008456 20 24 [ 2] 756 jra 00115$
|
|
008458 757 00102$:
|
|
758 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET;
|
|
008458 4F [ 1] 759 clr a
|
|
008459 20 21 [ 2] 760 jra 00115$
|
|
00845B 761 00114$:
|
|
762 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF)
|
|
00845B 7B 01 [ 1] 763 ld a, (0x01, sp)
|
|
00845D A1 2C [ 1] 764 cp a, #0x2c
|
|
00845F 26 0F [ 1] 765 jrne 00111$
|
|
766 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
|
|
008461 C6 51 90 [ 1] 767 ld a, 0x5190
|
|
008464 14 01 [ 1] 768 and a, (0x01, sp)
|
|
769 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET;
|
|
008466 A0 0C [ 1] 770 sub a, #0x0c
|
|
008468 26 03 [ 1] 771 jrne 00105$
|
|
00846A 4C [ 1] 772 inc a
|
|
00846B 20 0F [ 2] 773 jra 00115$
|
|
00846D 774 00105$:
|
|
775 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET;
|
|
00846D 4F [ 1] 776 clr a
|
|
00846E 20 0C [ 2] 777 jra 00115$
|
|
008470 778 00111$:
|
|
779 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
|
|
008470 C6 50 CA [ 1] 780 ld a, 0x50ca
|
|
008473 14 01 [ 1] 781 and a, (0x01, sp)
|
|
782 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET;
|
|
008475 A0 0C [ 1] 783 sub a, #0x0c
|
|
008477 26 02 [ 1] 784 jrne 00108$
|
|
008479 4C [ 1] 785 inc a
|
|
786 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET;
|
|
00847A 21 787 .byte 0x21
|
|
00847B 788 00108$:
|
|
00847B 4F [ 1] 789 clr a
|
|
00847C 790 00115$:
|
|
791 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus;
|
|
792 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: }
|
|
00847C 5B 01 [ 2] 793 addw sp, #1
|
|
00847E 81 [ 4] 794 ret
|
|
795 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
|
|
796 ; -----------------------------------------
|
|
797 ; function CLK_ClearITPendingBit
|
|
798 ; -----------------------------------------
|
|
00847F 799 _CLK_ClearITPendingBit:
|
|
800 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
|
|
00847F A4 F0 [ 1] 801 and a, #0xf0
|
|
008481 A1 20 [ 1] 802 cp a, #0x20
|
|
008483 26 05 [ 1] 803 jrne 00102$
|
|
804 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
|
|
008485 72 17 51 90 [ 1] 805 bres 0x5190, #3
|
|
008489 81 [ 4] 806 ret
|
|
00848A 807 00102$:
|
|
808 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
|
|
00848A 72 17 50 C9 [ 1] 809 bres 0x50c9, #3
|
|
810 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: }
|
|
00848E 81 [ 4] 811 ret
|
|
812 .area CODE
|
|
813 .area CONST
|
|
814 .area CONST
|
|
0080A9 815 _SYSDivFactor:
|
|
0080A9 01 816 .db #0x01 ; 1
|
|
0080AA 02 817 .db #0x02 ; 2
|
|
0080AB 04 818 .db #0x04 ; 4
|
|
0080AC 08 819 .db #0x08 ; 8
|
|
0080AD 10 820 .db #0x10 ; 16
|
|
821 .area CODE
|
|
822 .area INITIALIZER
|
|
823 .area CABS (ABS)
|