1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ISO C Compiler 3 ; Version 4.5.0 #15242 (Linux) 4 ;-------------------------------------------------------- 5 .module stm8l15x_clk 6 7 ;-------------------------------------------------------- 8 ; Public variables in this module 9 ;-------------------------------------------------------- 10 .globl _SYSDivFactor 11 .globl _CLK_DeInit 12 .globl _CLK_HSICmd 13 .globl _CLK_AdjustHSICalibrationValue 14 .globl _CLK_LSICmd 15 .globl _CLK_HSEConfig 16 .globl _CLK_LSEConfig 17 .globl _CLK_ClockSecuritySystemEnable 18 .globl _CLK_ClockSecuritySytemDeglitchCmd 19 .globl _CLK_CCOConfig 20 .globl _CLK_SYSCLKSourceConfig 21 .globl _CLK_GetSYSCLKSource 22 .globl _CLK_GetClockFreq 23 .globl _CLK_SYSCLKDivConfig 24 .globl _CLK_SYSCLKSourceSwitchCmd 25 .globl _CLK_RTCClockConfig 26 .globl _CLK_BEEPClockConfig 27 .globl _CLK_PeripheralClockConfig 28 .globl _CLK_LSEClockSecuritySystemEnable 29 .globl _CLK_RTCCLKSwitchOnLSEFailureEnable 30 .globl _CLK_HaltConfig 31 .globl _CLK_MainRegulatorCmd 32 .globl _CLK_ITConfig 33 .globl _CLK_GetFlagStatus 34 .globl _CLK_ClearFlag 35 .globl _CLK_GetITStatus 36 .globl _CLK_ClearITPendingBit 37 ;-------------------------------------------------------- 38 ; ram data 39 ;-------------------------------------------------------- 40 .area DATA 41 ;-------------------------------------------------------- 42 ; ram data 43 ;-------------------------------------------------------- 44 .area INITIALIZED 45 ;-------------------------------------------------------- 46 ; absolute external ram data 47 ;-------------------------------------------------------- 48 .area DABS (ABS) 49 50 ; default segment ordering for linker 51 .area HOME 52 .area GSINIT 53 .area GSFINAL 54 .area CONST 55 .area INITIALIZER 56 .area CODE 57 58 ;-------------------------------------------------------- 59 ; global & static initialisations 60 ;-------------------------------------------------------- 61 .area HOME 62 .area GSINIT 63 .area GSFINAL 64 .area GSINIT 65 ;-------------------------------------------------------- 66 ; Home 67 ;-------------------------------------------------------- 68 .area HOME 69 .area HOME 70 ;-------------------------------------------------------- 71 ; code 72 ;-------------------------------------------------------- 73 .area CODE 74 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 120: void CLK_DeInit(void) 75 ; ----------------------------------------- 76 ; function CLK_DeInit 77 ; ----------------------------------------- 008502 78 _CLK_DeInit: 79 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 122: CLK->ICKCR = CLK_ICKCR_RESET_VALUE; 008502 35 11 50 C2 [ 1] 80 mov 0x50c2+0, #0x11 81 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 123: CLK->ECKCR = CLK_ECKCR_RESET_VALUE; 008506 35 00 50 C6 [ 1] 82 mov 0x50c6+0, #0x00 83 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 124: CLK->CRTCR = CLK_CRTCR_RESET_VALUE; 00850A 35 00 50 C1 [ 1] 84 mov 0x50c1+0, #0x00 85 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 125: CLK->CBEEPR = CLK_CBEEPR_RESET_VALUE; 00850E 35 00 50 CB [ 1] 86 mov 0x50cb+0, #0x00 87 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 126: CLK->SWR = CLK_SWR_RESET_VALUE; 008512 35 01 50 C8 [ 1] 88 mov 0x50c8+0, #0x01 89 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 127: CLK->SWCR = CLK_SWCR_RESET_VALUE; 008516 35 00 50 C9 [ 1] 90 mov 0x50c9+0, #0x00 91 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 128: CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE; 00851A 35 03 50 C0 [ 1] 92 mov 0x50c0+0, #0x03 93 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 129: CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE; 00851E 35 00 50 C3 [ 1] 94 mov 0x50c3+0, #0x00 95 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 130: CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE; 008522 35 80 50 C4 [ 1] 96 mov 0x50c4+0, #0x80 97 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 131: CLK->PCKENR3 = CLK_PCKENR3_RESET_VALUE; 008526 35 00 50 D0 [ 1] 98 mov 0x50d0+0, #0x00 99 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 132: CLK->CSSR = CLK_CSSR_RESET_VALUE; 00852A 35 00 50 CA [ 1] 100 mov 0x50ca+0, #0x00 101 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 133: CLK->CCOR = CLK_CCOR_RESET_VALUE; 00852E 35 00 50 C5 [ 1] 102 mov 0x50c5+0, #0x00 103 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 134: CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE; 008532 35 00 50 CD [ 1] 104 mov 0x50cd+0, #0x00 105 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 135: CLK->HSICALR = CLK_HSICALR_RESET_VALUE; 008536 35 00 50 CC [ 1] 106 mov 0x50cc+0, #0x00 107 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 136: CLK->HSIUNLCKR = CLK_HSIUNLCKR_RESET_VALUE; 00853A 35 00 50 CE [ 1] 108 mov 0x50ce+0, #0x00 109 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 137: CLK->REGCSR = CLK_REGCSR_RESET_VALUE; 00853E 35 B9 50 CF [ 1] 110 mov 0x50cf+0, #0xb9 111 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 138: } 008542 81 [ 4] 112 ret 113 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 160: void CLK_HSICmd(FunctionalState NewState) 114 ; ----------------------------------------- 115 ; function CLK_HSICmd 116 ; ----------------------------------------- 008543 117 _CLK_HSICmd: 008543 88 [ 1] 118 push a 008544 6B 01 [ 1] 119 ld (0x01, sp), a 120 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION; 008546 C6 50 C2 [ 1] 121 ld a, 0x50c2 122 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 165: if (NewState != DISABLE) 008549 0D 01 [ 1] 123 tnz (0x01, sp) 00854B 27 07 [ 1] 124 jreq 00102$ 125 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 168: CLK->ICKCR |= CLK_ICKCR_HSION; 00854D AA 01 [ 1] 126 or a, #0x01 00854F C7 50 C2 [ 1] 127 ld 0x50c2, a 008552 20 05 [ 2] 128 jra 00104$ 008554 129 00102$: 130 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 173: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_HSION); 008554 A4 FE [ 1] 131 and a, #0xfe 008556 C7 50 C2 [ 1] 132 ld 0x50c2, a 008559 133 00104$: 134 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 175: } 008559 84 [ 1] 135 pop a 00855A 81 [ 4] 136 ret 137 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 188: void CLK_AdjustHSICalibrationValue(uint8_t CLK_HSICalibrationValue) 138 ; ----------------------------------------- 139 ; function CLK_AdjustHSICalibrationValue 140 ; ----------------------------------------- 00855B 141 _CLK_AdjustHSICalibrationValue: 142 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 191: CLK->HSIUNLCKR = 0xAC; 00855B 35 AC 50 CE [ 1] 143 mov 0x50ce+0, #0xac 144 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 192: CLK->HSIUNLCKR = 0x35; 00855F 35 35 50 CE [ 1] 145 mov 0x50ce+0, #0x35 146 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 195: CLK->HSITRIMR = (uint8_t)CLK_HSICalibrationValue; 008563 C7 50 CD [ 1] 147 ld 0x50cd, a 148 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 196: } 008566 81 [ 4] 149 ret 150 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 212: void CLK_LSICmd(FunctionalState NewState) 151 ; ----------------------------------------- 152 ; function CLK_LSICmd 153 ; ----------------------------------------- 008567 154 _CLK_LSICmd: 008567 88 [ 1] 155 push a 008568 6B 01 [ 1] 156 ld (0x01, sp), a 157 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION; 00856A C6 50 C2 [ 1] 158 ld a, 0x50c2 159 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 218: if (NewState != DISABLE) 00856D 0D 01 [ 1] 160 tnz (0x01, sp) 00856F 27 07 [ 1] 161 jreq 00102$ 162 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 221: CLK->ICKCR |= CLK_ICKCR_LSION; 008571 AA 04 [ 1] 163 or a, #0x04 008573 C7 50 C2 [ 1] 164 ld 0x50c2, a 008576 20 05 [ 2] 165 jra 00104$ 008578 166 00102$: 167 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 226: CLK->ICKCR &= (uint8_t)(~CLK_ICKCR_LSION); 008578 A4 FB [ 1] 168 and a, #0xfb 00857A C7 50 C2 [ 1] 169 ld 0x50c2, a 00857D 170 00104$: 171 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 228: } 00857D 84 [ 1] 172 pop a 00857E 81 [ 4] 173 ret 174 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 249: void CLK_HSEConfig(CLK_HSE_TypeDef CLK_HSE) 175 ; ----------------------------------------- 176 ; function CLK_HSEConfig 177 ; ----------------------------------------- 00857F 178 _CLK_HSEConfig: 00857F 88 [ 1] 179 push a 008580 6B 01 [ 1] 180 ld (0x01, sp), a 181 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 256: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEON; 008582 72 11 50 C6 [ 1] 182 bres 0x50c6, #0 183 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 259: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_HSEBYP; 008586 72 19 50 C6 [ 1] 184 bres 0x50c6, #4 185 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 262: CLK->ECKCR |= (uint8_t)CLK_HSE; 00858A C6 50 C6 [ 1] 186 ld a, 0x50c6 00858D 1A 01 [ 1] 187 or a, (0x01, sp) 00858F C7 50 C6 [ 1] 188 ld 0x50c6, a 189 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 263: } 008592 84 [ 1] 190 pop a 008593 81 [ 4] 191 ret 192 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 280: void CLK_LSEConfig(CLK_LSE_TypeDef CLK_LSE) 193 ; ----------------------------------------- 194 ; function CLK_LSEConfig 195 ; ----------------------------------------- 008594 196 _CLK_LSEConfig: 008594 88 [ 1] 197 push a 008595 6B 01 [ 1] 198 ld (0x01, sp), a 199 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 287: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEON; 008597 72 15 50 C6 [ 1] 200 bres 0x50c6, #2 201 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 290: CLK->ECKCR &= (uint8_t)~CLK_ECKCR_LSEBYP; 00859B 72 1B 50 C6 [ 1] 202 bres 0x50c6, #5 203 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 293: CLK->ECKCR |= (uint8_t)CLK_LSE; 00859F C6 50 C6 [ 1] 204 ld a, 0x50c6 0085A2 1A 01 [ 1] 205 or a, (0x01, sp) 0085A4 C7 50 C6 [ 1] 206 ld 0x50c6, a 207 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 295: } 0085A7 84 [ 1] 208 pop a 0085A8 81 [ 4] 209 ret 210 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 306: void CLK_ClockSecuritySystemEnable(void) 211 ; ----------------------------------------- 212 ; function CLK_ClockSecuritySystemEnable 213 ; ----------------------------------------- 0085A9 214 _CLK_ClockSecuritySystemEnable: 215 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 309: CLK->CSSR |= CLK_CSSR_CSSEN; 0085A9 72 10 50 CA [ 1] 216 bset 0x50ca, #0 217 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 310: } 0085AD 81 [ 4] 218 ret 219 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 317: void CLK_ClockSecuritySytemDeglitchCmd(FunctionalState NewState) 220 ; ----------------------------------------- 221 ; function CLK_ClockSecuritySytemDeglitchCmd 222 ; ----------------------------------------- 0085AE 223 _CLK_ClockSecuritySytemDeglitchCmd: 0085AE 88 [ 1] 224 push a 0085AF 6B 01 [ 1] 225 ld (0x01, sp), a 226 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON; 0085B1 C6 50 CA [ 1] 227 ld a, 0x50ca 228 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 322: if (NewState != DISABLE) 0085B4 0D 01 [ 1] 229 tnz (0x01, sp) 0085B6 27 07 [ 1] 230 jreq 00102$ 231 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 325: CLK->CSSR |= CLK_CSSR_CSSDGON; 0085B8 AA 10 [ 1] 232 or a, #0x10 0085BA C7 50 CA [ 1] 233 ld 0x50ca, a 0085BD 20 05 [ 2] 234 jra 00104$ 0085BF 235 00102$: 236 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 330: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDGON); 0085BF A4 EF [ 1] 237 and a, #0xef 0085C1 C7 50 CA [ 1] 238 ld 0x50ca, a 0085C4 239 00104$: 240 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 332: } 0085C4 84 [ 1] 241 pop a 0085C5 81 [ 4] 242 ret 243 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 356: void CLK_CCOConfig(CLK_CCOSource_TypeDef CLK_CCOSource, CLK_CCODiv_TypeDef CLK_CCODiv) 244 ; ----------------------------------------- 245 ; function CLK_CCOConfig 246 ; ----------------------------------------- 0085C6 247 _CLK_CCOConfig: 248 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 363: CLK->CCOR = (uint8_t)((uint8_t)CLK_CCOSource | (uint8_t)CLK_CCODiv); 0085C6 1A 03 [ 1] 249 or a, (0x03, sp) 0085C8 C7 50 C5 [ 1] 250 ld 0x50c5, a 251 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 364: } 0085CB 85 [ 2] 252 popw x 0085CC 84 [ 1] 253 pop a 0085CD FC [ 2] 254 jp (x) 255 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 416: void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource) 256 ; ----------------------------------------- 257 ; function CLK_SYSCLKSourceConfig 258 ; ----------------------------------------- 0085CE 259 _CLK_SYSCLKSourceConfig: 260 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 422: CLK->SWR = (uint8_t)CLK_SYSCLKSource; 0085CE C7 50 C8 [ 1] 261 ld 0x50c8, a 262 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 423: } 0085D1 81 [ 4] 263 ret 264 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 435: CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void) 265 ; ----------------------------------------- 266 ; function CLK_GetSYSCLKSource 267 ; ----------------------------------------- 0085D2 268 _CLK_GetSYSCLKSource: 269 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 437: return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR)); 0085D2 C6 50 C7 [ 1] 270 ld a, 0x50c7 271 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 438: } 0085D5 81 [ 4] 272 ret 273 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 478: uint32_t CLK_GetClockFreq(void) 274 ; ----------------------------------------- 275 ; function CLK_GetClockFreq 276 ; ----------------------------------------- 0085D6 277 _CLK_GetClockFreq: 0085D6 52 08 [ 2] 278 sub sp, #8 279 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 481: uint32_t sourcefrequency = 0; 0085D8 5F [ 1] 280 clrw x 0085D9 1F 03 [ 2] 281 ldw (0x03, sp), x 0085DB 1F 01 [ 2] 282 ldw (0x01, sp), x 283 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 486: clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR; 0085DD C6 50 C7 [ 1] 284 ld a, 0x50c7 285 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 488: if ( clocksource == CLK_SYSCLKSource_HSI) 0085E0 A1 01 [ 1] 286 cp a, #0x01 0085E2 26 0C [ 1] 287 jrne 00108$ 288 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 490: sourcefrequency = HSI_VALUE; 0085E4 AE 24 00 [ 2] 289 ldw x, #0x2400 0085E7 1F 03 [ 2] 290 ldw (0x03, sp), x 0085E9 AE 00 F4 [ 2] 291 ldw x, #0x00f4 0085EC 1F 01 [ 2] 292 ldw (0x01, sp), x 0085EE 20 1C [ 2] 293 jra 00109$ 0085F0 294 00108$: 295 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 492: else if ( clocksource == CLK_SYSCLKSource_LSI) 0085F0 A1 02 [ 1] 296 cp a, #0x02 0085F2 26 0A [ 1] 297 jrne 00105$ 298 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 494: sourcefrequency = LSI_VALUE; 0085F4 AE 94 70 [ 2] 299 ldw x, #0x9470 0085F7 1F 03 [ 2] 300 ldw (0x03, sp), x 0085F9 5F [ 1] 301 clrw x 0085FA 1F 01 [ 2] 302 ldw (0x01, sp), x 0085FC 20 0E [ 2] 303 jra 00109$ 0085FE 304 00105$: 305 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 496: else if ( clocksource == CLK_SYSCLKSource_HSE) 0085FE A1 04 [ 1] 306 cp a, #0x04 008600 26 0A [ 1] 307 jrne 00109$ 308 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 498: sourcefrequency = HSE_VALUE; 008602 AE 24 00 [ 2] 309 ldw x, #0x2400 008605 1F 03 [ 2] 310 ldw (0x03, sp), x 008607 AE 00 F4 [ 2] 311 ldw x, #0x00f4 00860A 1F 01 [ 2] 312 ldw (0x01, sp), x 313 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 502: clockfrequency = LSE_VALUE; 00860C 314 00109$: 315 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 506: tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM); 00860C C6 50 C0 [ 1] 316 ld a, 0x50c0 00860F A4 07 [ 1] 317 and a, #0x07 318 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 507: presc = SYSDivFactor[tmp]; 008611 5F [ 1] 319 clrw x 008612 97 [ 1] 320 ld xl, a 008613 D6 80 AF [ 1] 321 ld a, (_SYSDivFactor+0, x) 322 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 510: clockfrequency = sourcefrequency / presc; 008616 5F [ 1] 323 clrw x 008617 0F 05 [ 1] 324 clr (0x05, sp) 008619 88 [ 1] 325 push a 00861A 89 [ 2] 326 pushw x 00861B 4F [ 1] 327 clr a 00861C 88 [ 1] 328 push a 00861D 1E 07 [ 2] 329 ldw x, (0x07, sp) 00861F 89 [ 2] 330 pushw x 008620 1E 07 [ 2] 331 ldw x, (0x07, sp) 008622 89 [ 2] 332 pushw x 333 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 512: return((uint32_t)clockfrequency); 008623 CD 92 5C [ 4] 334 call __divulong 335 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 513: } 008626 5B 10 [ 2] 336 addw sp, #16 008628 81 [ 4] 337 ret 338 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 528: void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv) 339 ; ----------------------------------------- 340 ; function CLK_SYSCLKDivConfig 341 ; ----------------------------------------- 008629 342 _CLK_SYSCLKDivConfig: 343 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 533: CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv); 008629 C7 50 C0 [ 1] 344 ld 0x50c0, a 345 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 534: } 00862C 81 [ 4] 346 ret 347 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 541: void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState) 348 ; ----------------------------------------- 349 ; function CLK_SYSCLKSourceSwitchCmd 350 ; ----------------------------------------- 00862D 351 _CLK_SYSCLKSourceSwitchCmd: 00862D 88 [ 1] 352 push a 00862E 6B 01 [ 1] 353 ld (0x01, sp), a 354 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN; 008630 C6 50 C9 [ 1] 355 ld a, 0x50c9 356 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 546: if (NewState != DISABLE) 008633 0D 01 [ 1] 357 tnz (0x01, sp) 008635 27 07 [ 1] 358 jreq 00102$ 359 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 549: CLK->SWCR |= CLK_SWCR_SWEN; 008637 AA 02 [ 1] 360 or a, #0x02 008639 C7 50 C9 [ 1] 361 ld 0x50c9, a 00863C 20 05 [ 2] 362 jra 00104$ 00863E 363 00102$: 364 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 554: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN); 00863E A4 FD [ 1] 365 and a, #0xfd 008640 C7 50 C9 [ 1] 366 ld 0x50c9, a 008643 367 00104$: 368 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 556: } 008643 84 [ 1] 369 pop a 008644 81 [ 4] 370 ret 371 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 616: void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv) 372 ; ----------------------------------------- 373 ; function CLK_RTCClockConfig 374 ; ----------------------------------------- 008645 375 _CLK_RTCClockConfig: 376 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 623: CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv); 008645 1A 03 [ 1] 377 or a, (0x03, sp) 008647 C7 50 C1 [ 1] 378 ld 0x50c1, a 379 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 624: } 00864A 85 [ 2] 380 popw x 00864B 84 [ 1] 381 pop a 00864C FC [ 2] 382 jp (x) 383 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 635: void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource) 384 ; ----------------------------------------- 385 ; function CLK_BEEPClockConfig 386 ; ----------------------------------------- 00864D 387 _CLK_BEEPClockConfig: 388 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 641: CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource); 00864D C7 50 CB [ 1] 389 ld 0x50cb, a 390 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 643: } 008650 81 [ 4] 391 ret 392 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 677: void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState) 393 ; ----------------------------------------- 394 ; function CLK_PeripheralClockConfig 395 ; ----------------------------------------- 008651 396 _CLK_PeripheralClockConfig: 008651 89 [ 2] 397 pushw x 398 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 686: reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0); 008652 88 [ 1] 399 push a 008653 A4 F0 [ 1] 400 and a, #0xf0 008655 97 [ 1] 401 ld xl, a 008656 84 [ 1] 402 pop a 008657 90 93 [ 1] 403 ldw y, x 404 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)); 008659 A4 0F [ 1] 405 and a, #0x0f 00865B 88 [ 1] 406 push a 00865C A6 01 [ 1] 407 ld a, #0x01 00865E 6B 02 [ 1] 408 ld (0x02, sp), a 008660 84 [ 1] 409 pop a 008661 4D [ 1] 410 tnz a 008662 27 05 [ 1] 411 jreq 00154$ 008664 412 00153$: 008664 08 01 [ 1] 413 sll (0x01, sp) 008666 4A [ 1] 414 dec a 008667 26 FB [ 1] 415 jrne 00153$ 008669 416 00154$: 417 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)))); 008669 7B 01 [ 1] 418 ld a, (0x01, sp) 00866B 43 [ 1] 419 cpl a 00866C 6B 02 [ 1] 420 ld (0x02, sp), a 421 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 688: if ( reg == 0x00) 00866E 9F [ 1] 422 ld a, xl 00866F 4D [ 1] 423 tnz a 008670 26 15 [ 1] 424 jrne 00114$ 425 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)); 008672 C6 50 C3 [ 1] 426 ld a, 0x50c3 427 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 690: if (NewState != DISABLE) 008675 0D 05 [ 1] 428 tnz (0x05, sp) 008677 27 07 [ 1] 429 jreq 00102$ 430 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 693: CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)); 008679 1A 01 [ 1] 431 or a, (0x01, sp) 00867B C7 50 C3 [ 1] 432 ld 0x50c3, a 00867E 20 35 [ 2] 433 jra 00116$ 008680 434 00102$: 435 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 698: CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)))); 008680 14 02 [ 1] 436 and a, (0x02, sp) 008682 C7 50 C3 [ 1] 437 ld 0x50c3, a 008685 20 2E [ 2] 438 jra 00116$ 008687 439 00114$: 440 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 701: else if (reg == 0x10) 008687 90 9F [ 1] 441 ld a, yl 008689 A1 10 [ 1] 442 cp a, #0x10 00868B 26 15 [ 1] 443 jrne 00111$ 444 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)); 00868D C6 50 C4 [ 1] 445 ld a, 0x50c4 446 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 703: if (NewState != DISABLE) 008690 0D 05 [ 1] 447 tnz (0x05, sp) 008692 27 07 [ 1] 448 jreq 00105$ 449 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 706: CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)); 008694 1A 01 [ 1] 450 or a, (0x01, sp) 008696 C7 50 C4 [ 1] 451 ld 0x50c4, a 008699 20 1A [ 2] 452 jra 00116$ 00869B 453 00105$: 454 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 711: CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)))); 00869B 14 02 [ 1] 455 and a, (0x02, sp) 00869D C7 50 C4 [ 1] 456 ld 0x50c4, a 0086A0 20 13 [ 2] 457 jra 00116$ 0086A2 458 00111$: 459 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)); 0086A2 C6 50 D0 [ 1] 460 ld a, 0x50d0 461 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 716: if (NewState != DISABLE) 0086A5 0D 05 [ 1] 462 tnz (0x05, sp) 0086A7 27 07 [ 1] 463 jreq 00108$ 464 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 719: CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)); 0086A9 1A 01 [ 1] 465 or a, (0x01, sp) 0086AB C7 50 D0 [ 1] 466 ld 0x50d0, a 0086AE 20 05 [ 2] 467 jra 00116$ 0086B0 468 00108$: 469 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 724: CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F)))); 0086B0 14 02 [ 1] 470 and a, (0x02, sp) 0086B2 C7 50 D0 [ 1] 471 ld 0x50d0, a 0086B5 472 00116$: 473 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 727: } 0086B5 85 [ 2] 474 popw x 0086B6 85 [ 2] 475 popw x 0086B7 84 [ 1] 476 pop a 0086B8 FC [ 2] 477 jp (x) 478 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 765: void CLK_LSEClockSecuritySystemEnable(void) 479 ; ----------------------------------------- 480 ; function CLK_LSEClockSecuritySystemEnable 481 ; ----------------------------------------- 0086B9 482 _CLK_LSEClockSecuritySystemEnable: 483 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 768: CSSLSE->CSR |= CSSLSE_CSR_CSSEN; 0086B9 72 10 51 90 [ 1] 484 bset 0x5190, #0 485 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 769: } 0086BD 81 [ 4] 486 ret 487 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 777: void CLK_RTCCLKSwitchOnLSEFailureEnable(void) 488 ; ----------------------------------------- 489 ; function CLK_RTCCLKSwitchOnLSEFailureEnable 490 ; ----------------------------------------- 0086BE 491 _CLK_RTCCLKSwitchOnLSEFailureEnable: 492 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 780: CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN; 0086BE 72 12 51 90 [ 1] 493 bset 0x5190, #1 494 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 781: } 0086C2 81 [ 4] 495 ret 496 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 807: void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState) 497 ; ----------------------------------------- 498 ; function CLK_HaltConfig 499 ; ----------------------------------------- 0086C3 500 _CLK_HaltConfig: 0086C3 88 [ 1] 501 push a 502 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt); 0086C4 AE 50 C2 [ 2] 503 ldw x, #0x50c2 0086C7 88 [ 1] 504 push a 0086C8 F6 [ 1] 505 ld a, (x) 0086C9 6B 02 [ 1] 506 ld (0x02, sp), a 0086CB 84 [ 1] 507 pop a 508 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 813: if (NewState != DISABLE) 0086CC 0D 04 [ 1] 509 tnz (0x04, sp) 0086CE 27 07 [ 1] 510 jreq 00102$ 511 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 815: CLK->ICKCR |= (uint8_t)(CLK_Halt); 0086D0 1A 01 [ 1] 512 or a, (0x01, sp) 0086D2 C7 50 C2 [ 1] 513 ld 0x50c2, a 0086D5 20 06 [ 2] 514 jra 00104$ 0086D7 515 00102$: 516 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 819: CLK->ICKCR &= (uint8_t)(~CLK_Halt); 0086D7 43 [ 1] 517 cpl a 0086D8 14 01 [ 1] 518 and a, (0x01, sp) 0086DA C7 50 C2 [ 1] 519 ld 0x50c2, a 0086DD 520 00104$: 521 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 821: } 0086DD 84 [ 1] 522 pop a 0086DE 85 [ 2] 523 popw x 0086DF 84 [ 1] 524 pop a 0086E0 FC [ 2] 525 jp (x) 526 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 831: void CLK_MainRegulatorCmd(FunctionalState NewState) 527 ; ----------------------------------------- 528 ; function CLK_MainRegulatorCmd 529 ; ----------------------------------------- 0086E1 530 _CLK_MainRegulatorCmd: 0086E1 88 [ 1] 531 push a 0086E2 6B 01 [ 1] 532 ld (0x01, sp), a 533 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF); 0086E4 C6 50 CF [ 1] 534 ld a, 0x50cf 535 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 836: if (NewState != DISABLE) 0086E7 0D 01 [ 1] 536 tnz (0x01, sp) 0086E9 27 07 [ 1] 537 jreq 00102$ 538 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 839: CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF); 0086EB A4 FD [ 1] 539 and a, #0xfd 0086ED C7 50 CF [ 1] 540 ld 0x50cf, a 0086F0 20 05 [ 2] 541 jra 00104$ 0086F2 542 00102$: 543 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 844: CLK->REGCSR |= CLK_REGCSR_REGOFF; 0086F2 AA 02 [ 1] 544 or a, #0x02 0086F4 C7 50 CF [ 1] 545 ld 0x50cf, a 0086F7 546 00104$: 547 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 846: } 0086F7 84 [ 1] 548 pop a 0086F8 81 [ 4] 549 ret 550 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 875: void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState) 551 ; ----------------------------------------- 552 ; function CLK_ITConfig 553 ; ----------------------------------------- 0086F9 554 _CLK_ITConfig: 0086F9 88 [ 1] 555 push a 556 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF) 0086FA A1 1C [ 1] 557 cp a, #0x1c 0086FC 26 07 [ 1] 558 jrne 00154$ 0086FE 88 [ 1] 559 push a 0086FF A6 01 [ 1] 560 ld a, #0x01 008701 6B 02 [ 1] 561 ld (0x02, sp), a 008703 84 [ 1] 562 pop a 008704 C5 563 .byte 0xc5 008705 564 00154$: 008705 0F 01 [ 1] 565 clr (0x01, sp) 008707 566 00155$: 567 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF) 008707 A0 2C [ 1] 568 sub a, #0x2c 008709 26 02 [ 1] 569 jrne 00157$ 00870B 4C [ 1] 570 inc a 00870C 21 571 .byte 0x21 00870D 572 00157$: 00870D 4F [ 1] 573 clr a 00870E 574 00158$: 575 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 882: if (NewState != DISABLE) 00870E 0D 04 [ 1] 576 tnz (0x04, sp) 008710 27 25 [ 1] 577 jreq 00114$ 578 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 884: if (CLK_IT == CLK_IT_SWIF) 008712 0D 01 [ 1] 579 tnz (0x01, sp) 008714 27 0A [ 1] 580 jreq 00105$ 581 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 887: CLK->SWCR |= CLK_SWCR_SWIEN; 008716 C6 50 C9 [ 1] 582 ld a, 0x50c9 008719 AA 04 [ 1] 583 or a, #0x04 00871B C7 50 C9 [ 1] 584 ld 0x50c9, a 00871E 20 3A [ 2] 585 jra 00116$ 008720 586 00105$: 587 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 889: else if (CLK_IT == CLK_IT_LSECSSF) 008720 4D [ 1] 588 tnz a 008721 27 0A [ 1] 589 jreq 00102$ 590 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 892: CSSLSE->CSR |= CSSLSE_CSR_CSSIE; 008723 C6 51 90 [ 1] 591 ld a, 0x5190 008726 AA 04 [ 1] 592 or a, #0x04 008728 C7 51 90 [ 1] 593 ld 0x5190, a 00872B 20 2D [ 2] 594 jra 00116$ 00872D 595 00102$: 596 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 897: CLK->CSSR |= CLK_CSSR_CSSDIE; 00872D C6 50 CA [ 1] 597 ld a, 0x50ca 008730 AA 04 [ 1] 598 or a, #0x04 008732 C7 50 CA [ 1] 599 ld 0x50ca, a 008735 20 23 [ 2] 600 jra 00116$ 008737 601 00114$: 602 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 902: if (CLK_IT == CLK_IT_SWIF) 008737 0D 01 [ 1] 603 tnz (0x01, sp) 008739 27 0A [ 1] 604 jreq 00111$ 605 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 905: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN); 00873B C6 50 C9 [ 1] 606 ld a, 0x50c9 00873E A4 FB [ 1] 607 and a, #0xfb 008740 C7 50 C9 [ 1] 608 ld 0x50c9, a 008743 20 15 [ 2] 609 jra 00116$ 008745 610 00111$: 611 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 907: else if (CLK_IT == CLK_IT_LSECSSF) 008745 4D [ 1] 612 tnz a 008746 27 0A [ 1] 613 jreq 00108$ 614 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 910: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE); 008748 C6 51 90 [ 1] 615 ld a, 0x5190 00874B A4 FB [ 1] 616 and a, #0xfb 00874D C7 51 90 [ 1] 617 ld 0x5190, a 008750 20 08 [ 2] 618 jra 00116$ 008752 619 00108$: 620 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 915: CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE); 008752 C6 50 CA [ 1] 621 ld a, 0x50ca 008755 A4 FB [ 1] 622 and a, #0xfb 008757 C7 50 CA [ 1] 623 ld 0x50ca, a 00875A 624 00116$: 625 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 918: } 00875A 84 [ 1] 626 pop a 00875B 85 [ 2] 627 popw x 00875C 84 [ 1] 628 pop a 00875D FC [ 2] 629 jp (x) 630 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 945: FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG) 631 ; ----------------------------------------- 632 ; function CLK_GetFlagStatus 633 ; ----------------------------------------- 00875E 634 _CLK_GetFlagStatus: 00875E 88 [ 1] 635 push a 636 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 955: reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0); 00875F 97 [ 1] 637 ld xl, a 008760 A4 F0 [ 1] 638 and a, #0xf0 639 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 958: pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F); 008762 88 [ 1] 640 push a 008763 9F [ 1] 641 ld a, xl 008764 A4 0F [ 1] 642 and a, #0x0f 008766 97 [ 1] 643 ld xl, a 008767 84 [ 1] 644 pop a 645 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 960: if (reg == 0x00) /* The flag to check is in CRTC Rregister */ 008768 4D [ 1] 646 tnz a 008769 26 05 [ 1] 647 jrne 00123$ 648 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 962: reg = CLK->CRTCR; 00876B C6 50 C1 [ 1] 649 ld a, 0x50c1 00876E 20 42 [ 2] 650 jra 00124$ 008770 651 00123$: 652 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 964: else if (reg == 0x10) /* The flag to check is in ICKCR register */ 008770 A1 10 [ 1] 653 cp a, #0x10 008772 26 05 [ 1] 654 jrne 00120$ 655 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 966: reg = CLK->ICKCR; 008774 C6 50 C2 [ 1] 656 ld a, 0x50c2 008777 20 39 [ 2] 657 jra 00124$ 008779 658 00120$: 659 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 968: else if (reg == 0x20) /* The flag to check is in CCOR register */ 008779 A1 20 [ 1] 660 cp a, #0x20 00877B 26 05 [ 1] 661 jrne 00117$ 662 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 970: reg = CLK->CCOR; 00877D C6 50 C5 [ 1] 663 ld a, 0x50c5 008780 20 30 [ 2] 664 jra 00124$ 008782 665 00117$: 666 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 972: else if (reg == 0x30) /* The flag to check is in ECKCR register */ 008782 A1 30 [ 1] 667 cp a, #0x30 008784 26 05 [ 1] 668 jrne 00114$ 669 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 974: reg = CLK->ECKCR; 008786 C6 50 C6 [ 1] 670 ld a, 0x50c6 008789 20 27 [ 2] 671 jra 00124$ 00878B 672 00114$: 673 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 976: else if (reg == 0x40) /* The flag to check is in SWCR register */ 00878B A1 40 [ 1] 674 cp a, #0x40 00878D 26 05 [ 1] 675 jrne 00111$ 676 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 978: reg = CLK->SWCR; 00878F C6 50 C9 [ 1] 677 ld a, 0x50c9 008792 20 1E [ 2] 678 jra 00124$ 008794 679 00111$: 680 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 980: else if (reg == 0x50) /* The flag to check is in CSSR register */ 008794 A1 50 [ 1] 681 cp a, #0x50 008796 26 05 [ 1] 682 jrne 00108$ 683 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 982: reg = CLK->CSSR; 008798 C6 50 CA [ 1] 684 ld a, 0x50ca 00879B 20 15 [ 2] 685 jra 00124$ 00879D 686 00108$: 687 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 984: else if (reg == 0x70) /* The flag to check is in REGCSR register */ 00879D A1 70 [ 1] 688 cp a, #0x70 00879F 26 05 [ 1] 689 jrne 00105$ 690 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 986: reg = CLK->REGCSR; 0087A1 C6 50 CF [ 1] 691 ld a, 0x50cf 0087A4 20 0C [ 2] 692 jra 00124$ 0087A6 693 00105$: 694 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 988: else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */ 0087A6 A1 80 [ 1] 695 cp a, #0x80 0087A8 26 05 [ 1] 696 jrne 00102$ 697 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 990: reg = CSSLSE->CSR; 0087AA C6 51 90 [ 1] 698 ld a, 0x5190 0087AD 20 03 [ 2] 699 jra 00124$ 0087AF 700 00102$: 701 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 994: reg = CLK->CBEEPR; 0087AF C6 50 CB [ 1] 702 ld a, 0x50cb 0087B2 703 00124$: 704 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 998: if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET) 0087B2 88 [ 1] 705 push a 0087B3 A6 01 [ 1] 706 ld a, #0x01 0087B5 6B 02 [ 1] 707 ld (0x02, sp), a 0087B7 9F [ 1] 708 ld a, xl 0087B8 4D [ 1] 709 tnz a 0087B9 27 05 [ 1] 710 jreq 00216$ 0087BB 711 00215$: 0087BB 08 02 [ 1] 712 sll (0x02, sp) 0087BD 4A [ 1] 713 dec a 0087BE 26 FB [ 1] 714 jrne 00215$ 0087C0 715 00216$: 0087C0 84 [ 1] 716 pop a 0087C1 14 01 [ 1] 717 and a, (0x01, sp) 0087C3 27 03 [ 1] 718 jreq 00126$ 719 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1000: bitstatus = SET; 0087C5 A6 01 [ 1] 720 ld a, #0x01 721 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1004: bitstatus = RESET; 0087C7 21 722 .byte 0x21 0087C8 723 00126$: 0087C8 4F [ 1] 724 clr a 0087C9 725 00127$: 726 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1008: return((FlagStatus)bitstatus); 727 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1009: } 0087C9 5B 01 [ 2] 728 addw sp, #1 0087CB 81 [ 4] 729 ret 730 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1016: void CLK_ClearFlag(void) 731 ; ----------------------------------------- 732 ; function CLK_ClearFlag 733 ; ----------------------------------------- 0087CC 734 _CLK_ClearFlag: 735 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1020: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF); 0087CC 72 17 51 90 [ 1] 736 bres 0x5190, #3 737 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1021: } 0087D0 81 [ 4] 738 ret 739 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1032: ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT) 740 ; ----------------------------------------- 741 ; function CLK_GetITStatus 742 ; ----------------------------------------- 0087D1 743 _CLK_GetITStatus: 0087D1 88 [ 1] 744 push a 745 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1040: if (CLK_IT == CLK_IT_SWIF) 0087D2 6B 01 [ 1] 746 ld (0x01, sp), a 0087D4 A1 1C [ 1] 747 cp a, #0x1c 0087D6 26 0F [ 1] 748 jrne 00114$ 749 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1043: if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C) 0087D8 C6 50 C9 [ 1] 750 ld a, 0x50c9 0087DB 14 01 [ 1] 751 and a, (0x01, sp) 752 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1045: bitstatus = SET; 0087DD A0 0C [ 1] 753 sub a, #0x0c 0087DF 26 03 [ 1] 754 jrne 00102$ 0087E1 4C [ 1] 755 inc a 0087E2 20 24 [ 2] 756 jra 00115$ 0087E4 757 00102$: 758 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1049: bitstatus = RESET; 0087E4 4F [ 1] 759 clr a 0087E5 20 21 [ 2] 760 jra 00115$ 0087E7 761 00114$: 762 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1052: else if (CLK_IT == CLK_IT_LSECSSF) 0087E7 7B 01 [ 1] 763 ld a, (0x01, sp) 0087E9 A1 2C [ 1] 764 cp a, #0x2c 0087EB 26 0F [ 1] 765 jrne 00111$ 766 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1055: if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C) 0087ED C6 51 90 [ 1] 767 ld a, 0x5190 0087F0 14 01 [ 1] 768 and a, (0x01, sp) 769 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1057: bitstatus = SET; 0087F2 A0 0C [ 1] 770 sub a, #0x0c 0087F4 26 03 [ 1] 771 jrne 00105$ 0087F6 4C [ 1] 772 inc a 0087F7 20 0F [ 2] 773 jra 00115$ 0087F9 774 00105$: 775 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1061: bitstatus = RESET; 0087F9 4F [ 1] 776 clr a 0087FA 20 0C [ 2] 777 jra 00115$ 0087FC 778 00111$: 779 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1067: if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C) 0087FC C6 50 CA [ 1] 780 ld a, 0x50ca 0087FF 14 01 [ 1] 781 and a, (0x01, sp) 782 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1069: bitstatus = SET; 008801 A0 0C [ 1] 783 sub a, #0x0c 008803 26 02 [ 1] 784 jrne 00108$ 008805 4C [ 1] 785 inc a 786 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1073: bitstatus = RESET; 008806 21 787 .byte 0x21 008807 788 00108$: 008807 4F [ 1] 789 clr a 008808 790 00115$: 791 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1078: return bitstatus; 792 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1079: } 008808 5B 01 [ 2] 793 addw sp, #1 00880A 81 [ 4] 794 ret 795 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1089: void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT) 796 ; ----------------------------------------- 797 ; function CLK_ClearITPendingBit 798 ; ----------------------------------------- 00880B 799 _CLK_ClearITPendingBit: 800 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1095: if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20) 00880B A4 F0 [ 1] 801 and a, #0xf0 00880D A1 20 [ 1] 802 cp a, #0x20 00880F 26 05 [ 1] 803 jrne 00102$ 804 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1098: CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF); 008811 72 17 51 90 [ 1] 805 bres 0x5190, #3 008815 81 [ 4] 806 ret 008816 807 00102$: 808 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1103: CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF); 008816 72 17 50 C9 [ 1] 809 bres 0x50c9, #3 810 ; ../inc/stm8l151x/src/stm8l15x_clk.c: 1105: } 00881A 81 [ 4] 811 ret 812 .area CODE 813 .area CONST 814 .area CONST 0080AF 815 _SYSDivFactor: 0080AF 01 816 .db #0x01 ; 1 0080B0 02 817 .db #0x02 ; 2 0080B1 04 818 .db #0x04 ; 4 0080B2 08 819 .db #0x08 ; 8 0080B3 10 820 .db #0x10 ; 16 821 .area CODE 822 .area INITIALIZER 823 .area CABS (ABS)