commit a5cac1e54c84078216eaf4246dbfc7e0fffca276 Author: Joseph Hopfmüller Date: Mon Jan 23 09:25:07 2023 +0100 Initial commit diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..636f044 --- /dev/null +++ b/.gitignore @@ -0,0 +1,43 @@ +# For PCBs designed using KiCad: https://www.kicad.org/ +# Format documentation: https://kicad.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*.kicad_sch-bak +*-backups +*.kicad_prl +*.sch-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache +*-backups/ + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv + +# gitignore template for LTspice +# website: https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html + +# Logfile +*.log + +# Simulation Outputs +*.raw +*.fft + +# Netlist +*.net \ No newline at end of file diff --git a/electronics/rosaled.kicad_pcb b/electronics/rosaled.kicad_pcb new file mode 100644 index 0000000..28b47a1 --- /dev/null +++ b/electronics/rosaled.kicad_pcb @@ -0,0 +1,2 @@ +(kicad_pcb (version 20211014) (generator pcbnew) +) \ No newline at end of file diff --git a/electronics/rosaled.kicad_pro b/electronics/rosaled.kicad_pro new file mode 100644 index 0000000..f90e719 --- /dev/null +++ b/electronics/rosaled.kicad_pro @@ -0,0 +1,326 @@ +{ + "board": { + "design_settings": { + "defaults": { + "board_outline_line_width": 0.1, + "copper_line_width": 0.2, + "copper_text_size_h": 1.5, + "copper_text_size_v": 1.5, + "copper_text_thickness": 0.3, + "other_line_width": 0.15, + "silk_line_width": 0.15, + "silk_text_size_h": 1.0, + "silk_text_size_v": 1.0, + "silk_text_thickness": 0.15 + }, + "diff_pair_dimensions": [], + "drc_exclusions": [], + "rules": { + "min_copper_edge_clearance": 0.0, + "solder_mask_clearance": 0.0, + "solder_mask_min_width": 0.0 + }, + "track_widths": [], + "via_dimensions": [] + }, + "layer_presets": [] + }, + "boards": [], + "cvpcb": { + "equivalence_files": [] + }, + "erc": { + "erc_exclusions": [], + "meta": { + "version": 0 + }, + "pin_map": [ + [ + 0, + 0, + 0, + 0, + 0, + 0, + 1, + 0, + 0, + 0, + 0, + 2 + ], + [ + 0, + 2, + 0, + 1, + 0, + 0, + 1, + 0, + 2, + 2, + 2, + 2 + ], + [ + 0, + 0, + 0, + 0, + 0, + 0, + 1, + 0, + 1, + 0, + 1, + 2 + ], + [ + 0, + 1, + 0, + 0, + 0, + 0, + 1, + 1, + 2, + 1, + 1, + 2 + ], + [ + 0, + 0, + 0, + 0, + 0, + 0, + 1, + 0, + 0, + 0, + 0, + 2 + ], + [ + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 2 + ], + [ + 1, + 1, + 1, + 1, + 1, + 0, + 1, + 1, + 1, + 1, + 1, + 2 + ], + [ + 0, + 0, + 0, + 1, + 0, + 0, + 1, + 0, + 0, + 0, + 0, + 2 + ], + [ + 0, + 2, + 1, + 2, + 0, + 0, + 1, + 0, + 2, + 2, + 2, + 2 + ], + [ + 0, + 2, + 0, + 1, + 0, + 0, + 1, + 0, + 2, + 0, + 0, + 2 + ], + [ + 0, + 2, + 1, + 1, + 0, + 0, + 1, + 0, + 2, + 0, + 0, + 2 + ], + [ + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2 + ] + ], + "rule_severities": { + "bus_definition_conflict": "error", + "bus_entry_needed": "error", + "bus_label_syntax": "error", + "bus_to_bus_conflict": "error", + "bus_to_net_conflict": "error", + "different_unit_footprint": "error", + "different_unit_net": "error", + "duplicate_reference": "error", + "duplicate_sheet_names": "error", + "extra_units": "error", + "global_label_dangling": "warning", + "hier_label_mismatch": "error", + "label_dangling": "error", + "lib_symbol_issues": "warning", + "multiple_net_names": "warning", + "net_not_bus_member": "warning", + "no_connect_connected": "warning", + "no_connect_dangling": "warning", + "pin_not_connected": "error", + "pin_not_driven": "error", + "pin_to_pin": "warning", + "power_pin_not_driven": "error", + "similar_labels": "warning", + "unannotated": "error", + "unit_value_mismatch": "error", + "unresolved_variable": "error", + "wire_dangling": "error" + } + }, + "libraries": { + "pinned_footprint_libs": [], + "pinned_symbol_libs": [] + }, + "meta": { + "filename": "rosaled.kicad_pro", + "version": 1 + }, + "net_settings": { + "classes": [ + { + "bus_width": 12.0, + "clearance": 0.2, + "diff_pair_gap": 0.25, + "diff_pair_via_gap": 0.25, + "diff_pair_width": 0.2, + "line_style": 0, + "microvia_diameter": 0.3, + "microvia_drill": 0.1, + "name": "Default", + "pcb_color": "rgba(0, 0, 0, 0.000)", + "schematic_color": "rgba(0, 0, 0, 0.000)", + "track_width": 0.25, + "via_diameter": 0.8, + "via_drill": 0.4, + "wire_width": 6.0 + } + ], + "meta": { + "version": 2 + }, + "net_colors": null + }, + "pcbnew": { + "last_paths": { + "gencad": "", + "idf": "", + "netlist": "", + "specctra_dsn": "", + "step": "", + "vrml": "" + }, + "page_layout_descr_file": "" + }, + "schematic": { + "annotate_start_num": 0, + "drawing": { + "default_line_thickness": 6.0, + "default_text_size": 50.0, + "field_names": [], + "intersheets_ref_own_page": false, + "intersheets_ref_prefix": "", + "intersheets_ref_short": false, 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(unit 1) (value "MS3V-T1R 32.768 kHz 12.5 pF +-20ppm") (footprint "") + ) + ) +) diff --git a/electronics/sim/led puls.asc b/electronics/sim/led puls.asc new file mode 100644 index 0000000..f8a1cf9 --- /dev/null +++ b/electronics/sim/led puls.asc @@ -0,0 +1,80 @@ +Version 4 +SHEET 1 1812 788 +WIRE 80 0 80 -80 +WIRE 208 0 80 0 +WIRE 80 48 80 0 +WIRE 80 176 80 128 +WIRE 160 176 80 176 +WIRE 208 176 208 64 +WIRE 208 176 160 176 +WIRE -144 224 -160 224 +WIRE -64 224 -80 224 +WIRE 80 240 80 176 +WIRE -160 320 -160 224 +WIRE -160 320 -240 320 +WIRE -144 320 -160 320 +WIRE -64 320 -64 224 +WIRE -64 320 -80 320 +WIRE 32 320 -64 320 +WIRE 80 384 80 336 +FLAG -240 400 0 +FLAG -1088 176 0 +FLAG -1088 96 +3 +FLAG -512 0 +3 +FLAG -448 0 +3 +FLAG -512 64 0 +FLAG -448 64 0 +FLAG -480 768 0 +FLAG -480 688 eta +FLAG 80 -80 +3 +FLAG 80 384 0 +FLAG 160 176 led- +SYMBOL diode 224 64 R180 +WINDOW 0 24 64 Left 2 +WINDOW 3 -209 -9 Left 2 +SYMATTR InstName D1 +SYMATTR Value LV_CRBP.01_25-min +SYMBOL ind 64 32 R0 +SYMATTR InstName L1 +SYMATTR Value 1m +SYMATTR SpiceLine Ipk=0.14 Rser=29 +SYMBOL nmos 32 240 R0 +SYMATTR InstName M1 +SYMATTR Value IRLML6244 +SYMBOL voltage -240 304 R0 +WINDOW 123 0 0 Left 0 +WINDOW 39 24 124 Left 2 +WINDOW 3 -369 135 Left 2 +SYMATTR InstName V1 +SYMATTR Value PULSE(0 3 1.2e-6 17e-9 17e-9 6.12e-6 16e-3) +SYMBOL voltage -1088 80 R0 +WINDOW 123 0 0 Left 0 +WINDOW 39 24 124 Left 2 +SYMATTR SpiceLine Rser=100 +SYMATTR InstName V2 +SYMATTR Value 3 +SYMBOL cap -528 0 R0 +SYMATTR InstName C1 +SYMATTR Value 10µ +SYMBOL cap -464 0 R0 +SYMATTR InstName C2 +SYMATTR Value 10n +SYMBOL bv -480 672 R0 +SYMATTR InstName B1 +SYMATTR Value V=idt(-V(+3,led-)*I(D1))/idt(-V(+3)*I(V2)) +SYMBOL diode -144 336 R270 +WINDOW 0 32 32 VTop 2 +WINDOW 3 0 32 VBottom 2 +SYMATTR InstName D2 +SYMATTR Value ID +SYMBOL diode -80 208 R90 +WINDOW 0 0 32 VBottom 2 +WINDOW 3 32 32 VTop 2 +SYMATTR InstName D3 +SYMATTR Value ID +TEXT 208 -328 Left 2 !.model LV_CRBP.01_25-min D (BV=7 IS=3.223817631764513e-14 N=3.454960721622244 RS=0.3874073653535945 Tnom=25 mfg=OSRAM_OS) +TEXT -1152 8 Left 2 !.tran 0 20e-6 +TEXT 352 -240 Left 2 ;.step dec param R_snub 10k 100k 2 +TEXT -464 168 Left 2 !.model ID D(Ron=0 Roff=1G Vfwd=0 Ilimit=32e-3) +TEXT -216 144 Left 2 ;current clamp model +TEXT 232 264 Left 2 !.model ID2 D(Ron=0 Roff=1G Vfwd=4.2) diff --git a/electronics/sim/led puls.plt b/electronics/sim/led puls.plt new file mode 100644 index 0000000..3381dbe Binary files /dev/null and b/electronics/sim/led puls.plt differ