..
This commit is contained in:
seppl
@@ -8,317 +8,249 @@
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8 ; Public variables in this module
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9 ;--------------------------------------------------------
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10 .globl _main
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11 .globl _USART_Cmd
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12 .globl _USART_Init
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13 .globl _GPIO_ResetBits
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14 .globl _GPIO_SetBits
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15 .globl _GPIO_Init
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16 .globl _CLK_PeripheralClockConfig
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17 .globl _CLK_SYSCLKSourceSwitchCmd
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18 .globl _CLK_SYSCLKDivConfig
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19 .globl _CLK_GetSYSCLKSource
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20 .globl _CLK_SYSCLKSourceConfig
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21 ;--------------------------------------------------------
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22 ; ram data
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23 ;--------------------------------------------------------
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24 .area DATA
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25 ;--------------------------------------------------------
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26 ; ram data
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27 ;--------------------------------------------------------
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28 .area INITIALIZED
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29 ;--------------------------------------------------------
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30 ; Stack segment in internal ram
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31 ;--------------------------------------------------------
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32 .area SSEG
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000000 33 __start__stack:
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000000 34 .ds 1
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35
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36 ;--------------------------------------------------------
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37 ; absolute external ram data
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38 ;--------------------------------------------------------
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39 .area DABS (ABS)
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40
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41 ; default segment ordering for linker
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42 .area HOME
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43 .area GSINIT
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44 .area GSFINAL
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45 .area CONST
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46 .area INITIALIZER
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47 .area CODE
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48
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49 ;--------------------------------------------------------
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50 ; interrupt vector
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51 ;--------------------------------------------------------
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52 .area HOME
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000000 53 __interrupt_vect:
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000000 82v00u00u00 54 int s_GSINIT ; reset
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000004 82v00u00u00 55 int _TRAP_IRQHandler ; trap
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000008 82 00 00 00 56 int 0x000000 ; int0
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00000C 82v00u00u00 57 int _FLASH_IRQHandler ; int1
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000010 82v00u00u00 58 int _DMA1_CHANNEL0_1_IRQHandler ; int2
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000014 82v00u00u00 59 int _DMA1_CHANNEL2_3_IRQHandler ; int3
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000018 82v00u00u00 60 int _RTC_CSSLSE_IRQHandler ; int4
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00001C 82v00u00u00 61 int _EXTIE_F_PVD_IRQHandler ; int5
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000020 82v00u00u00 62 int _EXTIB_G_IRQHandler ; int6
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000024 82v00u00u00 63 int _EXTID_H_IRQHandler ; int7
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000028 82v00u00u00 64 int _EXTI0_IRQHandler ; int8
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00002C 82v00u00u00 65 int _EXTI1_IRQHandler ; int9
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000030 82v00u00u00 66 int _EXTI2_IRQHandler ; int10
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000034 82v00u00u00 67 int _EXTI3_IRQHandler ; int11
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000038 82v00u00u00 68 int _EXTI4_IRQHandler ; int12
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00003C 82v00u00u00 69 int _EXTI5_IRQHandler ; int13
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000040 82v00u00u00 70 int _EXTI6_IRQHandler ; int14
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000044 82v00u00u00 71 int _EXTI7_IRQHandler ; int15
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000048 82v00u00u00 72 int _LCD_AES_IRQHandler ; int16
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00004C 82v00u00u00 73 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
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000050 82v00u00u00 74 int _ADC1_COMP_IRQHandler ; int18
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000054 82v00u00u00 75 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
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000058 82v00u00u00 76 int _TIM2_CC_USART2_RX_IRQHandler ; int20
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00005C 82v00u00u00 77 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
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000060 82v00u00u00 78 int _TIM3_CC_USART3_RX_IRQHandler ; int22
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000064 82v00u00u00 79 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
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000068 82v00u00u00 80 int _TIM1_CC_IRQHandler ; int24
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00006C 82v00u00u00 81 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
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000070 82v00u00u00 82 int _SPI1_IRQHandler ; int26
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000074 82v00u00u00 83 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
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000078 82v00u00u00 84 int _USART1_RX_TIM5_CC_IRQHandler ; int28
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00007C 82v00u00u00 85 int _I2C1_SPI2_IRQHandler ; int29
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86 ;--------------------------------------------------------
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87 ; global & static initialisations
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88 ;--------------------------------------------------------
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89 .area HOME
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90 .area GSINIT
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91 .area GSFINAL
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92 .area GSINIT
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000000 CDr00r00 [ 4] 93 call ___sdcc_external_startup
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000003 4D [ 1] 94 tnz a
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000004 27 03 [ 1] 95 jreq __sdcc_init_data
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000006 CCr00r80 [ 2] 96 jp __sdcc_program_startup
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000009 97 __sdcc_init_data:
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98 ; stm8_genXINIT() start
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000009 AEr00r00 [ 2] 99 ldw x, #l_DATA
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00000C 27 07 [ 1] 100 jreq 00002$
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00000E 101 00001$:
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00000E 72 4FuFFuFF [ 1] 102 clr (s_DATA - 1, x)
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000012 5A [ 2] 103 decw x
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000013 26 F9 [ 1] 104 jrne 00001$
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000015 105 00002$:
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000015 AEr00r00 [ 2] 106 ldw x, #l_INITIALIZER
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000018 27 09 [ 1] 107 jreq 00004$
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00001A 108 00003$:
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00001A D6uFFuFF [ 1] 109 ld a, (s_INITIALIZER - 1, x)
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00001D D7uFFuFF [ 1] 110 ld (s_INITIALIZED - 1, x), a
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000020 5A [ 2] 111 decw x
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000021 26 F7 [ 1] 112 jrne 00003$
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000023 113 00004$:
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114 ; stm8_genXINIT() end
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115 .area GSFINAL
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000000 CCr00r80 [ 2] 116 jp __sdcc_program_startup
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117 ;--------------------------------------------------------
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118 ; Home
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119 ;--------------------------------------------------------
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120 .area HOME
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121 .area HOME
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000080 122 __sdcc_program_startup:
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000080 CCr00r00 [ 2] 123 jp _main
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124 ; return from main will return to caller
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125 ;--------------------------------------------------------
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126 ; code
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127 ;--------------------------------------------------------
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128 .area CODE
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129 ; ../src/main.c: 24: void main(void)
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130 ; -----------------------------------------
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131 ; function main
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132 ; -----------------------------------------
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000000 133 _main:
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134 ; ../src/main.c: 27: Led_Init;
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000000 4B C0 [ 1] 135 push #0xc0
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000002 A6 10 [ 1] 136 ld a, #0x10
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000004 AE 50 0A [ 2] 137 ldw x, #0x500a
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000007 CDr00r00 [ 4] 138 call _GPIO_Init
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139 ; ../src/main.c: 28: blink(1);
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00000A 5F [ 1] 140 clrw x
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00000B 5C [ 1] 141 incw x
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00000C CDr00r34 [ 4] 142 call _blink
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143 ; ../src/main.c: 29: USART_Config();
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00000F CDr00r98 [ 4] 144 call _USART_Config
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145 ; ../src/main.c: 30: println("Hello");
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000012 AEr00r00 [ 2] 146 ldw x, #(___str_0+0)
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000015 CDr00r90 [ 4] 147 call _println
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148 ; ../src/main.c: 31: while (1);
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000018 149 00102$:
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000018 20 FE [ 2] 150 jra 00102$
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151 ; ../src/main.c: 32: }
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00001A 81 [ 4] 152 ret
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153 ; ../src/main.c: 34: static void CLK_Config(void)
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154 ; -----------------------------------------
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155 ; function CLK_Config
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156 ; -----------------------------------------
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00001B 157 _CLK_Config:
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158 ; ../src/main.c: 37: CLK_SYSCLKSourceSwitchCmd(ENABLE);
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00001B A6 01 [ 1] 159 ld a, #0x01
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00001D CDr00r00 [ 4] 160 call _CLK_SYSCLKSourceSwitchCmd
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161 ; ../src/main.c: 38: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSE);
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000020 A6 08 [ 1] 162 ld a, #0x08
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000022 CDr00r00 [ 4] 163 call _CLK_SYSCLKSourceConfig
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164 ; ../src/main.c: 40: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
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000025 4F [ 1] 165 clr a
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000026 CDr00r00 [ 4] 166 call _CLK_SYSCLKDivConfig
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167 ; ../src/main.c: 41: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSE);
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000029 168 00101$:
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000029 CDr00r00 [ 4] 169 call _CLK_GetSYSCLKSource
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00002C A1 08 [ 1] 170 cp a, #0x08
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00002E 26 F9 [ 1] 171 jrne 00101$
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000030 81 [ 4] 172 ret
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000031 20 F6 [ 2] 173 jra 00101$
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174 ; ../src/main.c: 42: }
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000033 81 [ 4] 175 ret
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176 ; ../src/main.c: 44: static void blink(uint16_t repeats) {
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177 ; -----------------------------------------
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178 ; function blink
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179 ; -----------------------------------------
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000034 180 _blink:
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000034 52 04 [ 2] 181 sub sp, #4
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000036 1F 01 [ 2] 182 ldw (0x01, sp), x
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183 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
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000038 5F [ 1] 184 clrw x
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000039 1F 03 [ 2] 185 ldw (0x03, sp), x
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00003B 186 00111$:
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00003B 1E 03 [ 2] 187 ldw x, (0x03, sp)
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00003D 13 01 [ 2] 188 cpw x, (0x01, sp)
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00003F 22 31 [ 1] 189 jrugt 00113$
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190 ; ../src/main.c: 46: Led_ON;
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000041 A6 10 [ 1] 191 ld a, #0x10
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000043 AE 50 0A [ 2] 192 ldw x, #0x500a
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000046 CDr00r00 [ 4] 193 call _GPIO_SetBits
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194 ; ../src/main.c: 47: for (uint16_t j = 0; j <= 4000; j++) {nop();}
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000049 5F [ 1] 195 clrw x
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00004A 196 00105$:
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00004A 90 93 [ 1] 197 ldw y, x
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00004C 90 A3 0F A0 [ 2] 198 cpw y, #0x0fa0
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000050 22 04 [ 1] 199 jrugt 00101$
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000052 9D [ 1] 200 nop
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000053 5C [ 1] 201 incw x
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000054 20 F4 [ 2] 202 jra 00105$
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000056 203 00101$:
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204 ; ../src/main.c: 48: Led_OFF;
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000056 A6 10 [ 1] 205 ld a, #0x10
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000058 AE 50 0A [ 2] 206 ldw x, #0x500a
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00005B CDr00r00 [ 4] 207 call _GPIO_ResetBits
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208 ; ../src/main.c: 49: for (uint16_t j = 0; j <= 4000; j++) {nop();}
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00005E 5F [ 1] 209 clrw x
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00005F 210 00108$:
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00005F 90 93 [ 1] 211 ldw y, x
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000061 90 A3 0F A0 [ 2] 212 cpw y, #0x0fa0
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000065 22 04 [ 1] 213 jrugt 00112$
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000067 9D [ 1] 214 nop
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000068 5C [ 1] 215 incw x
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000069 20 F4 [ 2] 216 jra 00108$
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00006B 217 00112$:
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218 ; ../src/main.c: 45: for (uint16_t i = 0; i <= repeats; i++) {
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00006B 1E 03 [ 2] 219 ldw x, (0x03, sp)
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00006D 5C [ 1] 220 incw x
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00006E 1F 03 [ 2] 221 ldw (0x03, sp), x
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000070 20 C9 [ 2] 222 jra 00111$
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000072 223 00113$:
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224 ; ../src/main.c: 51: }
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000072 5B 04 [ 2] 225 addw sp, #4
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000074 81 [ 4] 226 ret
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227 ; ../src/main.c: 53: static void putchar(uint8_t Data) {
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228 ; -----------------------------------------
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229 ; function putchar
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230 ; -----------------------------------------
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000075 231 _putchar:
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232 ; ../src/main.c: 54: while (!(USART1->SR & USART_FLAG_TXE));
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000075 233 00101$:
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000075 AE 52 30 [ 2] 234 ldw x, #0x5230
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000078 88 [ 1] 235 push a
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000079 F6 [ 1] 236 ld a, (x)
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00007A 95 [ 1] 237 ld xh, a
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00007B 84 [ 1] 238 pop a
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00007C 5D [ 2] 239 tnzw x
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00007D 2A F6 [ 1] 240 jrpl 00101$
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241 ; ../src/main.c: 55: USART1->DR = Data;
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00007F C7 52 31 [ 1] 242 ld 0x5231, a
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243 ; ../src/main.c: 56: }
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000082 81 [ 4] 244 ret
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245 ; ../src/main.c: 58: static void print(const char* s){
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246 ; -----------------------------------------
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247 ; function print
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248 ; -----------------------------------------
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000083 249 _print:
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250 ; ../src/main.c: 59: while (*s) {
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000083 251 00101$:
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000083 F6 [ 1] 252 ld a, (x)
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000084 26 01 [ 1] 253 jrne 00121$
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000086 81 [ 4] 254 ret
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000087 255 00121$:
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256 ; ../src/main.c: 60: putchar(*s++);
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000087 5C [ 1] 257 incw x
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000088 89 [ 2] 258 pushw x
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000089 CDr00r75 [ 4] 259 call _putchar
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00008C 85 [ 2] 260 popw x
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00008D 20 F4 [ 2] 261 jra 00101$
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262 ; ../src/main.c: 62: }
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00008F 81 [ 4] 263 ret
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264 ; ../src/main.c: 64: static void println(const char* s){
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265 ; -----------------------------------------
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266 ; function println
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267 ; -----------------------------------------
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000090 268 _println:
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269 ; ../src/main.c: 65: print(s);
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000090 CDr00r83 [ 4] 270 call _print
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271 ; ../src/main.c: 66: putchar('\n');
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000093 A6 0A [ 1] 272 ld a, #0x0a
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273 ; ../src/main.c: 67: }
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000095 CCr00r75 [ 2] 274 jp _putchar
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275 ; ../src/main.c: 69: static void USART_Config(void)
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276 ; -----------------------------------------
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277 ; function USART_Config
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278 ; -----------------------------------------
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000098 279 _USART_Config:
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280 ; ../src/main.c: 72: SYSCFG->RMPCR1 &= ~(0b11 << 4);
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000098 C6 50 9E [ 1] 281 ld a, 0x509e
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00009B A4 CF [ 1] 282 and a, #0xcf
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00009D C7 50 9E [ 1] 283 ld 0x509e, a
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284 ; ../src/main.c: 73: SYSCFG->RMPCR1 |= (0b01 << 4);
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0000A0 72 18 50 9E [ 1] 285 bset 0x509e, #4
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286 ; ../src/main.c: 75: GPIO_Init(GPIOA, GPIO_Pin_2, GPIO_Mode_Out_PP_High_Fast);
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0000A4 4B F0 [ 1] 287 push #0xf0
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0000A6 A6 04 [ 1] 288 ld a, #0x04
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0000A8 AE 50 00 [ 2] 289 ldw x, #0x5000
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0000AB CDr00r00 [ 4] 290 call _GPIO_Init
|
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291 ; ../src/main.c: 76: GPIO_Init(GPIOA, GPIO_Pin_3, GPIO_Mode_In_FL_No_IT);
|
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0000AE 4B 00 [ 1] 292 push #0x00
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0000B0 A6 08 [ 1] 293 ld a, #0x08
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0000B2 AE 50 00 [ 2] 294 ldw x, #0x5000
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0000B5 CDr00r00 [ 4] 295 call _GPIO_Init
|
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296 ; ../src/main.c: 78: CLK_PeripheralClockConfig(CLK_Peripheral_USART1, ENABLE);
|
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0000B8 4B 01 [ 1] 297 push #0x01
|
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0000BA A6 05 [ 1] 298 ld a, #0x05
|
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0000BC CDr00r00 [ 4] 299 call _CLK_PeripheralClockConfig
|
||||
300 ; ../src/main.c: 80: USART_Init(USART1, (uint32_t)9600,
|
||||
0000BF 4B 08 [ 1] 301 push #0x08
|
||||
0000C1 4B 00 [ 1] 302 push #0x00
|
||||
0000C3 4B 00 [ 1] 303 push #0x00
|
||||
0000C5 4B 00 [ 1] 304 push #0x00
|
||||
0000C7 4B 80 [ 1] 305 push #0x80
|
||||
0000C9 4B 25 [ 1] 306 push #0x25
|
||||
0000CB 5F [ 1] 307 clrw x
|
||||
0000CC 89 [ 2] 308 pushw x
|
||||
0000CD AE 52 30 [ 2] 309 ldw x, #0x5230
|
||||
0000D0 CDr00r00 [ 4] 310 call _USART_Init
|
||||
311 ; ../src/main.c: 83: USART_Cmd(USART1, ENABLE);
|
||||
0000D3 A6 01 [ 1] 312 ld a, #0x01
|
||||
0000D5 AE 52 30 [ 2] 313 ldw x, #0x5230
|
||||
314 ; ../src/main.c: 84: }
|
||||
0000D8 CCr00r00 [ 2] 315 jp _USART_Cmd
|
||||
316 .area CODE
|
||||
317 .area CONST
|
||||
318 .area CONST
|
||||
000000 319 ___str_0:
|
||||
000000 48 65 6C 6C 6F 320 .ascii "Hello"
|
||||
000005 00 321 .db 0x00
|
||||
322 .area CODE
|
||||
323 .area INITIALIZER
|
||||
324 .area CABS (ABS)
|
||||
11 .globl _RTC_ITConfig
|
||||
12 .globl _RTC_WakeUpCmd
|
||||
13 .globl _RTC_SetWakeUpCounter
|
||||
14 .globl _RTC_WakeUpClockConfig
|
||||
15 .globl _GPIO_ResetBits
|
||||
16 .globl _GPIO_SetBits
|
||||
17 .globl _GPIO_Init
|
||||
18 .globl _CLK_PeripheralClockConfig
|
||||
19 .globl _CLK_RTCClockConfig
|
||||
20 .globl _CLK_SYSCLKSourceSwitchCmd
|
||||
21 .globl _CLK_SYSCLKDivConfig
|
||||
22 .globl _CLK_GetSYSCLKSource
|
||||
23 .globl _CLK_SYSCLKSourceConfig
|
||||
24 ;--------------------------------------------------------
|
||||
25 ; ram data
|
||||
26 ;--------------------------------------------------------
|
||||
27 .area DATA
|
||||
28 ;--------------------------------------------------------
|
||||
29 ; ram data
|
||||
30 ;--------------------------------------------------------
|
||||
31 .area INITIALIZED
|
||||
32 ;--------------------------------------------------------
|
||||
33 ; Stack segment in internal ram
|
||||
34 ;--------------------------------------------------------
|
||||
35 .area SSEG
|
||||
000000 36 __start__stack:
|
||||
000000 37 .ds 1
|
||||
38
|
||||
39 ;--------------------------------------------------------
|
||||
40 ; absolute external ram data
|
||||
41 ;--------------------------------------------------------
|
||||
42 .area DABS (ABS)
|
||||
43
|
||||
44 ; default segment ordering for linker
|
||||
45 .area HOME
|
||||
46 .area GSINIT
|
||||
47 .area GSFINAL
|
||||
48 .area CONST
|
||||
49 .area INITIALIZER
|
||||
50 .area CODE
|
||||
51
|
||||
52 ;--------------------------------------------------------
|
||||
53 ; interrupt vector
|
||||
54 ;--------------------------------------------------------
|
||||
55 .area HOME
|
||||
000000 56 __interrupt_vect:
|
||||
000000 82v00u00u00 57 int s_GSINIT ; reset
|
||||
000004 82v00u00u00 58 int _TRAP_IRQHandler ; trap
|
||||
000008 82 00 00 00 59 int 0x000000 ; int0
|
||||
00000C 82v00u00u00 60 int _FLASH_IRQHandler ; int1
|
||||
000010 82v00u00u00 61 int _DMA1_CHANNEL0_1_IRQHandler ; int2
|
||||
000014 82v00u00u00 62 int _DMA1_CHANNEL2_3_IRQHandler ; int3
|
||||
000018 82v00u00u00 63 int _RTC_CSSLSE_IRQHandler ; int4
|
||||
00001C 82v00u00u00 64 int _EXTIE_F_PVD_IRQHandler ; int5
|
||||
000020 82v00u00u00 65 int _EXTIB_G_IRQHandler ; int6
|
||||
000024 82v00u00u00 66 int _EXTID_H_IRQHandler ; int7
|
||||
000028 82v00u00u00 67 int _EXTI0_IRQHandler ; int8
|
||||
00002C 82v00u00u00 68 int _EXTI1_IRQHandler ; int9
|
||||
000030 82v00u00u00 69 int _EXTI2_IRQHandler ; int10
|
||||
000034 82v00u00u00 70 int _EXTI3_IRQHandler ; int11
|
||||
000038 82v00u00u00 71 int _EXTI4_IRQHandler ; int12
|
||||
00003C 82v00u00u00 72 int _EXTI5_IRQHandler ; int13
|
||||
000040 82v00u00u00 73 int _EXTI6_IRQHandler ; int14
|
||||
000044 82v00u00u00 74 int _EXTI7_IRQHandler ; int15
|
||||
000048 82v00u00u00 75 int _LCD_AES_IRQHandler ; int16
|
||||
00004C 82v00u00u00 76 int _SWITCH_CSS_BREAK_DAC_IRQHandler ; int17
|
||||
000050 82v00u00u00 77 int _ADC1_COMP_IRQHandler ; int18
|
||||
000054 82v00u00u00 78 int _TIM2_UPD_OVF_TRG_BRK_USART2_TX_IRQHandler ; int19
|
||||
000058 82v00u00u00 79 int _TIM2_CC_USART2_RX_IRQHandler ; int20
|
||||
00005C 82v00u00u00 80 int _TIM3_UPD_OVF_TRG_BRK_USART3_TX_IRQHandler ; int21
|
||||
000060 82v00u00u00 81 int _TIM3_CC_USART3_RX_IRQHandler ; int22
|
||||
000064 82v00u00u00 82 int _TIM1_UPD_OVF_TRG_COM_IRQHandler ; int23
|
||||
000068 82v00u00u00 83 int _TIM1_CC_IRQHandler ; int24
|
||||
00006C 82v00u00u00 84 int _TIM4_UPD_OVF_TRG_IRQHandler ; int25
|
||||
000070 82v00u00u00 85 int _SPI1_IRQHandler ; int26
|
||||
000074 82v00u00u00 86 int _USART1_TX_TIM5_UPD_OVF_TRG_BRK_IRQHandler ; int27
|
||||
000078 82v00u00u00 87 int _USART1_RX_TIM5_CC_IRQHandler ; int28
|
||||
00007C 82v00u00u00 88 int _I2C1_SPI2_IRQHandler ; int29
|
||||
89 ;--------------------------------------------------------
|
||||
90 ; global & static initialisations
|
||||
91 ;--------------------------------------------------------
|
||||
92 .area HOME
|
||||
93 .area GSINIT
|
||||
94 .area GSFINAL
|
||||
95 .area GSINIT
|
||||
000000 CDr00r00 [ 4] 96 call ___sdcc_external_startup
|
||||
000003 4D [ 1] 97 tnz a
|
||||
000004 27 03 [ 1] 98 jreq __sdcc_init_data
|
||||
000006 CCr00r80 [ 2] 99 jp __sdcc_program_startup
|
||||
000009 100 __sdcc_init_data:
|
||||
101 ; stm8_genXINIT() start
|
||||
000009 AEr00r00 [ 2] 102 ldw x, #l_DATA
|
||||
00000C 27 07 [ 1] 103 jreq 00002$
|
||||
00000E 104 00001$:
|
||||
00000E 72 4FuFFuFF [ 1] 105 clr (s_DATA - 1, x)
|
||||
000012 5A [ 2] 106 decw x
|
||||
000013 26 F9 [ 1] 107 jrne 00001$
|
||||
000015 108 00002$:
|
||||
000015 AEr00r00 [ 2] 109 ldw x, #l_INITIALIZER
|
||||
000018 27 09 [ 1] 110 jreq 00004$
|
||||
00001A 111 00003$:
|
||||
00001A D6uFFuFF [ 1] 112 ld a, (s_INITIALIZER - 1, x)
|
||||
00001D D7uFFuFF [ 1] 113 ld (s_INITIALIZED - 1, x), a
|
||||
000020 5A [ 2] 114 decw x
|
||||
000021 26 F7 [ 1] 115 jrne 00003$
|
||||
000023 116 00004$:
|
||||
117 ; stm8_genXINIT() end
|
||||
118 .area GSFINAL
|
||||
000000 CCr00r80 [ 2] 119 jp __sdcc_program_startup
|
||||
120 ;--------------------------------------------------------
|
||||
121 ; Home
|
||||
122 ;--------------------------------------------------------
|
||||
123 .area HOME
|
||||
124 .area HOME
|
||||
000080 125 __sdcc_program_startup:
|
||||
000080 CCr00r00 [ 2] 126 jp _main
|
||||
127 ; return from main will return to caller
|
||||
128 ;--------------------------------------------------------
|
||||
129 ; code
|
||||
130 ;--------------------------------------------------------
|
||||
131 .area CODE
|
||||
132 ; ../src/main.c: 28: void main(void)
|
||||
133 ; -----------------------------------------
|
||||
134 ; function main
|
||||
135 ; -----------------------------------------
|
||||
000000 136 _main:
|
||||
137 ; ../src/main.c: 30: GPIO_Init(GPIOB, GPIO_Pin_2, GPIO_Mode_Out_PP_Low_Fast);
|
||||
000000 4B E0 [ 1] 138 push #0xe0
|
||||
000002 A6 04 [ 1] 139 ld a, #0x04
|
||||
000004 AE 50 05 [ 2] 140 ldw x, #0x5005
|
||||
000007 CDr00r00 [ 4] 141 call _GPIO_Init
|
||||
142 ; ../src/main.c: 33: CLK_Config();
|
||||
00000A CDr00r6A [ 4] 143 call _CLK_Config
|
||||
144 ; ../src/main.c: 34: PWR_Config();
|
||||
00000D CDr00r59 [ 4] 145 call _PWR_Config
|
||||
146 ; ../src/main.c: 35: Led2_Init;
|
||||
000010 4B E0 [ 1] 147 push #0xe0
|
||||
000012 A6 04 [ 1] 148 ld a, #0x04
|
||||
000014 AE 50 05 [ 2] 149 ldw x, #0x5005
|
||||
000017 CDr00r00 [ 4] 150 call _GPIO_Init
|
||||
151 ; ../src/main.c: 36: Mono_Init;
|
||||
00001A 4B D0 [ 1] 152 push #0xd0
|
||||
00001C A6 01 [ 1] 153 ld a, #0x01
|
||||
00001E AE 50 05 [ 2] 154 ldw x, #0x5005
|
||||
000021 CDr00r00 [ 4] 155 call _GPIO_Init
|
||||
156 ; ../src/main.c: 37: blink2();
|
||||
000024 CDr00r83 [ 4] 157 call _blink2
|
||||
158 ; ../src/main.c: 41: CLK_RTCClockConfig(CLK_RTCCLKSource_LSE, CLK_RTCCLKDiv_1);
|
||||
000027 4B 00 [ 1] 159 push #0x00
|
||||
000029 A6 10 [ 1] 160 ld a, #0x10
|
||||
00002B CDr00r00 [ 4] 161 call _CLK_RTCClockConfig
|
||||
162 ; ../src/main.c: 42: CLK_PeripheralClockConfig(CLK_Peripheral_RTC, ENABLE);
|
||||
00002E 4B 01 [ 1] 163 push #0x01
|
||||
000030 A6 12 [ 1] 164 ld a, #0x12
|
||||
000032 CDr00r00 [ 4] 165 call _CLK_PeripheralClockConfig
|
||||
166 ; ../src/main.c: 45: RTC_WakeUpCmd(DISABLE);
|
||||
000035 4F [ 1] 167 clr a
|
||||
000036 CDr00r00 [ 4] 168 call _RTC_WakeUpCmd
|
||||
169 ; ../src/main.c: 46: RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div2);
|
||||
000039 A6 03 [ 1] 170 ld a, #0x03
|
||||
00003B CDr00r00 [ 4] 171 call _RTC_WakeUpClockConfig
|
||||
172 ; ../src/main.c: 47: RTC_SetWakeUpCounter(250);
|
||||
00003E AE 00 FA [ 2] 173 ldw x, #0x00fa
|
||||
000041 CDr00r00 [ 4] 174 call _RTC_SetWakeUpCounter
|
||||
175 ; ../src/main.c: 48: RTC_WakeUpCmd(ENABLE);
|
||||
000044 A6 01 [ 1] 176 ld a, #0x01
|
||||
000046 CDr00r00 [ 4] 177 call _RTC_WakeUpCmd
|
||||
178 ; ../src/main.c: 50: RTC_ITConfig(RTC_IT_WUT, ENABLE);
|
||||
000049 A6 01 [ 1] 179 ld a, #0x01
|
||||
00004B AE 00 40 [ 2] 180 ldw x, #0x0040
|
||||
00004E CDr00r00 [ 4] 181 call _RTC_ITConfig
|
||||
182 ; ../src/main.c: 52: enableInterrupts();
|
||||
000051 9A [ 1] 183 rim
|
||||
184 ; ../src/main.c: 53: while (1){
|
||||
000052 185 00102$:
|
||||
186 ; ../src/main.c: 54: blink2();
|
||||
000052 CDr00r83 [ 4] 187 call _blink2
|
||||
188 ; ../src/main.c: 55: halt();
|
||||
000055 8E [10] 189 halt
|
||||
000056 20 FA [ 2] 190 jra 00102$
|
||||
191 ; ../src/main.c: 57: }
|
||||
000058 81 [ 4] 192 ret
|
||||
193 ; ../src/main.c: 59: static void PWR_Config(void){
|
||||
194 ; -----------------------------------------
|
||||
195 ; function PWR_Config
|
||||
196 ; -----------------------------------------
|
||||
000059 197 _PWR_Config:
|
||||
198 ; ../src/main.c: 60: PWR->CSR1 = PWR_CSR1_PVDIF;
|
||||
000059 35 20 50 B2 [ 1] 199 mov 0x50b2+0, #0x20
|
||||
200 ; ../src/main.c: 61: PWR->CSR2 = PWR_CSR2_RESET_VALUE;
|
||||
00005D 35 00 50 B3 [ 1] 201 mov 0x50b3+0, #0x00
|
||||
202 ; ../src/main.c: 62: PWR->CSR2 |= PWR_CSR2_ULP;
|
||||
000061 72 12 50 B3 [ 1] 203 bset 0x50b3, #1
|
||||
204 ; ../src/main.c: 63: PWR->CSR2 |= PWR_CSR2_FWU;
|
||||
000065 72 14 50 B3 [ 1] 205 bset 0x50b3, #2
|
||||
206 ; ../src/main.c: 64: }
|
||||
000069 81 [ 4] 207 ret
|
||||
208 ; ../src/main.c: 66: static void CLK_Config(void)
|
||||
209 ; -----------------------------------------
|
||||
210 ; function CLK_Config
|
||||
211 ; -----------------------------------------
|
||||
00006A 212 _CLK_Config:
|
||||
213 ; ../src/main.c: 68: CLK_SYSCLKSourceSwitchCmd(ENABLE);
|
||||
00006A A6 01 [ 1] 214 ld a, #0x01
|
||||
00006C CDr00r00 [ 4] 215 call _CLK_SYSCLKSourceSwitchCmd
|
||||
216 ; ../src/main.c: 69: CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_LSI);
|
||||
00006F A6 02 [ 1] 217 ld a, #0x02
|
||||
000071 CDr00r00 [ 4] 218 call _CLK_SYSCLKSourceConfig
|
||||
219 ; ../src/main.c: 70: CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_1);
|
||||
000074 4F [ 1] 220 clr a
|
||||
000075 CDr00r00 [ 4] 221 call _CLK_SYSCLKDivConfig
|
||||
222 ; ../src/main.c: 71: while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_LSI);
|
||||
000078 223 00101$:
|
||||
000078 CDr00r00 [ 4] 224 call _CLK_GetSYSCLKSource
|
||||
00007B A1 02 [ 1] 225 cp a, #0x02
|
||||
00007D 26 F9 [ 1] 226 jrne 00101$
|
||||
00007F 81 [ 4] 227 ret
|
||||
000080 20 F6 [ 2] 228 jra 00101$
|
||||
229 ; ../src/main.c: 72: }
|
||||
000082 81 [ 4] 230 ret
|
||||
231 ; ../src/main.c: 85: static void blink2() {
|
||||
232 ; -----------------------------------------
|
||||
233 ; function blink2
|
||||
234 ; -----------------------------------------
|
||||
000083 235 _blink2:
|
||||
236 ; ../src/main.c: 86: Mono_ON;
|
||||
000083 A6 01 [ 1] 237 ld a, #0x01
|
||||
000085 AE 50 05 [ 2] 238 ldw x, #0x5005
|
||||
000088 CDr00r00 [ 4] 239 call _GPIO_ResetBits
|
||||
240 ; ../src/main.c: 87: Led2_ON;
|
||||
00008B A6 04 [ 1] 241 ld a, #0x04
|
||||
00008D AE 50 05 [ 2] 242 ldw x, #0x5005
|
||||
000090 CDr00r00 [ 4] 243 call _GPIO_SetBits
|
||||
244 ; ../src/main.c: 88: Led2_OFF;
|
||||
000093 A6 04 [ 1] 245 ld a, #0x04
|
||||
000095 AE 50 05 [ 2] 246 ldw x, #0x5005
|
||||
000098 CDr00r00 [ 4] 247 call _GPIO_ResetBits
|
||||
248 ; ../src/main.c: 89: Mono_OFF;
|
||||
00009B A6 01 [ 1] 249 ld a, #0x01
|
||||
00009D AE 50 05 [ 2] 250 ldw x, #0x5005
|
||||
251 ; ../src/main.c: 90: }
|
||||
0000A0 CCr00r00 [ 2] 252 jp _GPIO_SetBits
|
||||
253 .area CODE
|
||||
254 .area CONST
|
||||
255 .area INITIALIZER
|
||||
256 .area CABS (ABS)
|
||||
|
||||
Reference in New Issue
Block a user