v0 ordered

.gitignore

@@ -11,13 +11,13 @@
 *.kicad_prl
 *.sch-bak
 *~
-*.kicad_pcb.lck
 _autosave-*
 *.tmp
 *-save.pro
 *-save.kicad_pcb
 fp-info-cache
-*-backups/
+~*.lck
+\#auto_saved_files#
 
 # Netlist files (exported from Eeschema)
 *.net
@@ -28,17 +28,4 @@ fp-info-cache
 
 # Exported BOM files
 *.xml
-*.csv
-
-# gitignore template for LTspice
-# website: https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html
-
-# Logfile
-*.log
-
-# Simulation Outputs
-*.raw
-*.fft
-
-# Netlist
-*.net
+*.csv