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ORDERED. swap nano for pro mini, smaller changes

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This commit is contained in:
Joseph Hopfmüller
2023-02-20 00:54:56 +01:00
parent 004c0e3c34
commit bb5491d617
23 changed files with 61309 additions and 4930 deletions
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267
electronics/gerber/led_testjig-F_Paste.gbr Normal file
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@@ -0,0 +1,267 @@
%TF.GenerationSoftware,KiCad,Pcbnew,(7.0.0)*%
%TF.CreationDate,2023-02-20T00:43:47+01:00*%
%TF.ProjectId,led_testjig,6c65645f-7465-4737-946a-69672e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Paste,Top*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (7.0.0)) date 2023-02-20 00:43:47*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
G04 Aperture macros list*
%AMRoundRect*
0 Rectangle with rounded corners*
0 $1 Rounding radius*
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
0 Add a 4 corners polygon primitive as box body*
4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
0 Add four circle primitives for the rounded corners*
1,1,$1+$1,$2,$3*
1,1,$1+$1,$4,$5*
1,1,$1+$1,$6,$7*
1,1,$1+$1,$8,$9*
0 Add four rect primitives between the rounded corners*
20,1,$1+$1,$2,$3,$4,$5,0*
20,1,$1+$1,$4,$5,$6,$7,0*
20,1,$1+$1,$6,$7,$8,$9,0*
20,1,$1+$1,$8,$9,$2,$3,0*%
G04 Aperture macros list end*
%ADD10RoundRect,0.250000X0.337500X0.475000X-0.337500X0.475000X-0.337500X-0.475000X0.337500X-0.475000X0*%
%ADD11RoundRect,0.150000X0.512500X0.150000X-0.512500X0.150000X-0.512500X-0.150000X0.512500X-0.150000X0*%
%ADD12RoundRect,0.250000X-0.475000X0.337500X-0.475000X-0.337500X0.475000X-0.337500X0.475000X0.337500X0*%
%ADD13RoundRect,0.250000X0.350000X0.450000X-0.350000X0.450000X-0.350000X-0.450000X0.350000X-0.450000X0*%
%ADD14RoundRect,0.250000X-0.450000X0.350000X-0.450000X-0.350000X0.450000X-0.350000X0.450000X0.350000X0*%
%ADD15RoundRect,0.250000X0.450000X-0.350000X0.450000X0.350000X-0.450000X0.350000X-0.450000X-0.350000X0*%
%ADD16RoundRect,0.200000X0.200000X0.600000X-0.200000X0.600000X-0.200000X-0.600000X0.200000X-0.600000X0*%
%ADD17RoundRect,0.250001X0.799999X1.249999X-0.799999X1.249999X-0.799999X-1.249999X0.799999X-1.249999X0*%
%ADD18RoundRect,0.150000X-0.825000X-0.150000X0.825000X-0.150000X0.825000X0.150000X-0.825000X0.150000X0*%
%ADD19R,1.600000X3.500000*%
%ADD20RoundRect,0.150000X-0.150000X0.512500X-0.150000X-0.512500X0.150000X-0.512500X0.150000X0.512500X0*%
%ADD21RoundRect,0.250000X-0.337500X-0.475000X0.337500X-0.475000X0.337500X0.475000X-0.337500X0.475000X0*%
%ADD22RoundRect,0.250000X-0.350000X-0.450000X0.350000X-0.450000X0.350000X0.450000X-0.350000X0.450000X0*%
%ADD23RoundRect,0.200000X0.250000X0.200000X-0.250000X0.200000X-0.250000X-0.200000X0.250000X-0.200000X0*%
%ADD24RoundRect,0.150000X-0.150000X0.825000X-0.150000X-0.825000X0.150000X-0.825000X0.150000X0.825000X0*%
G04 APERTURE END LIST*
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M02*

5683
electronics/gerber/led_testjig-F_Silkscreen.gbr Normal file
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20
electronics/gerber/led_testjig-NPTH.drl Normal file
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electronics/gerber/led_testjig-PTH.drl Normal file
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127
electronics/gerber/led_testjig-job.gbrjob Normal file
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{
"Header": {
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"Application": "Pcbnew",
"Version": "(7.0.0)"
},
"CreationDate": "2023-02-20T00:43:47+01:00"
},
"GeneralSpecs": {
"ProjectId": {
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"GUID": "6c65645f-7465-4737-946a-69672e6b6963",
"Revision": "rev?"
},
"Size": {
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"Y": 60.1
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"BoardThickness": 1.6,
"Finish": "None"
},
"DesignRules": [
{
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"TrackToRegion": 0.25,
"RegionToRegion": 0.25
}
],
"FilesAttributes": [
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},
{
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"FilePolarity": "Positive"
},
{
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},
{
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},
{
"Path": "led_testjig-B_Silkscreen.gbr",
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{
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},
{
"Path": "led_testjig-B_Mask.gbr",
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},
{
"Path": "led_testjig-Edge_Cuts.gbr",
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}
],
"MaterialStackup": [
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},
{
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},
{
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{
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{
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},
{
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"Name": "B.Cu"
},
{
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},
{
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"Name": "Bottom Solder Paste"
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{
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1339
electronics/input.kicad_sch
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26665
electronics/led_testjig.kicad_pcb
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247
electronics/led_testjig.kicad_pro
View File

@@ -1,29 +1,200 @@
{ {
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"silk_over_copper": "warning",
"silk_overlap": "warning",
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"starved_thermal": "error",
"text_height": "warning",
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"tracks_crossing": "error",
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"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": { "rules": {
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"min_connection": 0.127,
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"use_height_for_length_calcs": true
}, },
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"td_onviapad": true
}
],
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{
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}, },
"boards": [], "boards": [],
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@@ -207,18 +378,23 @@
"rule_severities": { "rule_severities": {
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"bus_entry_needed": "error", "bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error", "bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error", "bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error", "different_unit_footprint": "error",
"different_unit_net": "error", "different_unit_net": "error",
"duplicate_reference": "error", "duplicate_reference": "error",
"duplicate_sheet_names": "error", "duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error", "extra_units": "error",
"global_label_dangling": "warning", "global_label_dangling": "warning",
"hier_label_mismatch": "error", "hier_label_mismatch": "error",
"label_dangling": "error", "label_dangling": "error",
"lib_symbol_issues": "warning", "lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning", "multiple_net_names": "warning",
"net_not_bus_member": "warning", "net_not_bus_member": "warning",
"no_connect_connected": "warning", "no_connect_connected": "warning",
@@ -228,6 +404,7 @@
"pin_to_pin": "warning", "pin_to_pin": "warning",
"power_pin_not_driven": "error", "power_pin_not_driven": "error",
"similar_labels": "warning", "similar_labels": "warning",
"simulation_model_issue": "error",
"unannotated": "error", "unannotated": "error",
"unit_value_mismatch": "error", "unit_value_mismatch": "error",
"unresolved_variable": "error", "unresolved_variable": "error",
@@ -245,7 +422,7 @@
"net_settings": { "net_settings": {
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{ {
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"clearance": 0.2, "clearance": 0.2,
"diff_pair_gap": 0.25, "diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25, "diff_pair_via_gap": 0.25,
@@ -257,15 +434,47 @@
"pcb_color": "rgba(0, 0, 0, 0.000)", "pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25, "track_width": 0.25,
"via_diameter": 0.8, "via_diameter": 0.5,
"via_drill": 0.4, "via_drill": 0.2,
"wire_width": 6.0 "wire_width": 6
},
{
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"clearance": 0.25,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Power",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 1.0,
"via_diameter": 1.0,
"via_drill": 0.5,
"wire_width": 6
} }
], ],
"meta": { "meta": {
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}, },
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"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "Power",
"pattern": "+*"
},
{
"netclass": "Power",
"pattern": "GND"
},
{
"netclass": "Power",
"pattern": "/power/L5"
}
]
}, },
"pcbnew": { "pcbnew": {
"last_paths": { "last_paths": {
@@ -281,6 +490,8 @@
"schematic": { "schematic": {
"annotate_start_num": 0, "annotate_start_num": 0,
"drawing": { "drawing": {
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"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0, "default_line_thickness": 6.0,
"default_text_size": 50.0, "default_text_size": 50.0,
"field_names": [], "field_names": [],
@@ -312,7 +523,11 @@
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electronics/led_testjig.kicad_sch
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11
electronics/led_testjig_AR-Check.txt Normal file
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AR checking written on:
'C:\Users\Joseph\Nextcloud\Meine Daten\Basteln\KiCAD\led-efficiency-measurement\electronics\led_testjig_AR-Check.txt'
'action_menu_annular_check.py'
version = 1.7.2
Testing PCB for Annular Rings
TH Pads >= 0.125 Vias >= 0.125
PHD margin on PTH = 0
VIAS that Pass = 0; Fails = 0
TH PADS that Pass = 74; Fails = 0
NPTH PADS that Pass = 0; Fails = 0

816
electronics/levelshift.kicad_sch Normal file
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electronics/mcu.kicad_sch
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electronics/sim/current source discrete.asc
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@@ -5,14 +5,23 @@ WIRE -16 -16 -64 -16
WIRE 32 -16 -16 -16 WIRE 32 -16 -16 -16
WIRE 160 -16 112 -16 WIRE 160 -16 112 -16
WIRE 240 -16 160 -16 WIRE 240 -16 160 -16
WIRE 416 64 368 64
WIRE -16 96 -16 -16 WIRE -16 96 -16 -16
WIRE 0 96 -16 96 WIRE 0 96 -16 96
WIRE 352 112 64 112 WIRE 416 96 416 64
WIRE 448 96 448 48
WIRE 448 96 416 96
WIRE 304 112 64 112
WIRE 352 112 304 112
WIRE 0 128 -16 128 WIRE 0 128 -16 128
WIRE 448 160 416 160 WIRE 432 128 416 128
WIRE 416 192 416 160 WIRE 416 160 416 128
WIRE 528 224 528 160 WIRE 416 160 368 160
WIRE 528 224 160 224 WIRE 432 160 432 128
WIRE 496 160 432 160
WIRE 432 192 432 160
WIRE 576 224 576 160
WIRE 576 224 160 224
WIRE -144 256 -192 256 WIRE -144 256 -192 256
WIRE -16 256 -16 128 WIRE -16 256 -16 128
WIRE -16 256 -64 256 WIRE -16 256 -64 256
@@ -20,8 +29,8 @@ WIRE 32 256 -16 256
WIRE 160 256 160 224 WIRE 160 256 160 224
WIRE 160 256 112 256 WIRE 160 256 112 256
WIRE 240 272 240 -16 WIRE 240 272 240 -16
WIRE 416 272 240 272 WIRE 432 272 240 272
WIRE 512 272 416 272 WIRE 512 272 432 272
WIRE 544 272 512 272 WIRE 544 272 512 272
FLAG 64 144 0 FLAG 64 144 0
FLAG -192 -16 vin FLAG -192 -16 vin
@@ -33,25 +42,20 @@ FLAG -624 -272 vsup
FLAG 64 80 vsup FLAG 64 80 vsup
FLAG -608 96 0 FLAG -608 96 0
FLAG -608 16 vin FLAG -608 16 vin
FLAG 416 64 vsup FLAG 448 48 vsup
FLAG -16 256 1 FLAG -16 256 1
FLAG 160 256 2 FLAG 160 256 2
FLAG -16 -16 3 FLAG -16 -16 3
FLAG 160 -16 4 FLAG 160 -16 4
SYMBOL AutoGenerated\\TL081 32 112 R0
SYMATTR InstName U1
SYMBOL res -48 240 R90 SYMBOL res -48 240 R90
WINDOW 0 0 56 VBottom 2 WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2 WINDOW 3 32 56 VTop 2
SYMATTR InstName R2 SYMATTR InstName R2
SYMATTR Value 25k SYMATTR Value 25k
SYMBOL npn 352 64 R0 SYMBOL res 416 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 400 176 R0
SYMATTR InstName R5 SYMATTR InstName R5
SYMATTR Value 330 SYMATTR Value 330
SYMBOL res 544 144 R90 SYMBOL res 592 144 R90
WINDOW 0 0 56 VBottom 2 WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2 WINDOW 3 32 56 VTop 2
SYMATTR InstName R6 SYMATTR InstName R6
@@ -84,6 +88,11 @@ WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2 WINDOW 3 32 56 VTop 2
SYMATTR InstName R4 SYMATTR InstName R4
SYMATTR Value 25k SYMATTR Value 25k
SYMBOL AutoGenerated\\TL081 32 112 R0
SYMATTR InstName U1
SYMBOL npn 304 64 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
TEXT -656 520 Left 2 !.meas TRAN i_diode AVG I(D1)/V(vin) FROM .3m to .35m TEXT -656 520 Left 2 !.meas TRAN i_diode AVG I(D1)/V(vin) FROM .3m to .35m
TEXT -656 544 Left 2 !.param tol=0.01 TEXT -656 544 Left 2 !.param tol=0.01
TEXT -656 448 Left 2 !.tran 0 3.3 1p startup TEXT -656 448 Left 2 !.tran 0 3.3 1p startup