44 lines
926 B
Plaintext
44 lines
926 B
Plaintext
Version 4
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SHEET 1 880 680
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WIRE 32 64 -64 64
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WIRE 48 64 32 64
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WIRE 336 64 304 64
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WIRE -64 80 -64 64
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WIRE 32 144 32 64
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WIRE 48 144 32 144
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WIRE 336 144 304 144
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WIRE -64 176 -64 160
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WIRE 320 224 304 224
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WIRE 384 224 320 224
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WIRE 496 224 384 224
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WIRE 384 240 384 224
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WIRE 496 240 496 224
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WIRE 48 304 32 304
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WIRE 320 304 320 224
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WIRE 320 304 304 304
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WIRE 384 336 384 304
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WIRE 496 336 496 320
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FLAG 384 336 0
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FLAG 32 304 0
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FLAG -64 176 0
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FLAG 496 336 0
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FLAG 496 224 OUT
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FLAG -64 64 IN
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SYMBOL ind 320 48 R0
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SYMATTR InstName L1
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SYMATTR Value 1.5µ
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SYMATTR SpiceLine Rser=80m
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SYMBOL cap 368 240 R0
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SYMATTR InstName C1
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SYMATTR Value 10µ
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SYMBOL voltage -64 64 R0
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SYMATTR InstName V1
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SYMATTR Value 3.3
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SYMBOL res 480 224 R0
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SYMATTR InstName Rload
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SYMATTR Value 50
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SYMBOL ADP2504-3.5 176 176 R0
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SYMATTR InstName U1
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TEXT 432 376 Left 2 !.tran 400u startup
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TEXT 192 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
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