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LTSpiceXVII/examples/jigs/ADP1740-2.5.asc
Joseph Hopfmüller 1d8dca1c6c initial commit
2023-01-23 08:17:09 +01:00

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Version 4
SHEET 1 1048 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 528 32 496 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 80 96 80 32
WIRE 96 96 80 96
WIRE -128 144 -128 128
WIRE 416 144 416 112
WIRE 528 144 528 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 368 240 368 32
WIRE 368 240 352 240
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 528 144 0
FLAG 416 144 0
FLAG 496 32 OUT
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.25
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7ľ
SYMATTR SpiceLine Rser=3m
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADP1740-2.5 224 128 R0
SYMATTR InstName U1
TEXT 128 352 Left 2 !.tran 10m startup