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LTSpiceXVII/examples/jigs/4686-1.asc
Joseph Hopfmüller 1d8dca1c6c initial commit
2023-01-23 08:17:09 +01:00

134 lines
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Version 4
SHEET 1 3884 1188
WIRE 1616 -368 1104 -368
WIRE 1744 -368 1616 -368
WIRE 1872 -368 1744 -368
WIRE 1104 -352 1104 -368
WIRE 1744 -352 1744 -368
WIRE 1008 -256 896 -256
WIRE 1232 -256 1008 -256
WIRE 1840 -256 1232 -256
WIRE 896 -240 896 -256
WIRE 1104 -240 1104 -272
WIRE 1232 -240 1232 -256
WIRE 1616 -240 1616 -368
WIRE 1744 -240 1744 -272
WIRE 1008 -176 1008 -256
WIRE 1024 -176 1008 -176
WIRE 1840 -176 1840 -256
WIRE 1840 -176 1824 -176
WIRE 896 -144 896 -160
WIRE 800 16 672 16
WIRE 912 16 800 16
WIRE 1008 16 912 16
WIRE 1024 16 1008 16
WIRE 1840 16 1824 16
WIRE 1920 16 1840 16
WIRE 2016 16 1920 16
WIRE 2144 16 2016 16
WIRE 672 32 672 16
WIRE 800 32 800 16
WIRE 912 32 912 16
WIRE 1920 32 1920 16
WIRE 2016 32 2016 16
WIRE 2144 32 2144 16
WIRE 1008 112 1008 16
WIRE 1024 112 1008 112
WIRE 1840 112 1840 16
WIRE 1840 112 1824 112
WIRE 672 128 672 112
WIRE 800 128 800 96
WIRE 912 128 912 96
WIRE 1920 128 1920 96
WIRE 2016 128 2016 96
WIRE 2144 128 2144 112
WIRE 1024 304 1008 304
WIRE 1840 304 1824 304
WIRE 1008 400 1008 304
WIRE 1024 400 1008 400
WIRE 928 496 912 496
WIRE 1024 496 1008 496
WIRE 1840 496 1824 496
WIRE 1024 592 992 592
WIRE 1840 592 1840 496
WIRE 1840 592 1824 592
WIRE 1104 672 1104 656
WIRE 1232 672 1232 656
WIRE 1488 672 1488 656
WIRE 1104 768 1104 752
WIRE 1872 768 1872 -368
WIRE 1872 768 1104 768
FLAG 896 -144 0
FLAG 672 128 0
FLAG 672 16 OUT1
FLAG 912 128 0
FLAG 800 128 0
FLAG 896 -256 IN
FLAG 912 496 0
FLAG 992 592 0
FLAG 1232 672 0
FLAG 1488 672 0
FLAG 2144 128 0
FLAG 2144 16 OUT0
FLAG 1920 128 0
FLAG 2016 128 0
FLAG 1840 304 0
SYMBOL voltage 896 -256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL polcap 896 32 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 330ľ
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=5 Rser=0.01 Lser=0 mfg="KEMET" pn="T530D337M006ASE010" type="Tantalum"
SYMBOL res 656 16 R0
SYMATTR InstName Rload1
SYMATTR Value .18
SYMBOL cap 784 32 R0
WINDOW 123 28 61 Left 2
WINDOW 3 39 36 Left 2
SYMATTR Value2 x3
SYMATTR Value 100ľ
SYMATTR InstName C2
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
SYMBOL res 1024 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 6.34K
SYMBOL polcap 1904 32 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 330ľ
SYMATTR InstName C3
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=5 Rser=0.01 Lser=0 mfg="KEMET" pn="T530D337M006ASE010" type="Tantalum"
SYMBOL res 2128 16 R0
SYMATTR InstName Rload0
SYMATTR Value .1
SYMBOL cap 2000 32 R0
WINDOW 123 28 65 Left 2
WINDOW 3 38 34 Left 2
SYMATTR Value2 x3
SYMATTR Value 100ľ
SYMATTR InstName C4
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
SYMBOL res 1088 656 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 1728 -368 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 1088 -368 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL PowerProducts\\LTM4686-1 1424 208 R0
SYMATTR InstName U1
SYMATTR SpiceLine Vout_0=1 Vout_1=1.8 Ilim0_range=1 Ilim1_range=1 OC_limit0=1 OC_limit1=1 Mode_ll=2 Fault_response=0 Retry_delay=.1m
TEXT 1928 640 Left 2 !.tran 1.2m startup
TEXT 2256 -352 Left 2 ;Please read the following notes carefully, since the model presents different user interface\nthan the real part does.\n \n(1) All PMBus communication and memory address related functions and pins are not modeled. \n \n(2) Changes to all parameter values during the simulation running will not be in effect, unless the\nsimulation is stopped and restarted. This is different from the operation of the part, which will\n respond to the commanded changes while running. \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time related parameters.\n \n(4) The following parameters can be defined, by right-clicking the symbol of LTM4675. Different \nnomenclature from the datasheet is adopted here. If any value of these parameters are set beyond \nthe scope discribed in the datasheet, the resulting simulation outcomes are not meaningful.\n \n VIN_ON & VIN_OFF -- in volts, set the unit start/stop input voltages;\n Freq -- in Hz, sets switching frequency as one of values of 250K, 350K, \n 425K, 500K, 575K, 650K, 750K, 1000K. FREQ_CFG pin needs to float \n (or short to VDD25), to make the value be in effect;\n PHs_0 & PHs_1 -- in degree, set phase angle related to SYNC signal. \n Certain combinations are restricted as in datasheet. FREQ_CFG \n pin needs to float (or short to VDD25), to make the value be in effect;\n Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n channel0 and channel1. Initialization time is not modeled;\n Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n channel0 and channel1;\n Vout_0 & Vout_1 -- in volt, set output voltages respectively;\n Vout0_range & Vout1_range -- set maximum output range, with value 0\n for 2.5V; value 1 for 3.6V\n Ilim0_range & Ilim1_range -- set maximum sensed peak current range, with value 0\n for low and 1 for high;\n OC_limit0 & OC_limit1 -- set ratio of peak current limit to the maximum value defined\n by Ilimit_range. It must be one of values: 0.5, 0.572, 0.642, \n 0.714, 0.786, 0.858, 0.928, 1;\n Mode_II -- sets light load operation mode: 0 for discontinuous, 2 for forced continuous;\n Fault_response -- sets the response mode of the unit to occuring faults:\n 0 for ignore, 1 for latch up, 2 for Hiccup after Retry_delay time;\n Retry_delay -- in sec, sets the timer before the unit turns on after a fault;