146 lines
6.3 KiB
Plaintext
146 lines
6.3 KiB
Plaintext
Version 4
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SHEET 1 3884 1188
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WIRE 1616 -464 1104 -464
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WIRE 1744 -464 1616 -464
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WIRE 1872 -464 1744 -464
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WIRE 1104 -448 1104 -464
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WIRE 1744 -448 1744 -464
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WIRE 1008 -352 896 -352
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WIRE 1232 -352 1008 -352
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WIRE 1840 -352 1232 -352
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WIRE 896 -336 896 -352
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WIRE 1104 -336 1104 -368
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WIRE 1232 -336 1232 -352
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WIRE 1616 -336 1616 -464
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WIRE 1744 -336 1744 -368
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WIRE 1008 -272 1008 -352
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WIRE 1024 -272 1008 -272
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WIRE 1840 -272 1840 -352
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WIRE 1840 -272 1824 -272
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WIRE 896 -240 896 -256
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WIRE 800 16 672 16
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WIRE 912 16 800 16
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WIRE 992 16 912 16
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WIRE 1024 16 992 16
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WIRE 1856 16 1824 16
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WIRE 1920 16 1856 16
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WIRE 2016 16 1920 16
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WIRE 2144 16 2016 16
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WIRE 672 32 672 16
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WIRE 800 32 800 16
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WIRE 912 32 912 16
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WIRE 1920 32 1920 16
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WIRE 2016 32 2016 16
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WIRE 2144 32 2144 16
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WIRE 1024 112 1008 112
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WIRE 1840 112 1824 112
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WIRE 672 128 672 112
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WIRE 800 128 800 96
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WIRE 912 128 912 96
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WIRE 1920 128 1920 96
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WIRE 2016 128 2016 96
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WIRE 2144 128 2144 112
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WIRE 1008 208 1008 112
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WIRE 1024 208 1008 208
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WIRE 1840 208 1840 112
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WIRE 1840 208 1824 208
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WIRE 1024 304 1008 304
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WIRE 1840 304 1824 304
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WIRE 1008 400 1008 304
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WIRE 1024 400 1008 400
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WIRE 1840 400 1840 304
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WIRE 1840 400 1824 400
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WIRE 992 496 992 16
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WIRE 1024 496 992 496
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WIRE 1856 496 1856 16
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WIRE 1856 496 1824 496
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WIRE 1024 688 1008 688
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WIRE 1840 688 1824 688
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WIRE 1008 784 1008 688
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WIRE 1024 784 1008 784
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WIRE 928 880 912 880
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WIRE 1024 880 1008 880
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WIRE 1840 880 1824 880
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WIRE 1024 976 992 976
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WIRE 1840 976 1840 880
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WIRE 1840 976 1824 976
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WIRE 1104 1056 1104 1040
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WIRE 1232 1056 1232 1040
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WIRE 1488 1056 1488 1040
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WIRE 1104 1152 1104 1136
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WIRE 1872 1152 1872 -464
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WIRE 1872 1152 1104 1152
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FLAG 896 -240 0
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FLAG 672 128 0
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FLAG 672 16 OUT1
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FLAG 912 128 0
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FLAG 800 128 0
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FLAG 896 -352 IN
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FLAG 912 880 0
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FLAG 992 976 0
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FLAG 1232 1056 0
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FLAG 1488 1056 0
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FLAG 2144 128 0
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FLAG 2144 16 OUT0
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FLAG 1920 128 0
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FLAG 2016 128 0
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FLAG 1840 688 0
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SYMBOL voltage 896 -352 R0
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WINDOW 123 0 0 Left 2
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WINDOW 39 0 0 Left 2
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SYMATTR InstName V1
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SYMATTR Value 16
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SYMBOL polcap 896 32 R0
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WINDOW 3 24 56 Left 2
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SYMATTR Value 330ľ
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SYMATTR InstName C1
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SYMATTR Description Capacitor
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SYMATTR Type cap
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SYMATTR SpiceLine V=6.3 Irms=5 Rser=0.01 Lser=0 mfg="KEMET" pn="T530D337M006ASE010" type="Tantalum"
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SYMBOL res 656 16 R0
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SYMATTR InstName Rload1
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SYMATTR Value .138
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SYMBOL cap 784 32 R0
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WINDOW 123 28 61 Left 2
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WINDOW 3 39 36 Left 2
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SYMATTR Value2 x3
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SYMATTR Value 100ľ
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SYMATTR InstName C2
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SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
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SYMBOL res 1024 864 R90
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WINDOW 0 0 56 VBottom 2
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WINDOW 3 32 56 VTop 2
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SYMATTR InstName R1
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SYMATTR Value 6.34K
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SYMBOL polcap 1904 32 R0
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WINDOW 3 24 56 Left 2
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SYMATTR Value 330ľ
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SYMATTR InstName C3
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SYMATTR Description Capacitor
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SYMATTR Type cap
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SYMATTR SpiceLine V=6.3 Irms=5 Rser=0.01 Lser=0 mfg="KEMET" pn="T530D337M006ASE010" type="Tantalum"
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SYMBOL res 2128 16 R0
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SYMATTR InstName Rload0
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SYMATTR Value .077
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SYMBOL cap 2000 32 R0
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WINDOW 123 28 65 Left 2
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WINDOW 3 38 34 Left 2
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SYMATTR Value2 x3
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SYMATTR Value 100ľ
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SYMATTR InstName C4
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SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
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SYMBOL res 1088 1040 R0
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SYMATTR InstName R2
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SYMATTR Value 10K
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SYMBOL res 1728 -464 R0
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SYMATTR InstName R3
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SYMATTR Value 10K
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SYMBOL res 1088 -464 R0
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SYMATTR InstName R4
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SYMATTR Value 10K
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SYMBOL PowerProducts\\LTM4676 1424 352 R0
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SYMATTR InstName U1
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SYMATTR SpiceLine VIN_ON=5.5 VIN_OFF=5 Vout_0=1 Vout_1=1.8 Ilim0_range=1 Ilim1_range=1 OC_limit0=1 OC_limit1=1 Mode_ll=2 Fault_response=0 Retry_delay=.1m
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TEXT 1928 640 Left 2 !.tran 1.5m startup
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TEXT 2288 -192 Left 2 ;Please read the following notes carefully, since the model presents different user interface\nthan the real part does.\n \n(1) All PMBus communication and memory address related functions and pins are not modeled. \n \n(2) Changes to all parameter values during the simulation running will not be in effect, unless the\nsimulation is stopped and restarted. This is different from the operation of the part, which will\n respond to the commanded changes while running. \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time related parameters.\n \n(4) The following parameters can be defined, by right-clicking the symbol of LTM4676. Different \nnomenclature from the datasheet is adopted here. If any value of these parameters are set beyond \nthe scope discribed in the datasheet, the resulting simulation outcomes are not meaningful.\n \n VIN_ON & VIN_OFF -- in volts, set the unit start/stop input voltages;\n Freq -- in Hz, sets switching frequency as one of values of 250K, 350K, \n 425K, 500K, 575K, 650K, 750K, 1000K. FREQ_CFG pin needs to float \n (or short to VDD25), to make the value be in effect;\n PHs_0 & PHs_1 -- in degree, set phase angle related to SYNC signal. \n Certain combinations are restricted as in datasheet. FREQ_CFG \n pin needs to float (or short to VDD25), to make the value be in effect;\n Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n channel0 and channel1. Initialization time is not modeled;\n Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n channel0 and channel1;\n Vout_0 & Vout_1 -- in volt, set output voltages respectively;\n Vout0_range & Vout1_range -- set maximum output range, with value 0\n for 4.096V (CH0) and 5.5V (CH1); value 1\n for 2.75V\n Ilim0_range & Ilim1_range -- set maximum sensed peak current range, with value 0\n for low 50mV, and 1 for high 75mV;\n OC_limit0 & OC_limit1 -- set ratio of peak current limit to the maximum value defined\n by Ilimit_range. It must be one of values: 0.5, 0.572, 0.642, \n 0.714, 0.786, 0.858, 0.928, 1;\n Mode_II -- sets light load operation mode: 0 for discontinuous, 1 for Burst,\n 2 for forced continuous;\n Fault_response -- sets the response mode of the unit to occuring faults:\n 0 for ignore, 1 for latch up, 2 for Hiccup after Retry_delay time;\n Retry_delay -- in sec, sets the timer before the unit turns on after a fault;
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