Files
LTSpiceXVII/examples/jigs/1764-2.5.asc
Joseph Hopfmüller 1d8dca1c6c initial commit
2023-01-23 08:17:09 +01:00

39 lines
768 B
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Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 560 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 560 64 560 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 560 160 560 144
WIRE 160 240 160 208
FLAG -224 160 0
FLAG 384 160 0
FLAG 560 160 0
FLAG 160 240 0
FLAG 560 48 OUT
FLAG -224 48 IN
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10u
SYMATTR SpiceLine Rser=100m
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1764-2.5 160 96 R0
SYMATTR InstName U1
TEXT 368 224 Left 2 !.tran 1