Files
LTSpiceXVII/examples/jigs/1761-2.5.asc
Joseph Hopfmüller 1d8dca1c6c initial commit
2023-01-23 08:17:09 +01:00

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807 B
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Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG 512 48 OUT
FLAG -224 48 IN
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10ľ
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01ľ
SYMBOL PowerProducts\\LT1761-2.5 160 96 R0
SYMATTR InstName U1
TEXT 360 224 Left 2 !.tran 1