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LTSpiceXVII/examples/jigs/1844-2.5.asc
Joseph Hopfmüller 1d8dca1c6c initial commit
2023-01-23 08:17:09 +01:00

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Version 4
SHEET 1 1940 1316
WIRE 32 80 -112 80
WIRE 64 80 32 80
WIRE 416 80 352 80
WIRE -112 96 -112 80
WIRE 416 96 416 80
WIRE -112 192 -112 176
WIRE 416 192 416 176
WIRE 32 240 32 80
WIRE 64 240 32 240
WIRE 208 304 208 288
FLAG 208 304 0
FLAG -112 192 0
FLAG 416 192 0
FLAG 416 80 OUT
FLAG -112 80 IN
SYMBOL voltage -112 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 416 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 31 74 Left 2
WINDOW 3 40 39 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
SYMBOL LTC1844-2.5 208 160 R0
SYMATTR InstName U1
TEXT 600 120 Left 2 !.dc v1 5 2 10m
TEXT 600 208 Left 2 !.measure DC vdrop WHEN V(out)=2.4\n.measure DC dropout param Vdrop-2.4
TEXT 600 160 Left 2 !.param iload=150m