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LTSpiceXVII/examples/jigs/1844-1.5.asc
Joseph Hopfmüller 1d8dca1c6c initial commit
2023-01-23 08:17:09 +01:00

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Version 4
SHEET 1 1940 1316
WIRE 64 80 -48 80
WIRE 80 80 64 80
WIRE 464 80 368 80
WIRE -48 96 -48 80
WIRE 464 96 464 80
WIRE -48 192 -48 176
WIRE 464 192 464 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -48 192 0
FLAG 464 192 0
FLAG 464 80 OUT
FLAG -48 80 IN
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 464 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 25 81 Left 2
WINDOW 3 36 48 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
SYMBOL LTC1844-1.5 224 160 R0
SYMATTR InstName U1
TEXT 648 120 Left 2 !.dc v1 5 0 10m
TEXT 648 208 Left 2 !.measure DC vdrop WHEN V(out)=1.4\n.measure DC dropout param Vdrop-1.4
TEXT 648 160 Left 2 !.param iload=150m