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LTSpiceXVII/examples/jigs/1173-5.asc
Joseph Hopfmüller 1d8dca1c6c initial commit
2023-01-23 08:17:09 +01:00

55 lines
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Version 4
SHEET 1 2528 1408
WIRE 1472 912 1328 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1888 912 1856 912
WIRE 1984 912 1888 912
WIRE 1328 928 1328 912
WIRE 1984 928 1984 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1328 1024 1328 1008
WIRE 1984 1024 1984 1008
WIRE 1744 1040 1744 912
WIRE 1744 1040 1664 1040
WIRE 1888 1104 1888 912
WIRE 1888 1104 1664 1104
WIRE 1888 1120 1888 1104
WIRE 1696 1168 1664 1168
WIRE 1888 1200 1888 1184
WIRE 1536 1264 1536 1248
FLAG 1536 1264 0
FLAG 1696 1168 0
FLAG 1984 1024 0
FLAG 1888 1200 0
FLAG 1328 1024 0
FLAG 1984 912 OUT
FLAG 1328 912 IN
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100ľ
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 1872 1120 R0
SYMATTR InstName C2
SYMATTR Value 100ľ
SYMATTR SpiceLine Rser=0.02
SYMBOL VOLTAGE 1328 912 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL PowerProducts\\LT1173-5 1536 1104 R0
SYMATTR InstName U1
SYMBOL res 1968 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
TEXT 1712 1248 Left 2 !.tran 10m startup