initial commit

lib/sym/Switches/ADG633.asy

@@ -0,0 +1,53 @@
+Version 4
+SymbolType CELL
+LINE Normal 37 -48 96 -48
+LINE Normal -96 -16 -21 -16
+LINE Normal -64 48 -96 48
+LINE Normal -64 64 -64 32
+LINE Normal -32 48 -64 32
+LINE Normal -64 64 -32 48
+LINE Normal -21 -80 -96 -80
+LINE Normal 0 48 -32 48 2
+LINE Normal 0 0 0 48 2
+LINE Normal -17 -75 27 -48
+RECTANGLE Normal -96 -144 96 160
+CIRCLE Normal 27 -43 37 -53
+CIRCLE Normal -48 0 48 -96 2
+CIRCLE Normal -21 -11 -11 -21
+CIRCLE Normal -21 -75 -11 -85
+TEXT 0 80 Center 2 ADI
+TEXT -80 -80 Bottom 2 SA
+TEXT -80 -16 Bottom 2 SB
+TEXT 80 -48 Bottom 2 D
+TEXT -80 48 Bottom 2 IN
+WINDOW 0 64 -144 Bottom 2
+WINDOW 3 0 112 Center 2
+SYMATTR Value ADG633
+SYMATTR Prefix X
+SYMATTR SpiceModel ADG633.sub
+SYMATTR Value2 ADG633
+SYMATTR Description CMOS, <20>5 V/+5 V/+3 V, Triple SPDT Switch (Switch shown for a logic 0 input)(Charge injection is not modelled)
+PIN -96 48 NONE 8
+PINATTR PinName IN
+PINATTR SpiceOrder 1
+PIN -96 -80 NONE 8
+PINATTR PinName SA
+PINATTR SpiceOrder 2
+PIN 96 -48 NONE 8
+PINATTR PinName D
+PINATTR SpiceOrder 3
+PIN -96 -16 NONE 8
+PINATTR PinName SB
+PINATTR SpiceOrder 4
+PIN 0 -144 TOP 8
+PINATTR PinName Vdd
+PINATTR SpiceOrder 5
+PIN 64 160 BOTTOM 8
+PINATTR PinName GND
+PINATTR SpiceOrder 6
+PIN 96 48 RIGHT 8
+PINATTR PinName _EN
+PINATTR SpiceOrder 7
+PIN -64 160 BOTTOM 8
+PINATTR PinName Vss
+PINATTR SpiceOrder 8