initial commit

lib/sym/PowerProducts/LTM9100.asy

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+Version 4
+SymbolType CELL
+LINE Normal -288 192 -288 -160
+LINE Normal -256 192 -256 -160
+RECTANGLE Normal -400 -160 400 192
+TEXT 0 0 Center 2 LT
+TEXT -270 17 VCenter 2 ISOLATION BARRIER
+WINDOW 3 0 -41 Center 2
+WINDOW 0 0 41 Center 2
+WINDOW 123 0 96 Center 2
+SYMATTR Value LTM9100
+SYMATTR Value2 OVRTRY=1 UVRTRY=1 OCRTRY=0
+SYMATTR Prefix X
+SYMATTR Description Anyside Isolated Switch Controller with I2C Command and Telemetry
+SYMATTR ModelFile LTM9100.sub
+PIN -400 112 LEFT 8
+PINATTR PinName _PG
+PINATTR SpiceOrder 1
+PIN -400 64 LEFT 8
+PINATTR PinName _ALERT
+PINATTR SpiceOrder 2
+PIN -400 16 LEFT 8
+PINATTR PinName EN
+PINATTR SpiceOrder 3
+PIN -400 -32 LEFT 8
+PINATTR PinName ON
+PINATTR SpiceOrder 6
+PIN -400 -80 LEFT 8
+PINATTR PinName VL
+PINATTR SpiceOrder 7
+PIN -400 -128 LEFT 8
+PINATTR PinName Vcc
+PINATTR SpiceOrder 8
+PIN -400 160 LEFT 8
+PINATTR PinName GND
+PINATTR SpiceOrder 9
+PIN 288 -160 TOP 8
+PINATTR PinName _PG2
+PINATTR SpiceOrder 10
+PIN 192 -160 TOP 8
+PINATTR PinName _ALERT2
+PINATTR SpiceOrder 11
+PIN 96 -160 TOP 8
+PINATTR PinName EN2
+PINATTR SpiceOrder 12
+PIN 0 -160 TOP 8
+PINATTR PinName PGIO
+PINATTR SpiceOrder 15
+PIN -96 -160 TOP 8
+PINATTR PinName VS
+PINATTR SpiceOrder 16
+PIN -192 192 BOTTOM 8
+PINATTR PinName Vee
+PINATTR SpiceOrder 17
+PIN 192 192 BOTTOM 8
+PINATTR PinName SS
+PINATTR SpiceOrder 19
+PIN 0 192 BOTTOM 8
+PINATTR PinName TMR
+PINATTR SpiceOrder 20
+PIN -192 -160 TOP 8
+PINATTR PinName Vcc2
+PINATTR SpiceOrder 21
+PIN 400 160 RIGHT 8
+PINATTR PinName Sense+
+PINATTR SpiceOrder 22
+PIN 400 112 RIGHT 8
+PINATTR PinName Gate
+PINATTR SpiceOrder 23
+PIN 400 64 RIGHT 8
+PINATTR PinName Drain
+PINATTR SpiceOrder 24
+PIN 400 16 RIGHT 8
+PINATTR PinName Ramp
+PINATTR SpiceOrder 25
+PIN 400 -32 RIGHT 8
+PINATTR PinName OV
+PINATTR SpiceOrder 26
+PIN 400 -80 RIGHT 8
+PINATTR PinName UVH
+PINATTR SpiceOrder 27
+PIN 400 -128 RIGHT 8
+PINATTR PinName UVL
+PINATTR SpiceOrder 28