initial commit

lib/sym/Digital/or.asy

@@ -0,0 +1,41 @@
+Version 4
+SymbolType CELL
+LINE Normal -32 32 -28 32
+LINE Normal -32 96 -28 96
+LINE Normal 12 48 32 48
+LINE Normal -32 80 -24 80
+LINE Normal -32 64 -20 64
+LINE Normal -32 48 -24 48
+CIRCLE Normal 32 88 16 72
+ARC Normal -132 8 -20 120 -32 96 -32 32
+ARC Normal -80 -12 28 96 -28 96 24 64
+ARC Normal -80 32 28 140 24 64 -28 32
+WINDOW 0 -8 8 Left 2
+WINDOW 3 -8 128 Left 2
+SYMATTR Prefix A
+SYMATTR SpiceModel OR
+SYMATTR Description Behavioral OR gate with complementary outputs
+PIN -32 32 NONE 0
+PINATTR PinName a
+PINATTR SpiceOrder 1
+PIN -32 48 NONE 0
+PINATTR PinName b
+PINATTR SpiceOrder 2
+PIN -32 64 NONE 0
+PINATTR PinName c
+PINATTR SpiceOrder 3
+PIN -32 80 NONE 0
+PINATTR PinName d
+PINATTR SpiceOrder 4
+PIN -32 96 NONE 0
+PINATTR PinName e
+PINATTR SpiceOrder 5
+PIN 32 80 NONE 0
+PINATTR PinName _Q
+PINATTR SpiceOrder 6
+PIN 32 48 NONE 0
+PINATTR PinName Q
+PINATTR SpiceOrder 7
+PIN -16 96 NONE 0
+PINATTR PinName com
+PINATTR SpiceOrder 8