initial commit
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29
lib/sym/DAC/AD5672R.asy
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29
lib/sym/DAC/AD5672R.asy
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Version 4
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SymbolType CELL
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LINE Normal -160 144 -160 -144
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LINE Normal 96 144 -160 144
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LINE Normal 209 -1 96 144
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LINE Normal 96 -144 209 -1
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LINE Normal -160 -144 96 -144
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TEXT 0 0 Center 2 ADI
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WINDOW 0 0 -48 Center 2
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WINDOW 3 4 42 Center 2
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WINDOW 39 3 74 Center 1
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SYMATTR Value AD5672R
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SYMATTR SpiceLine Gain=2
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SYMATTR Prefix X
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SYMATTR Value2 AD5672R
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SYMATTR Description 16-Channel, 16Bit nanaDAC+ (one channel, output stage modeled)
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SYMATTR ModelFile AD5672R.sub
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PIN -160 0 LEFT 8
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PINATTR PinName Vdac
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PINATTR SpiceOrder 1
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PIN -32 -144 TOP 8
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PINATTR PinName Vdd
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PINATTR SpiceOrder 2
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PIN -32 144 BOTTOM 8
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PINATTR PinName GND
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PINATTR SpiceOrder 3
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PIN 208 0 RIGHT 8
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PINATTR PinName Vout
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PINATTR SpiceOrder 4
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