initial commit

examples/jigs/ADP7104.asc

@@ -0,0 +1,56 @@
+Version 4
+SHEET 1 1048 680
+WIRE 80 32 -16 32
+WIRE 96 32 80 32
+WIRE 400 32 352 32
+WIRE 528 32 480 32
+WIRE -16 48 -16 32
+WIRE 400 128 352 128
+WIRE 528 128 528 32
+WIRE 528 128 400 128
+WIRE 608 128 528 128
+WIRE 624 128 608 128
+WIRE -16 144 -16 128
+WIRE 528 144 528 128
+WIRE 80 224 80 32
+WIRE 96 224 80 224
+WIRE 400 224 400 208
+WIRE 400 224 352 224
+WIRE 528 224 528 208
+WIRE 624 224 624 208
+WIRE 400 240 400 224
+WIRE 224 304 224 288
+WIRE 400 336 400 320
+FLAG 224 304 0
+FLAG -16 144 0
+FLAG -16 32 IN
+FLAG 624 224 0
+FLAG 528 224 0
+FLAG 608 128 OUT
+FLAG 400 336 0
+SYMBOL voltage -16 32 R0
+WINDOW 123 0 0 Left 0
+WINDOW 39 0 0 Left 0
+SYMATTR InstName V1
+SYMATTR Value 4.3
+SYMBOL res 608 112 R0
+SYMATTR InstName Rload
+SYMATTR Value 12
+SYMBOL cap 512 144 R0
+SYMATTR InstName C1
+SYMATTR Value 2.2<EFBFBD>
+SYMATTR SpiceLine Rser=3m
+SYMBOL res 384 112 R0
+SYMATTR InstName R1
+SYMATTR Value 17.4k
+SYMBOL res 384 224 R0
+SYMATTR InstName R2
+SYMATTR Value 10K
+SYMBOL res 496 16 R90
+WINDOW 0 0 56 VBottom 2
+WINDOW 3 32 56 VTop 2
+SYMATTR InstName R3
+SYMATTR Value 100k
+SYMBOL ADP7104 224 128 R0
+SYMATTR InstName U1
+TEXT 512 304 Left 2 !.tran 3m startup