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This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
11733 changed files with 1219458 additions and 0 deletions
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34
examples/jigs/ADP172-2.1.asc Normal file
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Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1<>
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 7.06
SYMBOL ADP172-2.1 160 192 R0
SYMATTR InstName U1
TEXT 160 256 Center 2 !.tran 2m startup