initial commit

examples/jigs/7103.asc

@@ -0,0 +1,67 @@
+Version 4
+SHEET 1 6140 3124
+WIRE 608 -192 496 -192
+WIRE 624 -192 608 -192
+WIRE 1040 -192 1008 -192
+WIRE 1152 -192 1120 -192
+WIRE 1280 -192 1152 -192
+WIRE 496 -176 496 -192
+WIRE 1280 -176 1280 -192
+WIRE 608 -112 608 -192
+WIRE 624 -112 608 -112
+WIRE 1040 -112 1008 -112
+WIRE 1152 -112 1152 -192
+WIRE 1152 -112 1040 -112
+WIRE 1152 -96 1152 -112
+WIRE 496 -80 496 -96
+WIRE 1280 -80 1280 -96
+WIRE 624 -32 608 -32
+WIRE 1040 -32 1040 -112
+WIRE 1040 -32 1008 -32
+WIRE 1152 -16 1152 -32
+WIRE 624 48 608 48
+WIRE 1072 48 1008 48
+WIRE 1072 128 1072 48
+WIRE 1072 128 1008 128
+WIRE 1072 144 1072 128
+WIRE 1072 224 1072 208
+WIRE 624 288 608 288
+WIRE 1024 288 1008 288
+WIRE 688 400 688 384
+WIRE 816 400 816 384
+FLAG 496 -80 0
+FLAG 496 -192 IN
+FLAG 1280 -192 OUT
+FLAG 608 -32 0
+FLAG 608 288 0
+FLAG 1280 -80 0
+FLAG 1152 -16 0
+FLAG 688 400 0
+FLAG 816 400 0
+FLAG 1024 288 0
+FLAG 1072 224 0
+FLAG 608 48 0
+SYMBOL ind 1024 -176 R270
+WINDOW 0 32 56 VTop 2
+WINDOW 3 5 56 VBottom 2
+SYMATTR InstName L1
+SYMATTR Value 18<31>
+SYMATTR SpiceLine Rser=5m
+SYMBOL cap 1136 -96 R0
+SYMATTR Value 100<30>
+SYMATTR SpiceLine Rser=15m
+SYMATTR InstName C1
+SYMBOL voltage 496 -192 R0
+SYMATTR InstName V1
+SYMATTR Value 50
+SYMBOL res 1264 -192 R0
+SYMATTR InstName Rload
+SYMATTR Value 5
+SYMBOL LTC7103 816 48 R0
+SYMATTR InstName U1
+SYMBOL cap 1056 144 R0
+SYMATTR Value 1<>
+SYMATTR SpiceLine Rser=20m
+SYMATTR Value2 IC=0
+SYMATTR InstName C6
+TEXT 1152 336 Left 2 !.tran 1.8m startup