seppl/LTSpiceXVII
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This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
11733 changed files with 1219458 additions and 0 deletions
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examples/jigs/6658-5.asc Normal file
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Version 4
SHEET 1 1448 1048
WIRE 16 -16 -336 -16
WIRE 128 -16 16 -16
WIRE 224 -16 128 -16
WIRE 320 -16 224 -16
WIRE -336 0 -336 -16
WIRE 128 0 128 -16
WIRE 224 0 224 -16
WIRE 320 0 320 -16
WIRE 432 64 416 64
WIRE 496 64 432 64
WIRE 496 80 496 64
WIRE -336 96 -336 80
WIRE 432 144 432 64
WIRE 432 144 416 144
WIRE 496 160 496 144
WIRE 16 192 16 -16
WIRE 48 192 16 192
WIRE 432 224 416 224
WIRE 480 224 432 224
WIRE 480 240 480 224
WIRE 432 304 432 224
WIRE 432 304 416 304
WIRE 480 320 480 304
WIRE 128 400 128 384
WIRE 224 400 224 384
WIRE 320 400 320 384
WIRE 224 480 224 464
FLAG 128 400 0
FLAG 224 480 0
FLAG -336 96 0
FLAG 496 160 0
FLAG 480 320 0
FLAG 480 224 OUT1
FLAG 496 64 OUT2
FLAG -336 -16 IN
SYMBOL cap 208 400 R0
SYMATTR InstName C1
SYMATTR Value 1<>
SYMBOL voltage -336 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +2u 7.5)
SYMBOL cap 480 80 R0
SYMATTR InstName C2
SYMATTR Value 1<>
SYMBOL cap 464 240 R0
SYMATTR InstName C3
SYMATTR Value 1<>
SYMBOL LT6658-5 224 192 R0
SYMATTR InstName U2
TEXT 464 464 Left 2 !.tran 500u