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This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
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examples/jigs/3225-1.asc Normal file
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Version 4
SHEET 1 1068 680
WIRE 112 0 16 0
WIRE 240 0 112 0
WIRE 240 16 240 0
WIRE 16 32 16 0
WIRE 112 80 112 0
WIRE 128 80 112 80
WIRE 400 80 352 80
WIRE 400 96 400 80
WIRE 16 144 16 112
WIRE 400 176 400 160
WIRE 400 176 352 176
WIRE 128 272 112 272
WIRE 400 272 352 272
WIRE 400 288 400 272
WIRE 32 368 16 368
WIRE 128 368 112 368
WIRE 400 368 400 352
WIRE 400 368 352 368
WIRE 400 384 400 368
WIRE 240 448 240 432
WIRE 400 464 400 448
FLAG 240 448 0
FLAG 16 144 0
FLAG 400 464 0
FLAG 16 368 0
FLAG 112 272 0
FLAG 16 0 IN
FLAG 400 272 OUT
SYMBOL voltage 16 16 R0
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL cap 384 96 R0
SYMATTR InstName C1
SYMATTR Value 1<>
SYMBOL cap 384 288 R0
SYMATTR InstName C2
SYMATTR Value .1m ic=1.5
SYMBOL cap 384 384 R0
SYMATTR InstName C3
SYMATTR Value .3m ic=1.2
SYMBOL res 128 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 12K
SYMBOL PowerProducts\\LTC3225-1 240 224 R0
SYMATTR InstName U1
TEXT 552 456 Left 2 !.tran 2m startup
TEXT -72 472 Left 2 ;Note: \n1. To emulate the supercapacitor charging process within acceptable \ntime interval, the capcitance is scaled down from its real value;\n2. Load capcitor initial condion can be given to represent the specific \nresidual voltage at the beginning of the charging.