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This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
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examples/jigs/1790-3.asc Normal file
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Version 4
SHEET 1 880 680
WIRE 32 48 -208 48
WIRE 352 48 288 48
WIRE 448 48 352 48
WIRE -208 64 -208 48
WIRE 352 64 352 48
WIRE 448 64 448 48
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 448 160 448 144
WIRE 160 176 160 160
FLAG -208 160 0
FLAG 352 160 0
FLAG 448 160 0
FLAG 160 176 0
FLAG 448 48 OUT
FLAG -208 48 IN
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 336 64 R0
SYMATTR InstName C1
SYMATTR Value 1<>
SYMBOL res 432 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1790-3 160 48 R0
SYMATTR InstName U1
TEXT 232 200 Left 2 !.tran 1