seppl/LTSpiceXVII
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This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
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examples/jigs/1716.asc Normal file
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Version 4
SHEET 1 880 800
WIRE 208 256 208 224
WIRE 176 272 -320 272
WIRE -320 288 -320 272
WIRE 336 288 240 288
WIRE -448 304 -448 288
WIRE 176 304 64 304
WIRE 64 320 64 304
WIRE 208 336 208 320
WIRE -448 400 -448 384
WIRE -320 400 -320 368
WIRE 64 416 64 400
FLAG -448 400 0
FLAG -448 288 +V
FLAG 208 224 +V
FLAG -320 400 0
FLAG 64 416 0
FLAG 208 336 0
SYMBOL voltage -448 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -320 272 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL voltage 64 304 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL Comparators\\LT1716 208 288 R0
SYMATTR InstName U1
TEXT 168 416 Left 2 !.tran 3m