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This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
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examples/jigs/1574-5.asc Normal file
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Version 4
SHEET 1 1492 912
WIRE 480 528 368 528
WIRE 624 528 480 528
WIRE 368 544 368 528
WIRE 624 544 624 528
WIRE 480 608 480 528
WIRE 496 608 480 608
WIRE 784 608 752 608
WIRE 896 608 864 608
WIRE 992 608 896 608
WIRE 992 624 992 608
WIRE 368 640 368 624
WIRE 480 672 480 608
WIRE 496 672 480 672
WIRE 896 672 896 608
WIRE 896 672 752 672
WIRE 896 688 896 672
WIRE 992 720 992 704
WIRE 624 768 624 736
WIRE 896 768 896 752
FLAG 992 608 OUT
FLAG 896 768 0
FLAG 992 720 0
FLAG 624 768 0
FLAG 368 640 0
FLAG 368 528 IN
SYMBOL VOLTAGE 368 528 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMATTR SpiceLine Rser=0.1
SYMBOL IND 768 624 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100<30>
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 880 688 R0
SYMATTR InstName C2
SYMATTR Value 100<30>
SYMATTR SpiceLine Rser=0.02
SYMBOL PowerProducts\\LTC1574-5 624 624 R0
SYMATTR InstName U1
SYMBOL res 976 608 R0
SYMATTR InstName Rload
SYMATTR Value 20
TEXT 824 832 Left 2 !.tran 2.5m startup