initial commit

This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
11733 changed files with 1219458 additions and 0 deletions

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Version 4
SHEET 1 1276 680
WIRE 224 144 192 144
WIRE 336 144 304 144
WIRE 192 176 192 144
WIRE 144 192 -208 192
WIRE 336 192 336 144
WIRE -208 208 -208 192
WIRE 144 240 128 240
WIRE 192 272 192 256
WIRE 336 304 336 272
WIRE -208 320 -208 288
FLAG 336 304 0
FLAG 192 272 0
FLAG 128 240 0
FLAG -208 320 0
FLAG -208 192 IN
FLAG 192 144 OUT
SYMBOL sw 192 272 M180
WINDOW 0 12 104 Left 2
WINDOW 3 17 11 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage -208 192 R0
WINDOW 3 13 107 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL voltage 336 176 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
TEXT -224 400 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
TEXT 192 344 Left 2 !.tran 3m
TEXT 96 432 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 56 88 Bottom 2 ;This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.