initial commit

examples/Educational/SampleAndHold.asc

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+Version 4
+SHEET 1 1224 680
+WIRE 128 64 32 64
+WIRE 336 112 304 112
+WIRE 128 160 64 160
+WIRE 32 272 32 64
+WIRE 32 272 -160 272
+WIRE 128 272 32 272
+WIRE -160 288 -160 272
+WIRE 336 320 304 320
+WIRE 64 336 64 160
+WIRE 128 336 64 336
+WIRE -160 384 -160 368
+WIRE 64 400 64 336
+WIRE 64 512 64 480
+FLAG 64 512 0
+FLAG -160 384 0
+FLAG 336 112 A
+FLAG 336 320 B
+FLAG -160 272 IN
+SYMBOL SpecialFunctions\\sample 208 96 R0
+SYMATTR InstName A1
+SYMBOL SpecialFunctions\\sample 208 304 R0
+SYMATTR InstName A2
+SYMBOL voltage -160 272 R0
+WINDOW 3 23 92 Left 2
+WINDOW 123 0 0 Left 2
+WINDOW 39 0 0 Left 2
+SYMATTR Value SINE(0 1 300)
+SYMATTR InstName V1
+SYMBOL voltage 64 384 R0
+WINDOW 0 18 18 Left 2
+WINDOW 3 23 97 Left 2
+SYMATTR InstName V2
+SYMATTR Value PULSE(0 1 0 1u 1u 50u 100u)
+TEXT 472 528 Left 2 !.tran 10m
+TEXT 208 552 Top 1 ;This example schematic is supplied for informational/educational purposes only.
+TEXT 360 112 Left 2 ;This output follows the input whenever the S/H input is true.
+TEXT 360 320 Left 2 ;This output latches to the input when the CLK input goes TRUE.
+TEXT 208 -8 Bottom 2 ;The behavioral Sample and Hold has two modes of operation.