seppl/LTSpiceXVII
0
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

initial commit

Browse Source
This commit is contained in:
Joseph Hopfmüller
2023-01-23 08:17:09 +01:00
commit 1d8dca1c6c
11733 changed files with 1219458 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
examples/Educational/HalfSlope.asc Normal file
View File

@@ -0,0 +1,33 @@
Version 4
SHEET 1 1640 904
WIRE 1344 560 1232 560
WIRE 1488 560 1344 560
WIRE 1232 576 1232 560
WIRE 1344 576 1344 560
WIRE 1184 592 544 592
WIRE 544 608 544 592
WIRE 1184 640 1168 640
WIRE 1168 672 1168 640
WIRE 1232 672 1232 656
WIRE 1344 672 1344 656
WIRE 544 720 544 688
FLAG 544 720 0
FLAG 1344 672 0
FLAG 1232 672 0
FLAG 1168 672 0
FLAG 1488 560 B
SYMBOL voltage 544 592 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 5u 10u) AC 1
SYMBOL g 1232 560 R0
WINDOW 0 28 24 Left 2
WINDOW 3 -136 160 Left 2
SYMATTR InstName G2
SYMATTR Value Laplace=1/sqrt(1+1u*s)/(1+5n*s)**2
SYMBOL res 1328 560 R0
SYMATTR InstName R1
SYMATTR Value 1.
TEXT 744 800 Left 2 !*.ac oct 20 1K 10Meg
TEXT 744 760 Left 2 !.tran 30u
TEXT 1040 552 Bottom 2 ;Time domain response of a 3db/octive rolloff
TEXT 1000 848 Top 1 ;This example schematic is supplied for informational/educational purposes only.